1 /* 2 * TI Touch Screen / ADC MFD driver 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation version 2. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/slab.h> 18 #include <linux/err.h> 19 #include <linux/io.h> 20 #include <linux/clk.h> 21 #include <linux/regmap.h> 22 #include <linux/mfd/core.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/of.h> 25 #include <linux/of_device.h> 26 #include <linux/sched.h> 27 28 #include <linux/mfd/ti_am335x_tscadc.h> 29 30 static const struct regmap_config tscadc_regmap_config = { 31 .name = "ti_tscadc", 32 .reg_bits = 32, 33 .reg_stride = 4, 34 .val_bits = 32, 35 }; 36 37 void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val) 38 { 39 unsigned long flags; 40 41 spin_lock_irqsave(&tscadc->reg_lock, flags); 42 tscadc->reg_se_cache |= val; 43 if (tscadc->adc_waiting) 44 wake_up(&tscadc->reg_se_wait); 45 else if (!tscadc->adc_in_use) 46 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 47 48 spin_unlock_irqrestore(&tscadc->reg_lock, flags); 49 } 50 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); 51 52 static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc) 53 { 54 DEFINE_WAIT(wait); 55 u32 reg; 56 57 regmap_read(tscadc->regmap, REG_ADCFSM, ®); 58 if (reg & SEQ_STATUS) { 59 tscadc->adc_waiting = true; 60 prepare_to_wait(&tscadc->reg_se_wait, &wait, 61 TASK_UNINTERRUPTIBLE); 62 spin_unlock_irq(&tscadc->reg_lock); 63 64 schedule(); 65 66 spin_lock_irq(&tscadc->reg_lock); 67 finish_wait(&tscadc->reg_se_wait, &wait); 68 69 /* 70 * Sequencer should either be idle or 71 * busy applying the charge step. 72 */ 73 regmap_read(tscadc->regmap, REG_ADCFSM, ®); 74 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); 75 tscadc->adc_waiting = false; 76 } 77 tscadc->adc_in_use = true; 78 } 79 80 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val) 81 { 82 spin_lock_irq(&tscadc->reg_lock); 83 am335x_tscadc_need_adc(tscadc); 84 85 regmap_write(tscadc->regmap, REG_SE, val); 86 spin_unlock_irq(&tscadc->reg_lock); 87 } 88 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); 89 90 void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc) 91 { 92 unsigned long flags; 93 94 spin_lock_irqsave(&tscadc->reg_lock, flags); 95 tscadc->adc_in_use = false; 96 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 97 spin_unlock_irqrestore(&tscadc->reg_lock, flags); 98 } 99 EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); 100 101 void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val) 102 { 103 unsigned long flags; 104 105 spin_lock_irqsave(&tscadc->reg_lock, flags); 106 tscadc->reg_se_cache &= ~val; 107 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 108 spin_unlock_irqrestore(&tscadc->reg_lock, flags); 109 } 110 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 111 112 static void tscadc_idle_config(struct ti_tscadc_dev *tscadc) 113 { 114 unsigned int idleconfig; 115 116 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 117 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 118 119 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig); 120 } 121 122 static int ti_tscadc_probe(struct platform_device *pdev) 123 { 124 struct ti_tscadc_dev *tscadc; 125 struct resource *res; 126 struct clk *clk; 127 struct device_node *node; 128 struct mfd_cell *cell; 129 struct property *prop; 130 const __be32 *cur; 131 u32 val; 132 int err, ctrl; 133 int clock_rate; 134 int tsc_wires = 0, adc_channels = 0, total_channels; 135 int readouts = 0; 136 137 if (!pdev->dev.of_node) { 138 dev_err(&pdev->dev, "Could not find valid DT data.\n"); 139 return -EINVAL; 140 } 141 142 node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 143 of_property_read_u32(node, "ti,wires", &tsc_wires); 144 of_property_read_u32(node, "ti,coordiante-readouts", &readouts); 145 146 node = of_get_child_by_name(pdev->dev.of_node, "adc"); 147 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { 148 adc_channels++; 149 if (val > 7) { 150 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", 151 val); 152 return -EINVAL; 153 } 154 } 155 total_channels = tsc_wires + adc_channels; 156 if (total_channels > 8) { 157 dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 158 return -EINVAL; 159 } 160 if (total_channels == 0) { 161 dev_err(&pdev->dev, "Need atleast one channel.\n"); 162 return -EINVAL; 163 } 164 165 if (readouts * 2 + 2 + adc_channels > 16) { 166 dev_err(&pdev->dev, "Too many step configurations requested\n"); 167 return -EINVAL; 168 } 169 170 /* Allocate memory for device */ 171 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL); 172 if (!tscadc) 173 return -ENOMEM; 174 175 tscadc->dev = &pdev->dev; 176 177 err = platform_get_irq(pdev, 0); 178 if (err < 0) { 179 dev_err(&pdev->dev, "no irq ID is specified.\n"); 180 goto ret; 181 } else 182 tscadc->irq = err; 183 184 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 185 tscadc->tscadc_phys_base = res->start; 186 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res); 187 if (IS_ERR(tscadc->tscadc_base)) 188 return PTR_ERR(tscadc->tscadc_base); 189 190 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev, 191 tscadc->tscadc_base, &tscadc_regmap_config); 192 if (IS_ERR(tscadc->regmap)) { 193 dev_err(&pdev->dev, "regmap init failed\n"); 194 err = PTR_ERR(tscadc->regmap); 195 goto ret; 196 } 197 198 spin_lock_init(&tscadc->reg_lock); 199 init_waitqueue_head(&tscadc->reg_se_wait); 200 201 pm_runtime_enable(&pdev->dev); 202 pm_runtime_get_sync(&pdev->dev); 203 204 /* 205 * The TSC_ADC_Subsystem has 2 clock domains 206 * OCP_CLK and ADC_CLK. 207 * The ADC clock is expected to run at target of 3MHz, 208 * and expected to capture 12-bit data at a rate of 200 KSPS. 209 * The TSC_ADC_SS controller design assumes the OCP clock is 210 * at least 6x faster than the ADC clock. 211 */ 212 clk = devm_clk_get(&pdev->dev, "adc_tsc_fck"); 213 if (IS_ERR(clk)) { 214 dev_err(&pdev->dev, "failed to get TSC fck\n"); 215 err = PTR_ERR(clk); 216 goto err_disable_clk; 217 } 218 clock_rate = clk_get_rate(clk); 219 tscadc->clk_div = clock_rate / ADC_CLK; 220 221 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 222 tscadc->clk_div--; 223 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); 224 225 /* Set the control register bits */ 226 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 227 regmap_write(tscadc->regmap, REG_CTRL, ctrl); 228 229 /* Set register bits for Idle Config Mode */ 230 if (tsc_wires > 0) { 231 tscadc->tsc_wires = tsc_wires; 232 if (tsc_wires == 5) 233 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 234 else 235 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 236 tscadc_idle_config(tscadc); 237 } 238 239 /* Enable the TSC module enable bit */ 240 ctrl |= CNTRLREG_TSCSSENB; 241 regmap_write(tscadc->regmap, REG_CTRL, ctrl); 242 243 tscadc->used_cells = 0; 244 tscadc->tsc_cell = -1; 245 tscadc->adc_cell = -1; 246 247 /* TSC Cell */ 248 if (tsc_wires > 0) { 249 tscadc->tsc_cell = tscadc->used_cells; 250 cell = &tscadc->cells[tscadc->used_cells++]; 251 cell->name = "TI-am335x-tsc"; 252 cell->of_compatible = "ti,am3359-tsc"; 253 cell->platform_data = &tscadc; 254 cell->pdata_size = sizeof(tscadc); 255 } 256 257 /* ADC Cell */ 258 if (adc_channels > 0) { 259 tscadc->adc_cell = tscadc->used_cells; 260 cell = &tscadc->cells[tscadc->used_cells++]; 261 cell->name = "TI-am335x-adc"; 262 cell->of_compatible = "ti,am3359-adc"; 263 cell->platform_data = &tscadc; 264 cell->pdata_size = sizeof(tscadc); 265 } 266 267 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells, 268 tscadc->used_cells, NULL, 0, NULL); 269 if (err < 0) 270 goto err_disable_clk; 271 272 platform_set_drvdata(pdev, tscadc); 273 return 0; 274 275 err_disable_clk: 276 pm_runtime_put_sync(&pdev->dev); 277 pm_runtime_disable(&pdev->dev); 278 ret: 279 return err; 280 } 281 282 static int ti_tscadc_remove(struct platform_device *pdev) 283 { 284 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 285 286 regmap_write(tscadc->regmap, REG_SE, 0x00); 287 288 pm_runtime_put_sync(&pdev->dev); 289 pm_runtime_disable(&pdev->dev); 290 291 mfd_remove_devices(tscadc->dev); 292 293 return 0; 294 } 295 296 static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data) 297 { 298 return device_may_wakeup(dev); 299 } 300 301 static int __maybe_unused tscadc_suspend(struct device *dev) 302 { 303 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); 304 305 regmap_write(tscadc->regmap, REG_SE, 0x00); 306 if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) { 307 u32 ctrl; 308 309 regmap_read(tscadc->regmap, REG_CTRL, &ctrl); 310 ctrl &= ~(CNTRLREG_POWERDOWN); 311 ctrl |= CNTRLREG_TSCSSENB; 312 regmap_write(tscadc->regmap, REG_CTRL, ctrl); 313 } 314 pm_runtime_put_sync(dev); 315 316 return 0; 317 } 318 319 static int __maybe_unused tscadc_resume(struct device *dev) 320 { 321 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); 322 u32 ctrl; 323 324 pm_runtime_get_sync(dev); 325 326 /* context restore */ 327 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 328 regmap_write(tscadc->regmap, REG_CTRL, ctrl); 329 330 if (tscadc->tsc_cell != -1) { 331 if (tscadc->tsc_wires == 5) 332 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 333 else 334 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 335 tscadc_idle_config(tscadc); 336 } 337 ctrl |= CNTRLREG_TSCSSENB; 338 regmap_write(tscadc->regmap, REG_CTRL, ctrl); 339 340 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); 341 342 return 0; 343 } 344 345 static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume); 346 347 static const struct of_device_id ti_tscadc_dt_ids[] = { 348 { .compatible = "ti,am3359-tscadc", }, 349 { } 350 }; 351 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 352 353 static struct platform_driver ti_tscadc_driver = { 354 .driver = { 355 .name = "ti_am3359-tscadc", 356 .pm = &tscadc_pm_ops, 357 .of_match_table = ti_tscadc_dt_ids, 358 }, 359 .probe = ti_tscadc_probe, 360 .remove = ti_tscadc_remove, 361 362 }; 363 364 module_platform_driver(ti_tscadc_driver); 365 366 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 367 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 368 MODULE_LICENSE("GPL"); 369