101636eb9SPatil, Rachna /* 201636eb9SPatil, Rachna * TI Touch Screen / ADC MFD driver 301636eb9SPatil, Rachna * 401636eb9SPatil, Rachna * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 501636eb9SPatil, Rachna * 601636eb9SPatil, Rachna * This program is free software; you can redistribute it and/or 701636eb9SPatil, Rachna * modify it under the terms of the GNU General Public License as 801636eb9SPatil, Rachna * published by the Free Software Foundation version 2. 901636eb9SPatil, Rachna * 1001636eb9SPatil, Rachna * This program is distributed "as is" WITHOUT ANY WARRANTY of any 1101636eb9SPatil, Rachna * kind, whether express or implied; without even the implied warranty 1201636eb9SPatil, Rachna * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1301636eb9SPatil, Rachna * GNU General Public License for more details. 1401636eb9SPatil, Rachna */ 1501636eb9SPatil, Rachna 1601636eb9SPatil, Rachna #include <linux/module.h> 1701636eb9SPatil, Rachna #include <linux/slab.h> 1801636eb9SPatil, Rachna #include <linux/err.h> 1901636eb9SPatil, Rachna #include <linux/io.h> 2001636eb9SPatil, Rachna #include <linux/clk.h> 2101636eb9SPatil, Rachna #include <linux/regmap.h> 2201636eb9SPatil, Rachna #include <linux/mfd/core.h> 2301636eb9SPatil, Rachna #include <linux/pm_runtime.h> 24a6543a1cSPatil, Rachna #include <linux/of.h> 25a6543a1cSPatil, Rachna #include <linux/of_device.h> 267ca6740cSSebastian Andrzej Siewior #include <linux/sched.h> 2701636eb9SPatil, Rachna 2801636eb9SPatil, Rachna #include <linux/mfd/ti_am335x_tscadc.h> 2901636eb9SPatil, Rachna 3001636eb9SPatil, Rachna static const struct regmap_config tscadc_regmap_config = { 3101636eb9SPatil, Rachna .name = "ti_tscadc", 3201636eb9SPatil, Rachna .reg_bits = 32, 3301636eb9SPatil, Rachna .reg_stride = 4, 3401636eb9SPatil, Rachna .val_bits = 32, 3501636eb9SPatil, Rachna }; 3601636eb9SPatil, Rachna 37a318b7d0SAndrew F. Davis void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val) 38abeccee4SPatil, Rachna { 39317b2099SSebastian Andrzej Siewior unsigned long flags; 40317b2099SSebastian Andrzej Siewior 41a318b7d0SAndrew F. Davis spin_lock_irqsave(&tscadc->reg_lock, flags); 42a318b7d0SAndrew F. Davis tscadc->reg_se_cache |= val; 43a318b7d0SAndrew F. Davis if (tscadc->adc_waiting) 44a318b7d0SAndrew F. Davis wake_up(&tscadc->reg_se_wait); 45a318b7d0SAndrew F. Davis else if (!tscadc->adc_in_use) 460d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 477ca6740cSSebastian Andrzej Siewior 48a318b7d0SAndrew F. Davis spin_unlock_irqrestore(&tscadc->reg_lock, flags); 49abeccee4SPatil, Rachna } 507e170c6eSSebastian Andrzej Siewior EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); 517e170c6eSSebastian Andrzej Siewior 52a318b7d0SAndrew F. Davis static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc) 537ca6740cSSebastian Andrzej Siewior { 547ca6740cSSebastian Andrzej Siewior DEFINE_WAIT(wait); 557ca6740cSSebastian Andrzej Siewior u32 reg; 567ca6740cSSebastian Andrzej Siewior 570d3a7cceSAndrew F. Davis regmap_read(tscadc->regmap, REG_ADCFSM, ®); 587ca6740cSSebastian Andrzej Siewior if (reg & SEQ_STATUS) { 59a318b7d0SAndrew F. Davis tscadc->adc_waiting = true; 60a318b7d0SAndrew F. Davis prepare_to_wait(&tscadc->reg_se_wait, &wait, 617ca6740cSSebastian Andrzej Siewior TASK_UNINTERRUPTIBLE); 62a318b7d0SAndrew F. Davis spin_unlock_irq(&tscadc->reg_lock); 637ca6740cSSebastian Andrzej Siewior 647ca6740cSSebastian Andrzej Siewior schedule(); 657ca6740cSSebastian Andrzej Siewior 66a318b7d0SAndrew F. Davis spin_lock_irq(&tscadc->reg_lock); 67a318b7d0SAndrew F. Davis finish_wait(&tscadc->reg_se_wait, &wait); 687ca6740cSSebastian Andrzej Siewior 69b10848e6SVignesh R /* 70b10848e6SVignesh R * Sequencer should either be idle or 71b10848e6SVignesh R * busy applying the charge step. 72b10848e6SVignesh R */ 730d3a7cceSAndrew F. Davis regmap_read(tscadc->regmap, REG_ADCFSM, ®); 74b10848e6SVignesh R WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); 75a318b7d0SAndrew F. Davis tscadc->adc_waiting = false; 767ca6740cSSebastian Andrzej Siewior } 77a318b7d0SAndrew F. Davis tscadc->adc_in_use = true; 787ca6740cSSebastian Andrzej Siewior } 797ca6740cSSebastian Andrzej Siewior 80a318b7d0SAndrew F. Davis void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val) 817e170c6eSSebastian Andrzej Siewior { 82a318b7d0SAndrew F. Davis spin_lock_irq(&tscadc->reg_lock); 83a318b7d0SAndrew F. Davis am335x_tscadc_need_adc(tscadc); 847ca6740cSSebastian Andrzej Siewior 850d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, val); 86a318b7d0SAndrew F. Davis spin_unlock_irq(&tscadc->reg_lock); 877ca6740cSSebastian Andrzej Siewior } 887ca6740cSSebastian Andrzej Siewior EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); 897ca6740cSSebastian Andrzej Siewior 90a318b7d0SAndrew F. Davis void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc) 917ca6740cSSebastian Andrzej Siewior { 927e170c6eSSebastian Andrzej Siewior unsigned long flags; 937e170c6eSSebastian Andrzej Siewior 94a318b7d0SAndrew F. Davis spin_lock_irqsave(&tscadc->reg_lock, flags); 95a318b7d0SAndrew F. Davis tscadc->adc_in_use = false; 960d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 97a318b7d0SAndrew F. Davis spin_unlock_irqrestore(&tscadc->reg_lock, flags); 987e170c6eSSebastian Andrzej Siewior } 997ca6740cSSebastian Andrzej Siewior EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); 100abeccee4SPatil, Rachna 101a318b7d0SAndrew F. Davis void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val) 102abeccee4SPatil, Rachna { 103317b2099SSebastian Andrzej Siewior unsigned long flags; 104317b2099SSebastian Andrzej Siewior 105a318b7d0SAndrew F. Davis spin_lock_irqsave(&tscadc->reg_lock, flags); 106a318b7d0SAndrew F. Davis tscadc->reg_se_cache &= ~val; 1070d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); 108a318b7d0SAndrew F. Davis spin_unlock_irqrestore(&tscadc->reg_lock, flags); 109abeccee4SPatil, Rachna } 110abeccee4SPatil, Rachna EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 111abeccee4SPatil, Rachna 112a318b7d0SAndrew F. Davis static void tscadc_idle_config(struct ti_tscadc_dev *tscadc) 11301636eb9SPatil, Rachna { 11401636eb9SPatil, Rachna unsigned int idleconfig; 11501636eb9SPatil, Rachna 11601636eb9SPatil, Rachna idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 11701636eb9SPatil, Rachna STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 11801636eb9SPatil, Rachna 1190d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig); 12001636eb9SPatil, Rachna } 12101636eb9SPatil, Rachna 122612b95cdSGreg Kroah-Hartman static int ti_tscadc_probe(struct platform_device *pdev) 12301636eb9SPatil, Rachna { 12401636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc; 12501636eb9SPatil, Rachna struct resource *res; 12601636eb9SPatil, Rachna struct clk *clk; 127e368866eSColin Ian King struct device_node *node; 1282b99bafaSPatil, Rachna struct mfd_cell *cell; 12918926edeSSebastian Andrzej Siewior struct property *prop; 13018926edeSSebastian Andrzej Siewior const __be32 *cur; 13118926edeSSebastian Andrzej Siewior u32 val; 13201636eb9SPatil, Rachna int err, ctrl; 133e90f8754SMatthias Kaehlcke int clock_rate; 134a6543a1cSPatil, Rachna int tsc_wires = 0, adc_channels = 0, total_channels; 13518926edeSSebastian Andrzej Siewior int readouts = 0; 13601636eb9SPatil, Rachna 1379e5775f3SSebastian Andrzej Siewior if (!pdev->dev.of_node) { 1389e5775f3SSebastian Andrzej Siewior dev_err(&pdev->dev, "Could not find valid DT data.\n"); 13901636eb9SPatil, Rachna return -EINVAL; 14001636eb9SPatil, Rachna } 14101636eb9SPatil, Rachna 142a6543a1cSPatil, Rachna node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 143a6543a1cSPatil, Rachna of_property_read_u32(node, "ti,wires", &tsc_wires); 14418926edeSSebastian Andrzej Siewior of_property_read_u32(node, "ti,coordiante-readouts", &readouts); 1455e53a69bSPatil, Rachna 146a6543a1cSPatil, Rachna node = of_get_child_by_name(pdev->dev.of_node, "adc"); 14718926edeSSebastian Andrzej Siewior of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { 14818926edeSSebastian Andrzej Siewior adc_channels++; 14918926edeSSebastian Andrzej Siewior if (val > 7) { 15018926edeSSebastian Andrzej Siewior dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", 15118926edeSSebastian Andrzej Siewior val); 15218926edeSSebastian Andrzej Siewior return -EINVAL; 15318926edeSSebastian Andrzej Siewior } 15418926edeSSebastian Andrzej Siewior } 1555e53a69bSPatil, Rachna total_channels = tsc_wires + adc_channels; 1565e53a69bSPatil, Rachna if (total_channels > 8) { 1575e53a69bSPatil, Rachna dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 1585e53a69bSPatil, Rachna return -EINVAL; 1595e53a69bSPatil, Rachna } 16024d5c82fSPantelis Antoniou if (total_channels == 0) { 16124d5c82fSPantelis Antoniou dev_err(&pdev->dev, "Need atleast one channel.\n"); 16224d5c82fSPantelis Antoniou return -EINVAL; 16324d5c82fSPantelis Antoniou } 1642b99bafaSPatil, Rachna 16518926edeSSebastian Andrzej Siewior if (readouts * 2 + 2 + adc_channels > 16) { 16618926edeSSebastian Andrzej Siewior dev_err(&pdev->dev, "Too many step configurations requested\n"); 16718926edeSSebastian Andrzej Siewior return -EINVAL; 16818926edeSSebastian Andrzej Siewior } 16918926edeSSebastian Andrzej Siewior 17001636eb9SPatil, Rachna /* Allocate memory for device */ 171dea1c703SAndrew F. Davis tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL); 172a2e87feeSMarkus Elfring if (!tscadc) 17301636eb9SPatil, Rachna return -ENOMEM; 174a2e87feeSMarkus Elfring 17501636eb9SPatil, Rachna tscadc->dev = &pdev->dev; 1763c39c9c6SPatil, Rachna 1773c39c9c6SPatil, Rachna err = platform_get_irq(pdev, 0); 1783c39c9c6SPatil, Rachna if (err < 0) { 1793c39c9c6SPatil, Rachna dev_err(&pdev->dev, "no irq ID is specified.\n"); 1803c39c9c6SPatil, Rachna goto ret; 1813c39c9c6SPatil, Rachna } else 1823c39c9c6SPatil, Rachna tscadc->irq = err; 18301636eb9SPatil, Rachna 184924ff918SJingoo Han res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 185924ff918SJingoo Han tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res); 186924ff918SJingoo Han if (IS_ERR(tscadc->tscadc_base)) 187924ff918SJingoo Han return PTR_ERR(tscadc->tscadc_base); 18801636eb9SPatil, Rachna 189de98a43eSVignesh Raghavendra tscadc->tscadc_phys_base = res->start; 1900d3a7cceSAndrew F. Davis tscadc->regmap = devm_regmap_init_mmio(&pdev->dev, 19101636eb9SPatil, Rachna tscadc->tscadc_base, &tscadc_regmap_config); 1920d3a7cceSAndrew F. Davis if (IS_ERR(tscadc->regmap)) { 19301636eb9SPatil, Rachna dev_err(&pdev->dev, "regmap init failed\n"); 1940d3a7cceSAndrew F. Davis err = PTR_ERR(tscadc->regmap); 1953c39c9c6SPatil, Rachna goto ret; 19601636eb9SPatil, Rachna } 19701636eb9SPatil, Rachna 198abeccee4SPatil, Rachna spin_lock_init(&tscadc->reg_lock); 1997ca6740cSSebastian Andrzej Siewior init_waitqueue_head(&tscadc->reg_se_wait); 2007ca6740cSSebastian Andrzej Siewior 20101636eb9SPatil, Rachna pm_runtime_enable(&pdev->dev); 20201636eb9SPatil, Rachna pm_runtime_get_sync(&pdev->dev); 20301636eb9SPatil, Rachna 20401636eb9SPatil, Rachna /* 20501636eb9SPatil, Rachna * The TSC_ADC_Subsystem has 2 clock domains 20601636eb9SPatil, Rachna * OCP_CLK and ADC_CLK. 20701636eb9SPatil, Rachna * The ADC clock is expected to run at target of 3MHz, 20801636eb9SPatil, Rachna * and expected to capture 12-bit data at a rate of 200 KSPS. 20901636eb9SPatil, Rachna * The TSC_ADC_SS controller design assumes the OCP clock is 21001636eb9SPatil, Rachna * at least 6x faster than the ADC clock. 21101636eb9SPatil, Rachna */ 212c2b1509cSZumeng Chen clk = devm_clk_get(&pdev->dev, "adc_tsc_fck"); 21301636eb9SPatil, Rachna if (IS_ERR(clk)) { 21401636eb9SPatil, Rachna dev_err(&pdev->dev, "failed to get TSC fck\n"); 21501636eb9SPatil, Rachna err = PTR_ERR(clk); 21601636eb9SPatil, Rachna goto err_disable_clk; 21701636eb9SPatil, Rachna } 21801636eb9SPatil, Rachna clock_rate = clk_get_rate(clk); 219e90f8754SMatthias Kaehlcke tscadc->clk_div = clock_rate / ADC_CLK; 220efe3126aSPatil, Rachna 22101636eb9SPatil, Rachna /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 222e90f8754SMatthias Kaehlcke tscadc->clk_div--; 2230d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); 22401636eb9SPatil, Rachna 22501636eb9SPatil, Rachna /* Set the control register bits */ 226f0933a60SJeff Lance ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 2270d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CTRL, ctrl); 22801636eb9SPatil, Rachna 22901636eb9SPatil, Rachna /* Set register bits for Idle Config Mode */ 230f0933a60SJeff Lance if (tsc_wires > 0) { 231f0933a60SJeff Lance tscadc->tsc_wires = tsc_wires; 232f0933a60SJeff Lance if (tsc_wires == 5) 233f0933a60SJeff Lance ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 234f0933a60SJeff Lance else 235f0933a60SJeff Lance ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 23601636eb9SPatil, Rachna tscadc_idle_config(tscadc); 237f0933a60SJeff Lance } 23801636eb9SPatil, Rachna 23901636eb9SPatil, Rachna /* Enable the TSC module enable bit */ 24001636eb9SPatil, Rachna ctrl |= CNTRLREG_TSCSSENB; 2410d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CTRL, ctrl); 24201636eb9SPatil, Rachna 24324d5c82fSPantelis Antoniou tscadc->used_cells = 0; 24424d5c82fSPantelis Antoniou tscadc->tsc_cell = -1; 24524d5c82fSPantelis Antoniou tscadc->adc_cell = -1; 24624d5c82fSPantelis Antoniou 2472b99bafaSPatil, Rachna /* TSC Cell */ 24824d5c82fSPantelis Antoniou if (tsc_wires > 0) { 24924d5c82fSPantelis Antoniou tscadc->tsc_cell = tscadc->used_cells; 25024d5c82fSPantelis Antoniou cell = &tscadc->cells[tscadc->used_cells++]; 2515f184e63SSebastian Andrzej Siewior cell->name = "TI-am335x-tsc"; 2520396310bSPatil, Rachna cell->of_compatible = "ti,am3359-tsc"; 253a9bce1b0SSebastian Andrzej Siewior cell->platform_data = &tscadc; 254a9bce1b0SSebastian Andrzej Siewior cell->pdata_size = sizeof(tscadc); 25524d5c82fSPantelis Antoniou } 2562b99bafaSPatil, Rachna 2575e53a69bSPatil, Rachna /* ADC Cell */ 25824d5c82fSPantelis Antoniou if (adc_channels > 0) { 25924d5c82fSPantelis Antoniou tscadc->adc_cell = tscadc->used_cells; 26024d5c82fSPantelis Antoniou cell = &tscadc->cells[tscadc->used_cells++]; 2619f99928fSSebastian Andrzej Siewior cell->name = "TI-am335x-adc"; 2626f39ac4eSPatil, Rachna cell->of_compatible = "ti,am3359-adc"; 263a9bce1b0SSebastian Andrzej Siewior cell->platform_data = &tscadc; 264a9bce1b0SSebastian Andrzej Siewior cell->pdata_size = sizeof(tscadc); 26524d5c82fSPantelis Antoniou } 2665e53a69bSPatil, Rachna 267b40ee006SVignesh R err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, 268b40ee006SVignesh R tscadc->cells, tscadc->used_cells, NULL, 269b40ee006SVignesh R 0, NULL); 27001636eb9SPatil, Rachna if (err < 0) 27101636eb9SPatil, Rachna goto err_disable_clk; 27201636eb9SPatil, Rachna 27301636eb9SPatil, Rachna platform_set_drvdata(pdev, tscadc); 27401636eb9SPatil, Rachna return 0; 27501636eb9SPatil, Rachna 27601636eb9SPatil, Rachna err_disable_clk: 27701636eb9SPatil, Rachna pm_runtime_put_sync(&pdev->dev); 27801636eb9SPatil, Rachna pm_runtime_disable(&pdev->dev); 2793c39c9c6SPatil, Rachna ret: 28001636eb9SPatil, Rachna return err; 28101636eb9SPatil, Rachna } 28201636eb9SPatil, Rachna 283612b95cdSGreg Kroah-Hartman static int ti_tscadc_remove(struct platform_device *pdev) 28401636eb9SPatil, Rachna { 28501636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 28601636eb9SPatil, Rachna 2870d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, 0x00); 28801636eb9SPatil, Rachna 28901636eb9SPatil, Rachna pm_runtime_put_sync(&pdev->dev); 29001636eb9SPatil, Rachna pm_runtime_disable(&pdev->dev); 29101636eb9SPatil, Rachna 29201636eb9SPatil, Rachna mfd_remove_devices(tscadc->dev); 29301636eb9SPatil, Rachna 29401636eb9SPatil, Rachna return 0; 29501636eb9SPatil, Rachna } 29601636eb9SPatil, Rachna 297c974ac77SVignesh R static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data) 298c974ac77SVignesh R { 299c974ac77SVignesh R return device_may_wakeup(dev); 300c974ac77SVignesh R } 301c974ac77SVignesh R 302dae936a0SAndrew F. Davis static int __maybe_unused tscadc_suspend(struct device *dev) 30301636eb9SPatil, Rachna { 304a318b7d0SAndrew F. Davis struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); 30501636eb9SPatil, Rachna 3060d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_SE, 0x00); 307c974ac77SVignesh R if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) { 308c974ac77SVignesh R u32 ctrl; 309c974ac77SVignesh R 310c974ac77SVignesh R regmap_read(tscadc->regmap, REG_CTRL, &ctrl); 311c974ac77SVignesh R ctrl &= ~(CNTRLREG_POWERDOWN); 312c974ac77SVignesh R ctrl |= CNTRLREG_TSCSSENB; 313c974ac77SVignesh R regmap_write(tscadc->regmap, REG_CTRL, ctrl); 314c974ac77SVignesh R } 31501636eb9SPatil, Rachna pm_runtime_put_sync(dev); 31601636eb9SPatil, Rachna 31701636eb9SPatil, Rachna return 0; 31801636eb9SPatil, Rachna } 31901636eb9SPatil, Rachna 320dae936a0SAndrew F. Davis static int __maybe_unused tscadc_resume(struct device *dev) 32101636eb9SPatil, Rachna { 322a318b7d0SAndrew F. Davis struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); 323f0933a60SJeff Lance u32 ctrl; 32401636eb9SPatil, Rachna 32501636eb9SPatil, Rachna pm_runtime_get_sync(dev); 32601636eb9SPatil, Rachna 32701636eb9SPatil, Rachna /* context restore */ 328b5f8b763SPatil, Rachna ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 3290d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CTRL, ctrl); 330b5f8b763SPatil, Rachna 331a318b7d0SAndrew F. Davis if (tscadc->tsc_cell != -1) { 332a318b7d0SAndrew F. Davis if (tscadc->tsc_wires == 5) 333f0933a60SJeff Lance ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 334f0933a60SJeff Lance else 335f0933a60SJeff Lance ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 336a318b7d0SAndrew F. Davis tscadc_idle_config(tscadc); 337f0933a60SJeff Lance } 338f0933a60SJeff Lance ctrl |= CNTRLREG_TSCSSENB; 3390d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CTRL, ctrl); 34001636eb9SPatil, Rachna 3410d3a7cceSAndrew F. Davis regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); 342e90f8754SMatthias Kaehlcke 34301636eb9SPatil, Rachna return 0; 34401636eb9SPatil, Rachna } 34501636eb9SPatil, Rachna 346dae936a0SAndrew F. Davis static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume); 34701636eb9SPatil, Rachna 348a6543a1cSPatil, Rachna static const struct of_device_id ti_tscadc_dt_ids[] = { 349a6543a1cSPatil, Rachna { .compatible = "ti,am3359-tscadc", }, 350a6543a1cSPatil, Rachna { } 351a6543a1cSPatil, Rachna }; 352a6543a1cSPatil, Rachna MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 353a6543a1cSPatil, Rachna 35401636eb9SPatil, Rachna static struct platform_driver ti_tscadc_driver = { 35501636eb9SPatil, Rachna .driver = { 356a6543a1cSPatil, Rachna .name = "ti_am3359-tscadc", 357dae936a0SAndrew F. Davis .pm = &tscadc_pm_ops, 358131221bcSSachin Kamat .of_match_table = ti_tscadc_dt_ids, 35901636eb9SPatil, Rachna }, 36001636eb9SPatil, Rachna .probe = ti_tscadc_probe, 361612b95cdSGreg Kroah-Hartman .remove = ti_tscadc_remove, 36201636eb9SPatil, Rachna 36301636eb9SPatil, Rachna }; 36401636eb9SPatil, Rachna 36501636eb9SPatil, Rachna module_platform_driver(ti_tscadc_driver); 36601636eb9SPatil, Rachna 36701636eb9SPatil, Rachna MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 36801636eb9SPatil, Rachna MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 36901636eb9SPatil, Rachna MODULE_LICENSE("GPL"); 370