101636eb9SPatil, Rachna /* 201636eb9SPatil, Rachna * TI Touch Screen / ADC MFD driver 301636eb9SPatil, Rachna * 401636eb9SPatil, Rachna * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 501636eb9SPatil, Rachna * 601636eb9SPatil, Rachna * This program is free software; you can redistribute it and/or 701636eb9SPatil, Rachna * modify it under the terms of the GNU General Public License as 801636eb9SPatil, Rachna * published by the Free Software Foundation version 2. 901636eb9SPatil, Rachna * 1001636eb9SPatil, Rachna * This program is distributed "as is" WITHOUT ANY WARRANTY of any 1101636eb9SPatil, Rachna * kind, whether express or implied; without even the implied warranty 1201636eb9SPatil, Rachna * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1301636eb9SPatil, Rachna * GNU General Public License for more details. 1401636eb9SPatil, Rachna */ 1501636eb9SPatil, Rachna 1601636eb9SPatil, Rachna #include <linux/module.h> 1701636eb9SPatil, Rachna #include <linux/init.h> 1801636eb9SPatil, Rachna #include <linux/slab.h> 1901636eb9SPatil, Rachna #include <linux/err.h> 2001636eb9SPatil, Rachna #include <linux/io.h> 2101636eb9SPatil, Rachna #include <linux/clk.h> 2201636eb9SPatil, Rachna #include <linux/regmap.h> 2301636eb9SPatil, Rachna #include <linux/mfd/core.h> 2401636eb9SPatil, Rachna #include <linux/pm_runtime.h> 25a6543a1cSPatil, Rachna #include <linux/of.h> 26a6543a1cSPatil, Rachna #include <linux/of_device.h> 2701636eb9SPatil, Rachna 2801636eb9SPatil, Rachna #include <linux/mfd/ti_am335x_tscadc.h> 2901636eb9SPatil, Rachna 3001636eb9SPatil, Rachna static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg) 3101636eb9SPatil, Rachna { 3201636eb9SPatil, Rachna unsigned int val; 3301636eb9SPatil, Rachna 3401636eb9SPatil, Rachna regmap_read(tsadc->regmap_tscadc, reg, &val); 3501636eb9SPatil, Rachna return val; 3601636eb9SPatil, Rachna } 3701636eb9SPatil, Rachna 3801636eb9SPatil, Rachna static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg, 3901636eb9SPatil, Rachna unsigned int val) 4001636eb9SPatil, Rachna { 4101636eb9SPatil, Rachna regmap_write(tsadc->regmap_tscadc, reg, val); 4201636eb9SPatil, Rachna } 4301636eb9SPatil, Rachna 4401636eb9SPatil, Rachna static const struct regmap_config tscadc_regmap_config = { 4501636eb9SPatil, Rachna .name = "ti_tscadc", 4601636eb9SPatil, Rachna .reg_bits = 32, 4701636eb9SPatil, Rachna .reg_stride = 4, 4801636eb9SPatil, Rachna .val_bits = 32, 4901636eb9SPatil, Rachna }; 5001636eb9SPatil, Rachna 51abeccee4SPatil, Rachna void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc) 52abeccee4SPatil, Rachna { 53abeccee4SPatil, Rachna tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 54abeccee4SPatil, Rachna } 55abeccee4SPatil, Rachna EXPORT_SYMBOL_GPL(am335x_tsc_se_update); 56abeccee4SPatil, Rachna 57abeccee4SPatil, Rachna void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val) 58abeccee4SPatil, Rachna { 59abeccee4SPatil, Rachna spin_lock(&tsadc->reg_lock); 60abeccee4SPatil, Rachna tsadc->reg_se_cache |= val; 61abeccee4SPatil, Rachna spin_unlock(&tsadc->reg_lock); 62abeccee4SPatil, Rachna 63abeccee4SPatil, Rachna am335x_tsc_se_update(tsadc); 64abeccee4SPatil, Rachna } 65abeccee4SPatil, Rachna EXPORT_SYMBOL_GPL(am335x_tsc_se_set); 66abeccee4SPatil, Rachna 67abeccee4SPatil, Rachna void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val) 68abeccee4SPatil, Rachna { 69abeccee4SPatil, Rachna spin_lock(&tsadc->reg_lock); 70abeccee4SPatil, Rachna tsadc->reg_se_cache &= ~val; 71abeccee4SPatil, Rachna spin_unlock(&tsadc->reg_lock); 72abeccee4SPatil, Rachna 73abeccee4SPatil, Rachna am335x_tsc_se_update(tsadc); 74abeccee4SPatil, Rachna } 75abeccee4SPatil, Rachna EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 76abeccee4SPatil, Rachna 7701636eb9SPatil, Rachna static void tscadc_idle_config(struct ti_tscadc_dev *config) 7801636eb9SPatil, Rachna { 7901636eb9SPatil, Rachna unsigned int idleconfig; 8001636eb9SPatil, Rachna 8101636eb9SPatil, Rachna idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 8201636eb9SPatil, Rachna STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 8301636eb9SPatil, Rachna 8401636eb9SPatil, Rachna tscadc_writel(config, REG_IDLECONFIG, idleconfig); 8501636eb9SPatil, Rachna } 8601636eb9SPatil, Rachna 87612b95cdSGreg Kroah-Hartman static int ti_tscadc_probe(struct platform_device *pdev) 8801636eb9SPatil, Rachna { 8901636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc; 9001636eb9SPatil, Rachna struct resource *res; 9101636eb9SPatil, Rachna struct clk *clk; 92a6543a1cSPatil, Rachna struct device_node *node = pdev->dev.of_node; 932b99bafaSPatil, Rachna struct mfd_cell *cell; 9401636eb9SPatil, Rachna int err, ctrl; 9501636eb9SPatil, Rachna int clk_value, clock_rate; 96a6543a1cSPatil, Rachna int tsc_wires = 0, adc_channels = 0, total_channels; 9701636eb9SPatil, Rachna 989e5775f3SSebastian Andrzej Siewior if (!pdev->dev.of_node) { 999e5775f3SSebastian Andrzej Siewior dev_err(&pdev->dev, "Could not find valid DT data.\n"); 10001636eb9SPatil, Rachna return -EINVAL; 10101636eb9SPatil, Rachna } 10201636eb9SPatil, Rachna 103a6543a1cSPatil, Rachna node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 104a6543a1cSPatil, Rachna of_property_read_u32(node, "ti,wires", &tsc_wires); 1055e53a69bSPatil, Rachna 106a6543a1cSPatil, Rachna node = of_get_child_by_name(pdev->dev.of_node, "adc"); 107a6543a1cSPatil, Rachna of_property_read_u32(node, "ti,adc-channels", &adc_channels); 108a6543a1cSPatil, Rachna 1095e53a69bSPatil, Rachna total_channels = tsc_wires + adc_channels; 1105e53a69bSPatil, Rachna 1115e53a69bSPatil, Rachna if (total_channels > 8) { 1125e53a69bSPatil, Rachna dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 1135e53a69bSPatil, Rachna return -EINVAL; 1145e53a69bSPatil, Rachna } 1152b99bafaSPatil, Rachna 11601636eb9SPatil, Rachna res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 11701636eb9SPatil, Rachna if (!res) { 11801636eb9SPatil, Rachna dev_err(&pdev->dev, "no memory resource defined.\n"); 11901636eb9SPatil, Rachna return -EINVAL; 12001636eb9SPatil, Rachna } 12101636eb9SPatil, Rachna 12201636eb9SPatil, Rachna /* Allocate memory for device */ 12301636eb9SPatil, Rachna tscadc = devm_kzalloc(&pdev->dev, 12401636eb9SPatil, Rachna sizeof(struct ti_tscadc_dev), GFP_KERNEL); 12501636eb9SPatil, Rachna if (!tscadc) { 12601636eb9SPatil, Rachna dev_err(&pdev->dev, "failed to allocate memory.\n"); 12701636eb9SPatil, Rachna return -ENOMEM; 12801636eb9SPatil, Rachna } 12901636eb9SPatil, Rachna tscadc->dev = &pdev->dev; 1303c39c9c6SPatil, Rachna 1313c39c9c6SPatil, Rachna err = platform_get_irq(pdev, 0); 1323c39c9c6SPatil, Rachna if (err < 0) { 1333c39c9c6SPatil, Rachna dev_err(&pdev->dev, "no irq ID is specified.\n"); 1343c39c9c6SPatil, Rachna goto ret; 1353c39c9c6SPatil, Rachna } else 1363c39c9c6SPatil, Rachna tscadc->irq = err; 13701636eb9SPatil, Rachna 13801636eb9SPatil, Rachna res = devm_request_mem_region(&pdev->dev, 13901636eb9SPatil, Rachna res->start, resource_size(res), pdev->name); 14001636eb9SPatil, Rachna if (!res) { 14101636eb9SPatil, Rachna dev_err(&pdev->dev, "failed to reserve registers.\n"); 1423c39c9c6SPatil, Rachna return -EBUSY; 14301636eb9SPatil, Rachna } 14401636eb9SPatil, Rachna 14501636eb9SPatil, Rachna tscadc->tscadc_base = devm_ioremap(&pdev->dev, 14601636eb9SPatil, Rachna res->start, resource_size(res)); 14701636eb9SPatil, Rachna if (!tscadc->tscadc_base) { 14801636eb9SPatil, Rachna dev_err(&pdev->dev, "failed to map registers.\n"); 1493c39c9c6SPatil, Rachna return -ENOMEM; 15001636eb9SPatil, Rachna } 15101636eb9SPatil, Rachna 15201636eb9SPatil, Rachna tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev, 15301636eb9SPatil, Rachna tscadc->tscadc_base, &tscadc_regmap_config); 15401636eb9SPatil, Rachna if (IS_ERR(tscadc->regmap_tscadc)) { 15501636eb9SPatil, Rachna dev_err(&pdev->dev, "regmap init failed\n"); 15601636eb9SPatil, Rachna err = PTR_ERR(tscadc->regmap_tscadc); 1573c39c9c6SPatil, Rachna goto ret; 15801636eb9SPatil, Rachna } 15901636eb9SPatil, Rachna 160abeccee4SPatil, Rachna spin_lock_init(&tscadc->reg_lock); 16101636eb9SPatil, Rachna pm_runtime_enable(&pdev->dev); 16201636eb9SPatil, Rachna pm_runtime_get_sync(&pdev->dev); 16301636eb9SPatil, Rachna 16401636eb9SPatil, Rachna /* 16501636eb9SPatil, Rachna * The TSC_ADC_Subsystem has 2 clock domains 16601636eb9SPatil, Rachna * OCP_CLK and ADC_CLK. 16701636eb9SPatil, Rachna * The ADC clock is expected to run at target of 3MHz, 16801636eb9SPatil, Rachna * and expected to capture 12-bit data at a rate of 200 KSPS. 16901636eb9SPatil, Rachna * The TSC_ADC_SS controller design assumes the OCP clock is 17001636eb9SPatil, Rachna * at least 6x faster than the ADC clock. 17101636eb9SPatil, Rachna */ 17201636eb9SPatil, Rachna clk = clk_get(&pdev->dev, "adc_tsc_fck"); 17301636eb9SPatil, Rachna if (IS_ERR(clk)) { 17401636eb9SPatil, Rachna dev_err(&pdev->dev, "failed to get TSC fck\n"); 17501636eb9SPatil, Rachna err = PTR_ERR(clk); 17601636eb9SPatil, Rachna goto err_disable_clk; 17701636eb9SPatil, Rachna } 17801636eb9SPatil, Rachna clock_rate = clk_get_rate(clk); 17901636eb9SPatil, Rachna clk_put(clk); 18001636eb9SPatil, Rachna clk_value = clock_rate / ADC_CLK; 18101636eb9SPatil, Rachna if (clk_value < MAX_CLK_DIV) { 18201636eb9SPatil, Rachna dev_err(&pdev->dev, "clock input less than min clock requirement\n"); 18301636eb9SPatil, Rachna err = -EINVAL; 18401636eb9SPatil, Rachna goto err_disable_clk; 18501636eb9SPatil, Rachna } 18601636eb9SPatil, Rachna /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 18701636eb9SPatil, Rachna clk_value = clk_value - 1; 18801636eb9SPatil, Rachna tscadc_writel(tscadc, REG_CLKDIV, clk_value); 18901636eb9SPatil, Rachna 19001636eb9SPatil, Rachna /* Set the control register bits */ 19101636eb9SPatil, Rachna ctrl = CNTRLREG_STEPCONFIGWRT | 19201636eb9SPatil, Rachna CNTRLREG_TSCENB | 19301636eb9SPatil, Rachna CNTRLREG_STEPID | 19401636eb9SPatil, Rachna CNTRLREG_4WIRE; 19501636eb9SPatil, Rachna tscadc_writel(tscadc, REG_CTRL, ctrl); 19601636eb9SPatil, Rachna 19701636eb9SPatil, Rachna /* Set register bits for Idle Config Mode */ 19801636eb9SPatil, Rachna tscadc_idle_config(tscadc); 19901636eb9SPatil, Rachna 20001636eb9SPatil, Rachna /* Enable the TSC module enable bit */ 20101636eb9SPatil, Rachna ctrl = tscadc_readl(tscadc, REG_CTRL); 20201636eb9SPatil, Rachna ctrl |= CNTRLREG_TSCSSENB; 20301636eb9SPatil, Rachna tscadc_writel(tscadc, REG_CTRL, ctrl); 20401636eb9SPatil, Rachna 2052b99bafaSPatil, Rachna /* TSC Cell */ 2062b99bafaSPatil, Rachna cell = &tscadc->cells[TSC_CELL]; 2072b99bafaSPatil, Rachna cell->name = "tsc"; 2080396310bSPatil, Rachna cell->of_compatible = "ti,am3359-tsc"; 209a9bce1b0SSebastian Andrzej Siewior cell->platform_data = &tscadc; 210a9bce1b0SSebastian Andrzej Siewior cell->pdata_size = sizeof(tscadc); 2112b99bafaSPatil, Rachna 2125e53a69bSPatil, Rachna /* ADC Cell */ 2135e53a69bSPatil, Rachna cell = &tscadc->cells[ADC_CELL]; 2145e53a69bSPatil, Rachna cell->name = "tiadc"; 2156f39ac4eSPatil, Rachna cell->of_compatible = "ti,am3359-adc"; 216a9bce1b0SSebastian Andrzej Siewior cell->platform_data = &tscadc; 217a9bce1b0SSebastian Andrzej Siewior cell->pdata_size = sizeof(tscadc); 2185e53a69bSPatil, Rachna 21901636eb9SPatil, Rachna err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells, 22001636eb9SPatil, Rachna TSCADC_CELLS, NULL, 0, NULL); 22101636eb9SPatil, Rachna if (err < 0) 22201636eb9SPatil, Rachna goto err_disable_clk; 22301636eb9SPatil, Rachna 22401636eb9SPatil, Rachna device_init_wakeup(&pdev->dev, true); 22501636eb9SPatil, Rachna platform_set_drvdata(pdev, tscadc); 22601636eb9SPatil, Rachna 22701636eb9SPatil, Rachna return 0; 22801636eb9SPatil, Rachna 22901636eb9SPatil, Rachna err_disable_clk: 23001636eb9SPatil, Rachna pm_runtime_put_sync(&pdev->dev); 23101636eb9SPatil, Rachna pm_runtime_disable(&pdev->dev); 2323c39c9c6SPatil, Rachna ret: 23301636eb9SPatil, Rachna return err; 23401636eb9SPatil, Rachna } 23501636eb9SPatil, Rachna 236612b95cdSGreg Kroah-Hartman static int ti_tscadc_remove(struct platform_device *pdev) 23701636eb9SPatil, Rachna { 23801636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 23901636eb9SPatil, Rachna 24001636eb9SPatil, Rachna tscadc_writel(tscadc, REG_SE, 0x00); 24101636eb9SPatil, Rachna 24201636eb9SPatil, Rachna pm_runtime_put_sync(&pdev->dev); 24301636eb9SPatil, Rachna pm_runtime_disable(&pdev->dev); 24401636eb9SPatil, Rachna 24501636eb9SPatil, Rachna mfd_remove_devices(tscadc->dev); 24601636eb9SPatil, Rachna 24701636eb9SPatil, Rachna return 0; 24801636eb9SPatil, Rachna } 24901636eb9SPatil, Rachna 25001636eb9SPatil, Rachna #ifdef CONFIG_PM 25101636eb9SPatil, Rachna static int tscadc_suspend(struct device *dev) 25201636eb9SPatil, Rachna { 25301636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 25401636eb9SPatil, Rachna 25501636eb9SPatil, Rachna tscadc_writel(tscadc_dev, REG_SE, 0x00); 25601636eb9SPatil, Rachna pm_runtime_put_sync(dev); 25701636eb9SPatil, Rachna 25801636eb9SPatil, Rachna return 0; 25901636eb9SPatil, Rachna } 26001636eb9SPatil, Rachna 26101636eb9SPatil, Rachna static int tscadc_resume(struct device *dev) 26201636eb9SPatil, Rachna { 26301636eb9SPatil, Rachna struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 26401636eb9SPatil, Rachna unsigned int restore, ctrl; 26501636eb9SPatil, Rachna 26601636eb9SPatil, Rachna pm_runtime_get_sync(dev); 26701636eb9SPatil, Rachna 26801636eb9SPatil, Rachna /* context restore */ 26901636eb9SPatil, Rachna ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB | 27001636eb9SPatil, Rachna CNTRLREG_STEPID | CNTRLREG_4WIRE; 27101636eb9SPatil, Rachna tscadc_writel(tscadc_dev, REG_CTRL, ctrl); 27201636eb9SPatil, Rachna tscadc_idle_config(tscadc_dev); 273abeccee4SPatil, Rachna am335x_tsc_se_update(tscadc_dev); 27401636eb9SPatil, Rachna restore = tscadc_readl(tscadc_dev, REG_CTRL); 27501636eb9SPatil, Rachna tscadc_writel(tscadc_dev, REG_CTRL, 27601636eb9SPatil, Rachna (restore | CNTRLREG_TSCSSENB)); 27701636eb9SPatil, Rachna 27801636eb9SPatil, Rachna return 0; 27901636eb9SPatil, Rachna } 28001636eb9SPatil, Rachna 28101636eb9SPatil, Rachna static const struct dev_pm_ops tscadc_pm_ops = { 28201636eb9SPatil, Rachna .suspend = tscadc_suspend, 28301636eb9SPatil, Rachna .resume = tscadc_resume, 28401636eb9SPatil, Rachna }; 28501636eb9SPatil, Rachna #define TSCADC_PM_OPS (&tscadc_pm_ops) 28601636eb9SPatil, Rachna #else 28701636eb9SPatil, Rachna #define TSCADC_PM_OPS NULL 28801636eb9SPatil, Rachna #endif 28901636eb9SPatil, Rachna 290a6543a1cSPatil, Rachna static const struct of_device_id ti_tscadc_dt_ids[] = { 291a6543a1cSPatil, Rachna { .compatible = "ti,am3359-tscadc", }, 292a6543a1cSPatil, Rachna { } 293a6543a1cSPatil, Rachna }; 294a6543a1cSPatil, Rachna MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 295a6543a1cSPatil, Rachna 29601636eb9SPatil, Rachna static struct platform_driver ti_tscadc_driver = { 29701636eb9SPatil, Rachna .driver = { 298a6543a1cSPatil, Rachna .name = "ti_am3359-tscadc", 29901636eb9SPatil, Rachna .owner = THIS_MODULE, 30001636eb9SPatil, Rachna .pm = TSCADC_PM_OPS, 301a6543a1cSPatil, Rachna .of_match_table = of_match_ptr(ti_tscadc_dt_ids), 30201636eb9SPatil, Rachna }, 30301636eb9SPatil, Rachna .probe = ti_tscadc_probe, 304612b95cdSGreg Kroah-Hartman .remove = ti_tscadc_remove, 30501636eb9SPatil, Rachna 30601636eb9SPatil, Rachna }; 30701636eb9SPatil, Rachna 30801636eb9SPatil, Rachna module_platform_driver(ti_tscadc_driver); 30901636eb9SPatil, Rachna 31001636eb9SPatil, Rachna MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 31101636eb9SPatil, Rachna MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 31201636eb9SPatil, Rachna MODULE_LICENSE("GPL"); 313