1 /* 2 * ST Microelectronics MFD: stmpe's driver 3 * 4 * Copyright (C) ST-Ericsson SA 2010 5 * 6 * License Terms: GNU General Public License, version 2 7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 8 */ 9 10 #include <linux/err.h> 11 #include <linux/gpio.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/interrupt.h> 15 #include <linux/irq.h> 16 #include <linux/irqdomain.h> 17 #include <linux/of.h> 18 #include <linux/of_gpio.h> 19 #include <linux/pm.h> 20 #include <linux/slab.h> 21 #include <linux/mfd/core.h> 22 #include "stmpe.h" 23 24 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 25 { 26 return stmpe->variant->enable(stmpe, blocks, true); 27 } 28 29 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 30 { 31 return stmpe->variant->enable(stmpe, blocks, false); 32 } 33 34 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) 35 { 36 int ret; 37 38 ret = stmpe->ci->read_byte(stmpe, reg); 39 if (ret < 0) 40 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); 41 42 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); 43 44 return ret; 45 } 46 47 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 48 { 49 int ret; 50 51 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); 52 53 ret = stmpe->ci->write_byte(stmpe, reg, val); 54 if (ret < 0) 55 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); 56 57 return ret; 58 } 59 60 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 61 { 62 int ret; 63 64 ret = __stmpe_reg_read(stmpe, reg); 65 if (ret < 0) 66 return ret; 67 68 ret &= ~mask; 69 ret |= val; 70 71 return __stmpe_reg_write(stmpe, reg, ret); 72 } 73 74 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 75 u8 *values) 76 { 77 int ret; 78 79 ret = stmpe->ci->read_block(stmpe, reg, length, values); 80 if (ret < 0) 81 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); 82 83 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); 84 stmpe_dump_bytes("stmpe rd: ", values, length); 85 86 return ret; 87 } 88 89 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 90 const u8 *values) 91 { 92 int ret; 93 94 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); 95 stmpe_dump_bytes("stmpe wr: ", values, length); 96 97 ret = stmpe->ci->write_block(stmpe, reg, length, values); 98 if (ret < 0) 99 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); 100 101 return ret; 102 } 103 104 /** 105 * stmpe_enable - enable blocks on an STMPE device 106 * @stmpe: Device to work on 107 * @blocks: Mask of blocks (enum stmpe_block values) to enable 108 */ 109 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 110 { 111 int ret; 112 113 mutex_lock(&stmpe->lock); 114 ret = __stmpe_enable(stmpe, blocks); 115 mutex_unlock(&stmpe->lock); 116 117 return ret; 118 } 119 EXPORT_SYMBOL_GPL(stmpe_enable); 120 121 /** 122 * stmpe_disable - disable blocks on an STMPE device 123 * @stmpe: Device to work on 124 * @blocks: Mask of blocks (enum stmpe_block values) to enable 125 */ 126 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 127 { 128 int ret; 129 130 mutex_lock(&stmpe->lock); 131 ret = __stmpe_disable(stmpe, blocks); 132 mutex_unlock(&stmpe->lock); 133 134 return ret; 135 } 136 EXPORT_SYMBOL_GPL(stmpe_disable); 137 138 /** 139 * stmpe_reg_read() - read a single STMPE register 140 * @stmpe: Device to read from 141 * @reg: Register to read 142 */ 143 int stmpe_reg_read(struct stmpe *stmpe, u8 reg) 144 { 145 int ret; 146 147 mutex_lock(&stmpe->lock); 148 ret = __stmpe_reg_read(stmpe, reg); 149 mutex_unlock(&stmpe->lock); 150 151 return ret; 152 } 153 EXPORT_SYMBOL_GPL(stmpe_reg_read); 154 155 /** 156 * stmpe_reg_write() - write a single STMPE register 157 * @stmpe: Device to write to 158 * @reg: Register to write 159 * @val: Value to write 160 */ 161 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 162 { 163 int ret; 164 165 mutex_lock(&stmpe->lock); 166 ret = __stmpe_reg_write(stmpe, reg, val); 167 mutex_unlock(&stmpe->lock); 168 169 return ret; 170 } 171 EXPORT_SYMBOL_GPL(stmpe_reg_write); 172 173 /** 174 * stmpe_set_bits() - set the value of a bitfield in a STMPE register 175 * @stmpe: Device to write to 176 * @reg: Register to write 177 * @mask: Mask of bits to set 178 * @val: Value to set 179 */ 180 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 181 { 182 int ret; 183 184 mutex_lock(&stmpe->lock); 185 ret = __stmpe_set_bits(stmpe, reg, mask, val); 186 mutex_unlock(&stmpe->lock); 187 188 return ret; 189 } 190 EXPORT_SYMBOL_GPL(stmpe_set_bits); 191 192 /** 193 * stmpe_block_read() - read multiple STMPE registers 194 * @stmpe: Device to read from 195 * @reg: First register 196 * @length: Number of registers 197 * @values: Buffer to write to 198 */ 199 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) 200 { 201 int ret; 202 203 mutex_lock(&stmpe->lock); 204 ret = __stmpe_block_read(stmpe, reg, length, values); 205 mutex_unlock(&stmpe->lock); 206 207 return ret; 208 } 209 EXPORT_SYMBOL_GPL(stmpe_block_read); 210 211 /** 212 * stmpe_block_write() - write multiple STMPE registers 213 * @stmpe: Device to write to 214 * @reg: First register 215 * @length: Number of registers 216 * @values: Values to write 217 */ 218 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 219 const u8 *values) 220 { 221 int ret; 222 223 mutex_lock(&stmpe->lock); 224 ret = __stmpe_block_write(stmpe, reg, length, values); 225 mutex_unlock(&stmpe->lock); 226 227 return ret; 228 } 229 EXPORT_SYMBOL_GPL(stmpe_block_write); 230 231 /** 232 * stmpe_set_altfunc()- set the alternate function for STMPE pins 233 * @stmpe: Device to configure 234 * @pins: Bitmask of pins to affect 235 * @block: block to enable alternate functions for 236 * 237 * @pins is assumed to have a bit set for each of the bits whose alternate 238 * function is to be changed, numbered according to the GPIOXY numbers. 239 * 240 * If the GPIO module is not enabled, this function automatically enables it in 241 * order to perform the change. 242 */ 243 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) 244 { 245 struct stmpe_variant_info *variant = stmpe->variant; 246 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; 247 int af_bits = variant->af_bits; 248 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); 249 int mask = (1 << af_bits) - 1; 250 u8 regs[numregs]; 251 int af, afperreg, ret; 252 253 if (!variant->get_altfunc) 254 return 0; 255 256 afperreg = 8 / af_bits; 257 mutex_lock(&stmpe->lock); 258 259 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 260 if (ret < 0) 261 goto out; 262 263 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); 264 if (ret < 0) 265 goto out; 266 267 af = variant->get_altfunc(stmpe, block); 268 269 while (pins) { 270 int pin = __ffs(pins); 271 int regoffset = numregs - (pin / afperreg) - 1; 272 int pos = (pin % afperreg) * (8 / afperreg); 273 274 regs[regoffset] &= ~(mask << pos); 275 regs[regoffset] |= af << pos; 276 277 pins &= ~(1 << pin); 278 } 279 280 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); 281 282 out: 283 mutex_unlock(&stmpe->lock); 284 return ret; 285 } 286 EXPORT_SYMBOL_GPL(stmpe_set_altfunc); 287 288 /* 289 * GPIO (all variants) 290 */ 291 292 static struct resource stmpe_gpio_resources[] = { 293 /* Start and end filled dynamically */ 294 { 295 .flags = IORESOURCE_IRQ, 296 }, 297 }; 298 299 static struct mfd_cell stmpe_gpio_cell = { 300 .name = "stmpe-gpio", 301 .resources = stmpe_gpio_resources, 302 .num_resources = ARRAY_SIZE(stmpe_gpio_resources), 303 }; 304 305 static struct mfd_cell stmpe_gpio_cell_noirq = { 306 .name = "stmpe-gpio", 307 /* gpio cell resources consist of an irq only so no resources here */ 308 }; 309 310 /* 311 * Keypad (1601, 2401, 2403) 312 */ 313 314 static struct resource stmpe_keypad_resources[] = { 315 { 316 .name = "KEYPAD", 317 .flags = IORESOURCE_IRQ, 318 }, 319 { 320 .name = "KEYPAD_OVER", 321 .flags = IORESOURCE_IRQ, 322 }, 323 }; 324 325 static struct mfd_cell stmpe_keypad_cell = { 326 .name = "stmpe-keypad", 327 .resources = stmpe_keypad_resources, 328 .num_resources = ARRAY_SIZE(stmpe_keypad_resources), 329 }; 330 331 /* 332 * STMPE801 333 */ 334 static const u8 stmpe801_regs[] = { 335 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, 336 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, 337 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, 338 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, 339 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, 340 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, 341 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, 342 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, 343 344 }; 345 346 static struct stmpe_variant_block stmpe801_blocks[] = { 347 { 348 .cell = &stmpe_gpio_cell, 349 .irq = 0, 350 .block = STMPE_BLOCK_GPIO, 351 }, 352 }; 353 354 static struct stmpe_variant_block stmpe801_blocks_noirq[] = { 355 { 356 .cell = &stmpe_gpio_cell_noirq, 357 .block = STMPE_BLOCK_GPIO, 358 }, 359 }; 360 361 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, 362 bool enable) 363 { 364 if (blocks & STMPE_BLOCK_GPIO) 365 return 0; 366 else 367 return -EINVAL; 368 } 369 370 static struct stmpe_variant_info stmpe801 = { 371 .name = "stmpe801", 372 .id_val = STMPE801_ID, 373 .id_mask = 0xffff, 374 .num_gpios = 8, 375 .regs = stmpe801_regs, 376 .blocks = stmpe801_blocks, 377 .num_blocks = ARRAY_SIZE(stmpe801_blocks), 378 .num_irqs = STMPE801_NR_INTERNAL_IRQS, 379 .enable = stmpe801_enable, 380 }; 381 382 static struct stmpe_variant_info stmpe801_noirq = { 383 .name = "stmpe801", 384 .id_val = STMPE801_ID, 385 .id_mask = 0xffff, 386 .num_gpios = 8, 387 .regs = stmpe801_regs, 388 .blocks = stmpe801_blocks_noirq, 389 .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), 390 .enable = stmpe801_enable, 391 }; 392 393 /* 394 * Touchscreen (STMPE811 or STMPE610) 395 */ 396 397 static struct resource stmpe_ts_resources[] = { 398 { 399 .name = "TOUCH_DET", 400 .flags = IORESOURCE_IRQ, 401 }, 402 { 403 .name = "FIFO_TH", 404 .flags = IORESOURCE_IRQ, 405 }, 406 }; 407 408 static struct mfd_cell stmpe_ts_cell = { 409 .name = "stmpe-ts", 410 .resources = stmpe_ts_resources, 411 .num_resources = ARRAY_SIZE(stmpe_ts_resources), 412 }; 413 414 /* 415 * STMPE811 or STMPE610 416 */ 417 418 static const u8 stmpe811_regs[] = { 419 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, 420 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, 421 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, 422 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, 423 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, 424 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, 425 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, 426 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, 427 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, 428 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, 429 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, 430 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, 431 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, 432 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, 433 }; 434 435 static struct stmpe_variant_block stmpe811_blocks[] = { 436 { 437 .cell = &stmpe_gpio_cell, 438 .irq = STMPE811_IRQ_GPIOC, 439 .block = STMPE_BLOCK_GPIO, 440 }, 441 { 442 .cell = &stmpe_ts_cell, 443 .irq = STMPE811_IRQ_TOUCH_DET, 444 .block = STMPE_BLOCK_TOUCHSCREEN, 445 }, 446 }; 447 448 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, 449 bool enable) 450 { 451 unsigned int mask = 0; 452 453 if (blocks & STMPE_BLOCK_GPIO) 454 mask |= STMPE811_SYS_CTRL2_GPIO_OFF; 455 456 if (blocks & STMPE_BLOCK_ADC) 457 mask |= STMPE811_SYS_CTRL2_ADC_OFF; 458 459 if (blocks & STMPE_BLOCK_TOUCHSCREEN) 460 mask |= STMPE811_SYS_CTRL2_TSC_OFF; 461 462 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, 463 enable ? 0 : mask); 464 } 465 466 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 467 { 468 /* 0 for touchscreen, 1 for GPIO */ 469 return block != STMPE_BLOCK_TOUCHSCREEN; 470 } 471 472 static struct stmpe_variant_info stmpe811 = { 473 .name = "stmpe811", 474 .id_val = 0x0811, 475 .id_mask = 0xffff, 476 .num_gpios = 8, 477 .af_bits = 1, 478 .regs = stmpe811_regs, 479 .blocks = stmpe811_blocks, 480 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 481 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 482 .enable = stmpe811_enable, 483 .get_altfunc = stmpe811_get_altfunc, 484 }; 485 486 /* Similar to 811, except number of gpios */ 487 static struct stmpe_variant_info stmpe610 = { 488 .name = "stmpe610", 489 .id_val = 0x0811, 490 .id_mask = 0xffff, 491 .num_gpios = 6, 492 .af_bits = 1, 493 .regs = stmpe811_regs, 494 .blocks = stmpe811_blocks, 495 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 496 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 497 .enable = stmpe811_enable, 498 .get_altfunc = stmpe811_get_altfunc, 499 }; 500 501 /* 502 * STMPE1601 503 */ 504 505 static const u8 stmpe1601_regs[] = { 506 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, 507 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, 508 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, 509 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, 510 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, 511 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, 512 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, 513 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, 514 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, 515 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, 516 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, 517 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, 518 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, 519 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, 520 }; 521 522 static struct stmpe_variant_block stmpe1601_blocks[] = { 523 { 524 .cell = &stmpe_gpio_cell, 525 .irq = STMPE1601_IRQ_GPIOC, 526 .block = STMPE_BLOCK_GPIO, 527 }, 528 { 529 .cell = &stmpe_keypad_cell, 530 .irq = STMPE1601_IRQ_KEYPAD, 531 .block = STMPE_BLOCK_KEYPAD, 532 }, 533 }; 534 535 /* supported autosleep timeout delay (in msecs) */ 536 static const int stmpe_autosleep_delay[] = { 537 4, 16, 32, 64, 128, 256, 512, 1024, 538 }; 539 540 static int stmpe_round_timeout(int timeout) 541 { 542 int i; 543 544 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { 545 if (stmpe_autosleep_delay[i] >= timeout) 546 return i; 547 } 548 549 /* 550 * requests for delays longer than supported should not return the 551 * longest supported delay 552 */ 553 return -EINVAL; 554 } 555 556 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) 557 { 558 int ret; 559 560 if (!stmpe->variant->enable_autosleep) 561 return -ENOSYS; 562 563 mutex_lock(&stmpe->lock); 564 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); 565 mutex_unlock(&stmpe->lock); 566 567 return ret; 568 } 569 570 /* 571 * Both stmpe 1601/2403 support same layout for autosleep 572 */ 573 static int stmpe1601_autosleep(struct stmpe *stmpe, 574 int autosleep_timeout) 575 { 576 int ret, timeout; 577 578 /* choose the best available timeout */ 579 timeout = stmpe_round_timeout(autosleep_timeout); 580 if (timeout < 0) { 581 dev_err(stmpe->dev, "invalid timeout\n"); 582 return timeout; 583 } 584 585 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 586 STMPE1601_AUTOSLEEP_TIMEOUT_MASK, 587 timeout); 588 if (ret < 0) 589 return ret; 590 591 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 592 STPME1601_AUTOSLEEP_ENABLE, 593 STPME1601_AUTOSLEEP_ENABLE); 594 } 595 596 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, 597 bool enable) 598 { 599 unsigned int mask = 0; 600 601 if (blocks & STMPE_BLOCK_GPIO) 602 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; 603 604 if (blocks & STMPE_BLOCK_KEYPAD) 605 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; 606 607 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, 608 enable ? mask : 0); 609 } 610 611 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 612 { 613 switch (block) { 614 case STMPE_BLOCK_PWM: 615 return 2; 616 617 case STMPE_BLOCK_KEYPAD: 618 return 1; 619 620 case STMPE_BLOCK_GPIO: 621 default: 622 return 0; 623 } 624 } 625 626 static struct stmpe_variant_info stmpe1601 = { 627 .name = "stmpe1601", 628 .id_val = 0x0210, 629 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ 630 .num_gpios = 16, 631 .af_bits = 2, 632 .regs = stmpe1601_regs, 633 .blocks = stmpe1601_blocks, 634 .num_blocks = ARRAY_SIZE(stmpe1601_blocks), 635 .num_irqs = STMPE1601_NR_INTERNAL_IRQS, 636 .enable = stmpe1601_enable, 637 .get_altfunc = stmpe1601_get_altfunc, 638 .enable_autosleep = stmpe1601_autosleep, 639 }; 640 641 /* 642 * STMPE24XX 643 */ 644 645 static const u8 stmpe24xx_regs[] = { 646 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, 647 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, 648 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, 649 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, 650 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, 651 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, 652 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, 653 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, 654 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, 655 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, 656 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, 657 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, 658 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, 659 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, 660 }; 661 662 static struct stmpe_variant_block stmpe24xx_blocks[] = { 663 { 664 .cell = &stmpe_gpio_cell, 665 .irq = STMPE24XX_IRQ_GPIOC, 666 .block = STMPE_BLOCK_GPIO, 667 }, 668 { 669 .cell = &stmpe_keypad_cell, 670 .irq = STMPE24XX_IRQ_KEYPAD, 671 .block = STMPE_BLOCK_KEYPAD, 672 }, 673 }; 674 675 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 676 bool enable) 677 { 678 unsigned int mask = 0; 679 680 if (blocks & STMPE_BLOCK_GPIO) 681 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; 682 683 if (blocks & STMPE_BLOCK_KEYPAD) 684 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; 685 686 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, 687 enable ? mask : 0); 688 } 689 690 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 691 { 692 switch (block) { 693 case STMPE_BLOCK_ROTATOR: 694 return 2; 695 696 case STMPE_BLOCK_KEYPAD: 697 return 1; 698 699 case STMPE_BLOCK_GPIO: 700 default: 701 return 0; 702 } 703 } 704 705 static struct stmpe_variant_info stmpe2401 = { 706 .name = "stmpe2401", 707 .id_val = 0x0101, 708 .id_mask = 0xffff, 709 .num_gpios = 24, 710 .af_bits = 2, 711 .regs = stmpe24xx_regs, 712 .blocks = stmpe24xx_blocks, 713 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 714 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 715 .enable = stmpe24xx_enable, 716 .get_altfunc = stmpe24xx_get_altfunc, 717 }; 718 719 static struct stmpe_variant_info stmpe2403 = { 720 .name = "stmpe2403", 721 .id_val = 0x0120, 722 .id_mask = 0xffff, 723 .num_gpios = 24, 724 .af_bits = 2, 725 .regs = stmpe24xx_regs, 726 .blocks = stmpe24xx_blocks, 727 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 728 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 729 .enable = stmpe24xx_enable, 730 .get_altfunc = stmpe24xx_get_altfunc, 731 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ 732 }; 733 734 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { 735 [STMPE610] = &stmpe610, 736 [STMPE801] = &stmpe801, 737 [STMPE811] = &stmpe811, 738 [STMPE1601] = &stmpe1601, 739 [STMPE2401] = &stmpe2401, 740 [STMPE2403] = &stmpe2403, 741 }; 742 743 /* 744 * These devices can be connected in a 'no-irq' configuration - the irq pin 745 * is not used and the device cannot interrupt the CPU. Here we only list 746 * devices which support this configuration - the driver will fail probing 747 * for any devices not listed here which are configured in this way. 748 */ 749 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { 750 [STMPE801] = &stmpe801_noirq, 751 }; 752 753 static irqreturn_t stmpe_irq(int irq, void *data) 754 { 755 struct stmpe *stmpe = data; 756 struct stmpe_variant_info *variant = stmpe->variant; 757 int num = DIV_ROUND_UP(variant->num_irqs, 8); 758 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; 759 u8 isr[num]; 760 int ret; 761 int i; 762 763 if (variant->id_val == STMPE801_ID) { 764 int base = irq_create_mapping(stmpe->domain, 0); 765 766 handle_nested_irq(base); 767 return IRQ_HANDLED; 768 } 769 770 ret = stmpe_block_read(stmpe, israddr, num, isr); 771 if (ret < 0) 772 return IRQ_NONE; 773 774 for (i = 0; i < num; i++) { 775 int bank = num - i - 1; 776 u8 status = isr[i]; 777 u8 clear; 778 779 status &= stmpe->ier[bank]; 780 if (!status) 781 continue; 782 783 clear = status; 784 while (status) { 785 int bit = __ffs(status); 786 int line = bank * 8 + bit; 787 int nestedirq = irq_create_mapping(stmpe->domain, line); 788 789 handle_nested_irq(nestedirq); 790 status &= ~(1 << bit); 791 } 792 793 stmpe_reg_write(stmpe, israddr + i, clear); 794 } 795 796 return IRQ_HANDLED; 797 } 798 799 static void stmpe_irq_lock(struct irq_data *data) 800 { 801 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 802 803 mutex_lock(&stmpe->irq_lock); 804 } 805 806 static void stmpe_irq_sync_unlock(struct irq_data *data) 807 { 808 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 809 struct stmpe_variant_info *variant = stmpe->variant; 810 int num = DIV_ROUND_UP(variant->num_irqs, 8); 811 int i; 812 813 for (i = 0; i < num; i++) { 814 u8 new = stmpe->ier[i]; 815 u8 old = stmpe->oldier[i]; 816 817 if (new == old) 818 continue; 819 820 stmpe->oldier[i] = new; 821 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); 822 } 823 824 mutex_unlock(&stmpe->irq_lock); 825 } 826 827 static void stmpe_irq_mask(struct irq_data *data) 828 { 829 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 830 int offset = data->hwirq; 831 int regoffset = offset / 8; 832 int mask = 1 << (offset % 8); 833 834 stmpe->ier[regoffset] &= ~mask; 835 } 836 837 static void stmpe_irq_unmask(struct irq_data *data) 838 { 839 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 840 int offset = data->hwirq; 841 int regoffset = offset / 8; 842 int mask = 1 << (offset % 8); 843 844 stmpe->ier[regoffset] |= mask; 845 } 846 847 static struct irq_chip stmpe_irq_chip = { 848 .name = "stmpe", 849 .irq_bus_lock = stmpe_irq_lock, 850 .irq_bus_sync_unlock = stmpe_irq_sync_unlock, 851 .irq_mask = stmpe_irq_mask, 852 .irq_unmask = stmpe_irq_unmask, 853 }; 854 855 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq, 856 irq_hw_number_t hwirq) 857 { 858 struct stmpe *stmpe = d->host_data; 859 struct irq_chip *chip = NULL; 860 861 if (stmpe->variant->id_val != STMPE801_ID) 862 chip = &stmpe_irq_chip; 863 864 irq_set_chip_data(virq, stmpe); 865 irq_set_chip_and_handler(virq, chip, handle_edge_irq); 866 irq_set_nested_thread(virq, 1); 867 #ifdef CONFIG_ARM 868 set_irq_flags(virq, IRQF_VALID); 869 #else 870 irq_set_noprobe(virq); 871 #endif 872 873 return 0; 874 } 875 876 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) 877 { 878 #ifdef CONFIG_ARM 879 set_irq_flags(virq, 0); 880 #endif 881 irq_set_chip_and_handler(virq, NULL, NULL); 882 irq_set_chip_data(virq, NULL); 883 } 884 885 static struct irq_domain_ops stmpe_irq_ops = { 886 .map = stmpe_irq_map, 887 .unmap = stmpe_irq_unmap, 888 .xlate = irq_domain_xlate_twocell, 889 }; 890 891 static int __devinit stmpe_irq_init(struct stmpe *stmpe, 892 struct device_node *np) 893 { 894 int base = 0; 895 int num_irqs = stmpe->variant->num_irqs; 896 897 if (!np) 898 base = stmpe->irq_base; 899 900 stmpe->domain = irq_domain_add_simple(np, num_irqs, base, 901 &stmpe_irq_ops, stmpe); 902 if (!stmpe->domain) { 903 dev_err(stmpe->dev, "Failed to create irqdomain\n"); 904 return -ENOSYS; 905 } 906 907 return 0; 908 } 909 910 static int __devinit stmpe_chip_init(struct stmpe *stmpe) 911 { 912 unsigned int irq_trigger = stmpe->pdata->irq_trigger; 913 int autosleep_timeout = stmpe->pdata->autosleep_timeout; 914 struct stmpe_variant_info *variant = stmpe->variant; 915 u8 icr = 0; 916 unsigned int id; 917 u8 data[2]; 918 int ret; 919 920 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], 921 ARRAY_SIZE(data), data); 922 if (ret < 0) 923 return ret; 924 925 id = (data[0] << 8) | data[1]; 926 if ((id & variant->id_mask) != variant->id_val) { 927 dev_err(stmpe->dev, "unknown chip id: %#x\n", id); 928 return -EINVAL; 929 } 930 931 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); 932 933 /* Disable all modules -- subdrivers should enable what they need. */ 934 ret = stmpe_disable(stmpe, ~0); 935 if (ret) 936 return ret; 937 938 if (stmpe->irq >= 0) { 939 if (id == STMPE801_ID) 940 icr = STMPE801_REG_SYS_CTRL_INT_EN; 941 else 942 icr = STMPE_ICR_LSB_GIM; 943 944 /* STMPE801 doesn't support Edge interrupts */ 945 if (id != STMPE801_ID) { 946 if (irq_trigger == IRQF_TRIGGER_FALLING || 947 irq_trigger == IRQF_TRIGGER_RISING) 948 icr |= STMPE_ICR_LSB_EDGE; 949 } 950 951 if (irq_trigger == IRQF_TRIGGER_RISING || 952 irq_trigger == IRQF_TRIGGER_HIGH) { 953 if (id == STMPE801_ID) 954 icr |= STMPE801_REG_SYS_CTRL_INT_HI; 955 else 956 icr |= STMPE_ICR_LSB_HIGH; 957 } 958 } 959 960 if (stmpe->pdata->autosleep) { 961 ret = stmpe_autosleep(stmpe, autosleep_timeout); 962 if (ret) 963 return ret; 964 } 965 966 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); 967 } 968 969 static int __devinit stmpe_add_device(struct stmpe *stmpe, 970 struct mfd_cell *cell) 971 { 972 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, 973 NULL, stmpe->irq_base, stmpe->domain); 974 } 975 976 static int __devinit stmpe_devices_init(struct stmpe *stmpe) 977 { 978 struct stmpe_variant_info *variant = stmpe->variant; 979 unsigned int platform_blocks = stmpe->pdata->blocks; 980 int ret = -EINVAL; 981 int i, j; 982 983 for (i = 0; i < variant->num_blocks; i++) { 984 struct stmpe_variant_block *block = &variant->blocks[i]; 985 986 if (!(platform_blocks & block->block)) 987 continue; 988 989 for (j = 0; j < block->cell->num_resources; j++) { 990 struct resource *res = 991 (struct resource *) &block->cell->resources[j]; 992 993 /* Dynamically fill in a variant's IRQ. */ 994 if (res->flags & IORESOURCE_IRQ) 995 res->start = res->end = block->irq + j; 996 } 997 998 platform_blocks &= ~block->block; 999 ret = stmpe_add_device(stmpe, block->cell); 1000 if (ret) 1001 return ret; 1002 } 1003 1004 if (platform_blocks) 1005 dev_warn(stmpe->dev, 1006 "platform wants blocks (%#x) not present on variant", 1007 platform_blocks); 1008 1009 return ret; 1010 } 1011 1012 void __devinit stmpe_of_probe(struct stmpe_platform_data *pdata, 1013 struct device_node *np) 1014 { 1015 struct device_node *child; 1016 1017 pdata->id = -1; 1018 pdata->irq_trigger = IRQF_TRIGGER_NONE; 1019 1020 of_property_read_u32(np, "st,autosleep-timeout", 1021 &pdata->autosleep_timeout); 1022 1023 pdata->autosleep = (pdata->autosleep_timeout) ? true : false; 1024 1025 for_each_child_of_node(np, child) { 1026 if (!strcmp(child->name, "stmpe_gpio")) { 1027 pdata->blocks |= STMPE_BLOCK_GPIO; 1028 } else if (!strcmp(child->name, "stmpe_keypad")) { 1029 pdata->blocks |= STMPE_BLOCK_KEYPAD; 1030 } else if (!strcmp(child->name, "stmpe_touchscreen")) { 1031 pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN; 1032 } else if (!strcmp(child->name, "stmpe_adc")) { 1033 pdata->blocks |= STMPE_BLOCK_ADC; 1034 } else if (!strcmp(child->name, "stmpe_pwm")) { 1035 pdata->blocks |= STMPE_BLOCK_PWM; 1036 } else if (!strcmp(child->name, "stmpe_rotator")) { 1037 pdata->blocks |= STMPE_BLOCK_ROTATOR; 1038 } 1039 } 1040 } 1041 1042 /* Called from client specific probe routines */ 1043 int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum) 1044 { 1045 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); 1046 struct device_node *np = ci->dev->of_node; 1047 struct stmpe *stmpe; 1048 int ret; 1049 1050 if (!pdata) { 1051 if (!np) 1052 return -EINVAL; 1053 1054 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL); 1055 if (!pdata) 1056 return -ENOMEM; 1057 1058 stmpe_of_probe(pdata, np); 1059 } 1060 1061 stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL); 1062 if (!stmpe) 1063 return -ENOMEM; 1064 1065 mutex_init(&stmpe->irq_lock); 1066 mutex_init(&stmpe->lock); 1067 1068 stmpe->dev = ci->dev; 1069 stmpe->client = ci->client; 1070 stmpe->pdata = pdata; 1071 stmpe->irq_base = pdata->irq_base; 1072 stmpe->ci = ci; 1073 stmpe->partnum = partnum; 1074 stmpe->variant = stmpe_variant_info[partnum]; 1075 stmpe->regs = stmpe->variant->regs; 1076 stmpe->num_gpios = stmpe->variant->num_gpios; 1077 dev_set_drvdata(stmpe->dev, stmpe); 1078 1079 if (ci->init) 1080 ci->init(stmpe); 1081 1082 if (pdata->irq_over_gpio) { 1083 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio, 1084 GPIOF_DIR_IN, "stmpe"); 1085 if (ret) { 1086 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", 1087 ret); 1088 return ret; 1089 } 1090 1091 stmpe->irq = gpio_to_irq(pdata->irq_gpio); 1092 } else { 1093 stmpe->irq = ci->irq; 1094 } 1095 1096 if (stmpe->irq < 0) { 1097 /* use alternate variant info for no-irq mode, if supported */ 1098 dev_info(stmpe->dev, 1099 "%s configured in no-irq mode by platform data\n", 1100 stmpe->variant->name); 1101 if (!stmpe_noirq_variant_info[stmpe->partnum]) { 1102 dev_err(stmpe->dev, 1103 "%s does not support no-irq mode!\n", 1104 stmpe->variant->name); 1105 return -ENODEV; 1106 } 1107 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; 1108 } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) { 1109 pdata->irq_trigger = 1110 irqd_get_trigger_type(irq_get_irq_data(stmpe->irq)); 1111 } 1112 1113 ret = stmpe_chip_init(stmpe); 1114 if (ret) 1115 return ret; 1116 1117 if (stmpe->irq >= 0) { 1118 ret = stmpe_irq_init(stmpe, np); 1119 if (ret) 1120 return ret; 1121 1122 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL, 1123 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT, 1124 "stmpe", stmpe); 1125 if (ret) { 1126 dev_err(stmpe->dev, "failed to request IRQ: %d\n", 1127 ret); 1128 return ret; 1129 } 1130 } 1131 1132 ret = stmpe_devices_init(stmpe); 1133 if (!ret) 1134 return 0; 1135 1136 dev_err(stmpe->dev, "failed to add children\n"); 1137 mfd_remove_devices(stmpe->dev); 1138 1139 return ret; 1140 } 1141 1142 int stmpe_remove(struct stmpe *stmpe) 1143 { 1144 mfd_remove_devices(stmpe->dev); 1145 1146 return 0; 1147 } 1148 1149 #ifdef CONFIG_PM 1150 static int stmpe_suspend(struct device *dev) 1151 { 1152 struct stmpe *stmpe = dev_get_drvdata(dev); 1153 1154 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1155 enable_irq_wake(stmpe->irq); 1156 1157 return 0; 1158 } 1159 1160 static int stmpe_resume(struct device *dev) 1161 { 1162 struct stmpe *stmpe = dev_get_drvdata(dev); 1163 1164 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1165 disable_irq_wake(stmpe->irq); 1166 1167 return 0; 1168 } 1169 1170 const struct dev_pm_ops stmpe_dev_pm_ops = { 1171 .suspend = stmpe_suspend, 1172 .resume = stmpe_resume, 1173 }; 1174 #endif 1175