xref: /openbmc/linux/drivers/mfd/stmpe.c (revision abfbd895)
1 /*
2  * ST Microelectronics MFD: stmpe's driver
3  *
4  * Copyright (C) ST-Ericsson SA 2010
5  *
6  * License Terms: GNU General Public License, version 2
7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
8  */
9 
10 #include <linux/err.h>
11 #include <linux/gpio.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16 #include <linux/irqdomain.h>
17 #include <linux/of.h>
18 #include <linux/of_gpio.h>
19 #include <linux/pm.h>
20 #include <linux/slab.h>
21 #include <linux/mfd/core.h>
22 #include <linux/delay.h>
23 #include <linux/regulator/consumer.h>
24 #include "stmpe.h"
25 
26 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
27 {
28 	return stmpe->variant->enable(stmpe, blocks, true);
29 }
30 
31 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
32 {
33 	return stmpe->variant->enable(stmpe, blocks, false);
34 }
35 
36 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
37 {
38 	int ret;
39 
40 	ret = stmpe->ci->read_byte(stmpe, reg);
41 	if (ret < 0)
42 		dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
43 
44 	dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
45 
46 	return ret;
47 }
48 
49 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
50 {
51 	int ret;
52 
53 	dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
54 
55 	ret = stmpe->ci->write_byte(stmpe, reg, val);
56 	if (ret < 0)
57 		dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
58 
59 	return ret;
60 }
61 
62 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
63 {
64 	int ret;
65 
66 	ret = __stmpe_reg_read(stmpe, reg);
67 	if (ret < 0)
68 		return ret;
69 
70 	ret &= ~mask;
71 	ret |= val;
72 
73 	return __stmpe_reg_write(stmpe, reg, ret);
74 }
75 
76 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
77 			      u8 *values)
78 {
79 	int ret;
80 
81 	ret = stmpe->ci->read_block(stmpe, reg, length, values);
82 	if (ret < 0)
83 		dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
84 
85 	dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
86 	stmpe_dump_bytes("stmpe rd: ", values, length);
87 
88 	return ret;
89 }
90 
91 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
92 			const u8 *values)
93 {
94 	int ret;
95 
96 	dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
97 	stmpe_dump_bytes("stmpe wr: ", values, length);
98 
99 	ret = stmpe->ci->write_block(stmpe, reg, length, values);
100 	if (ret < 0)
101 		dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
102 
103 	return ret;
104 }
105 
106 /**
107  * stmpe_enable - enable blocks on an STMPE device
108  * @stmpe:	Device to work on
109  * @blocks:	Mask of blocks (enum stmpe_block values) to enable
110  */
111 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
112 {
113 	int ret;
114 
115 	mutex_lock(&stmpe->lock);
116 	ret = __stmpe_enable(stmpe, blocks);
117 	mutex_unlock(&stmpe->lock);
118 
119 	return ret;
120 }
121 EXPORT_SYMBOL_GPL(stmpe_enable);
122 
123 /**
124  * stmpe_disable - disable blocks on an STMPE device
125  * @stmpe:	Device to work on
126  * @blocks:	Mask of blocks (enum stmpe_block values) to enable
127  */
128 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
129 {
130 	int ret;
131 
132 	mutex_lock(&stmpe->lock);
133 	ret = __stmpe_disable(stmpe, blocks);
134 	mutex_unlock(&stmpe->lock);
135 
136 	return ret;
137 }
138 EXPORT_SYMBOL_GPL(stmpe_disable);
139 
140 /**
141  * stmpe_reg_read() - read a single STMPE register
142  * @stmpe:	Device to read from
143  * @reg:	Register to read
144  */
145 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
146 {
147 	int ret;
148 
149 	mutex_lock(&stmpe->lock);
150 	ret = __stmpe_reg_read(stmpe, reg);
151 	mutex_unlock(&stmpe->lock);
152 
153 	return ret;
154 }
155 EXPORT_SYMBOL_GPL(stmpe_reg_read);
156 
157 /**
158  * stmpe_reg_write() - write a single STMPE register
159  * @stmpe:	Device to write to
160  * @reg:	Register to write
161  * @val:	Value to write
162  */
163 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
164 {
165 	int ret;
166 
167 	mutex_lock(&stmpe->lock);
168 	ret = __stmpe_reg_write(stmpe, reg, val);
169 	mutex_unlock(&stmpe->lock);
170 
171 	return ret;
172 }
173 EXPORT_SYMBOL_GPL(stmpe_reg_write);
174 
175 /**
176  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
177  * @stmpe:	Device to write to
178  * @reg:	Register to write
179  * @mask:	Mask of bits to set
180  * @val:	Value to set
181  */
182 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
183 {
184 	int ret;
185 
186 	mutex_lock(&stmpe->lock);
187 	ret = __stmpe_set_bits(stmpe, reg, mask, val);
188 	mutex_unlock(&stmpe->lock);
189 
190 	return ret;
191 }
192 EXPORT_SYMBOL_GPL(stmpe_set_bits);
193 
194 /**
195  * stmpe_block_read() - read multiple STMPE registers
196  * @stmpe:	Device to read from
197  * @reg:	First register
198  * @length:	Number of registers
199  * @values:	Buffer to write to
200  */
201 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
202 {
203 	int ret;
204 
205 	mutex_lock(&stmpe->lock);
206 	ret = __stmpe_block_read(stmpe, reg, length, values);
207 	mutex_unlock(&stmpe->lock);
208 
209 	return ret;
210 }
211 EXPORT_SYMBOL_GPL(stmpe_block_read);
212 
213 /**
214  * stmpe_block_write() - write multiple STMPE registers
215  * @stmpe:	Device to write to
216  * @reg:	First register
217  * @length:	Number of registers
218  * @values:	Values to write
219  */
220 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
221 		      const u8 *values)
222 {
223 	int ret;
224 
225 	mutex_lock(&stmpe->lock);
226 	ret = __stmpe_block_write(stmpe, reg, length, values);
227 	mutex_unlock(&stmpe->lock);
228 
229 	return ret;
230 }
231 EXPORT_SYMBOL_GPL(stmpe_block_write);
232 
233 /**
234  * stmpe_set_altfunc()- set the alternate function for STMPE pins
235  * @stmpe:	Device to configure
236  * @pins:	Bitmask of pins to affect
237  * @block:	block to enable alternate functions for
238  *
239  * @pins is assumed to have a bit set for each of the bits whose alternate
240  * function is to be changed, numbered according to the GPIOXY numbers.
241  *
242  * If the GPIO module is not enabled, this function automatically enables it in
243  * order to perform the change.
244  */
245 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
246 {
247 	struct stmpe_variant_info *variant = stmpe->variant;
248 	u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
249 	int af_bits = variant->af_bits;
250 	int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
251 	int mask = (1 << af_bits) - 1;
252 	u8 regs[8];
253 	int af, afperreg, ret;
254 
255 	if (!variant->get_altfunc)
256 		return 0;
257 
258 	afperreg = 8 / af_bits;
259 	mutex_lock(&stmpe->lock);
260 
261 	ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
262 	if (ret < 0)
263 		goto out;
264 
265 	ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
266 	if (ret < 0)
267 		goto out;
268 
269 	af = variant->get_altfunc(stmpe, block);
270 
271 	while (pins) {
272 		int pin = __ffs(pins);
273 		int regoffset = numregs - (pin / afperreg) - 1;
274 		int pos = (pin % afperreg) * (8 / afperreg);
275 
276 		regs[regoffset] &= ~(mask << pos);
277 		regs[regoffset] |= af << pos;
278 
279 		pins &= ~(1 << pin);
280 	}
281 
282 	ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
283 
284 out:
285 	mutex_unlock(&stmpe->lock);
286 	return ret;
287 }
288 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
289 
290 /*
291  * GPIO (all variants)
292  */
293 
294 static struct resource stmpe_gpio_resources[] = {
295 	/* Start and end filled dynamically */
296 	{
297 		.flags	= IORESOURCE_IRQ,
298 	},
299 };
300 
301 static const struct mfd_cell stmpe_gpio_cell = {
302 	.name		= "stmpe-gpio",
303 	.of_compatible	= "st,stmpe-gpio",
304 	.resources	= stmpe_gpio_resources,
305 	.num_resources	= ARRAY_SIZE(stmpe_gpio_resources),
306 };
307 
308 static const struct mfd_cell stmpe_gpio_cell_noirq = {
309 	.name		= "stmpe-gpio",
310 	.of_compatible	= "st,stmpe-gpio",
311 	/* gpio cell resources consist of an irq only so no resources here */
312 };
313 
314 /*
315  * Keypad (1601, 2401, 2403)
316  */
317 
318 static struct resource stmpe_keypad_resources[] = {
319 	{
320 		.name	= "KEYPAD",
321 		.flags	= IORESOURCE_IRQ,
322 	},
323 	{
324 		.name	= "KEYPAD_OVER",
325 		.flags	= IORESOURCE_IRQ,
326 	},
327 };
328 
329 static const struct mfd_cell stmpe_keypad_cell = {
330 	.name		= "stmpe-keypad",
331 	.of_compatible  = "st,stmpe-keypad",
332 	.resources	= stmpe_keypad_resources,
333 	.num_resources	= ARRAY_SIZE(stmpe_keypad_resources),
334 };
335 
336 /*
337  * STMPE801
338  */
339 static const u8 stmpe801_regs[] = {
340 	[STMPE_IDX_CHIP_ID]	= STMPE801_REG_CHIP_ID,
341 	[STMPE_IDX_ICR_LSB]	= STMPE801_REG_SYS_CTRL,
342 	[STMPE_IDX_GPMR_LSB]	= STMPE801_REG_GPIO_MP_STA,
343 	[STMPE_IDX_GPSR_LSB]	= STMPE801_REG_GPIO_SET_PIN,
344 	[STMPE_IDX_GPCR_LSB]	= STMPE801_REG_GPIO_SET_PIN,
345 	[STMPE_IDX_GPDR_LSB]	= STMPE801_REG_GPIO_DIR,
346 	[STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
347 	[STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
348 
349 };
350 
351 static struct stmpe_variant_block stmpe801_blocks[] = {
352 	{
353 		.cell	= &stmpe_gpio_cell,
354 		.irq	= 0,
355 		.block	= STMPE_BLOCK_GPIO,
356 	},
357 };
358 
359 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
360 	{
361 		.cell	= &stmpe_gpio_cell_noirq,
362 		.block	= STMPE_BLOCK_GPIO,
363 	},
364 };
365 
366 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
367 			   bool enable)
368 {
369 	if (blocks & STMPE_BLOCK_GPIO)
370 		return 0;
371 	else
372 		return -EINVAL;
373 }
374 
375 static struct stmpe_variant_info stmpe801 = {
376 	.name		= "stmpe801",
377 	.id_val		= STMPE801_ID,
378 	.id_mask	= 0xffff,
379 	.num_gpios	= 8,
380 	.regs		= stmpe801_regs,
381 	.blocks		= stmpe801_blocks,
382 	.num_blocks	= ARRAY_SIZE(stmpe801_blocks),
383 	.num_irqs	= STMPE801_NR_INTERNAL_IRQS,
384 	.enable		= stmpe801_enable,
385 };
386 
387 static struct stmpe_variant_info stmpe801_noirq = {
388 	.name		= "stmpe801",
389 	.id_val		= STMPE801_ID,
390 	.id_mask	= 0xffff,
391 	.num_gpios	= 8,
392 	.regs		= stmpe801_regs,
393 	.blocks		= stmpe801_blocks_noirq,
394 	.num_blocks	= ARRAY_SIZE(stmpe801_blocks_noirq),
395 	.enable		= stmpe801_enable,
396 };
397 
398 /*
399  * Touchscreen (STMPE811 or STMPE610)
400  */
401 
402 static struct resource stmpe_ts_resources[] = {
403 	{
404 		.name	= "TOUCH_DET",
405 		.flags	= IORESOURCE_IRQ,
406 	},
407 	{
408 		.name	= "FIFO_TH",
409 		.flags	= IORESOURCE_IRQ,
410 	},
411 };
412 
413 static const struct mfd_cell stmpe_ts_cell = {
414 	.name		= "stmpe-ts",
415 	.of_compatible	= "st,stmpe-ts",
416 	.resources	= stmpe_ts_resources,
417 	.num_resources	= ARRAY_SIZE(stmpe_ts_resources),
418 };
419 
420 /*
421  * STMPE811 or STMPE610
422  */
423 
424 static const u8 stmpe811_regs[] = {
425 	[STMPE_IDX_CHIP_ID]	= STMPE811_REG_CHIP_ID,
426 	[STMPE_IDX_ICR_LSB]	= STMPE811_REG_INT_CTRL,
427 	[STMPE_IDX_IER_LSB]	= STMPE811_REG_INT_EN,
428 	[STMPE_IDX_ISR_MSB]	= STMPE811_REG_INT_STA,
429 	[STMPE_IDX_GPMR_LSB]	= STMPE811_REG_GPIO_MP_STA,
430 	[STMPE_IDX_GPSR_LSB]	= STMPE811_REG_GPIO_SET_PIN,
431 	[STMPE_IDX_GPCR_LSB]	= STMPE811_REG_GPIO_CLR_PIN,
432 	[STMPE_IDX_GPDR_LSB]	= STMPE811_REG_GPIO_DIR,
433 	[STMPE_IDX_GPRER_LSB]	= STMPE811_REG_GPIO_RE,
434 	[STMPE_IDX_GPFER_LSB]	= STMPE811_REG_GPIO_FE,
435 	[STMPE_IDX_GPAFR_U_MSB]	= STMPE811_REG_GPIO_AF,
436 	[STMPE_IDX_IEGPIOR_LSB]	= STMPE811_REG_GPIO_INT_EN,
437 	[STMPE_IDX_ISGPIOR_MSB]	= STMPE811_REG_GPIO_INT_STA,
438 	[STMPE_IDX_GPEDR_MSB]	= STMPE811_REG_GPIO_ED,
439 };
440 
441 static struct stmpe_variant_block stmpe811_blocks[] = {
442 	{
443 		.cell	= &stmpe_gpio_cell,
444 		.irq	= STMPE811_IRQ_GPIOC,
445 		.block	= STMPE_BLOCK_GPIO,
446 	},
447 	{
448 		.cell	= &stmpe_ts_cell,
449 		.irq	= STMPE811_IRQ_TOUCH_DET,
450 		.block	= STMPE_BLOCK_TOUCHSCREEN,
451 	},
452 };
453 
454 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
455 			   bool enable)
456 {
457 	unsigned int mask = 0;
458 
459 	if (blocks & STMPE_BLOCK_GPIO)
460 		mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
461 
462 	if (blocks & STMPE_BLOCK_ADC)
463 		mask |= STMPE811_SYS_CTRL2_ADC_OFF;
464 
465 	if (blocks & STMPE_BLOCK_TOUCHSCREEN)
466 		mask |= STMPE811_SYS_CTRL2_TSC_OFF;
467 
468 	return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
469 				enable ? 0 : mask);
470 }
471 
472 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
473 {
474 	/* 0 for touchscreen, 1 for GPIO */
475 	return block != STMPE_BLOCK_TOUCHSCREEN;
476 }
477 
478 static struct stmpe_variant_info stmpe811 = {
479 	.name		= "stmpe811",
480 	.id_val		= 0x0811,
481 	.id_mask	= 0xffff,
482 	.num_gpios	= 8,
483 	.af_bits	= 1,
484 	.regs		= stmpe811_regs,
485 	.blocks		= stmpe811_blocks,
486 	.num_blocks	= ARRAY_SIZE(stmpe811_blocks),
487 	.num_irqs	= STMPE811_NR_INTERNAL_IRQS,
488 	.enable		= stmpe811_enable,
489 	.get_altfunc	= stmpe811_get_altfunc,
490 };
491 
492 /* Similar to 811, except number of gpios */
493 static struct stmpe_variant_info stmpe610 = {
494 	.name		= "stmpe610",
495 	.id_val		= 0x0811,
496 	.id_mask	= 0xffff,
497 	.num_gpios	= 6,
498 	.af_bits	= 1,
499 	.regs		= stmpe811_regs,
500 	.blocks		= stmpe811_blocks,
501 	.num_blocks	= ARRAY_SIZE(stmpe811_blocks),
502 	.num_irqs	= STMPE811_NR_INTERNAL_IRQS,
503 	.enable		= stmpe811_enable,
504 	.get_altfunc	= stmpe811_get_altfunc,
505 };
506 
507 /*
508  * STMPE1601
509  */
510 
511 static const u8 stmpe1601_regs[] = {
512 	[STMPE_IDX_CHIP_ID]	= STMPE1601_REG_CHIP_ID,
513 	[STMPE_IDX_ICR_LSB]	= STMPE1601_REG_ICR_LSB,
514 	[STMPE_IDX_IER_LSB]	= STMPE1601_REG_IER_LSB,
515 	[STMPE_IDX_ISR_MSB]	= STMPE1601_REG_ISR_MSB,
516 	[STMPE_IDX_GPMR_LSB]	= STMPE1601_REG_GPIO_MP_LSB,
517 	[STMPE_IDX_GPSR_LSB]	= STMPE1601_REG_GPIO_SET_LSB,
518 	[STMPE_IDX_GPCR_LSB]	= STMPE1601_REG_GPIO_CLR_LSB,
519 	[STMPE_IDX_GPDR_LSB]	= STMPE1601_REG_GPIO_SET_DIR_LSB,
520 	[STMPE_IDX_GPRER_LSB]	= STMPE1601_REG_GPIO_RE_LSB,
521 	[STMPE_IDX_GPFER_LSB]	= STMPE1601_REG_GPIO_FE_LSB,
522 	[STMPE_IDX_GPPUR_LSB]	= STMPE1601_REG_GPIO_PU_LSB,
523 	[STMPE_IDX_GPAFR_U_MSB]	= STMPE1601_REG_GPIO_AF_U_MSB,
524 	[STMPE_IDX_IEGPIOR_LSB]	= STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
525 	[STMPE_IDX_ISGPIOR_MSB]	= STMPE1601_REG_INT_STA_GPIO_MSB,
526 	[STMPE_IDX_GPEDR_MSB]	= STMPE1601_REG_GPIO_ED_MSB,
527 };
528 
529 static struct stmpe_variant_block stmpe1601_blocks[] = {
530 	{
531 		.cell	= &stmpe_gpio_cell,
532 		.irq	= STMPE1601_IRQ_GPIOC,
533 		.block	= STMPE_BLOCK_GPIO,
534 	},
535 	{
536 		.cell	= &stmpe_keypad_cell,
537 		.irq	= STMPE1601_IRQ_KEYPAD,
538 		.block	= STMPE_BLOCK_KEYPAD,
539 	},
540 };
541 
542 /* supported autosleep timeout delay (in msecs) */
543 static const int stmpe_autosleep_delay[] = {
544 	4, 16, 32, 64, 128, 256, 512, 1024,
545 };
546 
547 static int stmpe_round_timeout(int timeout)
548 {
549 	int i;
550 
551 	for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
552 		if (stmpe_autosleep_delay[i] >= timeout)
553 			return i;
554 	}
555 
556 	/*
557 	 * requests for delays longer than supported should not return the
558 	 * longest supported delay
559 	 */
560 	return -EINVAL;
561 }
562 
563 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
564 {
565 	int ret;
566 
567 	if (!stmpe->variant->enable_autosleep)
568 		return -ENOSYS;
569 
570 	mutex_lock(&stmpe->lock);
571 	ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
572 	mutex_unlock(&stmpe->lock);
573 
574 	return ret;
575 }
576 
577 /*
578  * Both stmpe 1601/2403 support same layout for autosleep
579  */
580 static int stmpe1601_autosleep(struct stmpe *stmpe,
581 		int autosleep_timeout)
582 {
583 	int ret, timeout;
584 
585 	/* choose the best available timeout */
586 	timeout = stmpe_round_timeout(autosleep_timeout);
587 	if (timeout < 0) {
588 		dev_err(stmpe->dev, "invalid timeout\n");
589 		return timeout;
590 	}
591 
592 	ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
593 			STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
594 			timeout);
595 	if (ret < 0)
596 		return ret;
597 
598 	return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
599 			STPME1601_AUTOSLEEP_ENABLE,
600 			STPME1601_AUTOSLEEP_ENABLE);
601 }
602 
603 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
604 			    bool enable)
605 {
606 	unsigned int mask = 0;
607 
608 	if (blocks & STMPE_BLOCK_GPIO)
609 		mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
610 	else
611 		mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO;
612 
613 	if (blocks & STMPE_BLOCK_KEYPAD)
614 		mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
615 	else
616 		mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC;
617 
618 	if (blocks & STMPE_BLOCK_PWM)
619 		mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM;
620 	else
621 		mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM;
622 
623 	return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
624 				enable ? mask : 0);
625 }
626 
627 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
628 {
629 	switch (block) {
630 	case STMPE_BLOCK_PWM:
631 		return 2;
632 
633 	case STMPE_BLOCK_KEYPAD:
634 		return 1;
635 
636 	case STMPE_BLOCK_GPIO:
637 	default:
638 		return 0;
639 	}
640 }
641 
642 static struct stmpe_variant_info stmpe1601 = {
643 	.name		= "stmpe1601",
644 	.id_val		= 0x0210,
645 	.id_mask	= 0xfff0,	/* at least 0x0210 and 0x0212 */
646 	.num_gpios	= 16,
647 	.af_bits	= 2,
648 	.regs		= stmpe1601_regs,
649 	.blocks		= stmpe1601_blocks,
650 	.num_blocks	= ARRAY_SIZE(stmpe1601_blocks),
651 	.num_irqs	= STMPE1601_NR_INTERNAL_IRQS,
652 	.enable		= stmpe1601_enable,
653 	.get_altfunc	= stmpe1601_get_altfunc,
654 	.enable_autosleep	= stmpe1601_autosleep,
655 };
656 
657 /*
658  * STMPE1801
659  */
660 static const u8 stmpe1801_regs[] = {
661 	[STMPE_IDX_CHIP_ID]	= STMPE1801_REG_CHIP_ID,
662 	[STMPE_IDX_ICR_LSB]	= STMPE1801_REG_INT_CTRL_LOW,
663 	[STMPE_IDX_IER_LSB]	= STMPE1801_REG_INT_EN_MASK_LOW,
664 	[STMPE_IDX_ISR_LSB]	= STMPE1801_REG_INT_STA_LOW,
665 	[STMPE_IDX_GPMR_LSB]	= STMPE1801_REG_GPIO_MP_LOW,
666 	[STMPE_IDX_GPSR_LSB]	= STMPE1801_REG_GPIO_SET_LOW,
667 	[STMPE_IDX_GPCR_LSB]	= STMPE1801_REG_GPIO_CLR_LOW,
668 	[STMPE_IDX_GPDR_LSB]	= STMPE1801_REG_GPIO_SET_DIR_LOW,
669 	[STMPE_IDX_GPRER_LSB]	= STMPE1801_REG_GPIO_RE_LOW,
670 	[STMPE_IDX_GPFER_LSB]	= STMPE1801_REG_GPIO_FE_LOW,
671 	[STMPE_IDX_GPPUR_LSB]	= STMPE1801_REG_GPIO_PULL_UP_LOW,
672 	[STMPE_IDX_IEGPIOR_LSB]	= STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
673 	[STMPE_IDX_ISGPIOR_LSB]	= STMPE1801_REG_INT_STA_GPIO_LOW,
674 };
675 
676 static struct stmpe_variant_block stmpe1801_blocks[] = {
677 	{
678 		.cell	= &stmpe_gpio_cell,
679 		.irq	= STMPE1801_IRQ_GPIOC,
680 		.block	= STMPE_BLOCK_GPIO,
681 	},
682 	{
683 		.cell	= &stmpe_keypad_cell,
684 		.irq	= STMPE1801_IRQ_KEYPAD,
685 		.block	= STMPE_BLOCK_KEYPAD,
686 	},
687 };
688 
689 static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
690 			    bool enable)
691 {
692 	unsigned int mask = 0;
693 	if (blocks & STMPE_BLOCK_GPIO)
694 		mask |= STMPE1801_MSK_INT_EN_GPIO;
695 
696 	if (blocks & STMPE_BLOCK_KEYPAD)
697 		mask |= STMPE1801_MSK_INT_EN_KPC;
698 
699 	return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
700 				enable ? mask : 0);
701 }
702 
703 static int stmpe1801_reset(struct stmpe *stmpe)
704 {
705 	unsigned long timeout;
706 	int ret = 0;
707 
708 	ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
709 		STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
710 	if (ret < 0)
711 		return ret;
712 
713 	timeout = jiffies + msecs_to_jiffies(100);
714 	while (time_before(jiffies, timeout)) {
715 		ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
716 		if (ret < 0)
717 			return ret;
718 		if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
719 			return 0;
720 		usleep_range(100, 200);
721 	}
722 	return -EIO;
723 }
724 
725 static struct stmpe_variant_info stmpe1801 = {
726 	.name		= "stmpe1801",
727 	.id_val		= STMPE1801_ID,
728 	.id_mask	= 0xfff0,
729 	.num_gpios	= 18,
730 	.af_bits	= 0,
731 	.regs		= stmpe1801_regs,
732 	.blocks		= stmpe1801_blocks,
733 	.num_blocks	= ARRAY_SIZE(stmpe1801_blocks),
734 	.num_irqs	= STMPE1801_NR_INTERNAL_IRQS,
735 	.enable		= stmpe1801_enable,
736 	/* stmpe1801 do not have any gpio alternate function */
737 	.get_altfunc	= NULL,
738 };
739 
740 /*
741  * STMPE24XX
742  */
743 
744 static const u8 stmpe24xx_regs[] = {
745 	[STMPE_IDX_CHIP_ID]	= STMPE24XX_REG_CHIP_ID,
746 	[STMPE_IDX_ICR_LSB]	= STMPE24XX_REG_ICR_LSB,
747 	[STMPE_IDX_IER_LSB]	= STMPE24XX_REG_IER_LSB,
748 	[STMPE_IDX_ISR_MSB]	= STMPE24XX_REG_ISR_MSB,
749 	[STMPE_IDX_GPMR_LSB]	= STMPE24XX_REG_GPMR_LSB,
750 	[STMPE_IDX_GPSR_LSB]	= STMPE24XX_REG_GPSR_LSB,
751 	[STMPE_IDX_GPCR_LSB]	= STMPE24XX_REG_GPCR_LSB,
752 	[STMPE_IDX_GPDR_LSB]	= STMPE24XX_REG_GPDR_LSB,
753 	[STMPE_IDX_GPRER_LSB]	= STMPE24XX_REG_GPRER_LSB,
754 	[STMPE_IDX_GPFER_LSB]	= STMPE24XX_REG_GPFER_LSB,
755 	[STMPE_IDX_GPPUR_LSB]	= STMPE24XX_REG_GPPUR_LSB,
756 	[STMPE_IDX_GPPDR_LSB]	= STMPE24XX_REG_GPPDR_LSB,
757 	[STMPE_IDX_GPAFR_U_MSB]	= STMPE24XX_REG_GPAFR_U_MSB,
758 	[STMPE_IDX_IEGPIOR_LSB]	= STMPE24XX_REG_IEGPIOR_LSB,
759 	[STMPE_IDX_ISGPIOR_MSB]	= STMPE24XX_REG_ISGPIOR_MSB,
760 	[STMPE_IDX_GPEDR_MSB]	= STMPE24XX_REG_GPEDR_MSB,
761 };
762 
763 static struct stmpe_variant_block stmpe24xx_blocks[] = {
764 	{
765 		.cell	= &stmpe_gpio_cell,
766 		.irq	= STMPE24XX_IRQ_GPIOC,
767 		.block	= STMPE_BLOCK_GPIO,
768 	},
769 	{
770 		.cell	= &stmpe_keypad_cell,
771 		.irq	= STMPE24XX_IRQ_KEYPAD,
772 		.block	= STMPE_BLOCK_KEYPAD,
773 	},
774 };
775 
776 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
777 			    bool enable)
778 {
779 	unsigned int mask = 0;
780 
781 	if (blocks & STMPE_BLOCK_GPIO)
782 		mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
783 
784 	if (blocks & STMPE_BLOCK_KEYPAD)
785 		mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
786 
787 	return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
788 				enable ? mask : 0);
789 }
790 
791 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
792 {
793 	switch (block) {
794 	case STMPE_BLOCK_ROTATOR:
795 		return 2;
796 
797 	case STMPE_BLOCK_KEYPAD:
798 	case STMPE_BLOCK_PWM:
799 		return 1;
800 
801 	case STMPE_BLOCK_GPIO:
802 	default:
803 		return 0;
804 	}
805 }
806 
807 static struct stmpe_variant_info stmpe2401 = {
808 	.name		= "stmpe2401",
809 	.id_val		= 0x0101,
810 	.id_mask	= 0xffff,
811 	.num_gpios	= 24,
812 	.af_bits	= 2,
813 	.regs		= stmpe24xx_regs,
814 	.blocks		= stmpe24xx_blocks,
815 	.num_blocks	= ARRAY_SIZE(stmpe24xx_blocks),
816 	.num_irqs	= STMPE24XX_NR_INTERNAL_IRQS,
817 	.enable		= stmpe24xx_enable,
818 	.get_altfunc	= stmpe24xx_get_altfunc,
819 };
820 
821 static struct stmpe_variant_info stmpe2403 = {
822 	.name		= "stmpe2403",
823 	.id_val		= 0x0120,
824 	.id_mask	= 0xffff,
825 	.num_gpios	= 24,
826 	.af_bits	= 2,
827 	.regs		= stmpe24xx_regs,
828 	.blocks		= stmpe24xx_blocks,
829 	.num_blocks	= ARRAY_SIZE(stmpe24xx_blocks),
830 	.num_irqs	= STMPE24XX_NR_INTERNAL_IRQS,
831 	.enable		= stmpe24xx_enable,
832 	.get_altfunc	= stmpe24xx_get_altfunc,
833 	.enable_autosleep	= stmpe1601_autosleep, /* same as stmpe1601 */
834 };
835 
836 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
837 	[STMPE610]	= &stmpe610,
838 	[STMPE801]	= &stmpe801,
839 	[STMPE811]	= &stmpe811,
840 	[STMPE1601]	= &stmpe1601,
841 	[STMPE1801]	= &stmpe1801,
842 	[STMPE2401]	= &stmpe2401,
843 	[STMPE2403]	= &stmpe2403,
844 };
845 
846 /*
847  * These devices can be connected in a 'no-irq' configuration - the irq pin
848  * is not used and the device cannot interrupt the CPU. Here we only list
849  * devices which support this configuration - the driver will fail probing
850  * for any devices not listed here which are configured in this way.
851  */
852 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
853 	[STMPE801]	= &stmpe801_noirq,
854 };
855 
856 static irqreturn_t stmpe_irq(int irq, void *data)
857 {
858 	struct stmpe *stmpe = data;
859 	struct stmpe_variant_info *variant = stmpe->variant;
860 	int num = DIV_ROUND_UP(variant->num_irqs, 8);
861 	u8 israddr;
862 	u8 isr[3];
863 	int ret;
864 	int i;
865 
866 	if (variant->id_val == STMPE801_ID) {
867 		int base = irq_create_mapping(stmpe->domain, 0);
868 
869 		handle_nested_irq(base);
870 		return IRQ_HANDLED;
871 	}
872 
873 	if (variant->id_val == STMPE1801_ID)
874 		israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
875 	else
876 		israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
877 
878 	ret = stmpe_block_read(stmpe, israddr, num, isr);
879 	if (ret < 0)
880 		return IRQ_NONE;
881 
882 	for (i = 0; i < num; i++) {
883 		int bank = num - i - 1;
884 		u8 status = isr[i];
885 		u8 clear;
886 
887 		status &= stmpe->ier[bank];
888 		if (!status)
889 			continue;
890 
891 		clear = status;
892 		while (status) {
893 			int bit = __ffs(status);
894 			int line = bank * 8 + bit;
895 			int nestedirq = irq_create_mapping(stmpe->domain, line);
896 
897 			handle_nested_irq(nestedirq);
898 			status &= ~(1 << bit);
899 		}
900 
901 		stmpe_reg_write(stmpe, israddr + i, clear);
902 	}
903 
904 	return IRQ_HANDLED;
905 }
906 
907 static void stmpe_irq_lock(struct irq_data *data)
908 {
909 	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
910 
911 	mutex_lock(&stmpe->irq_lock);
912 }
913 
914 static void stmpe_irq_sync_unlock(struct irq_data *data)
915 {
916 	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
917 	struct stmpe_variant_info *variant = stmpe->variant;
918 	int num = DIV_ROUND_UP(variant->num_irqs, 8);
919 	int i;
920 
921 	for (i = 0; i < num; i++) {
922 		u8 new = stmpe->ier[i];
923 		u8 old = stmpe->oldier[i];
924 
925 		if (new == old)
926 			continue;
927 
928 		stmpe->oldier[i] = new;
929 		stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
930 	}
931 
932 	mutex_unlock(&stmpe->irq_lock);
933 }
934 
935 static void stmpe_irq_mask(struct irq_data *data)
936 {
937 	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
938 	int offset = data->hwirq;
939 	int regoffset = offset / 8;
940 	int mask = 1 << (offset % 8);
941 
942 	stmpe->ier[regoffset] &= ~mask;
943 }
944 
945 static void stmpe_irq_unmask(struct irq_data *data)
946 {
947 	struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
948 	int offset = data->hwirq;
949 	int regoffset = offset / 8;
950 	int mask = 1 << (offset % 8);
951 
952 	stmpe->ier[regoffset] |= mask;
953 }
954 
955 static struct irq_chip stmpe_irq_chip = {
956 	.name			= "stmpe",
957 	.irq_bus_lock		= stmpe_irq_lock,
958 	.irq_bus_sync_unlock	= stmpe_irq_sync_unlock,
959 	.irq_mask		= stmpe_irq_mask,
960 	.irq_unmask		= stmpe_irq_unmask,
961 };
962 
963 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
964                                 irq_hw_number_t hwirq)
965 {
966 	struct stmpe *stmpe = d->host_data;
967 	struct irq_chip *chip = NULL;
968 
969 	if (stmpe->variant->id_val != STMPE801_ID)
970 		chip = &stmpe_irq_chip;
971 
972 	irq_set_chip_data(virq, stmpe);
973 	irq_set_chip_and_handler(virq, chip, handle_edge_irq);
974 	irq_set_nested_thread(virq, 1);
975 	irq_set_noprobe(virq);
976 
977 	return 0;
978 }
979 
980 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
981 {
982 		irq_set_chip_and_handler(virq, NULL, NULL);
983 		irq_set_chip_data(virq, NULL);
984 }
985 
986 static const struct irq_domain_ops stmpe_irq_ops = {
987         .map    = stmpe_irq_map,
988         .unmap  = stmpe_irq_unmap,
989         .xlate  = irq_domain_xlate_twocell,
990 };
991 
992 static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
993 {
994 	int base = 0;
995 	int num_irqs = stmpe->variant->num_irqs;
996 
997 	stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
998 					      &stmpe_irq_ops, stmpe);
999 	if (!stmpe->domain) {
1000 		dev_err(stmpe->dev, "Failed to create irqdomain\n");
1001 		return -ENOSYS;
1002 	}
1003 
1004 	return 0;
1005 }
1006 
1007 static int stmpe_chip_init(struct stmpe *stmpe)
1008 {
1009 	unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1010 	int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1011 	struct stmpe_variant_info *variant = stmpe->variant;
1012 	u8 icr = 0;
1013 	unsigned int id;
1014 	u8 data[2];
1015 	int ret;
1016 
1017 	ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
1018 			       ARRAY_SIZE(data), data);
1019 	if (ret < 0)
1020 		return ret;
1021 
1022 	id = (data[0] << 8) | data[1];
1023 	if ((id & variant->id_mask) != variant->id_val) {
1024 		dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
1025 		return -EINVAL;
1026 	}
1027 
1028 	dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
1029 
1030 	/* Disable all modules -- subdrivers should enable what they need. */
1031 	ret = stmpe_disable(stmpe, ~0);
1032 	if (ret)
1033 		return ret;
1034 
1035 	if (id == STMPE1801_ID)	{
1036 		ret =  stmpe1801_reset(stmpe);
1037 		if (ret < 0)
1038 			return ret;
1039 	}
1040 
1041 	if (stmpe->irq >= 0) {
1042 		if (id == STMPE801_ID)
1043 			icr = STMPE801_REG_SYS_CTRL_INT_EN;
1044 		else
1045 			icr = STMPE_ICR_LSB_GIM;
1046 
1047 		/* STMPE801 doesn't support Edge interrupts */
1048 		if (id != STMPE801_ID) {
1049 			if (irq_trigger == IRQF_TRIGGER_FALLING ||
1050 					irq_trigger == IRQF_TRIGGER_RISING)
1051 				icr |= STMPE_ICR_LSB_EDGE;
1052 		}
1053 
1054 		if (irq_trigger == IRQF_TRIGGER_RISING ||
1055 				irq_trigger == IRQF_TRIGGER_HIGH) {
1056 			if (id == STMPE801_ID)
1057 				icr |= STMPE801_REG_SYS_CTRL_INT_HI;
1058 			else
1059 				icr |= STMPE_ICR_LSB_HIGH;
1060 		}
1061 	}
1062 
1063 	if (stmpe->pdata->autosleep) {
1064 		ret = stmpe_autosleep(stmpe, autosleep_timeout);
1065 		if (ret)
1066 			return ret;
1067 	}
1068 
1069 	return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
1070 }
1071 
1072 static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1073 {
1074 	return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1075 			       NULL, 0, stmpe->domain);
1076 }
1077 
1078 static int stmpe_devices_init(struct stmpe *stmpe)
1079 {
1080 	struct stmpe_variant_info *variant = stmpe->variant;
1081 	unsigned int platform_blocks = stmpe->pdata->blocks;
1082 	int ret = -EINVAL;
1083 	int i, j;
1084 
1085 	for (i = 0; i < variant->num_blocks; i++) {
1086 		struct stmpe_variant_block *block = &variant->blocks[i];
1087 
1088 		if (!(platform_blocks & block->block))
1089 			continue;
1090 
1091 		for (j = 0; j < block->cell->num_resources; j++) {
1092 			struct resource *res =
1093 				(struct resource *) &block->cell->resources[j];
1094 
1095 			/* Dynamically fill in a variant's IRQ. */
1096 			if (res->flags & IORESOURCE_IRQ)
1097 				res->start = res->end = block->irq + j;
1098 		}
1099 
1100 		platform_blocks &= ~block->block;
1101 		ret = stmpe_add_device(stmpe, block->cell);
1102 		if (ret)
1103 			return ret;
1104 	}
1105 
1106 	if (platform_blocks)
1107 		dev_warn(stmpe->dev,
1108 			 "platform wants blocks (%#x) not present on variant",
1109 			 platform_blocks);
1110 
1111 	return ret;
1112 }
1113 
1114 static void stmpe_of_probe(struct stmpe_platform_data *pdata,
1115 			   struct device_node *np)
1116 {
1117 	struct device_node *child;
1118 
1119 	pdata->id = of_alias_get_id(np, "stmpe-i2c");
1120 	if (pdata->id < 0)
1121 		pdata->id = -1;
1122 
1123 	pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0,
1124 				&pdata->irq_trigger);
1125 	if (gpio_is_valid(pdata->irq_gpio))
1126 		pdata->irq_over_gpio = 1;
1127 	else
1128 		pdata->irq_trigger = IRQF_TRIGGER_NONE;
1129 
1130 	of_property_read_u32(np, "st,autosleep-timeout",
1131 			&pdata->autosleep_timeout);
1132 
1133 	pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1134 
1135 	for_each_child_of_node(np, child) {
1136 		if (!strcmp(child->name, "stmpe_gpio")) {
1137 			pdata->blocks |= STMPE_BLOCK_GPIO;
1138 		} else if (!strcmp(child->name, "stmpe_keypad")) {
1139 			pdata->blocks |= STMPE_BLOCK_KEYPAD;
1140 		} else if (!strcmp(child->name, "stmpe_touchscreen")) {
1141 			pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1142 		} else if (!strcmp(child->name, "stmpe_adc")) {
1143 			pdata->blocks |= STMPE_BLOCK_ADC;
1144 		} else if (!strcmp(child->name, "stmpe_pwm")) {
1145 			pdata->blocks |= STMPE_BLOCK_PWM;
1146 		} else if (!strcmp(child->name, "stmpe_rotator")) {
1147 			pdata->blocks |= STMPE_BLOCK_ROTATOR;
1148 		}
1149 	}
1150 }
1151 
1152 /* Called from client specific probe routines */
1153 int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
1154 {
1155 	struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1156 	struct device_node *np = ci->dev->of_node;
1157 	struct stmpe *stmpe;
1158 	int ret;
1159 
1160 	if (!pdata) {
1161 		if (!np)
1162 			return -EINVAL;
1163 
1164 		pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1165 		if (!pdata)
1166 			return -ENOMEM;
1167 
1168 		stmpe_of_probe(pdata, np);
1169 
1170 		if (of_find_property(np, "interrupts", NULL) == NULL)
1171 			ci->irq = -1;
1172 	}
1173 
1174 	stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1175 	if (!stmpe)
1176 		return -ENOMEM;
1177 
1178 	mutex_init(&stmpe->irq_lock);
1179 	mutex_init(&stmpe->lock);
1180 
1181 	stmpe->dev = ci->dev;
1182 	stmpe->client = ci->client;
1183 	stmpe->pdata = pdata;
1184 	stmpe->ci = ci;
1185 	stmpe->partnum = partnum;
1186 	stmpe->variant = stmpe_variant_info[partnum];
1187 	stmpe->regs = stmpe->variant->regs;
1188 	stmpe->num_gpios = stmpe->variant->num_gpios;
1189 	stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc");
1190 	if (!IS_ERR(stmpe->vcc)) {
1191 		ret = regulator_enable(stmpe->vcc);
1192 		if (ret)
1193 			dev_warn(ci->dev, "failed to enable VCC supply\n");
1194 	}
1195 	stmpe->vio = devm_regulator_get_optional(ci->dev, "vio");
1196 	if (!IS_ERR(stmpe->vio)) {
1197 		ret = regulator_enable(stmpe->vio);
1198 		if (ret)
1199 			dev_warn(ci->dev, "failed to enable VIO supply\n");
1200 	}
1201 	dev_set_drvdata(stmpe->dev, stmpe);
1202 
1203 	if (ci->init)
1204 		ci->init(stmpe);
1205 
1206 	if (pdata->irq_over_gpio) {
1207 		ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1208 				GPIOF_DIR_IN, "stmpe");
1209 		if (ret) {
1210 			dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1211 					ret);
1212 			return ret;
1213 		}
1214 
1215 		stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1216 	} else {
1217 		stmpe->irq = ci->irq;
1218 	}
1219 
1220 	if (stmpe->irq < 0) {
1221 		/* use alternate variant info for no-irq mode, if supported */
1222 		dev_info(stmpe->dev,
1223 			"%s configured in no-irq mode by platform data\n",
1224 			stmpe->variant->name);
1225 		if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1226 			dev_err(stmpe->dev,
1227 				"%s does not support no-irq mode!\n",
1228 				stmpe->variant->name);
1229 			return -ENODEV;
1230 		}
1231 		stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1232 	} else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1233 		pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1234 	}
1235 
1236 	ret = stmpe_chip_init(stmpe);
1237 	if (ret)
1238 		return ret;
1239 
1240 	if (stmpe->irq >= 0) {
1241 		ret = stmpe_irq_init(stmpe, np);
1242 		if (ret)
1243 			return ret;
1244 
1245 		ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1246 				stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1247 				"stmpe", stmpe);
1248 		if (ret) {
1249 			dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1250 					ret);
1251 			return ret;
1252 		}
1253 	}
1254 
1255 	ret = stmpe_devices_init(stmpe);
1256 	if (!ret)
1257 		return 0;
1258 
1259 	dev_err(stmpe->dev, "failed to add children\n");
1260 	mfd_remove_devices(stmpe->dev);
1261 
1262 	return ret;
1263 }
1264 
1265 int stmpe_remove(struct stmpe *stmpe)
1266 {
1267 	if (!IS_ERR(stmpe->vio))
1268 		regulator_disable(stmpe->vio);
1269 	if (!IS_ERR(stmpe->vcc))
1270 		regulator_disable(stmpe->vcc);
1271 
1272 	mfd_remove_devices(stmpe->dev);
1273 
1274 	return 0;
1275 }
1276 
1277 #ifdef CONFIG_PM
1278 static int stmpe_suspend(struct device *dev)
1279 {
1280 	struct stmpe *stmpe = dev_get_drvdata(dev);
1281 
1282 	if (stmpe->irq >= 0 && device_may_wakeup(dev))
1283 		enable_irq_wake(stmpe->irq);
1284 
1285 	return 0;
1286 }
1287 
1288 static int stmpe_resume(struct device *dev)
1289 {
1290 	struct stmpe *stmpe = dev_get_drvdata(dev);
1291 
1292 	if (stmpe->irq >= 0 && device_may_wakeup(dev))
1293 		disable_irq_wake(stmpe->irq);
1294 
1295 	return 0;
1296 }
1297 
1298 const struct dev_pm_ops stmpe_dev_pm_ops = {
1299 	.suspend	= stmpe_suspend,
1300 	.resume		= stmpe_resume,
1301 };
1302 #endif
1303