1 /* 2 * ST Microelectronics MFD: stmpe's driver 3 * 4 * Copyright (C) ST-Ericsson SA 2010 5 * 6 * License Terms: GNU General Public License, version 2 7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 8 */ 9 10 #include <linux/gpio.h> 11 #include <linux/export.h> 12 #include <linux/kernel.h> 13 #include <linux/interrupt.h> 14 #include <linux/irq.h> 15 #include <linux/irqdomain.h> 16 #include <linux/pm.h> 17 #include <linux/slab.h> 18 #include <linux/mfd/core.h> 19 #include "stmpe.h" 20 21 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 22 { 23 return stmpe->variant->enable(stmpe, blocks, true); 24 } 25 26 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 27 { 28 return stmpe->variant->enable(stmpe, blocks, false); 29 } 30 31 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) 32 { 33 int ret; 34 35 ret = stmpe->ci->read_byte(stmpe, reg); 36 if (ret < 0) 37 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); 38 39 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); 40 41 return ret; 42 } 43 44 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 45 { 46 int ret; 47 48 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); 49 50 ret = stmpe->ci->write_byte(stmpe, reg, val); 51 if (ret < 0) 52 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); 53 54 return ret; 55 } 56 57 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 58 { 59 int ret; 60 61 ret = __stmpe_reg_read(stmpe, reg); 62 if (ret < 0) 63 return ret; 64 65 ret &= ~mask; 66 ret |= val; 67 68 return __stmpe_reg_write(stmpe, reg, ret); 69 } 70 71 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 72 u8 *values) 73 { 74 int ret; 75 76 ret = stmpe->ci->read_block(stmpe, reg, length, values); 77 if (ret < 0) 78 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); 79 80 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); 81 stmpe_dump_bytes("stmpe rd: ", values, length); 82 83 return ret; 84 } 85 86 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 87 const u8 *values) 88 { 89 int ret; 90 91 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); 92 stmpe_dump_bytes("stmpe wr: ", values, length); 93 94 ret = stmpe->ci->write_block(stmpe, reg, length, values); 95 if (ret < 0) 96 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); 97 98 return ret; 99 } 100 101 /** 102 * stmpe_enable - enable blocks on an STMPE device 103 * @stmpe: Device to work on 104 * @blocks: Mask of blocks (enum stmpe_block values) to enable 105 */ 106 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 107 { 108 int ret; 109 110 mutex_lock(&stmpe->lock); 111 ret = __stmpe_enable(stmpe, blocks); 112 mutex_unlock(&stmpe->lock); 113 114 return ret; 115 } 116 EXPORT_SYMBOL_GPL(stmpe_enable); 117 118 /** 119 * stmpe_disable - disable blocks on an STMPE device 120 * @stmpe: Device to work on 121 * @blocks: Mask of blocks (enum stmpe_block values) to enable 122 */ 123 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 124 { 125 int ret; 126 127 mutex_lock(&stmpe->lock); 128 ret = __stmpe_disable(stmpe, blocks); 129 mutex_unlock(&stmpe->lock); 130 131 return ret; 132 } 133 EXPORT_SYMBOL_GPL(stmpe_disable); 134 135 /** 136 * stmpe_reg_read() - read a single STMPE register 137 * @stmpe: Device to read from 138 * @reg: Register to read 139 */ 140 int stmpe_reg_read(struct stmpe *stmpe, u8 reg) 141 { 142 int ret; 143 144 mutex_lock(&stmpe->lock); 145 ret = __stmpe_reg_read(stmpe, reg); 146 mutex_unlock(&stmpe->lock); 147 148 return ret; 149 } 150 EXPORT_SYMBOL_GPL(stmpe_reg_read); 151 152 /** 153 * stmpe_reg_write() - write a single STMPE register 154 * @stmpe: Device to write to 155 * @reg: Register to write 156 * @val: Value to write 157 */ 158 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 159 { 160 int ret; 161 162 mutex_lock(&stmpe->lock); 163 ret = __stmpe_reg_write(stmpe, reg, val); 164 mutex_unlock(&stmpe->lock); 165 166 return ret; 167 } 168 EXPORT_SYMBOL_GPL(stmpe_reg_write); 169 170 /** 171 * stmpe_set_bits() - set the value of a bitfield in a STMPE register 172 * @stmpe: Device to write to 173 * @reg: Register to write 174 * @mask: Mask of bits to set 175 * @val: Value to set 176 */ 177 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 178 { 179 int ret; 180 181 mutex_lock(&stmpe->lock); 182 ret = __stmpe_set_bits(stmpe, reg, mask, val); 183 mutex_unlock(&stmpe->lock); 184 185 return ret; 186 } 187 EXPORT_SYMBOL_GPL(stmpe_set_bits); 188 189 /** 190 * stmpe_block_read() - read multiple STMPE registers 191 * @stmpe: Device to read from 192 * @reg: First register 193 * @length: Number of registers 194 * @values: Buffer to write to 195 */ 196 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) 197 { 198 int ret; 199 200 mutex_lock(&stmpe->lock); 201 ret = __stmpe_block_read(stmpe, reg, length, values); 202 mutex_unlock(&stmpe->lock); 203 204 return ret; 205 } 206 EXPORT_SYMBOL_GPL(stmpe_block_read); 207 208 /** 209 * stmpe_block_write() - write multiple STMPE registers 210 * @stmpe: Device to write to 211 * @reg: First register 212 * @length: Number of registers 213 * @values: Values to write 214 */ 215 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 216 const u8 *values) 217 { 218 int ret; 219 220 mutex_lock(&stmpe->lock); 221 ret = __stmpe_block_write(stmpe, reg, length, values); 222 mutex_unlock(&stmpe->lock); 223 224 return ret; 225 } 226 EXPORT_SYMBOL_GPL(stmpe_block_write); 227 228 /** 229 * stmpe_set_altfunc()- set the alternate function for STMPE pins 230 * @stmpe: Device to configure 231 * @pins: Bitmask of pins to affect 232 * @block: block to enable alternate functions for 233 * 234 * @pins is assumed to have a bit set for each of the bits whose alternate 235 * function is to be changed, numbered according to the GPIOXY numbers. 236 * 237 * If the GPIO module is not enabled, this function automatically enables it in 238 * order to perform the change. 239 */ 240 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) 241 { 242 struct stmpe_variant_info *variant = stmpe->variant; 243 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; 244 int af_bits = variant->af_bits; 245 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); 246 int mask = (1 << af_bits) - 1; 247 u8 regs[numregs]; 248 int af, afperreg, ret; 249 250 if (!variant->get_altfunc) 251 return 0; 252 253 afperreg = 8 / af_bits; 254 mutex_lock(&stmpe->lock); 255 256 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 257 if (ret < 0) 258 goto out; 259 260 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); 261 if (ret < 0) 262 goto out; 263 264 af = variant->get_altfunc(stmpe, block); 265 266 while (pins) { 267 int pin = __ffs(pins); 268 int regoffset = numregs - (pin / afperreg) - 1; 269 int pos = (pin % afperreg) * (8 / afperreg); 270 271 regs[regoffset] &= ~(mask << pos); 272 regs[regoffset] |= af << pos; 273 274 pins &= ~(1 << pin); 275 } 276 277 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); 278 279 out: 280 mutex_unlock(&stmpe->lock); 281 return ret; 282 } 283 EXPORT_SYMBOL_GPL(stmpe_set_altfunc); 284 285 /* 286 * GPIO (all variants) 287 */ 288 289 static struct resource stmpe_gpio_resources[] = { 290 /* Start and end filled dynamically */ 291 { 292 .flags = IORESOURCE_IRQ, 293 }, 294 }; 295 296 static struct mfd_cell stmpe_gpio_cell = { 297 .name = "stmpe-gpio", 298 .resources = stmpe_gpio_resources, 299 .num_resources = ARRAY_SIZE(stmpe_gpio_resources), 300 }; 301 302 static struct mfd_cell stmpe_gpio_cell_noirq = { 303 .name = "stmpe-gpio", 304 /* gpio cell resources consist of an irq only so no resources here */ 305 }; 306 307 /* 308 * Keypad (1601, 2401, 2403) 309 */ 310 311 static struct resource stmpe_keypad_resources[] = { 312 { 313 .name = "KEYPAD", 314 .flags = IORESOURCE_IRQ, 315 }, 316 { 317 .name = "KEYPAD_OVER", 318 .flags = IORESOURCE_IRQ, 319 }, 320 }; 321 322 static struct mfd_cell stmpe_keypad_cell = { 323 .name = "stmpe-keypad", 324 .resources = stmpe_keypad_resources, 325 .num_resources = ARRAY_SIZE(stmpe_keypad_resources), 326 }; 327 328 /* 329 * STMPE801 330 */ 331 static const u8 stmpe801_regs[] = { 332 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, 333 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, 334 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, 335 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, 336 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, 337 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, 338 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, 339 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, 340 341 }; 342 343 static struct stmpe_variant_block stmpe801_blocks[] = { 344 { 345 .cell = &stmpe_gpio_cell, 346 .irq = 0, 347 .block = STMPE_BLOCK_GPIO, 348 }, 349 }; 350 351 static struct stmpe_variant_block stmpe801_blocks_noirq[] = { 352 { 353 .cell = &stmpe_gpio_cell_noirq, 354 .block = STMPE_BLOCK_GPIO, 355 }, 356 }; 357 358 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, 359 bool enable) 360 { 361 if (blocks & STMPE_BLOCK_GPIO) 362 return 0; 363 else 364 return -EINVAL; 365 } 366 367 static struct stmpe_variant_info stmpe801 = { 368 .name = "stmpe801", 369 .id_val = STMPE801_ID, 370 .id_mask = 0xffff, 371 .num_gpios = 8, 372 .regs = stmpe801_regs, 373 .blocks = stmpe801_blocks, 374 .num_blocks = ARRAY_SIZE(stmpe801_blocks), 375 .num_irqs = STMPE801_NR_INTERNAL_IRQS, 376 .enable = stmpe801_enable, 377 }; 378 379 static struct stmpe_variant_info stmpe801_noirq = { 380 .name = "stmpe801", 381 .id_val = STMPE801_ID, 382 .id_mask = 0xffff, 383 .num_gpios = 8, 384 .regs = stmpe801_regs, 385 .blocks = stmpe801_blocks_noirq, 386 .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), 387 .enable = stmpe801_enable, 388 }; 389 390 /* 391 * Touchscreen (STMPE811 or STMPE610) 392 */ 393 394 static struct resource stmpe_ts_resources[] = { 395 { 396 .name = "TOUCH_DET", 397 .flags = IORESOURCE_IRQ, 398 }, 399 { 400 .name = "FIFO_TH", 401 .flags = IORESOURCE_IRQ, 402 }, 403 }; 404 405 static struct mfd_cell stmpe_ts_cell = { 406 .name = "stmpe-ts", 407 .resources = stmpe_ts_resources, 408 .num_resources = ARRAY_SIZE(stmpe_ts_resources), 409 }; 410 411 /* 412 * STMPE811 or STMPE610 413 */ 414 415 static const u8 stmpe811_regs[] = { 416 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, 417 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, 418 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, 419 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, 420 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, 421 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, 422 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, 423 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, 424 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, 425 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, 426 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, 427 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, 428 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, 429 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, 430 }; 431 432 static struct stmpe_variant_block stmpe811_blocks[] = { 433 { 434 .cell = &stmpe_gpio_cell, 435 .irq = STMPE811_IRQ_GPIOC, 436 .block = STMPE_BLOCK_GPIO, 437 }, 438 { 439 .cell = &stmpe_ts_cell, 440 .irq = STMPE811_IRQ_TOUCH_DET, 441 .block = STMPE_BLOCK_TOUCHSCREEN, 442 }, 443 }; 444 445 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, 446 bool enable) 447 { 448 unsigned int mask = 0; 449 450 if (blocks & STMPE_BLOCK_GPIO) 451 mask |= STMPE811_SYS_CTRL2_GPIO_OFF; 452 453 if (blocks & STMPE_BLOCK_ADC) 454 mask |= STMPE811_SYS_CTRL2_ADC_OFF; 455 456 if (blocks & STMPE_BLOCK_TOUCHSCREEN) 457 mask |= STMPE811_SYS_CTRL2_TSC_OFF; 458 459 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, 460 enable ? 0 : mask); 461 } 462 463 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 464 { 465 /* 0 for touchscreen, 1 for GPIO */ 466 return block != STMPE_BLOCK_TOUCHSCREEN; 467 } 468 469 static struct stmpe_variant_info stmpe811 = { 470 .name = "stmpe811", 471 .id_val = 0x0811, 472 .id_mask = 0xffff, 473 .num_gpios = 8, 474 .af_bits = 1, 475 .regs = stmpe811_regs, 476 .blocks = stmpe811_blocks, 477 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 478 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 479 .enable = stmpe811_enable, 480 .get_altfunc = stmpe811_get_altfunc, 481 }; 482 483 /* Similar to 811, except number of gpios */ 484 static struct stmpe_variant_info stmpe610 = { 485 .name = "stmpe610", 486 .id_val = 0x0811, 487 .id_mask = 0xffff, 488 .num_gpios = 6, 489 .af_bits = 1, 490 .regs = stmpe811_regs, 491 .blocks = stmpe811_blocks, 492 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 493 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 494 .enable = stmpe811_enable, 495 .get_altfunc = stmpe811_get_altfunc, 496 }; 497 498 /* 499 * STMPE1601 500 */ 501 502 static const u8 stmpe1601_regs[] = { 503 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, 504 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, 505 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, 506 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, 507 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, 508 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, 509 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, 510 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, 511 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, 512 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, 513 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, 514 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, 515 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, 516 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, 517 }; 518 519 static struct stmpe_variant_block stmpe1601_blocks[] = { 520 { 521 .cell = &stmpe_gpio_cell, 522 .irq = STMPE1601_IRQ_GPIOC, 523 .block = STMPE_BLOCK_GPIO, 524 }, 525 { 526 .cell = &stmpe_keypad_cell, 527 .irq = STMPE1601_IRQ_KEYPAD, 528 .block = STMPE_BLOCK_KEYPAD, 529 }, 530 }; 531 532 /* supported autosleep timeout delay (in msecs) */ 533 static const int stmpe_autosleep_delay[] = { 534 4, 16, 32, 64, 128, 256, 512, 1024, 535 }; 536 537 static int stmpe_round_timeout(int timeout) 538 { 539 int i; 540 541 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { 542 if (stmpe_autosleep_delay[i] >= timeout) 543 return i; 544 } 545 546 /* 547 * requests for delays longer than supported should not return the 548 * longest supported delay 549 */ 550 return -EINVAL; 551 } 552 553 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) 554 { 555 int ret; 556 557 if (!stmpe->variant->enable_autosleep) 558 return -ENOSYS; 559 560 mutex_lock(&stmpe->lock); 561 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); 562 mutex_unlock(&stmpe->lock); 563 564 return ret; 565 } 566 567 /* 568 * Both stmpe 1601/2403 support same layout for autosleep 569 */ 570 static int stmpe1601_autosleep(struct stmpe *stmpe, 571 int autosleep_timeout) 572 { 573 int ret, timeout; 574 575 /* choose the best available timeout */ 576 timeout = stmpe_round_timeout(autosleep_timeout); 577 if (timeout < 0) { 578 dev_err(stmpe->dev, "invalid timeout\n"); 579 return timeout; 580 } 581 582 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 583 STMPE1601_AUTOSLEEP_TIMEOUT_MASK, 584 timeout); 585 if (ret < 0) 586 return ret; 587 588 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 589 STPME1601_AUTOSLEEP_ENABLE, 590 STPME1601_AUTOSLEEP_ENABLE); 591 } 592 593 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, 594 bool enable) 595 { 596 unsigned int mask = 0; 597 598 if (blocks & STMPE_BLOCK_GPIO) 599 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; 600 601 if (blocks & STMPE_BLOCK_KEYPAD) 602 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; 603 604 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, 605 enable ? mask : 0); 606 } 607 608 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 609 { 610 switch (block) { 611 case STMPE_BLOCK_PWM: 612 return 2; 613 614 case STMPE_BLOCK_KEYPAD: 615 return 1; 616 617 case STMPE_BLOCK_GPIO: 618 default: 619 return 0; 620 } 621 } 622 623 static struct stmpe_variant_info stmpe1601 = { 624 .name = "stmpe1601", 625 .id_val = 0x0210, 626 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ 627 .num_gpios = 16, 628 .af_bits = 2, 629 .regs = stmpe1601_regs, 630 .blocks = stmpe1601_blocks, 631 .num_blocks = ARRAY_SIZE(stmpe1601_blocks), 632 .num_irqs = STMPE1601_NR_INTERNAL_IRQS, 633 .enable = stmpe1601_enable, 634 .get_altfunc = stmpe1601_get_altfunc, 635 .enable_autosleep = stmpe1601_autosleep, 636 }; 637 638 /* 639 * STMPE24XX 640 */ 641 642 static const u8 stmpe24xx_regs[] = { 643 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, 644 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, 645 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, 646 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, 647 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, 648 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, 649 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, 650 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, 651 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, 652 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, 653 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, 654 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, 655 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, 656 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, 657 }; 658 659 static struct stmpe_variant_block stmpe24xx_blocks[] = { 660 { 661 .cell = &stmpe_gpio_cell, 662 .irq = STMPE24XX_IRQ_GPIOC, 663 .block = STMPE_BLOCK_GPIO, 664 }, 665 { 666 .cell = &stmpe_keypad_cell, 667 .irq = STMPE24XX_IRQ_KEYPAD, 668 .block = STMPE_BLOCK_KEYPAD, 669 }, 670 }; 671 672 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 673 bool enable) 674 { 675 unsigned int mask = 0; 676 677 if (blocks & STMPE_BLOCK_GPIO) 678 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; 679 680 if (blocks & STMPE_BLOCK_KEYPAD) 681 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; 682 683 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, 684 enable ? mask : 0); 685 } 686 687 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 688 { 689 switch (block) { 690 case STMPE_BLOCK_ROTATOR: 691 return 2; 692 693 case STMPE_BLOCK_KEYPAD: 694 return 1; 695 696 case STMPE_BLOCK_GPIO: 697 default: 698 return 0; 699 } 700 } 701 702 static struct stmpe_variant_info stmpe2401 = { 703 .name = "stmpe2401", 704 .id_val = 0x0101, 705 .id_mask = 0xffff, 706 .num_gpios = 24, 707 .af_bits = 2, 708 .regs = stmpe24xx_regs, 709 .blocks = stmpe24xx_blocks, 710 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 711 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 712 .enable = stmpe24xx_enable, 713 .get_altfunc = stmpe24xx_get_altfunc, 714 }; 715 716 static struct stmpe_variant_info stmpe2403 = { 717 .name = "stmpe2403", 718 .id_val = 0x0120, 719 .id_mask = 0xffff, 720 .num_gpios = 24, 721 .af_bits = 2, 722 .regs = stmpe24xx_regs, 723 .blocks = stmpe24xx_blocks, 724 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 725 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 726 .enable = stmpe24xx_enable, 727 .get_altfunc = stmpe24xx_get_altfunc, 728 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ 729 }; 730 731 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { 732 [STMPE610] = &stmpe610, 733 [STMPE801] = &stmpe801, 734 [STMPE811] = &stmpe811, 735 [STMPE1601] = &stmpe1601, 736 [STMPE2401] = &stmpe2401, 737 [STMPE2403] = &stmpe2403, 738 }; 739 740 /* 741 * These devices can be connected in a 'no-irq' configuration - the irq pin 742 * is not used and the device cannot interrupt the CPU. Here we only list 743 * devices which support this configuration - the driver will fail probing 744 * for any devices not listed here which are configured in this way. 745 */ 746 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { 747 [STMPE801] = &stmpe801_noirq, 748 }; 749 750 static irqreturn_t stmpe_irq(int irq, void *data) 751 { 752 struct stmpe *stmpe = data; 753 struct stmpe_variant_info *variant = stmpe->variant; 754 int num = DIV_ROUND_UP(variant->num_irqs, 8); 755 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; 756 u8 isr[num]; 757 int ret; 758 int i; 759 760 if (variant->id_val == STMPE801_ID) { 761 int base = irq_create_mapping(stmpe->domain, 0); 762 763 handle_nested_irq(base); 764 return IRQ_HANDLED; 765 } 766 767 ret = stmpe_block_read(stmpe, israddr, num, isr); 768 if (ret < 0) 769 return IRQ_NONE; 770 771 for (i = 0; i < num; i++) { 772 int bank = num - i - 1; 773 u8 status = isr[i]; 774 u8 clear; 775 776 status &= stmpe->ier[bank]; 777 if (!status) 778 continue; 779 780 clear = status; 781 while (status) { 782 int bit = __ffs(status); 783 int line = bank * 8 + bit; 784 int nestedirq = irq_create_mapping(stmpe->domain, line); 785 786 handle_nested_irq(nestedirq); 787 status &= ~(1 << bit); 788 } 789 790 stmpe_reg_write(stmpe, israddr + i, clear); 791 } 792 793 return IRQ_HANDLED; 794 } 795 796 static void stmpe_irq_lock(struct irq_data *data) 797 { 798 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 799 800 mutex_lock(&stmpe->irq_lock); 801 } 802 803 static void stmpe_irq_sync_unlock(struct irq_data *data) 804 { 805 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 806 struct stmpe_variant_info *variant = stmpe->variant; 807 int num = DIV_ROUND_UP(variant->num_irqs, 8); 808 int i; 809 810 for (i = 0; i < num; i++) { 811 u8 new = stmpe->ier[i]; 812 u8 old = stmpe->oldier[i]; 813 814 if (new == old) 815 continue; 816 817 stmpe->oldier[i] = new; 818 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); 819 } 820 821 mutex_unlock(&stmpe->irq_lock); 822 } 823 824 static void stmpe_irq_mask(struct irq_data *data) 825 { 826 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 827 int offset = data->hwirq; 828 int regoffset = offset / 8; 829 int mask = 1 << (offset % 8); 830 831 stmpe->ier[regoffset] &= ~mask; 832 } 833 834 static void stmpe_irq_unmask(struct irq_data *data) 835 { 836 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 837 int offset = data->hwirq; 838 int regoffset = offset / 8; 839 int mask = 1 << (offset % 8); 840 841 stmpe->ier[regoffset] |= mask; 842 } 843 844 static struct irq_chip stmpe_irq_chip = { 845 .name = "stmpe", 846 .irq_bus_lock = stmpe_irq_lock, 847 .irq_bus_sync_unlock = stmpe_irq_sync_unlock, 848 .irq_mask = stmpe_irq_mask, 849 .irq_unmask = stmpe_irq_unmask, 850 }; 851 852 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq, 853 irq_hw_number_t hwirq) 854 { 855 struct stmpe *stmpe = d->host_data; 856 struct irq_chip *chip = NULL; 857 858 if (stmpe->variant->id_val != STMPE801_ID) 859 chip = &stmpe_irq_chip; 860 861 irq_set_chip_data(virq, stmpe); 862 irq_set_chip_and_handler(virq, chip, handle_edge_irq); 863 irq_set_nested_thread(virq, 1); 864 #ifdef CONFIG_ARM 865 set_irq_flags(virq, IRQF_VALID); 866 #else 867 irq_set_noprobe(virq); 868 #endif 869 870 return 0; 871 } 872 873 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) 874 { 875 #ifdef CONFIG_ARM 876 set_irq_flags(virq, 0); 877 #endif 878 irq_set_chip_and_handler(virq, NULL, NULL); 879 irq_set_chip_data(virq, NULL); 880 } 881 882 static struct irq_domain_ops stmpe_irq_ops = { 883 .map = stmpe_irq_map, 884 .unmap = stmpe_irq_unmap, 885 .xlate = irq_domain_xlate_twocell, 886 }; 887 888 static int __devinit stmpe_irq_init(struct stmpe *stmpe) 889 { 890 int base = stmpe->irq_base; 891 int num_irqs = stmpe->variant->num_irqs; 892 893 if (base) { 894 stmpe->domain = irq_domain_add_legacy( 895 NULL, num_irqs, base, 0, &stmpe_irq_ops, stmpe); 896 } 897 else { 898 stmpe->domain = irq_domain_add_linear( 899 NULL, num_irqs, &stmpe_irq_ops, stmpe); 900 } 901 902 if (!stmpe->domain) { 903 dev_err(stmpe->dev, "Failed to create irqdomain\n"); 904 return -ENOSYS; 905 } 906 907 return 0; 908 } 909 910 static int __devinit stmpe_chip_init(struct stmpe *stmpe) 911 { 912 unsigned int irq_trigger = stmpe->pdata->irq_trigger; 913 int autosleep_timeout = stmpe->pdata->autosleep_timeout; 914 struct stmpe_variant_info *variant = stmpe->variant; 915 u8 icr = 0; 916 unsigned int id; 917 u8 data[2]; 918 int ret; 919 920 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], 921 ARRAY_SIZE(data), data); 922 if (ret < 0) 923 return ret; 924 925 id = (data[0] << 8) | data[1]; 926 if ((id & variant->id_mask) != variant->id_val) { 927 dev_err(stmpe->dev, "unknown chip id: %#x\n", id); 928 return -EINVAL; 929 } 930 931 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); 932 933 /* Disable all modules -- subdrivers should enable what they need. */ 934 ret = stmpe_disable(stmpe, ~0); 935 if (ret) 936 return ret; 937 938 if (stmpe->irq >= 0) { 939 if (id == STMPE801_ID) 940 icr = STMPE801_REG_SYS_CTRL_INT_EN; 941 else 942 icr = STMPE_ICR_LSB_GIM; 943 944 /* STMPE801 doesn't support Edge interrupts */ 945 if (id != STMPE801_ID) { 946 if (irq_trigger == IRQF_TRIGGER_FALLING || 947 irq_trigger == IRQF_TRIGGER_RISING) 948 icr |= STMPE_ICR_LSB_EDGE; 949 } 950 951 if (irq_trigger == IRQF_TRIGGER_RISING || 952 irq_trigger == IRQF_TRIGGER_HIGH) { 953 if (id == STMPE801_ID) 954 icr |= STMPE801_REG_SYS_CTRL_INT_HI; 955 else 956 icr |= STMPE_ICR_LSB_HIGH; 957 } 958 959 if (stmpe->pdata->irq_invert_polarity) { 960 if (id == STMPE801_ID) 961 icr ^= STMPE801_REG_SYS_CTRL_INT_HI; 962 else 963 icr ^= STMPE_ICR_LSB_HIGH; 964 } 965 } 966 967 if (stmpe->pdata->autosleep) { 968 ret = stmpe_autosleep(stmpe, autosleep_timeout); 969 if (ret) 970 return ret; 971 } 972 973 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); 974 } 975 976 static int __devinit stmpe_add_device(struct stmpe *stmpe, 977 struct mfd_cell *cell) 978 { 979 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, 980 NULL, stmpe->irq_base, stmpe->domain); 981 } 982 983 static int __devinit stmpe_devices_init(struct stmpe *stmpe) 984 { 985 struct stmpe_variant_info *variant = stmpe->variant; 986 unsigned int platform_blocks = stmpe->pdata->blocks; 987 int ret = -EINVAL; 988 int i, j; 989 990 for (i = 0; i < variant->num_blocks; i++) { 991 struct stmpe_variant_block *block = &variant->blocks[i]; 992 993 if (!(platform_blocks & block->block)) 994 continue; 995 996 for (j = 0; j < block->cell->num_resources; j++) { 997 struct resource *res = 998 (struct resource *) &block->cell->resources[j]; 999 1000 /* Dynamically fill in a variant's IRQ. */ 1001 if (res->flags & IORESOURCE_IRQ) 1002 res->start = res->end = block->irq + j; 1003 } 1004 1005 platform_blocks &= ~block->block; 1006 ret = stmpe_add_device(stmpe, block->cell); 1007 if (ret) 1008 return ret; 1009 } 1010 1011 if (platform_blocks) 1012 dev_warn(stmpe->dev, 1013 "platform wants blocks (%#x) not present on variant", 1014 platform_blocks); 1015 1016 return ret; 1017 } 1018 1019 /* Called from client specific probe routines */ 1020 int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum) 1021 { 1022 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); 1023 struct stmpe *stmpe; 1024 int ret; 1025 1026 if (!pdata) 1027 return -EINVAL; 1028 1029 stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL); 1030 if (!stmpe) 1031 return -ENOMEM; 1032 1033 mutex_init(&stmpe->irq_lock); 1034 mutex_init(&stmpe->lock); 1035 1036 stmpe->dev = ci->dev; 1037 stmpe->client = ci->client; 1038 stmpe->pdata = pdata; 1039 stmpe->irq_base = pdata->irq_base; 1040 stmpe->ci = ci; 1041 stmpe->partnum = partnum; 1042 stmpe->variant = stmpe_variant_info[partnum]; 1043 stmpe->regs = stmpe->variant->regs; 1044 stmpe->num_gpios = stmpe->variant->num_gpios; 1045 dev_set_drvdata(stmpe->dev, stmpe); 1046 1047 if (ci->init) 1048 ci->init(stmpe); 1049 1050 if (pdata->irq_over_gpio) { 1051 ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe"); 1052 if (ret) { 1053 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", 1054 ret); 1055 goto out_free; 1056 } 1057 1058 stmpe->irq = gpio_to_irq(pdata->irq_gpio); 1059 } else { 1060 stmpe->irq = ci->irq; 1061 } 1062 1063 if (stmpe->irq < 0) { 1064 /* use alternate variant info for no-irq mode, if supported */ 1065 dev_info(stmpe->dev, 1066 "%s configured in no-irq mode by platform data\n", 1067 stmpe->variant->name); 1068 if (!stmpe_noirq_variant_info[stmpe->partnum]) { 1069 dev_err(stmpe->dev, 1070 "%s does not support no-irq mode!\n", 1071 stmpe->variant->name); 1072 ret = -ENODEV; 1073 goto free_gpio; 1074 } 1075 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; 1076 } 1077 1078 ret = stmpe_chip_init(stmpe); 1079 if (ret) 1080 goto free_gpio; 1081 1082 if (stmpe->irq >= 0) { 1083 ret = stmpe_irq_init(stmpe); 1084 if (ret) 1085 goto free_gpio; 1086 1087 ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq, 1088 pdata->irq_trigger | IRQF_ONESHOT, 1089 "stmpe", stmpe); 1090 if (ret) { 1091 dev_err(stmpe->dev, "failed to request IRQ: %d\n", 1092 ret); 1093 goto free_gpio; 1094 } 1095 } 1096 1097 ret = stmpe_devices_init(stmpe); 1098 if (ret) { 1099 dev_err(stmpe->dev, "failed to add children\n"); 1100 goto out_removedevs; 1101 } 1102 1103 return 0; 1104 1105 out_removedevs: 1106 mfd_remove_devices(stmpe->dev); 1107 if (stmpe->irq >= 0) 1108 free_irq(stmpe->irq, stmpe); 1109 free_gpio: 1110 if (pdata->irq_over_gpio) 1111 gpio_free(pdata->irq_gpio); 1112 out_free: 1113 kfree(stmpe); 1114 return ret; 1115 } 1116 1117 int stmpe_remove(struct stmpe *stmpe) 1118 { 1119 mfd_remove_devices(stmpe->dev); 1120 1121 if (stmpe->irq >= 0) 1122 free_irq(stmpe->irq, stmpe); 1123 1124 if (stmpe->pdata->irq_over_gpio) 1125 gpio_free(stmpe->pdata->irq_gpio); 1126 1127 kfree(stmpe); 1128 1129 return 0; 1130 } 1131 1132 #ifdef CONFIG_PM 1133 static int stmpe_suspend(struct device *dev) 1134 { 1135 struct stmpe *stmpe = dev_get_drvdata(dev); 1136 1137 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1138 enable_irq_wake(stmpe->irq); 1139 1140 return 0; 1141 } 1142 1143 static int stmpe_resume(struct device *dev) 1144 { 1145 struct stmpe *stmpe = dev_get_drvdata(dev); 1146 1147 if (stmpe->irq >= 0 && device_may_wakeup(dev)) 1148 disable_irq_wake(stmpe->irq); 1149 1150 return 0; 1151 } 1152 1153 const struct dev_pm_ops stmpe_dev_pm_ops = { 1154 .suspend = stmpe_suspend, 1155 .resume = stmpe_resume, 1156 }; 1157 #endif 1158