1 /* 2 * Copyright (c) 2014, Sony Mobile Communications AB. 3 * Copyright (c) 2013, The Linux Foundation. All rights reserved. 4 * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 and 8 * only version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/of_platform.h> 19 #include <linux/io.h> 20 #include <linux/interrupt.h> 21 #include <linux/mfd/qcom_rpm.h> 22 #include <linux/mfd/syscon.h> 23 #include <linux/regmap.h> 24 #include <linux/clk.h> 25 26 #include <dt-bindings/mfd/qcom-rpm.h> 27 28 struct qcom_rpm_resource { 29 unsigned target_id; 30 unsigned status_id; 31 unsigned select_id; 32 unsigned size; 33 }; 34 35 struct qcom_rpm_data { 36 u32 version; 37 const struct qcom_rpm_resource *resource_table; 38 unsigned int n_resources; 39 unsigned int req_ctx_off; 40 unsigned int req_sel_off; 41 unsigned int ack_ctx_off; 42 unsigned int ack_sel_off; 43 unsigned int req_sel_size; 44 unsigned int ack_sel_size; 45 }; 46 47 struct qcom_rpm { 48 struct device *dev; 49 struct regmap *ipc_regmap; 50 unsigned ipc_offset; 51 unsigned ipc_bit; 52 struct clk *ramclk; 53 54 struct completion ack; 55 struct mutex lock; 56 57 void __iomem *status_regs; 58 void __iomem *ctrl_regs; 59 void __iomem *req_regs; 60 61 u32 ack_status; 62 63 const struct qcom_rpm_data *data; 64 }; 65 66 #define RPM_STATUS_REG(rpm, i) ((rpm)->status_regs + (i) * 4) 67 #define RPM_CTRL_REG(rpm, i) ((rpm)->ctrl_regs + (i) * 4) 68 #define RPM_REQ_REG(rpm, i) ((rpm)->req_regs + (i) * 4) 69 70 #define RPM_REQUEST_TIMEOUT (5 * HZ) 71 72 #define RPM_MAX_SEL_SIZE 7 73 74 #define RPM_NOTIFICATION BIT(30) 75 #define RPM_REJECTED BIT(31) 76 77 static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = { 78 [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 }, 79 [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 }, 80 [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 }, 81 [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 }, 82 [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 }, 83 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 }, 84 [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 }, 85 [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 }, 86 [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 }, 87 [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 }, 88 [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 }, 89 [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 }, 90 [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 }, 91 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 }, 92 [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 }, 93 [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 }, 94 [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 }, 95 [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 }, 96 [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 1 }, 97 [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 1 }, 98 [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 }, 99 [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 21 }, 100 [QCOM_RPM_PM8921_SMPS1] = { 116, 31, 30, 2 }, 101 [QCOM_RPM_PM8921_SMPS2] = { 118, 33, 31, 2 }, 102 [QCOM_RPM_PM8921_SMPS3] = { 120, 35, 32, 2 }, 103 [QCOM_RPM_PM8921_SMPS4] = { 122, 37, 33, 2 }, 104 [QCOM_RPM_PM8921_SMPS5] = { 124, 39, 34, 2 }, 105 [QCOM_RPM_PM8921_SMPS6] = { 126, 41, 35, 2 }, 106 [QCOM_RPM_PM8921_SMPS7] = { 128, 43, 36, 2 }, 107 [QCOM_RPM_PM8921_SMPS8] = { 130, 45, 37, 2 }, 108 [QCOM_RPM_PM8921_LDO1] = { 132, 47, 38, 2 }, 109 [QCOM_RPM_PM8921_LDO2] = { 134, 49, 39, 2 }, 110 [QCOM_RPM_PM8921_LDO3] = { 136, 51, 40, 2 }, 111 [QCOM_RPM_PM8921_LDO4] = { 138, 53, 41, 2 }, 112 [QCOM_RPM_PM8921_LDO5] = { 140, 55, 42, 2 }, 113 [QCOM_RPM_PM8921_LDO6] = { 142, 57, 43, 2 }, 114 [QCOM_RPM_PM8921_LDO7] = { 144, 59, 44, 2 }, 115 [QCOM_RPM_PM8921_LDO8] = { 146, 61, 45, 2 }, 116 [QCOM_RPM_PM8921_LDO9] = { 148, 63, 46, 2 }, 117 [QCOM_RPM_PM8921_LDO10] = { 150, 65, 47, 2 }, 118 [QCOM_RPM_PM8921_LDO11] = { 152, 67, 48, 2 }, 119 [QCOM_RPM_PM8921_LDO12] = { 154, 69, 49, 2 }, 120 [QCOM_RPM_PM8921_LDO13] = { 156, 71, 50, 2 }, 121 [QCOM_RPM_PM8921_LDO14] = { 158, 73, 51, 2 }, 122 [QCOM_RPM_PM8921_LDO15] = { 160, 75, 52, 2 }, 123 [QCOM_RPM_PM8921_LDO16] = { 162, 77, 53, 2 }, 124 [QCOM_RPM_PM8921_LDO17] = { 164, 79, 54, 2 }, 125 [QCOM_RPM_PM8921_LDO18] = { 166, 81, 55, 2 }, 126 [QCOM_RPM_PM8921_LDO19] = { 168, 83, 56, 2 }, 127 [QCOM_RPM_PM8921_LDO20] = { 170, 85, 57, 2 }, 128 [QCOM_RPM_PM8921_LDO21] = { 172, 87, 58, 2 }, 129 [QCOM_RPM_PM8921_LDO22] = { 174, 89, 59, 2 }, 130 [QCOM_RPM_PM8921_LDO23] = { 176, 91, 60, 2 }, 131 [QCOM_RPM_PM8921_LDO24] = { 178, 93, 61, 2 }, 132 [QCOM_RPM_PM8921_LDO25] = { 180, 95, 62, 2 }, 133 [QCOM_RPM_PM8921_LDO26] = { 182, 97, 63, 2 }, 134 [QCOM_RPM_PM8921_LDO27] = { 184, 99, 64, 2 }, 135 [QCOM_RPM_PM8921_LDO28] = { 186, 101, 65, 2 }, 136 [QCOM_RPM_PM8921_LDO29] = { 188, 103, 66, 2 }, 137 [QCOM_RPM_PM8921_CLK1] = { 190, 105, 67, 2 }, 138 [QCOM_RPM_PM8921_CLK2] = { 192, 107, 68, 2 }, 139 [QCOM_RPM_PM8921_LVS1] = { 194, 109, 69, 1 }, 140 [QCOM_RPM_PM8921_LVS2] = { 195, 110, 70, 1 }, 141 [QCOM_RPM_PM8921_LVS3] = { 196, 111, 71, 1 }, 142 [QCOM_RPM_PM8921_LVS4] = { 197, 112, 72, 1 }, 143 [QCOM_RPM_PM8921_LVS5] = { 198, 113, 73, 1 }, 144 [QCOM_RPM_PM8921_LVS6] = { 199, 114, 74, 1 }, 145 [QCOM_RPM_PM8921_LVS7] = { 200, 115, 75, 1 }, 146 [QCOM_RPM_PM8821_SMPS1] = { 201, 116, 76, 2 }, 147 [QCOM_RPM_PM8821_SMPS2] = { 203, 118, 77, 2 }, 148 [QCOM_RPM_PM8821_LDO1] = { 205, 120, 78, 2 }, 149 [QCOM_RPM_PM8921_NCP] = { 207, 122, 80, 2 }, 150 [QCOM_RPM_CXO_BUFFERS] = { 209, 124, 81, 1 }, 151 [QCOM_RPM_USB_OTG_SWITCH] = { 210, 125, 82, 1 }, 152 [QCOM_RPM_HDMI_SWITCH] = { 211, 126, 83, 1 }, 153 [QCOM_RPM_DDR_DMM] = { 212, 127, 84, 2 }, 154 [QCOM_RPM_QDSS_CLK] = { 214, ~0, 7, 1 }, 155 [QCOM_RPM_VDDMIN_GPIO] = { 215, 131, 89, 1 }, 156 }; 157 158 static const struct qcom_rpm_data apq8064_template = { 159 .version = 3, 160 .resource_table = apq8064_rpm_resource_table, 161 .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table), 162 .req_ctx_off = 3, 163 .req_sel_off = 11, 164 .ack_ctx_off = 15, 165 .ack_sel_off = 23, 166 .req_sel_size = 4, 167 .ack_sel_size = 7, 168 }; 169 170 static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = { 171 [QCOM_RPM_CXO_CLK] = { 32, 12, 5, 1 }, 172 [QCOM_RPM_PXO_CLK] = { 33, 13, 6, 1 }, 173 [QCOM_RPM_PLL_4] = { 34, 14, 7, 1 }, 174 [QCOM_RPM_APPS_FABRIC_CLK] = { 35, 15, 8, 1 }, 175 [QCOM_RPM_SYS_FABRIC_CLK] = { 36, 16, 9, 1 }, 176 [QCOM_RPM_MM_FABRIC_CLK] = { 37, 17, 10, 1 }, 177 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 38, 18, 11, 1 }, 178 [QCOM_RPM_SFPB_CLK] = { 39, 19, 12, 1 }, 179 [QCOM_RPM_CFPB_CLK] = { 40, 20, 13, 1 }, 180 [QCOM_RPM_MMFPB_CLK] = { 41, 21, 14, 1 }, 181 [QCOM_RPM_SMI_CLK] = { 42, 22, 15, 1 }, 182 [QCOM_RPM_EBI1_CLK] = { 43, 23, 16, 1 }, 183 [QCOM_RPM_APPS_L2_CACHE_CTL] = { 44, 24, 17, 1 }, 184 [QCOM_RPM_APPS_FABRIC_HALT] = { 45, 25, 18, 2 }, 185 [QCOM_RPM_APPS_FABRIC_MODE] = { 47, 26, 19, 3 }, 186 [QCOM_RPM_APPS_FABRIC_ARB] = { 51, 28, 21, 6 }, 187 [QCOM_RPM_SYS_FABRIC_HALT] = { 63, 29, 22, 2 }, 188 [QCOM_RPM_SYS_FABRIC_MODE] = { 65, 30, 23, 3 }, 189 [QCOM_RPM_SYS_FABRIC_ARB] = { 69, 32, 25, 22 }, 190 [QCOM_RPM_MM_FABRIC_HALT] = { 105, 33, 26, 2 }, 191 [QCOM_RPM_MM_FABRIC_MODE] = { 107, 34, 27, 3 }, 192 [QCOM_RPM_MM_FABRIC_ARB] = { 111, 36, 29, 23 }, 193 [QCOM_RPM_PM8901_SMPS0] = { 134, 37, 30, 2 }, 194 [QCOM_RPM_PM8901_SMPS1] = { 136, 39, 31, 2 }, 195 [QCOM_RPM_PM8901_SMPS2] = { 138, 41, 32, 2 }, 196 [QCOM_RPM_PM8901_SMPS3] = { 140, 43, 33, 2 }, 197 [QCOM_RPM_PM8901_SMPS4] = { 142, 45, 34, 2 }, 198 [QCOM_RPM_PM8901_LDO0] = { 144, 47, 35, 2 }, 199 [QCOM_RPM_PM8901_LDO1] = { 146, 49, 36, 2 }, 200 [QCOM_RPM_PM8901_LDO2] = { 148, 51, 37, 2 }, 201 [QCOM_RPM_PM8901_LDO3] = { 150, 53, 38, 2 }, 202 [QCOM_RPM_PM8901_LDO4] = { 152, 55, 39, 2 }, 203 [QCOM_RPM_PM8901_LDO5] = { 154, 57, 40, 2 }, 204 [QCOM_RPM_PM8901_LDO6] = { 156, 59, 41, 2 }, 205 [QCOM_RPM_PM8901_LVS0] = { 158, 61, 42, 1 }, 206 [QCOM_RPM_PM8901_LVS1] = { 159, 62, 43, 1 }, 207 [QCOM_RPM_PM8901_LVS2] = { 160, 63, 44, 1 }, 208 [QCOM_RPM_PM8901_LVS3] = { 161, 64, 45, 1 }, 209 [QCOM_RPM_PM8901_MVS] = { 162, 65, 46, 1 }, 210 [QCOM_RPM_PM8058_SMPS0] = { 163, 66, 47, 2 }, 211 [QCOM_RPM_PM8058_SMPS1] = { 165, 68, 48, 2 }, 212 [QCOM_RPM_PM8058_SMPS2] = { 167, 70, 49, 2 }, 213 [QCOM_RPM_PM8058_SMPS3] = { 169, 72, 50, 2 }, 214 [QCOM_RPM_PM8058_SMPS4] = { 171, 74, 51, 2 }, 215 [QCOM_RPM_PM8058_LDO0] = { 173, 76, 52, 2 }, 216 [QCOM_RPM_PM8058_LDO1] = { 175, 78, 53, 2 }, 217 [QCOM_RPM_PM8058_LDO2] = { 177, 80, 54, 2 }, 218 [QCOM_RPM_PM8058_LDO3] = { 179, 82, 55, 2 }, 219 [QCOM_RPM_PM8058_LDO4] = { 181, 84, 56, 2 }, 220 [QCOM_RPM_PM8058_LDO5] = { 183, 86, 57, 2 }, 221 [QCOM_RPM_PM8058_LDO6] = { 185, 88, 58, 2 }, 222 [QCOM_RPM_PM8058_LDO7] = { 187, 90, 59, 2 }, 223 [QCOM_RPM_PM8058_LDO8] = { 189, 92, 60, 2 }, 224 [QCOM_RPM_PM8058_LDO9] = { 191, 94, 61, 2 }, 225 [QCOM_RPM_PM8058_LDO10] = { 193, 96, 62, 2 }, 226 [QCOM_RPM_PM8058_LDO11] = { 195, 98, 63, 2 }, 227 [QCOM_RPM_PM8058_LDO12] = { 197, 100, 64, 2 }, 228 [QCOM_RPM_PM8058_LDO13] = { 199, 102, 65, 2 }, 229 [QCOM_RPM_PM8058_LDO14] = { 201, 104, 66, 2 }, 230 [QCOM_RPM_PM8058_LDO15] = { 203, 106, 67, 2 }, 231 [QCOM_RPM_PM8058_LDO16] = { 205, 108, 68, 2 }, 232 [QCOM_RPM_PM8058_LDO17] = { 207, 110, 69, 2 }, 233 [QCOM_RPM_PM8058_LDO18] = { 209, 112, 70, 2 }, 234 [QCOM_RPM_PM8058_LDO19] = { 211, 114, 71, 2 }, 235 [QCOM_RPM_PM8058_LDO20] = { 213, 116, 72, 2 }, 236 [QCOM_RPM_PM8058_LDO21] = { 215, 118, 73, 2 }, 237 [QCOM_RPM_PM8058_LDO22] = { 217, 120, 74, 2 }, 238 [QCOM_RPM_PM8058_LDO23] = { 219, 122, 75, 2 }, 239 [QCOM_RPM_PM8058_LDO24] = { 221, 124, 76, 2 }, 240 [QCOM_RPM_PM8058_LDO25] = { 223, 126, 77, 2 }, 241 [QCOM_RPM_PM8058_LVS0] = { 225, 128, 78, 1 }, 242 [QCOM_RPM_PM8058_LVS1] = { 226, 129, 79, 1 }, 243 [QCOM_RPM_PM8058_NCP] = { 227, 130, 80, 2 }, 244 [QCOM_RPM_CXO_BUFFERS] = { 229, 132, 81, 1 }, 245 }; 246 247 static const struct qcom_rpm_data msm8660_template = { 248 .version = 2, 249 .resource_table = msm8660_rpm_resource_table, 250 .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table), 251 .req_ctx_off = 3, 252 .req_sel_off = 11, 253 .ack_ctx_off = 19, 254 .ack_sel_off = 27, 255 .req_sel_size = 7, 256 .ack_sel_size = 7, 257 }; 258 259 static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = { 260 [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 }, 261 [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 }, 262 [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 }, 263 [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 }, 264 [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 }, 265 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 }, 266 [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 }, 267 [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 }, 268 [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 }, 269 [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 }, 270 [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 }, 271 [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 }, 272 [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 }, 273 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 }, 274 [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 }, 275 [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 }, 276 [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 }, 277 [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 29 }, 278 [QCOM_RPM_MM_FABRIC_HALT] = { 88, 27, 26, 1 }, 279 [QCOM_RPM_MM_FABRIC_MODE] = { 90, 28, 27, 1 }, 280 [QCOM_RPM_MM_FABRIC_IOCTL] = { 93, 29, 28, 1 }, 281 [QCOM_RPM_MM_FABRIC_ARB] = { 94, 30, 29, 23 }, 282 [QCOM_RPM_PM8921_SMPS1] = { 117, 31, 30, 2 }, 283 [QCOM_RPM_PM8921_SMPS2] = { 119, 33, 31, 2 }, 284 [QCOM_RPM_PM8921_SMPS3] = { 121, 35, 32, 2 }, 285 [QCOM_RPM_PM8921_SMPS4] = { 123, 37, 33, 2 }, 286 [QCOM_RPM_PM8921_SMPS5] = { 125, 39, 34, 2 }, 287 [QCOM_RPM_PM8921_SMPS6] = { 127, 41, 35, 2 }, 288 [QCOM_RPM_PM8921_SMPS7] = { 129, 43, 36, 2 }, 289 [QCOM_RPM_PM8921_SMPS8] = { 131, 45, 37, 2 }, 290 [QCOM_RPM_PM8921_LDO1] = { 133, 47, 38, 2 }, 291 [QCOM_RPM_PM8921_LDO2] = { 135, 49, 39, 2 }, 292 [QCOM_RPM_PM8921_LDO3] = { 137, 51, 40, 2 }, 293 [QCOM_RPM_PM8921_LDO4] = { 139, 53, 41, 2 }, 294 [QCOM_RPM_PM8921_LDO5] = { 141, 55, 42, 2 }, 295 [QCOM_RPM_PM8921_LDO6] = { 143, 57, 43, 2 }, 296 [QCOM_RPM_PM8921_LDO7] = { 145, 59, 44, 2 }, 297 [QCOM_RPM_PM8921_LDO8] = { 147, 61, 45, 2 }, 298 [QCOM_RPM_PM8921_LDO9] = { 149, 63, 46, 2 }, 299 [QCOM_RPM_PM8921_LDO10] = { 151, 65, 47, 2 }, 300 [QCOM_RPM_PM8921_LDO11] = { 153, 67, 48, 2 }, 301 [QCOM_RPM_PM8921_LDO12] = { 155, 69, 49, 2 }, 302 [QCOM_RPM_PM8921_LDO13] = { 157, 71, 50, 2 }, 303 [QCOM_RPM_PM8921_LDO14] = { 159, 73, 51, 2 }, 304 [QCOM_RPM_PM8921_LDO15] = { 161, 75, 52, 2 }, 305 [QCOM_RPM_PM8921_LDO16] = { 163, 77, 53, 2 }, 306 [QCOM_RPM_PM8921_LDO17] = { 165, 79, 54, 2 }, 307 [QCOM_RPM_PM8921_LDO18] = { 167, 81, 55, 2 }, 308 [QCOM_RPM_PM8921_LDO19] = { 169, 83, 56, 2 }, 309 [QCOM_RPM_PM8921_LDO20] = { 171, 85, 57, 2 }, 310 [QCOM_RPM_PM8921_LDO21] = { 173, 87, 58, 2 }, 311 [QCOM_RPM_PM8921_LDO22] = { 175, 89, 59, 2 }, 312 [QCOM_RPM_PM8921_LDO23] = { 177, 91, 60, 2 }, 313 [QCOM_RPM_PM8921_LDO24] = { 179, 93, 61, 2 }, 314 [QCOM_RPM_PM8921_LDO25] = { 181, 95, 62, 2 }, 315 [QCOM_RPM_PM8921_LDO26] = { 183, 97, 63, 2 }, 316 [QCOM_RPM_PM8921_LDO27] = { 185, 99, 64, 2 }, 317 [QCOM_RPM_PM8921_LDO28] = { 187, 101, 65, 2 }, 318 [QCOM_RPM_PM8921_LDO29] = { 189, 103, 66, 2 }, 319 [QCOM_RPM_PM8921_CLK1] = { 191, 105, 67, 2 }, 320 [QCOM_RPM_PM8921_CLK2] = { 193, 107, 68, 2 }, 321 [QCOM_RPM_PM8921_LVS1] = { 195, 109, 69, 1 }, 322 [QCOM_RPM_PM8921_LVS2] = { 196, 110, 70, 1 }, 323 [QCOM_RPM_PM8921_LVS3] = { 197, 111, 71, 1 }, 324 [QCOM_RPM_PM8921_LVS4] = { 198, 112, 72, 1 }, 325 [QCOM_RPM_PM8921_LVS5] = { 199, 113, 73, 1 }, 326 [QCOM_RPM_PM8921_LVS6] = { 200, 114, 74, 1 }, 327 [QCOM_RPM_PM8921_LVS7] = { 201, 115, 75, 1 }, 328 [QCOM_RPM_PM8921_NCP] = { 202, 116, 80, 2 }, 329 [QCOM_RPM_CXO_BUFFERS] = { 204, 118, 81, 1 }, 330 [QCOM_RPM_USB_OTG_SWITCH] = { 205, 119, 82, 1 }, 331 [QCOM_RPM_HDMI_SWITCH] = { 206, 120, 83, 1 }, 332 [QCOM_RPM_DDR_DMM] = { 207, 121, 84, 2 }, 333 }; 334 335 static const struct qcom_rpm_data msm8960_template = { 336 .version = 3, 337 .resource_table = msm8960_rpm_resource_table, 338 .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table), 339 .req_ctx_off = 3, 340 .req_sel_off = 11, 341 .ack_ctx_off = 15, 342 .ack_sel_off = 23, 343 .req_sel_size = 4, 344 .ack_sel_size = 7, 345 }; 346 347 static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = { 348 [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 }, 349 [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 }, 350 [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 }, 351 [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 }, 352 [QCOM_RPM_NSS_FABRIC_0_CLK] = { 29, 13, 10, 1 }, 353 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 }, 354 [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 }, 355 [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 }, 356 [QCOM_RPM_NSS_FABRIC_1_CLK] = { 33, 17, 14, 1 }, 357 [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 }, 358 [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 2 }, 359 [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 3 }, 360 [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 }, 361 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 }, 362 [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 2 }, 363 [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 3 }, 364 [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 }, 365 [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 }, 366 [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 2 }, 367 [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 3 }, 368 [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 }, 369 [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 2 }, 370 [QCOM_RPM_CXO_BUFFERS] = { 209, 33, 31, 1 }, 371 [QCOM_RPM_USB_OTG_SWITCH] = { 210, 34, 32, 1 }, 372 [QCOM_RPM_HDMI_SWITCH] = { 211, 35, 33, 1 }, 373 [QCOM_RPM_DDR_DMM] = { 212, 36, 34, 2 }, 374 [QCOM_RPM_VDDMIN_GPIO] = { 215, 40, 39, 1 }, 375 [QCOM_RPM_SMB208_S1a] = { 216, 41, 90, 2 }, 376 [QCOM_RPM_SMB208_S1b] = { 218, 43, 91, 2 }, 377 [QCOM_RPM_SMB208_S2a] = { 220, 45, 92, 2 }, 378 [QCOM_RPM_SMB208_S2b] = { 222, 47, 93, 2 }, 379 }; 380 381 static const struct qcom_rpm_data ipq806x_template = { 382 .version = 3, 383 .resource_table = ipq806x_rpm_resource_table, 384 .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table), 385 .req_ctx_off = 3, 386 .req_sel_off = 11, 387 .ack_ctx_off = 15, 388 .ack_sel_off = 23, 389 .req_sel_size = 4, 390 .ack_sel_size = 7, 391 }; 392 393 static const struct qcom_rpm_resource mdm9615_rpm_resource_table[] = { 394 [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 }, 395 [QCOM_RPM_SYS_FABRIC_CLK] = { 26, 10, 9, 1 }, 396 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 27, 11, 11, 1 }, 397 [QCOM_RPM_SFPB_CLK] = { 28, 12, 12, 1 }, 398 [QCOM_RPM_CFPB_CLK] = { 29, 13, 13, 1 }, 399 [QCOM_RPM_EBI1_CLK] = { 30, 14, 16, 1 }, 400 [QCOM_RPM_APPS_FABRIC_HALT] = { 31, 15, 22, 2 }, 401 [QCOM_RPM_APPS_FABRIC_MODE] = { 33, 16, 23, 3 }, 402 [QCOM_RPM_APPS_FABRIC_IOCTL] = { 36, 17, 24, 1 }, 403 [QCOM_RPM_APPS_FABRIC_ARB] = { 37, 18, 25, 27 }, 404 [QCOM_RPM_PM8018_SMPS1] = { 64, 19, 30, 2 }, 405 [QCOM_RPM_PM8018_SMPS2] = { 66, 21, 31, 2 }, 406 [QCOM_RPM_PM8018_SMPS3] = { 68, 23, 32, 2 }, 407 [QCOM_RPM_PM8018_SMPS4] = { 70, 25, 33, 2 }, 408 [QCOM_RPM_PM8018_SMPS5] = { 72, 27, 34, 2 }, 409 [QCOM_RPM_PM8018_LDO1] = { 74, 29, 35, 2 }, 410 [QCOM_RPM_PM8018_LDO2] = { 76, 31, 36, 2 }, 411 [QCOM_RPM_PM8018_LDO3] = { 78, 33, 37, 2 }, 412 [QCOM_RPM_PM8018_LDO4] = { 80, 35, 38, 2 }, 413 [QCOM_RPM_PM8018_LDO5] = { 82, 37, 39, 2 }, 414 [QCOM_RPM_PM8018_LDO6] = { 84, 39, 40, 2 }, 415 [QCOM_RPM_PM8018_LDO7] = { 86, 41, 41, 2 }, 416 [QCOM_RPM_PM8018_LDO8] = { 88, 43, 42, 2 }, 417 [QCOM_RPM_PM8018_LDO9] = { 90, 45, 43, 2 }, 418 [QCOM_RPM_PM8018_LDO10] = { 92, 47, 44, 2 }, 419 [QCOM_RPM_PM8018_LDO11] = { 94, 49, 45, 2 }, 420 [QCOM_RPM_PM8018_LDO12] = { 96, 51, 46, 2 }, 421 [QCOM_RPM_PM8018_LDO13] = { 98, 53, 47, 2 }, 422 [QCOM_RPM_PM8018_LDO14] = { 100, 55, 48, 2 }, 423 [QCOM_RPM_PM8018_LVS1] = { 102, 57, 49, 1 }, 424 [QCOM_RPM_PM8018_NCP] = { 103, 58, 80, 2 }, 425 [QCOM_RPM_CXO_BUFFERS] = { 105, 60, 81, 1 }, 426 [QCOM_RPM_USB_OTG_SWITCH] = { 106, 61, 82, 1 }, 427 [QCOM_RPM_HDMI_SWITCH] = { 107, 62, 83, 1 }, 428 [QCOM_RPM_VOLTAGE_CORNER] = { 109, 64, 87, 1 }, 429 }; 430 431 static const struct qcom_rpm_data mdm9615_template = { 432 .version = 3, 433 .resource_table = mdm9615_rpm_resource_table, 434 .n_resources = ARRAY_SIZE(mdm9615_rpm_resource_table), 435 .req_ctx_off = 3, 436 .req_sel_off = 11, 437 .ack_ctx_off = 15, 438 .ack_sel_off = 23, 439 .req_sel_size = 4, 440 .ack_sel_size = 7, 441 }; 442 443 static const struct of_device_id qcom_rpm_of_match[] = { 444 { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template }, 445 { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template }, 446 { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template }, 447 { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template }, 448 { .compatible = "qcom,rpm-mdm9615", .data = &mdm9615_template }, 449 { } 450 }; 451 MODULE_DEVICE_TABLE(of, qcom_rpm_of_match); 452 453 int qcom_rpm_write(struct qcom_rpm *rpm, 454 int state, 455 int resource, 456 u32 *buf, size_t count) 457 { 458 const struct qcom_rpm_resource *res; 459 const struct qcom_rpm_data *data = rpm->data; 460 u32 sel_mask[RPM_MAX_SEL_SIZE] = { 0 }; 461 int left; 462 int ret = 0; 463 int i; 464 465 if (WARN_ON(resource < 0 || resource >= data->n_resources)) 466 return -EINVAL; 467 468 res = &data->resource_table[resource]; 469 if (WARN_ON(res->size != count)) 470 return -EINVAL; 471 472 mutex_lock(&rpm->lock); 473 474 for (i = 0; i < res->size; i++) 475 writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i)); 476 477 bitmap_set((unsigned long *)sel_mask, res->select_id, 1); 478 for (i = 0; i < rpm->data->req_sel_size; i++) { 479 writel_relaxed(sel_mask[i], 480 RPM_CTRL_REG(rpm, rpm->data->req_sel_off + i)); 481 } 482 483 writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, rpm->data->req_ctx_off)); 484 485 reinit_completion(&rpm->ack); 486 regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit)); 487 488 left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT); 489 if (!left) 490 ret = -ETIMEDOUT; 491 else if (rpm->ack_status & RPM_REJECTED) 492 ret = -EIO; 493 494 mutex_unlock(&rpm->lock); 495 496 return ret; 497 } 498 EXPORT_SYMBOL(qcom_rpm_write); 499 500 static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev) 501 { 502 struct qcom_rpm *rpm = dev; 503 u32 ack; 504 int i; 505 506 ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off)); 507 for (i = 0; i < rpm->data->ack_sel_size; i++) 508 writel_relaxed(0, 509 RPM_CTRL_REG(rpm, rpm->data->ack_sel_off + i)); 510 writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off)); 511 512 if (ack & RPM_NOTIFICATION) { 513 dev_warn(rpm->dev, "ignoring notification!\n"); 514 } else { 515 rpm->ack_status = ack; 516 complete(&rpm->ack); 517 } 518 519 return IRQ_HANDLED; 520 } 521 522 static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev) 523 { 524 struct qcom_rpm *rpm = dev; 525 526 regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit)); 527 dev_err(rpm->dev, "RPM triggered fatal error\n"); 528 529 return IRQ_HANDLED; 530 } 531 532 static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev) 533 { 534 return IRQ_HANDLED; 535 } 536 537 static int qcom_rpm_probe(struct platform_device *pdev) 538 { 539 const struct of_device_id *match; 540 struct device_node *syscon_np; 541 struct resource *res; 542 struct qcom_rpm *rpm; 543 u32 fw_version[3]; 544 int irq_wakeup; 545 int irq_ack; 546 int irq_err; 547 int ret; 548 549 rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL); 550 if (!rpm) 551 return -ENOMEM; 552 553 rpm->dev = &pdev->dev; 554 mutex_init(&rpm->lock); 555 init_completion(&rpm->ack); 556 557 /* Enable message RAM clock */ 558 rpm->ramclk = devm_clk_get(&pdev->dev, "ram"); 559 if (IS_ERR(rpm->ramclk)) { 560 ret = PTR_ERR(rpm->ramclk); 561 if (ret == -EPROBE_DEFER) 562 return ret; 563 /* 564 * Fall through in all other cases, as the clock is 565 * optional. (Does not exist on all platforms.) 566 */ 567 rpm->ramclk = NULL; 568 } 569 clk_prepare_enable(rpm->ramclk); /* Accepts NULL */ 570 571 irq_ack = platform_get_irq_byname(pdev, "ack"); 572 if (irq_ack < 0) { 573 dev_err(&pdev->dev, "required ack interrupt missing\n"); 574 return irq_ack; 575 } 576 577 irq_err = platform_get_irq_byname(pdev, "err"); 578 if (irq_err < 0) { 579 dev_err(&pdev->dev, "required err interrupt missing\n"); 580 return irq_err; 581 } 582 583 irq_wakeup = platform_get_irq_byname(pdev, "wakeup"); 584 if (irq_wakeup < 0) { 585 dev_err(&pdev->dev, "required wakeup interrupt missing\n"); 586 return irq_wakeup; 587 } 588 589 match = of_match_device(qcom_rpm_of_match, &pdev->dev); 590 if (!match) 591 return -ENODEV; 592 rpm->data = match->data; 593 594 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 595 rpm->status_regs = devm_ioremap_resource(&pdev->dev, res); 596 if (IS_ERR(rpm->status_regs)) 597 return PTR_ERR(rpm->status_regs); 598 rpm->ctrl_regs = rpm->status_regs + 0x400; 599 rpm->req_regs = rpm->status_regs + 0x600; 600 601 syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0); 602 if (!syscon_np) { 603 dev_err(&pdev->dev, "no qcom,ipc node\n"); 604 return -ENODEV; 605 } 606 607 rpm->ipc_regmap = syscon_node_to_regmap(syscon_np); 608 of_node_put(syscon_np); 609 if (IS_ERR(rpm->ipc_regmap)) 610 return PTR_ERR(rpm->ipc_regmap); 611 612 ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1, 613 &rpm->ipc_offset); 614 if (ret < 0) { 615 dev_err(&pdev->dev, "no offset in qcom,ipc\n"); 616 return -EINVAL; 617 } 618 619 ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2, 620 &rpm->ipc_bit); 621 if (ret < 0) { 622 dev_err(&pdev->dev, "no bit in qcom,ipc\n"); 623 return -EINVAL; 624 } 625 626 dev_set_drvdata(&pdev->dev, rpm); 627 628 fw_version[0] = readl(RPM_STATUS_REG(rpm, 0)); 629 fw_version[1] = readl(RPM_STATUS_REG(rpm, 1)); 630 fw_version[2] = readl(RPM_STATUS_REG(rpm, 2)); 631 if (fw_version[0] != rpm->data->version) { 632 dev_err(&pdev->dev, 633 "RPM version %u.%u.%u incompatible with driver version %u", 634 fw_version[0], 635 fw_version[1], 636 fw_version[2], 637 rpm->data->version); 638 return -EFAULT; 639 } 640 641 writel(fw_version[0], RPM_CTRL_REG(rpm, 0)); 642 writel(fw_version[1], RPM_CTRL_REG(rpm, 1)); 643 writel(fw_version[2], RPM_CTRL_REG(rpm, 2)); 644 645 dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0], 646 fw_version[1], 647 fw_version[2]); 648 649 ret = devm_request_irq(&pdev->dev, 650 irq_ack, 651 qcom_rpm_ack_interrupt, 652 IRQF_TRIGGER_RISING, 653 "qcom_rpm_ack", 654 rpm); 655 if (ret) { 656 dev_err(&pdev->dev, "failed to request ack interrupt\n"); 657 return ret; 658 } 659 660 ret = irq_set_irq_wake(irq_ack, 1); 661 if (ret) 662 dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n"); 663 664 ret = devm_request_irq(&pdev->dev, 665 irq_err, 666 qcom_rpm_err_interrupt, 667 IRQF_TRIGGER_RISING, 668 "qcom_rpm_err", 669 rpm); 670 if (ret) { 671 dev_err(&pdev->dev, "failed to request err interrupt\n"); 672 return ret; 673 } 674 675 ret = devm_request_irq(&pdev->dev, 676 irq_wakeup, 677 qcom_rpm_wakeup_interrupt, 678 IRQF_TRIGGER_RISING, 679 "qcom_rpm_wakeup", 680 rpm); 681 if (ret) { 682 dev_err(&pdev->dev, "failed to request wakeup interrupt\n"); 683 return ret; 684 } 685 686 ret = irq_set_irq_wake(irq_wakeup, 1); 687 if (ret) 688 dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n"); 689 690 return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); 691 } 692 693 static int qcom_rpm_remove(struct platform_device *pdev) 694 { 695 struct qcom_rpm *rpm = dev_get_drvdata(&pdev->dev); 696 697 of_platform_depopulate(&pdev->dev); 698 clk_disable_unprepare(rpm->ramclk); 699 700 return 0; 701 } 702 703 static struct platform_driver qcom_rpm_driver = { 704 .probe = qcom_rpm_probe, 705 .remove = qcom_rpm_remove, 706 .driver = { 707 .name = "qcom_rpm", 708 .of_match_table = qcom_rpm_of_match, 709 }, 710 }; 711 712 static int __init qcom_rpm_init(void) 713 { 714 return platform_driver_register(&qcom_rpm_driver); 715 } 716 arch_initcall(qcom_rpm_init); 717 718 static void __exit qcom_rpm_exit(void) 719 { 720 platform_driver_unregister(&qcom_rpm_driver); 721 } 722 module_exit(qcom_rpm_exit) 723 724 MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver"); 725 MODULE_LICENSE("GPL v2"); 726 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>"); 727