1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2020 MediaTek Inc. 4 * 5 * Author: Gene Chen <gene_chen@richtek.com> 6 */ 7 8 #include <linux/crc8.h> 9 #include <linux/i2c.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/mfd/core.h> 14 #include <linux/module.h> 15 #include <linux/regmap.h> 16 #include <linux/slab.h> 17 18 #include <linux/mfd/mt6360.h> 19 20 /* reg 0 -> 0 ~ 7 */ 21 #define MT6360_CHG_TREG_EVT 4 22 #define MT6360_CHG_AICR_EVT 5 23 #define MT6360_CHG_MIVR_EVT 6 24 #define MT6360_PWR_RDY_EVT 7 25 /* REG 1 -> 8 ~ 15 */ 26 #define MT6360_CHG_BATSYSUV_EVT 9 27 #define MT6360_FLED_CHG_VINOVP_EVT 11 28 #define MT6360_CHG_VSYSUV_EVT 12 29 #define MT6360_CHG_VSYSOV_EVT 13 30 #define MT6360_CHG_VBATOV_EVT 14 31 #define MT6360_CHG_VBUSOV_EVT 15 32 /* REG 2 -> 16 ~ 23 */ 33 /* REG 3 -> 24 ~ 31 */ 34 #define MT6360_WD_PMU_DET 25 35 #define MT6360_WD_PMU_DONE 26 36 #define MT6360_CHG_TMRI 27 37 #define MT6360_CHG_ADPBADI 29 38 #define MT6360_CHG_RVPI 30 39 #define MT6360_OTPI 31 40 /* REG 4 -> 32 ~ 39 */ 41 #define MT6360_CHG_AICCMEASL 32 42 #define MT6360_CHGDET_DONEI 34 43 #define MT6360_WDTMRI 35 44 #define MT6360_SSFINISHI 36 45 #define MT6360_CHG_RECHGI 37 46 #define MT6360_CHG_TERMI 38 47 #define MT6360_CHG_IEOCI 39 48 /* REG 5 -> 40 ~ 47 */ 49 #define MT6360_PUMPX_DONEI 40 50 #define MT6360_BAT_OVP_ADC_EVT 41 51 #define MT6360_TYPEC_OTP_EVT 42 52 #define MT6360_ADC_WAKEUP_EVT 43 53 #define MT6360_ADC_DONEI 44 54 #define MT6360_BST_BATUVI 45 55 #define MT6360_BST_VBUSOVI 46 56 #define MT6360_BST_OLPI 47 57 /* REG 6 -> 48 ~ 55 */ 58 #define MT6360_ATTACH_I 48 59 #define MT6360_DETACH_I 49 60 #define MT6360_QC30_STPDONE 51 61 #define MT6360_QC_VBUSDET_DONE 52 62 #define MT6360_HVDCP_DET 53 63 #define MT6360_CHGDETI 54 64 #define MT6360_DCDTI 55 65 /* REG 7 -> 56 ~ 63 */ 66 #define MT6360_FOD_DONE_EVT 56 67 #define MT6360_FOD_OV_EVT 57 68 #define MT6360_CHRDET_UVP_EVT 58 69 #define MT6360_CHRDET_OVP_EVT 59 70 #define MT6360_CHRDET_EXT_EVT 60 71 #define MT6360_FOD_LR_EVT 61 72 #define MT6360_FOD_HR_EVT 62 73 #define MT6360_FOD_DISCHG_FAIL_EVT 63 74 /* REG 8 -> 64 ~ 71 */ 75 #define MT6360_USBID_EVT 64 76 #define MT6360_APWDTRST_EVT 65 77 #define MT6360_EN_EVT 66 78 #define MT6360_QONB_RST_EVT 67 79 #define MT6360_MRSTB_EVT 68 80 #define MT6360_OTP_EVT 69 81 #define MT6360_VDDAOV_EVT 70 82 #define MT6360_SYSUV_EVT 71 83 /* REG 9 -> 72 ~ 79 */ 84 #define MT6360_FLED_STRBPIN_EVT 72 85 #define MT6360_FLED_TORPIN_EVT 73 86 #define MT6360_FLED_TX_EVT 74 87 #define MT6360_FLED_LVF_EVT 75 88 #define MT6360_FLED2_SHORT_EVT 78 89 #define MT6360_FLED1_SHORT_EVT 79 90 /* REG 10 -> 80 ~ 87 */ 91 #define MT6360_FLED2_STRB_EVT 80 92 #define MT6360_FLED1_STRB_EVT 81 93 #define MT6360_FLED2_STRB_TO_EVT 82 94 #define MT6360_FLED1_STRB_TO_EVT 83 95 #define MT6360_FLED2_TOR_EVT 84 96 #define MT6360_FLED1_TOR_EVT 85 97 /* REG 11 -> 88 ~ 95 */ 98 /* REG 12 -> 96 ~ 103 */ 99 #define MT6360_BUCK1_PGB_EVT 96 100 #define MT6360_BUCK1_OC_EVT 100 101 #define MT6360_BUCK1_OV_EVT 101 102 #define MT6360_BUCK1_UV_EVT 102 103 /* REG 13 -> 104 ~ 111 */ 104 #define MT6360_BUCK2_PGB_EVT 104 105 #define MT6360_BUCK2_OC_EVT 108 106 #define MT6360_BUCK2_OV_EVT 109 107 #define MT6360_BUCK2_UV_EVT 110 108 /* REG 14 -> 112 ~ 119 */ 109 #define MT6360_LDO1_OC_EVT 113 110 #define MT6360_LDO2_OC_EVT 114 111 #define MT6360_LDO3_OC_EVT 115 112 #define MT6360_LDO5_OC_EVT 117 113 #define MT6360_LDO6_OC_EVT 118 114 #define MT6360_LDO7_OC_EVT 119 115 /* REG 15 -> 120 ~ 127 */ 116 #define MT6360_LDO1_PGB_EVT 121 117 #define MT6360_LDO2_PGB_EVT 122 118 #define MT6360_LDO3_PGB_EVT 123 119 #define MT6360_LDO5_PGB_EVT 125 120 #define MT6360_LDO6_PGB_EVT 126 121 #define MT6360_LDO7_PGB_EVT 127 122 123 static const struct regmap_irq mt6360_irqs[] = { 124 REGMAP_IRQ_REG_LINE(MT6360_CHG_TREG_EVT, 8), 125 REGMAP_IRQ_REG_LINE(MT6360_CHG_AICR_EVT, 8), 126 REGMAP_IRQ_REG_LINE(MT6360_CHG_MIVR_EVT, 8), 127 REGMAP_IRQ_REG_LINE(MT6360_PWR_RDY_EVT, 8), 128 REGMAP_IRQ_REG_LINE(MT6360_CHG_BATSYSUV_EVT, 8), 129 REGMAP_IRQ_REG_LINE(MT6360_FLED_CHG_VINOVP_EVT, 8), 130 REGMAP_IRQ_REG_LINE(MT6360_CHG_VSYSUV_EVT, 8), 131 REGMAP_IRQ_REG_LINE(MT6360_CHG_VSYSOV_EVT, 8), 132 REGMAP_IRQ_REG_LINE(MT6360_CHG_VBATOV_EVT, 8), 133 REGMAP_IRQ_REG_LINE(MT6360_CHG_VBUSOV_EVT, 8), 134 REGMAP_IRQ_REG_LINE(MT6360_WD_PMU_DET, 8), 135 REGMAP_IRQ_REG_LINE(MT6360_WD_PMU_DONE, 8), 136 REGMAP_IRQ_REG_LINE(MT6360_CHG_TMRI, 8), 137 REGMAP_IRQ_REG_LINE(MT6360_CHG_ADPBADI, 8), 138 REGMAP_IRQ_REG_LINE(MT6360_CHG_RVPI, 8), 139 REGMAP_IRQ_REG_LINE(MT6360_OTPI, 8), 140 REGMAP_IRQ_REG_LINE(MT6360_CHG_AICCMEASL, 8), 141 REGMAP_IRQ_REG_LINE(MT6360_CHGDET_DONEI, 8), 142 REGMAP_IRQ_REG_LINE(MT6360_WDTMRI, 8), 143 REGMAP_IRQ_REG_LINE(MT6360_SSFINISHI, 8), 144 REGMAP_IRQ_REG_LINE(MT6360_CHG_RECHGI, 8), 145 REGMAP_IRQ_REG_LINE(MT6360_CHG_TERMI, 8), 146 REGMAP_IRQ_REG_LINE(MT6360_CHG_IEOCI, 8), 147 REGMAP_IRQ_REG_LINE(MT6360_PUMPX_DONEI, 8), 148 REGMAP_IRQ_REG_LINE(MT6360_BAT_OVP_ADC_EVT, 8), 149 REGMAP_IRQ_REG_LINE(MT6360_TYPEC_OTP_EVT, 8), 150 REGMAP_IRQ_REG_LINE(MT6360_ADC_WAKEUP_EVT, 8), 151 REGMAP_IRQ_REG_LINE(MT6360_ADC_DONEI, 8), 152 REGMAP_IRQ_REG_LINE(MT6360_BST_BATUVI, 8), 153 REGMAP_IRQ_REG_LINE(MT6360_BST_VBUSOVI, 8), 154 REGMAP_IRQ_REG_LINE(MT6360_BST_OLPI, 8), 155 REGMAP_IRQ_REG_LINE(MT6360_ATTACH_I, 8), 156 REGMAP_IRQ_REG_LINE(MT6360_DETACH_I, 8), 157 REGMAP_IRQ_REG_LINE(MT6360_QC30_STPDONE, 8), 158 REGMAP_IRQ_REG_LINE(MT6360_QC_VBUSDET_DONE, 8), 159 REGMAP_IRQ_REG_LINE(MT6360_HVDCP_DET, 8), 160 REGMAP_IRQ_REG_LINE(MT6360_CHGDETI, 8), 161 REGMAP_IRQ_REG_LINE(MT6360_DCDTI, 8), 162 REGMAP_IRQ_REG_LINE(MT6360_FOD_DONE_EVT, 8), 163 REGMAP_IRQ_REG_LINE(MT6360_FOD_OV_EVT, 8), 164 REGMAP_IRQ_REG_LINE(MT6360_CHRDET_UVP_EVT, 8), 165 REGMAP_IRQ_REG_LINE(MT6360_CHRDET_OVP_EVT, 8), 166 REGMAP_IRQ_REG_LINE(MT6360_CHRDET_EXT_EVT, 8), 167 REGMAP_IRQ_REG_LINE(MT6360_FOD_LR_EVT, 8), 168 REGMAP_IRQ_REG_LINE(MT6360_FOD_HR_EVT, 8), 169 REGMAP_IRQ_REG_LINE(MT6360_FOD_DISCHG_FAIL_EVT, 8), 170 REGMAP_IRQ_REG_LINE(MT6360_USBID_EVT, 8), 171 REGMAP_IRQ_REG_LINE(MT6360_APWDTRST_EVT, 8), 172 REGMAP_IRQ_REG_LINE(MT6360_EN_EVT, 8), 173 REGMAP_IRQ_REG_LINE(MT6360_QONB_RST_EVT, 8), 174 REGMAP_IRQ_REG_LINE(MT6360_MRSTB_EVT, 8), 175 REGMAP_IRQ_REG_LINE(MT6360_OTP_EVT, 8), 176 REGMAP_IRQ_REG_LINE(MT6360_VDDAOV_EVT, 8), 177 REGMAP_IRQ_REG_LINE(MT6360_SYSUV_EVT, 8), 178 REGMAP_IRQ_REG_LINE(MT6360_FLED_STRBPIN_EVT, 8), 179 REGMAP_IRQ_REG_LINE(MT6360_FLED_TORPIN_EVT, 8), 180 REGMAP_IRQ_REG_LINE(MT6360_FLED_TX_EVT, 8), 181 REGMAP_IRQ_REG_LINE(MT6360_FLED_LVF_EVT, 8), 182 REGMAP_IRQ_REG_LINE(MT6360_FLED2_SHORT_EVT, 8), 183 REGMAP_IRQ_REG_LINE(MT6360_FLED1_SHORT_EVT, 8), 184 REGMAP_IRQ_REG_LINE(MT6360_FLED2_STRB_EVT, 8), 185 REGMAP_IRQ_REG_LINE(MT6360_FLED1_STRB_EVT, 8), 186 REGMAP_IRQ_REG_LINE(MT6360_FLED2_STRB_TO_EVT, 8), 187 REGMAP_IRQ_REG_LINE(MT6360_FLED1_STRB_TO_EVT, 8), 188 REGMAP_IRQ_REG_LINE(MT6360_FLED2_TOR_EVT, 8), 189 REGMAP_IRQ_REG_LINE(MT6360_FLED1_TOR_EVT, 8), 190 REGMAP_IRQ_REG_LINE(MT6360_BUCK1_PGB_EVT, 8), 191 REGMAP_IRQ_REG_LINE(MT6360_BUCK1_OC_EVT, 8), 192 REGMAP_IRQ_REG_LINE(MT6360_BUCK1_OV_EVT, 8), 193 REGMAP_IRQ_REG_LINE(MT6360_BUCK1_UV_EVT, 8), 194 REGMAP_IRQ_REG_LINE(MT6360_BUCK2_PGB_EVT, 8), 195 REGMAP_IRQ_REG_LINE(MT6360_BUCK2_OC_EVT, 8), 196 REGMAP_IRQ_REG_LINE(MT6360_BUCK2_OV_EVT, 8), 197 REGMAP_IRQ_REG_LINE(MT6360_BUCK2_UV_EVT, 8), 198 REGMAP_IRQ_REG_LINE(MT6360_LDO1_OC_EVT, 8), 199 REGMAP_IRQ_REG_LINE(MT6360_LDO2_OC_EVT, 8), 200 REGMAP_IRQ_REG_LINE(MT6360_LDO3_OC_EVT, 8), 201 REGMAP_IRQ_REG_LINE(MT6360_LDO5_OC_EVT, 8), 202 REGMAP_IRQ_REG_LINE(MT6360_LDO6_OC_EVT, 8), 203 REGMAP_IRQ_REG_LINE(MT6360_LDO7_OC_EVT, 8), 204 REGMAP_IRQ_REG_LINE(MT6360_LDO1_PGB_EVT, 8), 205 REGMAP_IRQ_REG_LINE(MT6360_LDO2_PGB_EVT, 8), 206 REGMAP_IRQ_REG_LINE(MT6360_LDO3_PGB_EVT, 8), 207 REGMAP_IRQ_REG_LINE(MT6360_LDO5_PGB_EVT, 8), 208 REGMAP_IRQ_REG_LINE(MT6360_LDO6_PGB_EVT, 8), 209 REGMAP_IRQ_REG_LINE(MT6360_LDO7_PGB_EVT, 8), 210 }; 211 212 static const struct regmap_irq_chip mt6360_irq_chip = { 213 .name = "mt6360_irqs", 214 .irqs = mt6360_irqs, 215 .num_irqs = ARRAY_SIZE(mt6360_irqs), 216 .num_regs = MT6360_PMU_IRQ_REGNUM, 217 .mask_base = MT6360_PMU_CHG_MASK1, 218 .status_base = MT6360_PMU_CHG_IRQ1, 219 .ack_base = MT6360_PMU_CHG_IRQ1, 220 .init_ack_masked = true, 221 .use_ack = true, 222 }; 223 224 static const struct regmap_config mt6360_pmu_regmap_config = { 225 .reg_bits = 8, 226 .val_bits = 8, 227 .max_register = MT6360_PMU_MAXREG, 228 }; 229 230 static const struct resource mt6360_adc_resources[] = { 231 DEFINE_RES_IRQ_NAMED(MT6360_ADC_DONEI, "adc_donei"), 232 }; 233 234 static const struct resource mt6360_chg_resources[] = { 235 DEFINE_RES_IRQ_NAMED(MT6360_CHG_TREG_EVT, "chg_treg_evt"), 236 DEFINE_RES_IRQ_NAMED(MT6360_PWR_RDY_EVT, "pwr_rdy_evt"), 237 DEFINE_RES_IRQ_NAMED(MT6360_CHG_BATSYSUV_EVT, "chg_batsysuv_evt"), 238 DEFINE_RES_IRQ_NAMED(MT6360_CHG_VSYSUV_EVT, "chg_vsysuv_evt"), 239 DEFINE_RES_IRQ_NAMED(MT6360_CHG_VSYSOV_EVT, "chg_vsysov_evt"), 240 DEFINE_RES_IRQ_NAMED(MT6360_CHG_VBATOV_EVT, "chg_vbatov_evt"), 241 DEFINE_RES_IRQ_NAMED(MT6360_CHG_VBUSOV_EVT, "chg_vbusov_evt"), 242 DEFINE_RES_IRQ_NAMED(MT6360_CHG_AICCMEASL, "chg_aiccmeasl"), 243 DEFINE_RES_IRQ_NAMED(MT6360_WDTMRI, "wdtmri"), 244 DEFINE_RES_IRQ_NAMED(MT6360_CHG_RECHGI, "chg_rechgi"), 245 DEFINE_RES_IRQ_NAMED(MT6360_CHG_TERMI, "chg_termi"), 246 DEFINE_RES_IRQ_NAMED(MT6360_CHG_IEOCI, "chg_ieoci"), 247 DEFINE_RES_IRQ_NAMED(MT6360_PUMPX_DONEI, "pumpx_donei"), 248 DEFINE_RES_IRQ_NAMED(MT6360_ATTACH_I, "attach_i"), 249 DEFINE_RES_IRQ_NAMED(MT6360_CHRDET_EXT_EVT, "chrdet_ext_evt"), 250 }; 251 252 static const struct resource mt6360_led_resources[] = { 253 DEFINE_RES_IRQ_NAMED(MT6360_FLED_CHG_VINOVP_EVT, "fled_chg_vinovp_evt"), 254 DEFINE_RES_IRQ_NAMED(MT6360_FLED_LVF_EVT, "fled_lvf_evt"), 255 DEFINE_RES_IRQ_NAMED(MT6360_FLED2_SHORT_EVT, "fled2_short_evt"), 256 DEFINE_RES_IRQ_NAMED(MT6360_FLED1_SHORT_EVT, "fled1_short_evt"), 257 DEFINE_RES_IRQ_NAMED(MT6360_FLED2_STRB_TO_EVT, "fled2_strb_to_evt"), 258 DEFINE_RES_IRQ_NAMED(MT6360_FLED1_STRB_TO_EVT, "fled1_strb_to_evt"), 259 }; 260 261 static const struct resource mt6360_regulator_resources[] = { 262 DEFINE_RES_IRQ_NAMED(MT6360_BUCK1_PGB_EVT, "buck1_pgb_evt"), 263 DEFINE_RES_IRQ_NAMED(MT6360_BUCK1_OC_EVT, "buck1_oc_evt"), 264 DEFINE_RES_IRQ_NAMED(MT6360_BUCK1_OV_EVT, "buck1_ov_evt"), 265 DEFINE_RES_IRQ_NAMED(MT6360_BUCK1_UV_EVT, "buck1_uv_evt"), 266 DEFINE_RES_IRQ_NAMED(MT6360_BUCK2_PGB_EVT, "buck2_pgb_evt"), 267 DEFINE_RES_IRQ_NAMED(MT6360_BUCK2_OC_EVT, "buck2_oc_evt"), 268 DEFINE_RES_IRQ_NAMED(MT6360_BUCK2_OV_EVT, "buck2_ov_evt"), 269 DEFINE_RES_IRQ_NAMED(MT6360_BUCK2_UV_EVT, "buck2_uv_evt"), 270 DEFINE_RES_IRQ_NAMED(MT6360_LDO6_OC_EVT, "ldo6_oc_evt"), 271 DEFINE_RES_IRQ_NAMED(MT6360_LDO7_OC_EVT, "ldo7_oc_evt"), 272 DEFINE_RES_IRQ_NAMED(MT6360_LDO6_PGB_EVT, "ldo6_pgb_evt"), 273 DEFINE_RES_IRQ_NAMED(MT6360_LDO7_PGB_EVT, "ldo7_pgb_evt"), 274 DEFINE_RES_IRQ_NAMED(MT6360_LDO1_OC_EVT, "ldo1_oc_evt"), 275 DEFINE_RES_IRQ_NAMED(MT6360_LDO2_OC_EVT, "ldo2_oc_evt"), 276 DEFINE_RES_IRQ_NAMED(MT6360_LDO3_OC_EVT, "ldo3_oc_evt"), 277 DEFINE_RES_IRQ_NAMED(MT6360_LDO5_OC_EVT, "ldo5_oc_evt"), 278 DEFINE_RES_IRQ_NAMED(MT6360_LDO1_PGB_EVT, "ldo1_pgb_evt"), 279 DEFINE_RES_IRQ_NAMED(MT6360_LDO2_PGB_EVT, "ldo2_pgb_evt"), 280 DEFINE_RES_IRQ_NAMED(MT6360_LDO3_PGB_EVT, "ldo3_pgb_evt"), 281 DEFINE_RES_IRQ_NAMED(MT6360_LDO5_PGB_EVT, "ldo5_pgb_evt"), 282 }; 283 284 static const struct mfd_cell mt6360_devs[] = { 285 MFD_CELL_OF("mt6360-adc", mt6360_adc_resources, 286 NULL, 0, 0, "mediatek,mt6360-adc"), 287 MFD_CELL_OF("mt6360-chg", mt6360_chg_resources, 288 NULL, 0, 0, "mediatek,mt6360-chg"), 289 MFD_CELL_OF("mt6360-led", mt6360_led_resources, 290 NULL, 0, 0, "mediatek,mt6360-led"), 291 MFD_CELL_RES("mt6360-regulator", mt6360_regulator_resources), 292 MFD_CELL_OF("mt6360-tcpc", NULL, 293 NULL, 0, 0, "mediatek,mt6360-tcpc"), 294 }; 295 296 static const unsigned short mt6360_slave_addr[MT6360_SLAVE_MAX] = { 297 MT6360_PMU_SLAVEID, 298 MT6360_PMIC_SLAVEID, 299 MT6360_LDO_SLAVEID, 300 MT6360_TCPC_SLAVEID, 301 }; 302 303 static int mt6360_probe(struct i2c_client *client) 304 { 305 struct mt6360_ddata *ddata; 306 unsigned int reg_data; 307 int i, ret; 308 309 ddata = devm_kzalloc(&client->dev, sizeof(*ddata), GFP_KERNEL); 310 if (!ddata) 311 return -ENOMEM; 312 313 ddata->dev = &client->dev; 314 i2c_set_clientdata(client, ddata); 315 316 ddata->regmap = devm_regmap_init_i2c(client, &mt6360_pmu_regmap_config); 317 if (IS_ERR(ddata->regmap)) { 318 dev_err(&client->dev, "Failed to register regmap\n"); 319 return PTR_ERR(ddata->regmap); 320 } 321 322 ret = regmap_read(ddata->regmap, MT6360_PMU_DEV_INFO, ®_data); 323 if (ret) { 324 dev_err(&client->dev, "Device not found\n"); 325 return ret; 326 } 327 328 ddata->chip_rev = reg_data & CHIP_REV_MASK; 329 if (ddata->chip_rev != CHIP_VEN_MT6360) { 330 dev_err(&client->dev, "Device not supported\n"); 331 return -ENODEV; 332 } 333 334 ret = devm_regmap_add_irq_chip(&client->dev, ddata->regmap, client->irq, 335 0, 0, &mt6360_irq_chip, 336 &ddata->irq_data); 337 if (ret) { 338 dev_err(&client->dev, "Failed to add Regmap IRQ Chip\n"); 339 return ret; 340 } 341 342 ddata->i2c[0] = client; 343 for (i = 1; i < MT6360_SLAVE_MAX; i++) { 344 ddata->i2c[i] = devm_i2c_new_dummy_device(&client->dev, 345 client->adapter, 346 mt6360_slave_addr[i]); 347 if (IS_ERR(ddata->i2c[i])) { 348 dev_err(&client->dev, 349 "Failed to get new dummy I2C device for address 0x%x", 350 mt6360_slave_addr[i]); 351 return PTR_ERR(ddata->i2c[i]); 352 } 353 i2c_set_clientdata(ddata->i2c[i], ddata); 354 } 355 356 ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_AUTO, 357 mt6360_devs, ARRAY_SIZE(mt6360_devs), NULL, 358 0, regmap_irq_get_domain(ddata->irq_data)); 359 if (ret) { 360 dev_err(&client->dev, 361 "Failed to register subordinate devices\n"); 362 return ret; 363 } 364 365 return 0; 366 } 367 368 static int __maybe_unused mt6360_suspend(struct device *dev) 369 { 370 struct i2c_client *i2c = to_i2c_client(dev); 371 372 if (device_may_wakeup(dev)) 373 enable_irq_wake(i2c->irq); 374 375 return 0; 376 } 377 378 static int __maybe_unused mt6360_resume(struct device *dev) 379 { 380 381 struct i2c_client *i2c = to_i2c_client(dev); 382 383 if (device_may_wakeup(dev)) 384 disable_irq_wake(i2c->irq); 385 386 return 0; 387 } 388 389 static SIMPLE_DEV_PM_OPS(mt6360_pm_ops, mt6360_suspend, mt6360_resume); 390 391 static const struct of_device_id __maybe_unused mt6360_of_id[] = { 392 { .compatible = "mediatek,mt6360", }, 393 {}, 394 }; 395 MODULE_DEVICE_TABLE(of, mt6360_of_id); 396 397 static struct i2c_driver mt6360_driver = { 398 .driver = { 399 .name = "mt6360", 400 .pm = &mt6360_pm_ops, 401 .of_match_table = of_match_ptr(mt6360_of_id), 402 }, 403 .probe_new = mt6360_probe, 404 }; 405 module_i2c_driver(mt6360_driver); 406 407 MODULE_AUTHOR("Gene Chen <gene_chen@richtek.com>"); 408 MODULE_DESCRIPTION("MT6360 I2C Driver"); 409 MODULE_LICENSE("GPL v2"); 410