xref: /openbmc/linux/drivers/mfd/mc13xxx-core.c (revision c8ec3743)
1 /*
2  * Copyright 2009-2010 Pengutronix
3  * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4  *
5  * loosely based on an earlier driver that has
6  * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
7  *
8  * This program is free software; you can redistribute it and/or modify it under
9  * the terms of the GNU General Public License version 2 as published by the
10  * Free Software Foundation.
11  */
12 
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_device.h>
16 #include <linux/platform_device.h>
17 #include <linux/mfd/core.h>
18 
19 #include "mc13xxx.h"
20 
21 #define MC13XXX_IRQSTAT0	0
22 #define MC13XXX_IRQMASK0	1
23 #define MC13XXX_IRQSTAT1	3
24 #define MC13XXX_IRQMASK1	4
25 
26 #define MC13XXX_REVISION	7
27 #define MC13XXX_REVISION_REVMETAL	(0x07 <<  0)
28 #define MC13XXX_REVISION_REVFULL	(0x03 <<  3)
29 #define MC13XXX_REVISION_ICID		(0x07 <<  6)
30 #define MC13XXX_REVISION_FIN		(0x03 <<  9)
31 #define MC13XXX_REVISION_FAB		(0x03 << 11)
32 #define MC13XXX_REVISION_ICIDCODE	(0x3f << 13)
33 
34 #define MC34708_REVISION_REVMETAL	(0x07 <<  0)
35 #define MC34708_REVISION_REVFULL	(0x07 <<  3)
36 #define MC34708_REVISION_FIN		(0x07 <<  6)
37 #define MC34708_REVISION_FAB		(0x07 <<  9)
38 
39 #define MC13XXX_PWRCTRL		15
40 #define MC13XXX_PWRCTRL_WDIRESET	(1 << 12)
41 
42 #define MC13XXX_ADC1		44
43 #define MC13XXX_ADC1_ADEN		(1 << 0)
44 #define MC13XXX_ADC1_RAND		(1 << 1)
45 #define MC13XXX_ADC1_ADSEL		(1 << 3)
46 #define MC13XXX_ADC1_ASC		(1 << 20)
47 #define MC13XXX_ADC1_ADTRIGIGN		(1 << 21)
48 
49 #define MC13XXX_ADC2		45
50 
51 void mc13xxx_lock(struct mc13xxx *mc13xxx)
52 {
53 	if (!mutex_trylock(&mc13xxx->lock)) {
54 		dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
55 				__func__, __builtin_return_address(0));
56 
57 		mutex_lock(&mc13xxx->lock);
58 	}
59 	dev_dbg(mc13xxx->dev, "%s from %ps\n",
60 			__func__, __builtin_return_address(0));
61 }
62 EXPORT_SYMBOL(mc13xxx_lock);
63 
64 void mc13xxx_unlock(struct mc13xxx *mc13xxx)
65 {
66 	dev_dbg(mc13xxx->dev, "%s from %ps\n",
67 			__func__, __builtin_return_address(0));
68 	mutex_unlock(&mc13xxx->lock);
69 }
70 EXPORT_SYMBOL(mc13xxx_unlock);
71 
72 int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)
73 {
74 	int ret;
75 
76 	ret = regmap_read(mc13xxx->regmap, offset, val);
77 	dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);
78 
79 	return ret;
80 }
81 EXPORT_SYMBOL(mc13xxx_reg_read);
82 
83 int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
84 {
85 	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);
86 
87 	if (val >= BIT(24))
88 		return -EINVAL;
89 
90 	return regmap_write(mc13xxx->regmap, offset, val);
91 }
92 EXPORT_SYMBOL(mc13xxx_reg_write);
93 
94 int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
95 		u32 mask, u32 val)
96 {
97 	BUG_ON(val & ~mask);
98 	dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
99 			offset, val, mask);
100 
101 	return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
102 }
103 EXPORT_SYMBOL(mc13xxx_reg_rmw);
104 
105 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
106 {
107 	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
108 
109 	disable_irq_nosync(virq);
110 
111 	return 0;
112 }
113 EXPORT_SYMBOL(mc13xxx_irq_mask);
114 
115 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
116 {
117 	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
118 
119 	enable_irq(virq);
120 
121 	return 0;
122 }
123 EXPORT_SYMBOL(mc13xxx_irq_unmask);
124 
125 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
126 		int *enabled, int *pending)
127 {
128 	int ret;
129 	unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
130 	unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
131 	u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
132 
133 	if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs))
134 		return -EINVAL;
135 
136 	if (enabled) {
137 		u32 mask;
138 
139 		ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
140 		if (ret)
141 			return ret;
142 
143 		*enabled = mask & irqbit;
144 	}
145 
146 	if (pending) {
147 		u32 stat;
148 
149 		ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
150 		if (ret)
151 			return ret;
152 
153 		*pending = stat & irqbit;
154 	}
155 
156 	return 0;
157 }
158 EXPORT_SYMBOL(mc13xxx_irq_status);
159 
160 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
161 		irq_handler_t handler, const char *name, void *dev)
162 {
163 	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
164 
165 	return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
166 					 IRQF_ONESHOT, name, dev);
167 }
168 EXPORT_SYMBOL(mc13xxx_irq_request);
169 
170 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev)
171 {
172 	int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
173 
174 	devm_free_irq(mc13xxx->dev, virq, dev);
175 
176 	return 0;
177 }
178 EXPORT_SYMBOL(mc13xxx_irq_free);
179 
180 #define maskval(reg, mask)	(((reg) & (mask)) >> __ffs(mask))
181 static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
182 {
183 	dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
184 			"fin: %d, fab: %d, icid: %d/%d\n",
185 			mc13xxx->variant->name,
186 			maskval(revision, MC13XXX_REVISION_REVFULL),
187 			maskval(revision, MC13XXX_REVISION_REVMETAL),
188 			maskval(revision, MC13XXX_REVISION_FIN),
189 			maskval(revision, MC13XXX_REVISION_FAB),
190 			maskval(revision, MC13XXX_REVISION_ICID),
191 			maskval(revision, MC13XXX_REVISION_ICIDCODE));
192 }
193 
194 static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
195 {
196 	dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
197 			mc13xxx->variant->name,
198 			maskval(revision, MC34708_REVISION_REVFULL),
199 			maskval(revision, MC34708_REVISION_REVMETAL),
200 			maskval(revision, MC34708_REVISION_FIN),
201 			maskval(revision, MC34708_REVISION_FAB));
202 }
203 
204 /* These are only exported for mc13xxx-i2c and mc13xxx-spi */
205 struct mc13xxx_variant mc13xxx_variant_mc13783 = {
206 	.name = "mc13783",
207 	.print_revision = mc13xxx_print_revision,
208 };
209 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
210 
211 struct mc13xxx_variant mc13xxx_variant_mc13892 = {
212 	.name = "mc13892",
213 	.print_revision = mc13xxx_print_revision,
214 };
215 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
216 
217 struct mc13xxx_variant mc13xxx_variant_mc34708 = {
218 	.name = "mc34708",
219 	.print_revision = mc34708_print_revision,
220 };
221 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
222 
223 static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
224 {
225 	return mc13xxx->variant->name;
226 }
227 
228 int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
229 {
230 	return mc13xxx->flags;
231 }
232 EXPORT_SYMBOL(mc13xxx_get_flags);
233 
234 #define MC13XXX_ADC1_CHAN0_SHIFT	5
235 #define MC13XXX_ADC1_CHAN1_SHIFT	8
236 #define MC13783_ADC1_ATO_SHIFT		11
237 #define MC13783_ADC1_ATOX		(1 << 19)
238 
239 struct mc13xxx_adcdone_data {
240 	struct mc13xxx *mc13xxx;
241 	struct completion done;
242 };
243 
244 static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
245 {
246 	struct mc13xxx_adcdone_data *adcdone_data = data;
247 
248 	complete_all(&adcdone_data->done);
249 
250 	return IRQ_HANDLED;
251 }
252 
253 #define MC13XXX_ADC_WORKING (1 << 0)
254 
255 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
256 		unsigned int channel, u8 ato, bool atox,
257 		unsigned int *sample)
258 {
259 	u32 adc0, adc1, old_adc0;
260 	int i, ret;
261 	struct mc13xxx_adcdone_data adcdone_data = {
262 		.mc13xxx = mc13xxx,
263 	};
264 	init_completion(&adcdone_data.done);
265 
266 	dev_dbg(mc13xxx->dev, "%s\n", __func__);
267 
268 	mc13xxx_lock(mc13xxx);
269 
270 	if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
271 		ret = -EBUSY;
272 		goto out;
273 	}
274 
275 	mc13xxx->adcflags |= MC13XXX_ADC_WORKING;
276 
277 	ret = mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
278 	if (ret)
279 		goto out;
280 
281 	adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2 |
282 	       MC13XXX_ADC0_CHRGRAWDIV;
283 	adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;
284 
285 	/*
286 	 * Channels mapped through ADIN7:
287 	 * 7  - General purpose ADIN7
288 	 * 16 - UID
289 	 * 17 - Die temperature
290 	 */
291 	if (channel > 7 && channel < 16) {
292 		adc1 |= MC13XXX_ADC1_ADSEL;
293 	} else if (channel == 16) {
294 		adc0 |= MC13XXX_ADC0_ADIN7SEL_UID;
295 		channel = 7;
296 	} else if (channel == 17) {
297 		adc0 |= MC13XXX_ADC0_ADIN7SEL_DIE;
298 		channel = 7;
299 	}
300 
301 	switch (mode) {
302 	case MC13XXX_ADC_MODE_TS:
303 		adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
304 			MC13XXX_ADC0_TSMOD1;
305 		adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
306 		break;
307 
308 	case MC13XXX_ADC_MODE_SINGLE_CHAN:
309 		adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
310 		adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
311 		adc1 |= MC13XXX_ADC1_RAND;
312 		break;
313 
314 	case MC13XXX_ADC_MODE_MULT_CHAN:
315 		adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
316 		adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
317 		break;
318 
319 	default:
320 		mc13xxx_unlock(mc13xxx);
321 		return -EINVAL;
322 	}
323 
324 	adc1 |= ato << MC13783_ADC1_ATO_SHIFT;
325 	if (atox)
326 		adc1 |= MC13783_ADC1_ATOX;
327 
328 	dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
329 	mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
330 			mc13xxx_handler_adcdone, __func__, &adcdone_data);
331 
332 	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
333 	mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
334 
335 	mc13xxx_unlock(mc13xxx);
336 
337 	ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);
338 
339 	if (!ret)
340 		ret = -ETIMEDOUT;
341 
342 	mc13xxx_lock(mc13xxx);
343 
344 	mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
345 
346 	if (ret > 0)
347 		for (i = 0; i < 4; ++i) {
348 			ret = mc13xxx_reg_read(mc13xxx,
349 					MC13XXX_ADC2, &sample[i]);
350 			if (ret)
351 				break;
352 		}
353 
354 	if (mode == MC13XXX_ADC_MODE_TS)
355 		/* restore TSMOD */
356 		mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
357 
358 	mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
359 out:
360 	mc13xxx_unlock(mc13xxx);
361 
362 	return ret;
363 }
364 EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
365 
366 static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
367 		const char *format, void *pdata, size_t pdata_size)
368 {
369 	char buf[30];
370 	const char *name = mc13xxx_get_chipname(mc13xxx);
371 
372 	struct mfd_cell cell = {
373 		.platform_data = pdata,
374 		.pdata_size = pdata_size,
375 	};
376 
377 	/* there is no asnprintf in the kernel :-( */
378 	if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
379 		return -E2BIG;
380 
381 	cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
382 	if (!cell.name)
383 		return -ENOMEM;
384 
385 	return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
386 			       regmap_irq_get_domain(mc13xxx->irq_data));
387 }
388 
389 static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
390 {
391 	return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
392 }
393 
394 #ifdef CONFIG_OF
395 static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
396 {
397 	struct device_node *np = mc13xxx->dev->of_node;
398 
399 	if (!np)
400 		return -ENODEV;
401 
402 	if (of_property_read_bool(np, "fsl,mc13xxx-uses-adc"))
403 		mc13xxx->flags |= MC13XXX_USE_ADC;
404 
405 	if (of_property_read_bool(np, "fsl,mc13xxx-uses-codec"))
406 		mc13xxx->flags |= MC13XXX_USE_CODEC;
407 
408 	if (of_property_read_bool(np, "fsl,mc13xxx-uses-rtc"))
409 		mc13xxx->flags |= MC13XXX_USE_RTC;
410 
411 	if (of_property_read_bool(np, "fsl,mc13xxx-uses-touch"))
412 		mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN;
413 
414 	return 0;
415 }
416 #else
417 static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
418 {
419 	return -ENODEV;
420 }
421 #endif
422 
423 int mc13xxx_common_init(struct device *dev)
424 {
425 	struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
426 	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
427 	u32 revision;
428 	int i, ret;
429 
430 	mc13xxx->dev = dev;
431 
432 	ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
433 	if (ret)
434 		return ret;
435 
436 	mc13xxx->variant->print_revision(mc13xxx, revision);
437 
438 	ret = mc13xxx_reg_rmw(mc13xxx, MC13XXX_PWRCTRL,
439 			MC13XXX_PWRCTRL_WDIRESET, MC13XXX_PWRCTRL_WDIRESET);
440 	if (ret)
441 		return ret;
442 
443 	for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
444 		mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
445 		mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
446 	}
447 
448 	mc13xxx->irq_chip.name = dev_name(dev);
449 	mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
450 	mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
451 	mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
452 	mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
453 	mc13xxx->irq_chip.init_ack_masked = true;
454 	mc13xxx->irq_chip.use_ack = true;
455 	mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
456 	mc13xxx->irq_chip.irqs = mc13xxx->irqs;
457 	mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
458 
459 	ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
460 				  0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
461 	if (ret)
462 		return ret;
463 
464 	mutex_init(&mc13xxx->lock);
465 
466 	if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
467 		mc13xxx->flags = pdata->flags;
468 
469 	if (pdata) {
470 		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
471 			&pdata->regulators, sizeof(pdata->regulators));
472 		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
473 				pdata->leds, sizeof(*pdata->leds));
474 		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
475 				pdata->buttons, sizeof(*pdata->buttons));
476 		if (mc13xxx->flags & MC13XXX_USE_CODEC)
477 			mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
478 				pdata->codec, sizeof(*pdata->codec));
479 		if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
480 			mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
481 				&pdata->touch, sizeof(pdata->touch));
482 	} else {
483 		mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
484 		mc13xxx_add_subdevice(mc13xxx, "%s-led");
485 		mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
486 		if (mc13xxx->flags & MC13XXX_USE_CODEC)
487 			mc13xxx_add_subdevice(mc13xxx, "%s-codec");
488 		if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
489 			mc13xxx_add_subdevice(mc13xxx, "%s-ts");
490 	}
491 
492 	if (mc13xxx->flags & MC13XXX_USE_ADC)
493 		mc13xxx_add_subdevice(mc13xxx, "%s-adc");
494 
495 	if (mc13xxx->flags & MC13XXX_USE_RTC)
496 		mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
497 
498 	return 0;
499 }
500 EXPORT_SYMBOL_GPL(mc13xxx_common_init);
501 
502 int mc13xxx_common_exit(struct device *dev)
503 {
504 	struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
505 
506 	mfd_remove_devices(dev);
507 	regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
508 	mutex_destroy(&mc13xxx->lock);
509 
510 	return 0;
511 }
512 EXPORT_SYMBOL_GPL(mc13xxx_common_exit);
513 
514 MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
515 MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
516 MODULE_LICENSE("GPL v2");
517