1 /* 2 * Copyright 2009-2010 Pengutronix 3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> 4 * 5 * loosely based on an earlier driver that has 6 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> 7 * 8 * This program is free software; you can redistribute it and/or modify it under 9 * the terms of the GNU General Public License version 2 as published by the 10 * Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include <linux/platform_device.h> 17 #include <linux/mfd/core.h> 18 19 #include "mc13xxx.h" 20 21 #define MC13XXX_IRQSTAT0 0 22 #define MC13XXX_IRQMASK0 1 23 #define MC13XXX_IRQSTAT1 3 24 #define MC13XXX_IRQMASK1 4 25 26 #define MC13XXX_REVISION 7 27 #define MC13XXX_REVISION_REVMETAL (0x07 << 0) 28 #define MC13XXX_REVISION_REVFULL (0x03 << 3) 29 #define MC13XXX_REVISION_ICID (0x07 << 6) 30 #define MC13XXX_REVISION_FIN (0x03 << 9) 31 #define MC13XXX_REVISION_FAB (0x03 << 11) 32 #define MC13XXX_REVISION_ICIDCODE (0x3f << 13) 33 34 #define MC34708_REVISION_REVMETAL (0x07 << 0) 35 #define MC34708_REVISION_REVFULL (0x07 << 3) 36 #define MC34708_REVISION_FIN (0x07 << 6) 37 #define MC34708_REVISION_FAB (0x07 << 9) 38 39 #define MC13XXX_ADC1 44 40 #define MC13XXX_ADC1_ADEN (1 << 0) 41 #define MC13XXX_ADC1_RAND (1 << 1) 42 #define MC13XXX_ADC1_ADSEL (1 << 3) 43 #define MC13XXX_ADC1_ASC (1 << 20) 44 #define MC13XXX_ADC1_ADTRIGIGN (1 << 21) 45 46 #define MC13XXX_ADC2 45 47 48 void mc13xxx_lock(struct mc13xxx *mc13xxx) 49 { 50 if (!mutex_trylock(&mc13xxx->lock)) { 51 dev_dbg(mc13xxx->dev, "wait for %s from %pf\n", 52 __func__, __builtin_return_address(0)); 53 54 mutex_lock(&mc13xxx->lock); 55 } 56 dev_dbg(mc13xxx->dev, "%s from %pf\n", 57 __func__, __builtin_return_address(0)); 58 } 59 EXPORT_SYMBOL(mc13xxx_lock); 60 61 void mc13xxx_unlock(struct mc13xxx *mc13xxx) 62 { 63 dev_dbg(mc13xxx->dev, "%s from %pf\n", 64 __func__, __builtin_return_address(0)); 65 mutex_unlock(&mc13xxx->lock); 66 } 67 EXPORT_SYMBOL(mc13xxx_unlock); 68 69 int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) 70 { 71 int ret; 72 73 ret = regmap_read(mc13xxx->regmap, offset, val); 74 dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val); 75 76 return ret; 77 } 78 EXPORT_SYMBOL(mc13xxx_reg_read); 79 80 int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) 81 { 82 dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val); 83 84 if (val >= BIT(24)) 85 return -EINVAL; 86 87 return regmap_write(mc13xxx->regmap, offset, val); 88 } 89 EXPORT_SYMBOL(mc13xxx_reg_write); 90 91 int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, 92 u32 mask, u32 val) 93 { 94 BUG_ON(val & ~mask); 95 dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n", 96 offset, val, mask); 97 98 return regmap_update_bits(mc13xxx->regmap, offset, mask, val); 99 } 100 EXPORT_SYMBOL(mc13xxx_reg_rmw); 101 102 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq) 103 { 104 int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 105 106 disable_irq_nosync(virq); 107 108 return 0; 109 } 110 EXPORT_SYMBOL(mc13xxx_irq_mask); 111 112 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq) 113 { 114 int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 115 116 enable_irq(virq); 117 118 return 0; 119 } 120 EXPORT_SYMBOL(mc13xxx_irq_unmask); 121 122 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq, 123 int *enabled, int *pending) 124 { 125 int ret; 126 unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1; 127 unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1; 128 u32 irqbit = 1 << (irq < 24 ? irq : irq - 24); 129 130 if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs)) 131 return -EINVAL; 132 133 if (enabled) { 134 u32 mask; 135 136 ret = mc13xxx_reg_read(mc13xxx, offmask, &mask); 137 if (ret) 138 return ret; 139 140 *enabled = mask & irqbit; 141 } 142 143 if (pending) { 144 u32 stat; 145 146 ret = mc13xxx_reg_read(mc13xxx, offstat, &stat); 147 if (ret) 148 return ret; 149 150 *pending = stat & irqbit; 151 } 152 153 return 0; 154 } 155 EXPORT_SYMBOL(mc13xxx_irq_status); 156 157 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, 158 irq_handler_t handler, const char *name, void *dev) 159 { 160 int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 161 162 return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler, 163 0, name, dev); 164 } 165 EXPORT_SYMBOL(mc13xxx_irq_request); 166 167 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev) 168 { 169 int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 170 171 devm_free_irq(mc13xxx->dev, virq, dev); 172 173 return 0; 174 } 175 EXPORT_SYMBOL(mc13xxx_irq_free); 176 177 #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask)) 178 static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision) 179 { 180 dev_info(mc13xxx->dev, "%s: rev: %d.%d, " 181 "fin: %d, fab: %d, icid: %d/%d\n", 182 mc13xxx->variant->name, 183 maskval(revision, MC13XXX_REVISION_REVFULL), 184 maskval(revision, MC13XXX_REVISION_REVMETAL), 185 maskval(revision, MC13XXX_REVISION_FIN), 186 maskval(revision, MC13XXX_REVISION_FAB), 187 maskval(revision, MC13XXX_REVISION_ICID), 188 maskval(revision, MC13XXX_REVISION_ICIDCODE)); 189 } 190 191 static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision) 192 { 193 dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n", 194 mc13xxx->variant->name, 195 maskval(revision, MC34708_REVISION_REVFULL), 196 maskval(revision, MC34708_REVISION_REVMETAL), 197 maskval(revision, MC34708_REVISION_FIN), 198 maskval(revision, MC34708_REVISION_FAB)); 199 } 200 201 /* These are only exported for mc13xxx-i2c and mc13xxx-spi */ 202 struct mc13xxx_variant mc13xxx_variant_mc13783 = { 203 .name = "mc13783", 204 .print_revision = mc13xxx_print_revision, 205 }; 206 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783); 207 208 struct mc13xxx_variant mc13xxx_variant_mc13892 = { 209 .name = "mc13892", 210 .print_revision = mc13xxx_print_revision, 211 }; 212 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892); 213 214 struct mc13xxx_variant mc13xxx_variant_mc34708 = { 215 .name = "mc34708", 216 .print_revision = mc34708_print_revision, 217 }; 218 EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708); 219 220 static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx) 221 { 222 return mc13xxx->variant->name; 223 } 224 225 int mc13xxx_get_flags(struct mc13xxx *mc13xxx) 226 { 227 return mc13xxx->flags; 228 } 229 EXPORT_SYMBOL(mc13xxx_get_flags); 230 231 #define MC13XXX_ADC1_CHAN0_SHIFT 5 232 #define MC13XXX_ADC1_CHAN1_SHIFT 8 233 #define MC13783_ADC1_ATO_SHIFT 11 234 #define MC13783_ADC1_ATOX (1 << 19) 235 236 struct mc13xxx_adcdone_data { 237 struct mc13xxx *mc13xxx; 238 struct completion done; 239 }; 240 241 static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data) 242 { 243 struct mc13xxx_adcdone_data *adcdone_data = data; 244 245 complete_all(&adcdone_data->done); 246 247 return IRQ_HANDLED; 248 } 249 250 #define MC13XXX_ADC_WORKING (1 << 0) 251 252 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, 253 unsigned int channel, u8 ato, bool atox, 254 unsigned int *sample) 255 { 256 u32 adc0, adc1, old_adc0; 257 int i, ret; 258 struct mc13xxx_adcdone_data adcdone_data = { 259 .mc13xxx = mc13xxx, 260 }; 261 init_completion(&adcdone_data.done); 262 263 dev_dbg(mc13xxx->dev, "%s\n", __func__); 264 265 mc13xxx_lock(mc13xxx); 266 267 if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) { 268 ret = -EBUSY; 269 goto out; 270 } 271 272 mc13xxx->adcflags |= MC13XXX_ADC_WORKING; 273 274 mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0); 275 276 adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2; 277 adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC; 278 279 if (channel > 7) 280 adc1 |= MC13XXX_ADC1_ADSEL; 281 282 switch (mode) { 283 case MC13XXX_ADC_MODE_TS: 284 adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 | 285 MC13XXX_ADC0_TSMOD1; 286 adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; 287 break; 288 289 case MC13XXX_ADC_MODE_SINGLE_CHAN: 290 adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK; 291 adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT; 292 adc1 |= MC13XXX_ADC1_RAND; 293 break; 294 295 case MC13XXX_ADC_MODE_MULT_CHAN: 296 adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK; 297 adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; 298 break; 299 300 default: 301 mc13xxx_unlock(mc13xxx); 302 return -EINVAL; 303 } 304 305 adc1 |= ato << MC13783_ADC1_ATO_SHIFT; 306 if (atox) 307 adc1 |= MC13783_ADC1_ATOX; 308 309 dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__); 310 mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE, 311 mc13xxx_handler_adcdone, __func__, &adcdone_data); 312 313 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0); 314 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1); 315 316 mc13xxx_unlock(mc13xxx); 317 318 ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ); 319 320 if (!ret) 321 ret = -ETIMEDOUT; 322 323 mc13xxx_lock(mc13xxx); 324 325 mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data); 326 327 if (ret > 0) 328 for (i = 0; i < 4; ++i) { 329 ret = mc13xxx_reg_read(mc13xxx, 330 MC13XXX_ADC2, &sample[i]); 331 if (ret) 332 break; 333 } 334 335 if (mode == MC13XXX_ADC_MODE_TS) 336 /* restore TSMOD */ 337 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0); 338 339 mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING; 340 out: 341 mc13xxx_unlock(mc13xxx); 342 343 return ret; 344 } 345 EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion); 346 347 static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx, 348 const char *format, void *pdata, size_t pdata_size) 349 { 350 char buf[30]; 351 const char *name = mc13xxx_get_chipname(mc13xxx); 352 353 struct mfd_cell cell = { 354 .platform_data = pdata, 355 .pdata_size = pdata_size, 356 }; 357 358 /* there is no asnprintf in the kernel :-( */ 359 if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf)) 360 return -E2BIG; 361 362 cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL); 363 if (!cell.name) 364 return -ENOMEM; 365 366 return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0, 367 regmap_irq_get_domain(mc13xxx->irq_data)); 368 } 369 370 static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) 371 { 372 return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0); 373 } 374 375 #ifdef CONFIG_OF 376 static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) 377 { 378 struct device_node *np = mc13xxx->dev->of_node; 379 380 if (!np) 381 return -ENODEV; 382 383 if (of_get_property(np, "fsl,mc13xxx-uses-adc", NULL)) 384 mc13xxx->flags |= MC13XXX_USE_ADC; 385 386 if (of_get_property(np, "fsl,mc13xxx-uses-codec", NULL)) 387 mc13xxx->flags |= MC13XXX_USE_CODEC; 388 389 if (of_get_property(np, "fsl,mc13xxx-uses-rtc", NULL)) 390 mc13xxx->flags |= MC13XXX_USE_RTC; 391 392 if (of_get_property(np, "fsl,mc13xxx-uses-touch", NULL)) 393 mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN; 394 395 return 0; 396 } 397 #else 398 static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) 399 { 400 return -ENODEV; 401 } 402 #endif 403 404 int mc13xxx_common_init(struct device *dev) 405 { 406 struct mc13xxx_platform_data *pdata = dev_get_platdata(dev); 407 struct mc13xxx *mc13xxx = dev_get_drvdata(dev); 408 u32 revision; 409 int i, ret; 410 411 mc13xxx->dev = dev; 412 413 ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision); 414 if (ret) 415 return ret; 416 417 mc13xxx->variant->print_revision(mc13xxx, revision); 418 419 for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) { 420 mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG; 421 mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG); 422 } 423 424 mc13xxx->irq_chip.name = dev_name(dev); 425 mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0; 426 mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0; 427 mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0; 428 mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0; 429 mc13xxx->irq_chip.init_ack_masked = true; 430 mc13xxx->irq_chip.use_ack = true; 431 mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT; 432 mc13xxx->irq_chip.irqs = mc13xxx->irqs; 433 mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs); 434 435 ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT, 436 0, &mc13xxx->irq_chip, &mc13xxx->irq_data); 437 if (ret) 438 return ret; 439 440 mutex_init(&mc13xxx->lock); 441 442 if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata) 443 mc13xxx->flags = pdata->flags; 444 445 if (pdata) { 446 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator", 447 &pdata->regulators, sizeof(pdata->regulators)); 448 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led", 449 pdata->leds, sizeof(*pdata->leds)); 450 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton", 451 pdata->buttons, sizeof(*pdata->buttons)); 452 if (mc13xxx->flags & MC13XXX_USE_CODEC) 453 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec", 454 pdata->codec, sizeof(*pdata->codec)); 455 if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN) 456 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts", 457 &pdata->touch, sizeof(pdata->touch)); 458 } else { 459 mc13xxx_add_subdevice(mc13xxx, "%s-regulator"); 460 mc13xxx_add_subdevice(mc13xxx, "%s-led"); 461 mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton"); 462 if (mc13xxx->flags & MC13XXX_USE_CODEC) 463 mc13xxx_add_subdevice(mc13xxx, "%s-codec"); 464 if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN) 465 mc13xxx_add_subdevice(mc13xxx, "%s-ts"); 466 } 467 468 if (mc13xxx->flags & MC13XXX_USE_ADC) 469 mc13xxx_add_subdevice(mc13xxx, "%s-adc"); 470 471 if (mc13xxx->flags & MC13XXX_USE_RTC) 472 mc13xxx_add_subdevice(mc13xxx, "%s-rtc"); 473 474 return 0; 475 } 476 EXPORT_SYMBOL_GPL(mc13xxx_common_init); 477 478 int mc13xxx_common_exit(struct device *dev) 479 { 480 struct mc13xxx *mc13xxx = dev_get_drvdata(dev); 481 482 mfd_remove_devices(dev); 483 regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data); 484 mutex_destroy(&mc13xxx->lock); 485 486 return 0; 487 } 488 EXPORT_SYMBOL_GPL(mc13xxx_common_exit); 489 490 MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC"); 491 MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>"); 492 MODULE_LICENSE("GPL v2"); 493