xref: /openbmc/linux/drivers/mfd/max8925-core.c (revision dc0c386e)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2d50f8f33SHaojian Zhuang /*
3d50f8f33SHaojian Zhuang  * Base driver for Maxim MAX8925
4d50f8f33SHaojian Zhuang  *
51f1cf8f9SHaojian Zhuang  * Copyright (C) 2009-2010 Marvell International Ltd.
6d50f8f33SHaojian Zhuang  *	Haojian Zhuang <haojian.zhuang@marvell.com>
7d50f8f33SHaojian Zhuang  */
8d50f8f33SHaojian Zhuang 
9d50f8f33SHaojian Zhuang #include <linux/kernel.h>
10b51bf15cSPaul Gortmaker #include <linux/init.h>
11d50f8f33SHaojian Zhuang #include <linux/i2c.h>
121f1cf8f9SHaojian Zhuang #include <linux/irq.h>
13d50f8f33SHaojian Zhuang #include <linux/interrupt.h>
144e405ae2SQing Xu #include <linux/irqdomain.h>
15d50f8f33SHaojian Zhuang #include <linux/platform_device.h>
1651acdb61SHaojian Zhuang #include <linux/regulator/machine.h>
17d50f8f33SHaojian Zhuang #include <linux/mfd/core.h>
18d50f8f33SHaojian Zhuang #include <linux/mfd/max8925.h>
194e405ae2SQing Xu #include <linux/of.h>
20d50f8f33SHaojian Zhuang 
21*c4a164f4SRikard Falkeborn static const struct resource bk_resources[] = {
2263b501e2SHaojian Zhuang 	{ 0x84, 0x84, "mode control", IORESOURCE_REG, },
2363b501e2SHaojian Zhuang 	{ 0x85, 0x85, "control",      IORESOURCE_REG, },
241ad99893SHaojian Zhuang };
251ad99893SHaojian Zhuang 
26a9e9ce4cSBill Pemberton static struct mfd_cell bk_devs[] = {
271ad99893SHaojian Zhuang 	{
281ad99893SHaojian Zhuang 		.name		= "max8925-backlight",
2963b501e2SHaojian Zhuang 		.num_resources	= ARRAY_SIZE(bk_resources),
3063b501e2SHaojian Zhuang 		.resources	= &bk_resources[0],
311ad99893SHaojian Zhuang 		.id		= -1,
321ad99893SHaojian Zhuang 	},
331ad99893SHaojian Zhuang };
341ad99893SHaojian Zhuang 
35*c4a164f4SRikard Falkeborn static const struct resource touch_resources[] = {
361ad99893SHaojian Zhuang 	{
371ad99893SHaojian Zhuang 		.name	= "max8925-tsc",
381ad99893SHaojian Zhuang 		.start	= MAX8925_TSC_IRQ,
391ad99893SHaojian Zhuang 		.end	= MAX8925_ADC_RES_END,
40015625a2SMark Brown 		.flags	= IORESOURCE_REG,
411ad99893SHaojian Zhuang 	},
421ad99893SHaojian Zhuang };
431ad99893SHaojian Zhuang 
447c0517b1SGeert Uytterhoeven static const struct mfd_cell touch_devs[] = {
451ad99893SHaojian Zhuang 	{
461ad99893SHaojian Zhuang 		.name		= "max8925-touch",
471ad99893SHaojian Zhuang 		.num_resources	= 1,
481ad99893SHaojian Zhuang 		.resources	= &touch_resources[0],
491ad99893SHaojian Zhuang 		.id		= -1,
501ad99893SHaojian Zhuang 	},
511ad99893SHaojian Zhuang };
521ad99893SHaojian Zhuang 
53*c4a164f4SRikard Falkeborn static const struct resource power_supply_resources[] = {
541f1cf8f9SHaojian Zhuang 	{
551f1cf8f9SHaojian Zhuang 		.name	= "max8925-power",
561f1cf8f9SHaojian Zhuang 		.start	= MAX8925_CHG_IRQ1,
571f1cf8f9SHaojian Zhuang 		.end	= MAX8925_CHG_IRQ1_MASK,
58015625a2SMark Brown 		.flags	= IORESOURCE_REG,
591f1cf8f9SHaojian Zhuang 	},
601f1cf8f9SHaojian Zhuang };
611f1cf8f9SHaojian Zhuang 
627c0517b1SGeert Uytterhoeven static const struct mfd_cell power_devs[] = {
631f1cf8f9SHaojian Zhuang 	{
641f1cf8f9SHaojian Zhuang 		.name		= "max8925-power",
651f1cf8f9SHaojian Zhuang 		.num_resources	= 1,
661f1cf8f9SHaojian Zhuang 		.resources	= &power_supply_resources[0],
671f1cf8f9SHaojian Zhuang 		.id		= -1,
681f1cf8f9SHaojian Zhuang 	},
691f1cf8f9SHaojian Zhuang };
701f1cf8f9SHaojian Zhuang 
71*c4a164f4SRikard Falkeborn static const struct resource rtc_resources[] = {
721f1cf8f9SHaojian Zhuang 	{
731f1cf8f9SHaojian Zhuang 		.name	= "max8925-rtc",
74c1a2f31dSHaojian Zhuang 		.start	= MAX8925_IRQ_RTC_ALARM0,
75c1a2f31dSHaojian Zhuang 		.end	= MAX8925_IRQ_RTC_ALARM0,
76c1a2f31dSHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
771f1cf8f9SHaojian Zhuang 	},
781f1cf8f9SHaojian Zhuang };
791f1cf8f9SHaojian Zhuang 
807c0517b1SGeert Uytterhoeven static const struct mfd_cell rtc_devs[] = {
811f1cf8f9SHaojian Zhuang 	{
821f1cf8f9SHaojian Zhuang 		.name		= "max8925-rtc",
831f1cf8f9SHaojian Zhuang 		.num_resources	= 1,
841f1cf8f9SHaojian Zhuang 		.resources	= &rtc_resources[0],
851f1cf8f9SHaojian Zhuang 		.id		= -1,
861f1cf8f9SHaojian Zhuang 	},
871f1cf8f9SHaojian Zhuang };
881f1cf8f9SHaojian Zhuang 
89*c4a164f4SRikard Falkeborn static const struct resource onkey_resources[] = {
90d0f7a6d6SHaojian Zhuang 	{
91d0f7a6d6SHaojian Zhuang 		.name	= "max8925-onkey",
922d95ae3bSHaojian Zhuang 		.start	= MAX8925_IRQ_GPM_SW_R,
932d95ae3bSHaojian Zhuang 		.end	= MAX8925_IRQ_GPM_SW_R,
942d95ae3bSHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
952d95ae3bSHaojian Zhuang 	}, {
962d95ae3bSHaojian Zhuang 		.name	= "max8925-onkey",
972d95ae3bSHaojian Zhuang 		.start	= MAX8925_IRQ_GPM_SW_F,
982d95ae3bSHaojian Zhuang 		.end	= MAX8925_IRQ_GPM_SW_F,
99d0f7a6d6SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
100d0f7a6d6SHaojian Zhuang 	},
101d0f7a6d6SHaojian Zhuang };
102d0f7a6d6SHaojian Zhuang 
1037c0517b1SGeert Uytterhoeven static const struct mfd_cell onkey_devs[] = {
104d0f7a6d6SHaojian Zhuang 	{
105d0f7a6d6SHaojian Zhuang 		.name		= "max8925-onkey",
1062d95ae3bSHaojian Zhuang 		.num_resources	= 2,
107d0f7a6d6SHaojian Zhuang 		.resources	= &onkey_resources[0],
108d0f7a6d6SHaojian Zhuang 		.id		= -1,
109d0f7a6d6SHaojian Zhuang 	},
110d0f7a6d6SHaojian Zhuang };
111d0f7a6d6SHaojian Zhuang 
112*c4a164f4SRikard Falkeborn static const struct resource sd1_resources[] = {
11351acdb61SHaojian Zhuang 	{0x06, 0x06, "sdv", IORESOURCE_REG, },
1141ad99893SHaojian Zhuang };
1151ad99893SHaojian Zhuang 
116*c4a164f4SRikard Falkeborn static const struct resource sd2_resources[] = {
11751acdb61SHaojian Zhuang 	{0x09, 0x09, "sdv", IORESOURCE_REG, },
11851acdb61SHaojian Zhuang };
1191ad99893SHaojian Zhuang 
120*c4a164f4SRikard Falkeborn static const struct resource sd3_resources[] = {
12151acdb61SHaojian Zhuang 	{0x0c, 0x0c, "sdv", IORESOURCE_REG, },
12251acdb61SHaojian Zhuang };
12351acdb61SHaojian Zhuang 
124*c4a164f4SRikard Falkeborn static const struct resource ldo1_resources[] = {
12551acdb61SHaojian Zhuang 	{0x1a, 0x1a, "ldov", IORESOURCE_REG, },
12651acdb61SHaojian Zhuang };
12751acdb61SHaojian Zhuang 
128*c4a164f4SRikard Falkeborn static const struct resource ldo2_resources[] = {
12951acdb61SHaojian Zhuang 	{0x1e, 0x1e, "ldov", IORESOURCE_REG, },
13051acdb61SHaojian Zhuang };
13151acdb61SHaojian Zhuang 
132*c4a164f4SRikard Falkeborn static const struct resource ldo3_resources[] = {
13351acdb61SHaojian Zhuang 	{0x22, 0x22, "ldov", IORESOURCE_REG, },
13451acdb61SHaojian Zhuang };
13551acdb61SHaojian Zhuang 
136*c4a164f4SRikard Falkeborn static const struct resource ldo4_resources[] = {
13751acdb61SHaojian Zhuang 	{0x26, 0x26, "ldov", IORESOURCE_REG, },
13851acdb61SHaojian Zhuang };
13951acdb61SHaojian Zhuang 
140*c4a164f4SRikard Falkeborn static const struct resource ldo5_resources[] = {
14151acdb61SHaojian Zhuang 	{0x2a, 0x2a, "ldov", IORESOURCE_REG, },
14251acdb61SHaojian Zhuang };
14351acdb61SHaojian Zhuang 
144*c4a164f4SRikard Falkeborn static const struct resource ldo6_resources[] = {
14551acdb61SHaojian Zhuang 	{0x2e, 0x2e, "ldov", IORESOURCE_REG, },
14651acdb61SHaojian Zhuang };
14751acdb61SHaojian Zhuang 
148*c4a164f4SRikard Falkeborn static const struct resource ldo7_resources[] = {
14951acdb61SHaojian Zhuang 	{0x32, 0x32, "ldov", IORESOURCE_REG, },
15051acdb61SHaojian Zhuang };
15151acdb61SHaojian Zhuang 
152*c4a164f4SRikard Falkeborn static const struct resource ldo8_resources[] = {
15351acdb61SHaojian Zhuang 	{0x36, 0x36, "ldov", IORESOURCE_REG, },
15451acdb61SHaojian Zhuang };
15551acdb61SHaojian Zhuang 
156*c4a164f4SRikard Falkeborn static const struct resource ldo9_resources[] = {
15751acdb61SHaojian Zhuang 	{0x3a, 0x3a, "ldov", IORESOURCE_REG, },
15851acdb61SHaojian Zhuang };
15951acdb61SHaojian Zhuang 
160*c4a164f4SRikard Falkeborn static const struct resource ldo10_resources[] = {
16151acdb61SHaojian Zhuang 	{0x3e, 0x3e, "ldov", IORESOURCE_REG, },
16251acdb61SHaojian Zhuang };
16351acdb61SHaojian Zhuang 
164*c4a164f4SRikard Falkeborn static const struct resource ldo11_resources[] = {
16551acdb61SHaojian Zhuang 	{0x42, 0x42, "ldov", IORESOURCE_REG, },
16651acdb61SHaojian Zhuang };
16751acdb61SHaojian Zhuang 
168*c4a164f4SRikard Falkeborn static const struct resource ldo12_resources[] = {
16951acdb61SHaojian Zhuang 	{0x46, 0x46, "ldov", IORESOURCE_REG, },
17051acdb61SHaojian Zhuang };
17151acdb61SHaojian Zhuang 
172*c4a164f4SRikard Falkeborn static const struct resource ldo13_resources[] = {
17351acdb61SHaojian Zhuang 	{0x4a, 0x4a, "ldov", IORESOURCE_REG, },
17451acdb61SHaojian Zhuang };
17551acdb61SHaojian Zhuang 
176*c4a164f4SRikard Falkeborn static const struct resource ldo14_resources[] = {
17751acdb61SHaojian Zhuang 	{0x4e, 0x4e, "ldov", IORESOURCE_REG, },
17851acdb61SHaojian Zhuang };
17951acdb61SHaojian Zhuang 
180*c4a164f4SRikard Falkeborn static const struct resource ldo15_resources[] = {
18151acdb61SHaojian Zhuang 	{0x52, 0x52, "ldov", IORESOURCE_REG, },
18251acdb61SHaojian Zhuang };
18351acdb61SHaojian Zhuang 
184*c4a164f4SRikard Falkeborn static const struct resource ldo16_resources[] = {
18551acdb61SHaojian Zhuang 	{0x12, 0x12, "ldov", IORESOURCE_REG, },
18651acdb61SHaojian Zhuang };
18751acdb61SHaojian Zhuang 
188*c4a164f4SRikard Falkeborn static const struct resource ldo17_resources[] = {
18951acdb61SHaojian Zhuang 	{0x16, 0x16, "ldov", IORESOURCE_REG, },
19051acdb61SHaojian Zhuang };
19151acdb61SHaojian Zhuang 
192*c4a164f4SRikard Falkeborn static const struct resource ldo18_resources[] = {
19351acdb61SHaojian Zhuang 	{0x74, 0x74, "ldov", IORESOURCE_REG, },
19451acdb61SHaojian Zhuang };
19551acdb61SHaojian Zhuang 
196*c4a164f4SRikard Falkeborn static const struct resource ldo19_resources[] = {
19751acdb61SHaojian Zhuang 	{0x5e, 0x5e, "ldov", IORESOURCE_REG, },
19851acdb61SHaojian Zhuang };
19951acdb61SHaojian Zhuang 
200*c4a164f4SRikard Falkeborn static const struct resource ldo20_resources[] = {
20151acdb61SHaojian Zhuang 	{0x9e, 0x9e, "ldov", IORESOURCE_REG, },
20251acdb61SHaojian Zhuang };
20351acdb61SHaojian Zhuang 
204a9e9ce4cSBill Pemberton static struct mfd_cell reg_devs[] = {
20551acdb61SHaojian Zhuang 	{
20651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
20751acdb61SHaojian Zhuang 		.id = 0,
20851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(sd1_resources),
20951acdb61SHaojian Zhuang 		.resources = sd1_resources,
21051acdb61SHaojian Zhuang 	}, {
21151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
21251acdb61SHaojian Zhuang 		.id = 1,
21351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(sd2_resources),
21451acdb61SHaojian Zhuang 		.resources = sd2_resources,
21551acdb61SHaojian Zhuang 	}, {
21651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
21751acdb61SHaojian Zhuang 		.id = 2,
21851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(sd3_resources),
21951acdb61SHaojian Zhuang 		.resources = sd3_resources,
22051acdb61SHaojian Zhuang 	}, {
22151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
22251acdb61SHaojian Zhuang 		.id = 3,
22351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo1_resources),
22451acdb61SHaojian Zhuang 		.resources = ldo1_resources,
22551acdb61SHaojian Zhuang 	}, {
22651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
22751acdb61SHaojian Zhuang 		.id = 4,
22851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo2_resources),
22951acdb61SHaojian Zhuang 		.resources = ldo2_resources,
23051acdb61SHaojian Zhuang 	}, {
23151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
23251acdb61SHaojian Zhuang 		.id = 5,
23351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo3_resources),
23451acdb61SHaojian Zhuang 		.resources = ldo3_resources,
23551acdb61SHaojian Zhuang 	}, {
23651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
23751acdb61SHaojian Zhuang 		.id = 6,
23851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo4_resources),
23951acdb61SHaojian Zhuang 		.resources = ldo4_resources,
24051acdb61SHaojian Zhuang 	}, {
24151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
24251acdb61SHaojian Zhuang 		.id = 7,
24351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo5_resources),
24451acdb61SHaojian Zhuang 		.resources = ldo5_resources,
24551acdb61SHaojian Zhuang 	}, {
24651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
24751acdb61SHaojian Zhuang 		.id = 8,
24851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo6_resources),
24951acdb61SHaojian Zhuang 		.resources = ldo6_resources,
25051acdb61SHaojian Zhuang 	}, {
25151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
25251acdb61SHaojian Zhuang 		.id = 9,
25351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo7_resources),
25451acdb61SHaojian Zhuang 		.resources = ldo7_resources,
25551acdb61SHaojian Zhuang 	}, {
25651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
25751acdb61SHaojian Zhuang 		.id = 10,
25851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo8_resources),
25951acdb61SHaojian Zhuang 		.resources = ldo8_resources,
26051acdb61SHaojian Zhuang 	}, {
26151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
26251acdb61SHaojian Zhuang 		.id = 11,
26351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo9_resources),
26451acdb61SHaojian Zhuang 		.resources = ldo9_resources,
26551acdb61SHaojian Zhuang 	}, {
26651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
26751acdb61SHaojian Zhuang 		.id = 12,
26851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo10_resources),
26951acdb61SHaojian Zhuang 		.resources = ldo10_resources,
27051acdb61SHaojian Zhuang 	}, {
27151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
27251acdb61SHaojian Zhuang 		.id = 13,
27351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo11_resources),
27451acdb61SHaojian Zhuang 		.resources = ldo11_resources,
27551acdb61SHaojian Zhuang 	}, {
27651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
27751acdb61SHaojian Zhuang 		.id = 14,
27851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo12_resources),
27951acdb61SHaojian Zhuang 		.resources = ldo12_resources,
28051acdb61SHaojian Zhuang 	}, {
28151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
28251acdb61SHaojian Zhuang 		.id = 15,
28351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo13_resources),
28451acdb61SHaojian Zhuang 		.resources = ldo13_resources,
28551acdb61SHaojian Zhuang 	}, {
28651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
28751acdb61SHaojian Zhuang 		.id = 16,
28851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo14_resources),
28951acdb61SHaojian Zhuang 		.resources = ldo14_resources,
29051acdb61SHaojian Zhuang 	}, {
29151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
29251acdb61SHaojian Zhuang 		.id = 17,
29351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo15_resources),
29451acdb61SHaojian Zhuang 		.resources = ldo15_resources,
29551acdb61SHaojian Zhuang 	}, {
29651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
29751acdb61SHaojian Zhuang 		.id = 18,
29851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo16_resources),
29951acdb61SHaojian Zhuang 		.resources = ldo16_resources,
30051acdb61SHaojian Zhuang 	}, {
30151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
30251acdb61SHaojian Zhuang 		.id = 19,
30351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo17_resources),
30451acdb61SHaojian Zhuang 		.resources = ldo17_resources,
30551acdb61SHaojian Zhuang 	}, {
30651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
30751acdb61SHaojian Zhuang 		.id = 20,
30851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo18_resources),
30951acdb61SHaojian Zhuang 		.resources = ldo18_resources,
31051acdb61SHaojian Zhuang 	}, {
31151acdb61SHaojian Zhuang 		.name = "max8925-regulator",
31251acdb61SHaojian Zhuang 		.id = 21,
31351acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo19_resources),
31451acdb61SHaojian Zhuang 		.resources = ldo19_resources,
31551acdb61SHaojian Zhuang 	}, {
31651acdb61SHaojian Zhuang 		.name = "max8925-regulator",
31751acdb61SHaojian Zhuang 		.id = 22,
31851acdb61SHaojian Zhuang 		.num_resources = ARRAY_SIZE(ldo20_resources),
31951acdb61SHaojian Zhuang 		.resources = ldo20_resources,
32051acdb61SHaojian Zhuang 	},
3211ad99893SHaojian Zhuang };
3221ad99893SHaojian Zhuang 
3231f1cf8f9SHaojian Zhuang enum {
3241f1cf8f9SHaojian Zhuang 	FLAGS_ADC = 1,	/* register in ADC component */
3251f1cf8f9SHaojian Zhuang 	FLAGS_RTC,	/* register in RTC component */
3261f1cf8f9SHaojian Zhuang };
3271f1cf8f9SHaojian Zhuang 
3281f1cf8f9SHaojian Zhuang struct max8925_irq_data {
3291f1cf8f9SHaojian Zhuang 	int	reg;
3301f1cf8f9SHaojian Zhuang 	int	mask_reg;
3311f1cf8f9SHaojian Zhuang 	int	enable;		/* enable or not */
3321f1cf8f9SHaojian Zhuang 	int	offs;		/* bit offset in mask register */
3331f1cf8f9SHaojian Zhuang 	int	flags;
3341f1cf8f9SHaojian Zhuang 	int	tsc_irq;
3351f1cf8f9SHaojian Zhuang };
3361f1cf8f9SHaojian Zhuang 
3371f1cf8f9SHaojian Zhuang static struct max8925_irq_data max8925_irqs[] = {
3381f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_DC_OVP] = {
3391f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ1,
3401f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ1_MASK,
3411f1cf8f9SHaojian Zhuang 		.offs		= 1 << 0,
3421f1cf8f9SHaojian Zhuang 	},
3431f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_DC_F] = {
3441f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ1,
3451f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ1_MASK,
3461f1cf8f9SHaojian Zhuang 		.offs		= 1 << 1,
3471f1cf8f9SHaojian Zhuang 	},
3481f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_DC_R] = {
3491f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ1,
3501f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ1_MASK,
3511f1cf8f9SHaojian Zhuang 		.offs		= 1 << 2,
3521f1cf8f9SHaojian Zhuang 	},
3531f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_THM_OK_R] = {
3541f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3551f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3561f1cf8f9SHaojian Zhuang 		.offs		= 1 << 0,
3571f1cf8f9SHaojian Zhuang 	},
3581f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_THM_OK_F] = {
3591f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3601f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3611f1cf8f9SHaojian Zhuang 		.offs		= 1 << 1,
3621f1cf8f9SHaojian Zhuang 	},
3631f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_SYSLOW_F] = {
3641f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3651f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3661f1cf8f9SHaojian Zhuang 		.offs		= 1 << 2,
3671f1cf8f9SHaojian Zhuang 	},
3681f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_SYSLOW_R] = {
3691f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3701f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3711f1cf8f9SHaojian Zhuang 		.offs		= 1 << 3,
3721f1cf8f9SHaojian Zhuang 	},
3731f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_RST] = {
3741f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3751f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3761f1cf8f9SHaojian Zhuang 		.offs		= 1 << 4,
3771f1cf8f9SHaojian Zhuang 	},
3781f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_DONE] = {
3791f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3801f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3811f1cf8f9SHaojian Zhuang 		.offs		= 1 << 5,
3821f1cf8f9SHaojian Zhuang 	},
3831f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_TOPOFF] = {
3841f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3851f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3861f1cf8f9SHaojian Zhuang 		.offs		= 1 << 6,
3871f1cf8f9SHaojian Zhuang 	},
3881f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_VCHG_TMR_FAULT] = {
3891f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_CHG_IRQ2,
3901f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_CHG_IRQ2_MASK,
3911f1cf8f9SHaojian Zhuang 		.offs		= 1 << 7,
3921f1cf8f9SHaojian Zhuang 	},
3931f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_RSTIN] = {
3941f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
3951f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
3961f1cf8f9SHaojian Zhuang 		.offs		= 1 << 0,
3971f1cf8f9SHaojian Zhuang 	},
3981f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_MPL] = {
3991f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4001f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4011f1cf8f9SHaojian Zhuang 		.offs		= 1 << 1,
4021f1cf8f9SHaojian Zhuang 	},
4031f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SW_3SEC] = {
4041f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4051f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4061f1cf8f9SHaojian Zhuang 		.offs		= 1 << 2,
4071f1cf8f9SHaojian Zhuang 	},
4081f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_EXTON_F] = {
4091f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4101f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4111f1cf8f9SHaojian Zhuang 		.offs		= 1 << 3,
4121f1cf8f9SHaojian Zhuang 	},
4131f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_EXTON_R] = {
4141f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4151f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4161f1cf8f9SHaojian Zhuang 		.offs		= 1 << 4,
4171f1cf8f9SHaojian Zhuang 	},
4181f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SW_1SEC] = {
4191f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4201f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4211f1cf8f9SHaojian Zhuang 		.offs		= 1 << 5,
4221f1cf8f9SHaojian Zhuang 	},
4231f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SW_F] = {
4241f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4251f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4261f1cf8f9SHaojian Zhuang 		.offs		= 1 << 6,
4271f1cf8f9SHaojian Zhuang 	},
4281f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SW_R] = {
4291f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ1,
4301f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ1_MASK,
4311f1cf8f9SHaojian Zhuang 		.offs		= 1 << 7,
4321f1cf8f9SHaojian Zhuang 	},
4331f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SYSCKEN_F] = {
4341f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ2,
4351f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ2_MASK,
4361f1cf8f9SHaojian Zhuang 		.offs		= 1 << 0,
4371f1cf8f9SHaojian Zhuang 	},
4381f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_GPM_SYSCKEN_R] = {
4391f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_ON_OFF_IRQ2,
4401f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_ON_OFF_IRQ2_MASK,
4411f1cf8f9SHaojian Zhuang 		.offs		= 1 << 1,
4421f1cf8f9SHaojian Zhuang 	},
4431f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_RTC_ALARM1] = {
4441f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_RTC_IRQ,
4451f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_RTC_IRQ_MASK,
4461f1cf8f9SHaojian Zhuang 		.offs		= 1 << 2,
4471f1cf8f9SHaojian Zhuang 		.flags		= FLAGS_RTC,
4481f1cf8f9SHaojian Zhuang 	},
4491f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_RTC_ALARM0] = {
4501f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_RTC_IRQ,
4511f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_RTC_IRQ_MASK,
4521f1cf8f9SHaojian Zhuang 		.offs		= 1 << 3,
4531f1cf8f9SHaojian Zhuang 		.flags		= FLAGS_RTC,
4541f1cf8f9SHaojian Zhuang 	},
4551f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_TSC_STICK] = {
4561f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_TSC_IRQ,
4571f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_TSC_IRQ_MASK,
4581f1cf8f9SHaojian Zhuang 		.offs		= 1 << 0,
4591f1cf8f9SHaojian Zhuang 		.flags		= FLAGS_ADC,
4601f1cf8f9SHaojian Zhuang 		.tsc_irq	= 1,
4611f1cf8f9SHaojian Zhuang 	},
4621f1cf8f9SHaojian Zhuang 	[MAX8925_IRQ_TSC_NSTICK] = {
4631f1cf8f9SHaojian Zhuang 		.reg		= MAX8925_TSC_IRQ,
4641f1cf8f9SHaojian Zhuang 		.mask_reg	= MAX8925_TSC_IRQ_MASK,
4651f1cf8f9SHaojian Zhuang 		.offs		= 1 << 1,
4661f1cf8f9SHaojian Zhuang 		.flags		= FLAGS_ADC,
4671f1cf8f9SHaojian Zhuang 		.tsc_irq	= 1,
4681f1cf8f9SHaojian Zhuang 	},
4691f1cf8f9SHaojian Zhuang };
4701f1cf8f9SHaojian Zhuang 
max8925_irq(int irq,void * data)4711f1cf8f9SHaojian Zhuang static irqreturn_t max8925_irq(int irq, void *data)
472d50f8f33SHaojian Zhuang {
473d50f8f33SHaojian Zhuang 	struct max8925_chip *chip = data;
4741f1cf8f9SHaojian Zhuang 	struct max8925_irq_data *irq_data;
4751f1cf8f9SHaojian Zhuang 	struct i2c_client *i2c;
4761f1cf8f9SHaojian Zhuang 	int read_reg = -1, value = 0;
4771f1cf8f9SHaojian Zhuang 	int i;
478d50f8f33SHaojian Zhuang 
4791f1cf8f9SHaojian Zhuang 	for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
4801f1cf8f9SHaojian Zhuang 		irq_data = &max8925_irqs[i];
4811f1cf8f9SHaojian Zhuang 		/* TSC IRQ should be serviced in max8925_tsc_irq() */
4821f1cf8f9SHaojian Zhuang 		if (irq_data->tsc_irq)
4831f1cf8f9SHaojian Zhuang 			continue;
4841f1cf8f9SHaojian Zhuang 		if (irq_data->flags == FLAGS_RTC)
4851f1cf8f9SHaojian Zhuang 			i2c = chip->rtc;
4861f1cf8f9SHaojian Zhuang 		else if (irq_data->flags == FLAGS_ADC)
4871f1cf8f9SHaojian Zhuang 			i2c = chip->adc;
4881f1cf8f9SHaojian Zhuang 		else
4891f1cf8f9SHaojian Zhuang 			i2c = chip->i2c;
4901f1cf8f9SHaojian Zhuang 		if (read_reg != irq_data->reg) {
4911f1cf8f9SHaojian Zhuang 			read_reg = irq_data->reg;
4921f1cf8f9SHaojian Zhuang 			value = max8925_reg_read(i2c, irq_data->reg);
493d50f8f33SHaojian Zhuang 		}
4941f1cf8f9SHaojian Zhuang 		if (value & irq_data->enable)
4951f1cf8f9SHaojian Zhuang 			handle_nested_irq(chip->irq_base + i);
496d50f8f33SHaojian Zhuang 	}
497d50f8f33SHaojian Zhuang 	return IRQ_HANDLED;
498d50f8f33SHaojian Zhuang }
499d50f8f33SHaojian Zhuang 
max8925_tsc_irq(int irq,void * data)5001f1cf8f9SHaojian Zhuang static irqreturn_t max8925_tsc_irq(int irq, void *data)
501d50f8f33SHaojian Zhuang {
5021f1cf8f9SHaojian Zhuang 	struct max8925_chip *chip = data;
5031f1cf8f9SHaojian Zhuang 	struct max8925_irq_data *irq_data;
5041f1cf8f9SHaojian Zhuang 	struct i2c_client *i2c;
5051f1cf8f9SHaojian Zhuang 	int read_reg = -1, value = 0;
5061f1cf8f9SHaojian Zhuang 	int i;
5071f1cf8f9SHaojian Zhuang 
5081f1cf8f9SHaojian Zhuang 	for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
5091f1cf8f9SHaojian Zhuang 		irq_data = &max8925_irqs[i];
5101f1cf8f9SHaojian Zhuang 		/* non TSC IRQ should be serviced in max8925_irq() */
5111f1cf8f9SHaojian Zhuang 		if (!irq_data->tsc_irq)
5121f1cf8f9SHaojian Zhuang 			continue;
5131f1cf8f9SHaojian Zhuang 		if (irq_data->flags == FLAGS_RTC)
5141f1cf8f9SHaojian Zhuang 			i2c = chip->rtc;
5151f1cf8f9SHaojian Zhuang 		else if (irq_data->flags == FLAGS_ADC)
5161f1cf8f9SHaojian Zhuang 			i2c = chip->adc;
5171f1cf8f9SHaojian Zhuang 		else
5181f1cf8f9SHaojian Zhuang 			i2c = chip->i2c;
5191f1cf8f9SHaojian Zhuang 		if (read_reg != irq_data->reg) {
5201f1cf8f9SHaojian Zhuang 			read_reg = irq_data->reg;
5211f1cf8f9SHaojian Zhuang 			value = max8925_reg_read(i2c, irq_data->reg);
5221f1cf8f9SHaojian Zhuang 		}
5231f1cf8f9SHaojian Zhuang 		if (value & irq_data->enable)
5241f1cf8f9SHaojian Zhuang 			handle_nested_irq(chip->irq_base + i);
5251f1cf8f9SHaojian Zhuang 	}
5261f1cf8f9SHaojian Zhuang 	return IRQ_HANDLED;
5271f1cf8f9SHaojian Zhuang }
5281f1cf8f9SHaojian Zhuang 
max8925_irq_lock(struct irq_data * data)52998d9bc13SMark Brown static void max8925_irq_lock(struct irq_data *data)
5301f1cf8f9SHaojian Zhuang {
53198d9bc13SMark Brown 	struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
532d50f8f33SHaojian Zhuang 
533d50f8f33SHaojian Zhuang 	mutex_lock(&chip->irq_lock);
534d50f8f33SHaojian Zhuang }
535d50f8f33SHaojian Zhuang 
max8925_irq_sync_unlock(struct irq_data * data)53698d9bc13SMark Brown static void max8925_irq_sync_unlock(struct irq_data *data)
537d50f8f33SHaojian Zhuang {
53898d9bc13SMark Brown 	struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
5391f1cf8f9SHaojian Zhuang 	struct max8925_irq_data *irq_data;
5401f1cf8f9SHaojian Zhuang 	static unsigned char cache_chg[2] = {0xff, 0xff};
5411f1cf8f9SHaojian Zhuang 	static unsigned char cache_on[2] = {0xff, 0xff};
5421f1cf8f9SHaojian Zhuang 	static unsigned char cache_rtc = 0xff, cache_tsc = 0xff;
5431f1cf8f9SHaojian Zhuang 	unsigned char irq_chg[2], irq_on[2];
5441f1cf8f9SHaojian Zhuang 	unsigned char irq_rtc, irq_tsc;
5451f1cf8f9SHaojian Zhuang 	int i;
546d50f8f33SHaojian Zhuang 
5471f1cf8f9SHaojian Zhuang 	/* Load cached value. In initial, all IRQs are masked */
5481f1cf8f9SHaojian Zhuang 	irq_chg[0] = cache_chg[0];
5491f1cf8f9SHaojian Zhuang 	irq_chg[1] = cache_chg[1];
5501f1cf8f9SHaojian Zhuang 	irq_on[0] = cache_on[0];
5511f1cf8f9SHaojian Zhuang 	irq_on[1] = cache_on[1];
5521f1cf8f9SHaojian Zhuang 	irq_rtc = cache_rtc;
5531f1cf8f9SHaojian Zhuang 	irq_tsc = cache_tsc;
5541f1cf8f9SHaojian Zhuang 	for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
5551f1cf8f9SHaojian Zhuang 		irq_data = &max8925_irqs[i];
55690182317SKevin Liu 		/* 1 -- disable, 0 -- enable */
5571f1cf8f9SHaojian Zhuang 		switch (irq_data->mask_reg) {
5581f1cf8f9SHaojian Zhuang 		case MAX8925_CHG_IRQ1_MASK:
55990182317SKevin Liu 			irq_chg[0] &= ~irq_data->enable;
5601f1cf8f9SHaojian Zhuang 			break;
5611f1cf8f9SHaojian Zhuang 		case MAX8925_CHG_IRQ2_MASK:
56290182317SKevin Liu 			irq_chg[1] &= ~irq_data->enable;
5631f1cf8f9SHaojian Zhuang 			break;
5641f1cf8f9SHaojian Zhuang 		case MAX8925_ON_OFF_IRQ1_MASK:
56590182317SKevin Liu 			irq_on[0] &= ~irq_data->enable;
5661f1cf8f9SHaojian Zhuang 			break;
5671f1cf8f9SHaojian Zhuang 		case MAX8925_ON_OFF_IRQ2_MASK:
56890182317SKevin Liu 			irq_on[1] &= ~irq_data->enable;
5691f1cf8f9SHaojian Zhuang 			break;
5701f1cf8f9SHaojian Zhuang 		case MAX8925_RTC_IRQ_MASK:
57190182317SKevin Liu 			irq_rtc &= ~irq_data->enable;
5721f1cf8f9SHaojian Zhuang 			break;
5731f1cf8f9SHaojian Zhuang 		case MAX8925_TSC_IRQ_MASK:
57490182317SKevin Liu 			irq_tsc &= ~irq_data->enable;
5751f1cf8f9SHaojian Zhuang 			break;
5761f1cf8f9SHaojian Zhuang 		default:
5771f1cf8f9SHaojian Zhuang 			dev_err(chip->dev, "wrong IRQ\n");
5781f1cf8f9SHaojian Zhuang 			break;
5791f1cf8f9SHaojian Zhuang 		}
5801f1cf8f9SHaojian Zhuang 	}
5811f1cf8f9SHaojian Zhuang 	/* update mask into registers */
5821f1cf8f9SHaojian Zhuang 	if (cache_chg[0] != irq_chg[0]) {
5831f1cf8f9SHaojian Zhuang 		cache_chg[0] = irq_chg[0];
5841f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK,
5851f1cf8f9SHaojian Zhuang 			irq_chg[0]);
5861f1cf8f9SHaojian Zhuang 	}
5871f1cf8f9SHaojian Zhuang 	if (cache_chg[1] != irq_chg[1]) {
5881f1cf8f9SHaojian Zhuang 		cache_chg[1] = irq_chg[1];
5891f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK,
5901f1cf8f9SHaojian Zhuang 			irq_chg[1]);
5911f1cf8f9SHaojian Zhuang 	}
5921f1cf8f9SHaojian Zhuang 	if (cache_on[0] != irq_on[0]) {
5931f1cf8f9SHaojian Zhuang 		cache_on[0] = irq_on[0];
5941f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK,
5951f1cf8f9SHaojian Zhuang 				irq_on[0]);
5961f1cf8f9SHaojian Zhuang 	}
5971f1cf8f9SHaojian Zhuang 	if (cache_on[1] != irq_on[1]) {
5981f1cf8f9SHaojian Zhuang 		cache_on[1] = irq_on[1];
5991f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK,
6001f1cf8f9SHaojian Zhuang 				irq_on[1]);
6011f1cf8f9SHaojian Zhuang 	}
6021f1cf8f9SHaojian Zhuang 	if (cache_rtc != irq_rtc) {
6031f1cf8f9SHaojian Zhuang 		cache_rtc = irq_rtc;
6041f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, irq_rtc);
6051f1cf8f9SHaojian Zhuang 	}
6061f1cf8f9SHaojian Zhuang 	if (cache_tsc != irq_tsc) {
6071f1cf8f9SHaojian Zhuang 		cache_tsc = irq_tsc;
6081f1cf8f9SHaojian Zhuang 		max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, irq_tsc);
6091f1cf8f9SHaojian Zhuang 	}
6101f1cf8f9SHaojian Zhuang 
611d50f8f33SHaojian Zhuang 	mutex_unlock(&chip->irq_lock);
6121f1cf8f9SHaojian Zhuang }
6131f1cf8f9SHaojian Zhuang 
max8925_irq_enable(struct irq_data * data)61498d9bc13SMark Brown static void max8925_irq_enable(struct irq_data *data)
6151f1cf8f9SHaojian Zhuang {
61698d9bc13SMark Brown 	struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
617a5c5accfSLee Jones 
61898d9bc13SMark Brown 	max8925_irqs[data->irq - chip->irq_base].enable
61998d9bc13SMark Brown 		= max8925_irqs[data->irq - chip->irq_base].offs;
6201f1cf8f9SHaojian Zhuang }
6211f1cf8f9SHaojian Zhuang 
max8925_irq_disable(struct irq_data * data)62298d9bc13SMark Brown static void max8925_irq_disable(struct irq_data *data)
6231f1cf8f9SHaojian Zhuang {
62498d9bc13SMark Brown 	struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
625a5c5accfSLee Jones 
62698d9bc13SMark Brown 	max8925_irqs[data->irq - chip->irq_base].enable = 0;
6271f1cf8f9SHaojian Zhuang }
6281f1cf8f9SHaojian Zhuang 
6291f1cf8f9SHaojian Zhuang static struct irq_chip max8925_irq_chip = {
6301f1cf8f9SHaojian Zhuang 	.name		= "max8925",
63198d9bc13SMark Brown 	.irq_bus_lock	= max8925_irq_lock,
63298d9bc13SMark Brown 	.irq_bus_sync_unlock = max8925_irq_sync_unlock,
63398d9bc13SMark Brown 	.irq_enable	= max8925_irq_enable,
63498d9bc13SMark Brown 	.irq_disable	= max8925_irq_disable,
6351f1cf8f9SHaojian Zhuang };
6361f1cf8f9SHaojian Zhuang 
max8925_irq_domain_map(struct irq_domain * d,unsigned int virq,irq_hw_number_t hw)6374e405ae2SQing Xu static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq,
6384e405ae2SQing Xu 				 irq_hw_number_t hw)
6394e405ae2SQing Xu {
6404e405ae2SQing Xu 	irq_set_chip_data(virq, d->host_data);
6414e405ae2SQing Xu 	irq_set_chip_and_handler(virq, &max8925_irq_chip, handle_edge_irq);
6424e405ae2SQing Xu 	irq_set_nested_thread(virq, 1);
6434e405ae2SQing Xu 	irq_set_noprobe(virq);
6449bd09f34SRob Herring 
6454e405ae2SQing Xu 	return 0;
6464e405ae2SQing Xu }
6474e405ae2SQing Xu 
6487ce7b26fSKrzysztof Kozlowski static const struct irq_domain_ops max8925_irq_domain_ops = {
6494e405ae2SQing Xu 	.map	= max8925_irq_domain_map,
6504e405ae2SQing Xu 	.xlate	= irq_domain_xlate_onetwocell,
6514e405ae2SQing Xu };
6524e405ae2SQing Xu 
6534e405ae2SQing Xu 
max8925_irq_init(struct max8925_chip * chip,int irq,struct max8925_platform_data * pdata)6541f1cf8f9SHaojian Zhuang static int max8925_irq_init(struct max8925_chip *chip, int irq,
6551f1cf8f9SHaojian Zhuang 			    struct max8925_platform_data *pdata)
6561f1cf8f9SHaojian Zhuang {
6571f1cf8f9SHaojian Zhuang 	unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
6584e405ae2SQing Xu 	int ret;
6594e405ae2SQing Xu 	struct device_node *node = chip->dev->of_node;
6601f1cf8f9SHaojian Zhuang 
6611f1cf8f9SHaojian Zhuang 	/* clear all interrupts */
6621f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ1);
6631f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ2);
6641f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ1);
6651f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2);
6661f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ);
6671f1cf8f9SHaojian Zhuang 	max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
66868e488d9SHaojian Zhuang 	/* mask all interrupts except for TSC */
6691f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0);
6701f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0);
6711f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff);
6721f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK, 0xff);
6731f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff);
6741f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff);
6751f1cf8f9SHaojian Zhuang 	max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff);
6761f1cf8f9SHaojian Zhuang 
6771f1cf8f9SHaojian Zhuang 	mutex_init(&chip->irq_lock);
6784e405ae2SQing Xu 	chip->irq_base = irq_alloc_descs(-1, 0, MAX8925_NR_IRQS, 0);
6794e405ae2SQing Xu 	if (chip->irq_base < 0) {
6804e405ae2SQing Xu 		dev_err(chip->dev, "Failed to allocate interrupts, ret:%d\n",
6814e405ae2SQing Xu 			chip->irq_base);
6824e405ae2SQing Xu 		return -EBUSY;
6834e405ae2SQing Xu 	}
6844e405ae2SQing Xu 
6854e405ae2SQing Xu 	irq_domain_add_legacy(node, MAX8925_NR_IRQS, chip->irq_base, 0,
6864e405ae2SQing Xu 			      &max8925_irq_domain_ops, chip);
6874e405ae2SQing Xu 
6884e405ae2SQing Xu 	/* request irq handler for pmic main irq*/
6891f1cf8f9SHaojian Zhuang 	chip->core_irq = irq;
6904e405ae2SQing Xu 	if (!chip->core_irq)
6914e405ae2SQing Xu 		return -EBUSY;
692619a1e31SFengguang Wu 	ret = request_threaded_irq(irq, NULL, max8925_irq, flags | IRQF_ONESHOT,
6931f1cf8f9SHaojian Zhuang 				   "max8925", chip);
6941f1cf8f9SHaojian Zhuang 	if (ret) {
6951f1cf8f9SHaojian Zhuang 		dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret);
6961f1cf8f9SHaojian Zhuang 		chip->core_irq = 0;
6974e405ae2SQing Xu 		return -EBUSY;
6981f1cf8f9SHaojian Zhuang 	}
69968e488d9SHaojian Zhuang 
7004e405ae2SQing Xu 	/* request irq handler for pmic tsc irq*/
7014e405ae2SQing Xu 
70268e488d9SHaojian Zhuang 	/* mask TSC interrupt */
70368e488d9SHaojian Zhuang 	max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f);
70468e488d9SHaojian Zhuang 
7051f1cf8f9SHaojian Zhuang 	if (!pdata->tsc_irq) {
7061f1cf8f9SHaojian Zhuang 		dev_warn(chip->dev, "No interrupt support on TSC IRQ\n");
707d50f8f33SHaojian Zhuang 		return 0;
708d50f8f33SHaojian Zhuang 	}
7091f1cf8f9SHaojian Zhuang 	chip->tsc_irq = pdata->tsc_irq;
7101f1cf8f9SHaojian Zhuang 	ret = request_threaded_irq(chip->tsc_irq, NULL, max8925_tsc_irq,
711619a1e31SFengguang Wu 				   flags | IRQF_ONESHOT, "max8925-tsc", chip);
7121f1cf8f9SHaojian Zhuang 	if (ret) {
7131f1cf8f9SHaojian Zhuang 		dev_err(chip->dev, "Failed to request TSC IRQ: %d\n", ret);
7141f1cf8f9SHaojian Zhuang 		chip->tsc_irq = 0;
7151f1cf8f9SHaojian Zhuang 	}
7161f1cf8f9SHaojian Zhuang 	return 0;
7171f1cf8f9SHaojian Zhuang }
7181f1cf8f9SHaojian Zhuang 
init_regulator(struct max8925_chip * chip,struct max8925_platform_data * pdata)719f791be49SBill Pemberton static void init_regulator(struct max8925_chip *chip,
72051acdb61SHaojian Zhuang 				     struct max8925_platform_data *pdata)
72151acdb61SHaojian Zhuang {
72251acdb61SHaojian Zhuang 	int ret;
72351acdb61SHaojian Zhuang 
72451acdb61SHaojian Zhuang 	if (!pdata)
72551acdb61SHaojian Zhuang 		return;
72651acdb61SHaojian Zhuang 	if (pdata->sd1) {
72751acdb61SHaojian Zhuang 		reg_devs[0].platform_data = pdata->sd1;
72851acdb61SHaojian Zhuang 		reg_devs[0].pdata_size = sizeof(struct regulator_init_data);
72951acdb61SHaojian Zhuang 	}
73051acdb61SHaojian Zhuang 	if (pdata->sd2) {
73151acdb61SHaojian Zhuang 		reg_devs[1].platform_data = pdata->sd2;
73251acdb61SHaojian Zhuang 		reg_devs[1].pdata_size = sizeof(struct regulator_init_data);
73351acdb61SHaojian Zhuang 	}
73451acdb61SHaojian Zhuang 	if (pdata->sd3) {
73551acdb61SHaojian Zhuang 		reg_devs[2].platform_data = pdata->sd3;
73651acdb61SHaojian Zhuang 		reg_devs[2].pdata_size = sizeof(struct regulator_init_data);
73751acdb61SHaojian Zhuang 	}
73851acdb61SHaojian Zhuang 	if (pdata->ldo1) {
73951acdb61SHaojian Zhuang 		reg_devs[3].platform_data = pdata->ldo1;
74051acdb61SHaojian Zhuang 		reg_devs[3].pdata_size = sizeof(struct regulator_init_data);
74151acdb61SHaojian Zhuang 	}
74251acdb61SHaojian Zhuang 	if (pdata->ldo2) {
74351acdb61SHaojian Zhuang 		reg_devs[4].platform_data = pdata->ldo2;
74451acdb61SHaojian Zhuang 		reg_devs[4].pdata_size = sizeof(struct regulator_init_data);
74551acdb61SHaojian Zhuang 	}
74651acdb61SHaojian Zhuang 	if (pdata->ldo3) {
74751acdb61SHaojian Zhuang 		reg_devs[5].platform_data = pdata->ldo3;
74851acdb61SHaojian Zhuang 		reg_devs[5].pdata_size = sizeof(struct regulator_init_data);
74951acdb61SHaojian Zhuang 	}
75051acdb61SHaojian Zhuang 	if (pdata->ldo4) {
75151acdb61SHaojian Zhuang 		reg_devs[6].platform_data = pdata->ldo4;
75251acdb61SHaojian Zhuang 		reg_devs[6].pdata_size = sizeof(struct regulator_init_data);
75351acdb61SHaojian Zhuang 	}
75451acdb61SHaojian Zhuang 	if (pdata->ldo5) {
75551acdb61SHaojian Zhuang 		reg_devs[7].platform_data = pdata->ldo5;
75651acdb61SHaojian Zhuang 		reg_devs[7].pdata_size = sizeof(struct regulator_init_data);
75751acdb61SHaojian Zhuang 	}
75851acdb61SHaojian Zhuang 	if (pdata->ldo6) {
75951acdb61SHaojian Zhuang 		reg_devs[8].platform_data = pdata->ldo6;
76051acdb61SHaojian Zhuang 		reg_devs[8].pdata_size = sizeof(struct regulator_init_data);
76151acdb61SHaojian Zhuang 	}
76251acdb61SHaojian Zhuang 	if (pdata->ldo7) {
76351acdb61SHaojian Zhuang 		reg_devs[9].platform_data = pdata->ldo7;
76451acdb61SHaojian Zhuang 		reg_devs[9].pdata_size = sizeof(struct regulator_init_data);
76551acdb61SHaojian Zhuang 	}
76651acdb61SHaojian Zhuang 	if (pdata->ldo8) {
76751acdb61SHaojian Zhuang 		reg_devs[10].platform_data = pdata->ldo8;
76851acdb61SHaojian Zhuang 		reg_devs[10].pdata_size = sizeof(struct regulator_init_data);
76951acdb61SHaojian Zhuang 	}
77051acdb61SHaojian Zhuang 	if (pdata->ldo9) {
77151acdb61SHaojian Zhuang 		reg_devs[11].platform_data = pdata->ldo9;
77251acdb61SHaojian Zhuang 		reg_devs[11].pdata_size = sizeof(struct regulator_init_data);
77351acdb61SHaojian Zhuang 	}
77451acdb61SHaojian Zhuang 	if (pdata->ldo10) {
77551acdb61SHaojian Zhuang 		reg_devs[12].platform_data = pdata->ldo10;
77651acdb61SHaojian Zhuang 		reg_devs[12].pdata_size = sizeof(struct regulator_init_data);
77751acdb61SHaojian Zhuang 	}
77851acdb61SHaojian Zhuang 	if (pdata->ldo11) {
77951acdb61SHaojian Zhuang 		reg_devs[13].platform_data = pdata->ldo11;
78051acdb61SHaojian Zhuang 		reg_devs[13].pdata_size = sizeof(struct regulator_init_data);
78151acdb61SHaojian Zhuang 	}
78251acdb61SHaojian Zhuang 	if (pdata->ldo12) {
78351acdb61SHaojian Zhuang 		reg_devs[14].platform_data = pdata->ldo12;
78451acdb61SHaojian Zhuang 		reg_devs[14].pdata_size = sizeof(struct regulator_init_data);
78551acdb61SHaojian Zhuang 	}
78651acdb61SHaojian Zhuang 	if (pdata->ldo13) {
78751acdb61SHaojian Zhuang 		reg_devs[15].platform_data = pdata->ldo13;
78851acdb61SHaojian Zhuang 		reg_devs[15].pdata_size = sizeof(struct regulator_init_data);
78951acdb61SHaojian Zhuang 	}
79051acdb61SHaojian Zhuang 	if (pdata->ldo14) {
79151acdb61SHaojian Zhuang 		reg_devs[16].platform_data = pdata->ldo14;
79251acdb61SHaojian Zhuang 		reg_devs[16].pdata_size = sizeof(struct regulator_init_data);
79351acdb61SHaojian Zhuang 	}
79451acdb61SHaojian Zhuang 	if (pdata->ldo15) {
79551acdb61SHaojian Zhuang 		reg_devs[17].platform_data = pdata->ldo15;
79651acdb61SHaojian Zhuang 		reg_devs[17].pdata_size = sizeof(struct regulator_init_data);
79751acdb61SHaojian Zhuang 	}
79851acdb61SHaojian Zhuang 	if (pdata->ldo16) {
79951acdb61SHaojian Zhuang 		reg_devs[18].platform_data = pdata->ldo16;
80051acdb61SHaojian Zhuang 		reg_devs[18].pdata_size = sizeof(struct regulator_init_data);
80151acdb61SHaojian Zhuang 	}
80251acdb61SHaojian Zhuang 	if (pdata->ldo17) {
80351acdb61SHaojian Zhuang 		reg_devs[19].platform_data = pdata->ldo17;
80451acdb61SHaojian Zhuang 		reg_devs[19].pdata_size = sizeof(struct regulator_init_data);
80551acdb61SHaojian Zhuang 	}
80651acdb61SHaojian Zhuang 	if (pdata->ldo18) {
80751acdb61SHaojian Zhuang 		reg_devs[20].platform_data = pdata->ldo18;
80851acdb61SHaojian Zhuang 		reg_devs[20].pdata_size = sizeof(struct regulator_init_data);
80951acdb61SHaojian Zhuang 	}
81051acdb61SHaojian Zhuang 	if (pdata->ldo19) {
81151acdb61SHaojian Zhuang 		reg_devs[21].platform_data = pdata->ldo19;
81251acdb61SHaojian Zhuang 		reg_devs[21].pdata_size = sizeof(struct regulator_init_data);
81351acdb61SHaojian Zhuang 	}
81451acdb61SHaojian Zhuang 	if (pdata->ldo20) {
81551acdb61SHaojian Zhuang 		reg_devs[22].platform_data = pdata->ldo20;
81651acdb61SHaojian Zhuang 		reg_devs[22].pdata_size = sizeof(struct regulator_init_data);
81751acdb61SHaojian Zhuang 	}
81851acdb61SHaojian Zhuang 	ret = mfd_add_devices(chip->dev, 0, reg_devs, ARRAY_SIZE(reg_devs),
81951acdb61SHaojian Zhuang 			      NULL, 0, NULL);
82051acdb61SHaojian Zhuang 	if (ret < 0) {
82151acdb61SHaojian Zhuang 		dev_err(chip->dev, "Failed to add regulator subdev\n");
82251acdb61SHaojian Zhuang 		return;
82351acdb61SHaojian Zhuang 	}
82451acdb61SHaojian Zhuang }
82551acdb61SHaojian Zhuang 
max8925_device_init(struct max8925_chip * chip,struct max8925_platform_data * pdata)826f791be49SBill Pemberton int max8925_device_init(struct max8925_chip *chip,
827d50f8f33SHaojian Zhuang 				  struct max8925_platform_data *pdata)
828d50f8f33SHaojian Zhuang {
829d50f8f33SHaojian Zhuang 	int ret;
830d50f8f33SHaojian Zhuang 
8311f1cf8f9SHaojian Zhuang 	max8925_irq_init(chip, chip->i2c->irq, pdata);
832d50f8f33SHaojian Zhuang 
8331f1cf8f9SHaojian Zhuang 	if (pdata && (pdata->power || pdata->touch)) {
8341f1cf8f9SHaojian Zhuang 		/* enable ADC to control internal reference */
8351f1cf8f9SHaojian Zhuang 		max8925_set_bits(chip->i2c, MAX8925_RESET_CNFG, 1, 1);
8361f1cf8f9SHaojian Zhuang 		/* enable internal reference for ADC */
8371f1cf8f9SHaojian Zhuang 		max8925_set_bits(chip->adc, MAX8925_TSC_CNFG1, 3, 2);
8381f1cf8f9SHaojian Zhuang 		/* check for internal reference IRQ */
8391f1cf8f9SHaojian Zhuang 		do {
8401f1cf8f9SHaojian Zhuang 			ret = max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
8411f1cf8f9SHaojian Zhuang 		} while (ret & MAX8925_NREF_OK);
8421f1cf8f9SHaojian Zhuang 		/* enaable ADC scheduler, interval is 1 second */
8431f1cf8f9SHaojian Zhuang 		max8925_set_bits(chip->adc, MAX8925_ADC_SCHED, 3, 2);
8441f1cf8f9SHaojian Zhuang 	}
8451f1cf8f9SHaojian Zhuang 
8461f1cf8f9SHaojian Zhuang 	/* enable Momentary Power Loss */
8471f1cf8f9SHaojian Zhuang 	max8925_set_bits(chip->rtc, MAX8925_MPL_CNTL, 1 << 4, 1 << 4);
8481f1cf8f9SHaojian Zhuang 
8491f1cf8f9SHaojian Zhuang 	ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
8501f1cf8f9SHaojian Zhuang 			      ARRAY_SIZE(rtc_devs),
851f9ed1431SQing Xu 			      NULL, chip->irq_base, NULL);
852d50f8f33SHaojian Zhuang 	if (ret < 0) {
8531f1cf8f9SHaojian Zhuang 		dev_err(chip->dev, "Failed to add rtc subdev\n");
854d50f8f33SHaojian Zhuang 		goto out;
855d50f8f33SHaojian Zhuang 	}
856d0f7a6d6SHaojian Zhuang 
857d0f7a6d6SHaojian Zhuang 	ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
858d0f7a6d6SHaojian Zhuang 			      ARRAY_SIZE(onkey_devs),
859678e8cb5SQing Xu 			      NULL, chip->irq_base, NULL);
860d0f7a6d6SHaojian Zhuang 	if (ret < 0) {
861d0f7a6d6SHaojian Zhuang 		dev_err(chip->dev, "Failed to add onkey subdev\n");
862d0f7a6d6SHaojian Zhuang 		goto out_dev;
863d0f7a6d6SHaojian Zhuang 	}
864d0f7a6d6SHaojian Zhuang 
86551acdb61SHaojian Zhuang 	init_regulator(chip, pdata);
8661ad99893SHaojian Zhuang 
8671ad99893SHaojian Zhuang 	if (pdata && pdata->backlight) {
86863b501e2SHaojian Zhuang 		bk_devs[0].platform_data = &pdata->backlight;
86963b501e2SHaojian Zhuang 		bk_devs[0].pdata_size = sizeof(struct max8925_backlight_pdata);
87063b501e2SHaojian Zhuang 	}
87163b501e2SHaojian Zhuang 	ret = mfd_add_devices(chip->dev, 0, bk_devs, ARRAY_SIZE(bk_devs),
87263b501e2SHaojian Zhuang 			      NULL, 0, NULL);
8731ad99893SHaojian Zhuang 	if (ret < 0) {
8741ad99893SHaojian Zhuang 		dev_err(chip->dev, "Failed to add backlight subdev\n");
8751ad99893SHaojian Zhuang 		goto out_dev;
8761ad99893SHaojian Zhuang 	}
877d50f8f33SHaojian Zhuang 
8781f1cf8f9SHaojian Zhuang 	ret = mfd_add_devices(chip->dev, 0, &power_devs[0],
8791f1cf8f9SHaojian Zhuang 			      ARRAY_SIZE(power_devs),
880f9ed1431SQing Xu 			      NULL, 0, NULL);
881d50f8f33SHaojian Zhuang 	if (ret < 0) {
8824e405ae2SQing Xu 		dev_err(chip->dev,
883f9ed1431SQing Xu 			"Failed to add power supply subdev, err = %d\n", ret);
8841f1cf8f9SHaojian Zhuang 		goto out_dev;
885d50f8f33SHaojian Zhuang 	}
8861ad99893SHaojian Zhuang 
8871ad99893SHaojian Zhuang 	if (pdata && pdata->touch) {
8881ad99893SHaojian Zhuang 		ret = mfd_add_devices(chip->dev, 0, &touch_devs[0],
8891ad99893SHaojian Zhuang 				      ARRAY_SIZE(touch_devs),
890f9ed1431SQing Xu 				      NULL, chip->tsc_irq, NULL);
8911ad99893SHaojian Zhuang 		if (ret < 0) {
8921ad99893SHaojian Zhuang 			dev_err(chip->dev, "Failed to add touch subdev\n");
8931f1cf8f9SHaojian Zhuang 			goto out_dev;
8941ad99893SHaojian Zhuang 		}
8951ad99893SHaojian Zhuang 	}
8961f1cf8f9SHaojian Zhuang 
8971ad99893SHaojian Zhuang 	return 0;
8981f1cf8f9SHaojian Zhuang out_dev:
8991f1cf8f9SHaojian Zhuang 	mfd_remove_devices(chip->dev);
900d50f8f33SHaojian Zhuang out:
901d50f8f33SHaojian Zhuang 	return ret;
902d50f8f33SHaojian Zhuang }
903d50f8f33SHaojian Zhuang 
max8925_device_exit(struct max8925_chip * chip)9044740f73fSBill Pemberton void max8925_device_exit(struct max8925_chip *chip)
905d50f8f33SHaojian Zhuang {
9061f1cf8f9SHaojian Zhuang 	if (chip->core_irq)
9071f1cf8f9SHaojian Zhuang 		free_irq(chip->core_irq, chip);
9081f1cf8f9SHaojian Zhuang 	if (chip->tsc_irq)
9091f1cf8f9SHaojian Zhuang 		free_irq(chip->tsc_irq, chip);
9101ad99893SHaojian Zhuang 	mfd_remove_devices(chip->dev);
911d50f8f33SHaojian Zhuang }
912