1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Azoteq IQS620A/621/622/624/625 Multi-Function Sensors 4 * 5 * Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com> 6 * 7 * These devices rely on application-specific register settings and calibration 8 * data developed in and exported from a suite of GUIs offered by the vendor. A 9 * separate tool converts the GUIs' ASCII-based output into a standard firmware 10 * file parsed by the driver. 11 * 12 * Link to datasheets and GUIs: https://www.azoteq.com/ 13 * 14 * Link to conversion tool: https://github.com/jlabundy/iqs62x-h2bin.git 15 */ 16 17 #include <linux/completion.h> 18 #include <linux/delay.h> 19 #include <linux/device.h> 20 #include <linux/err.h> 21 #include <linux/firmware.h> 22 #include <linux/i2c.h> 23 #include <linux/interrupt.h> 24 #include <linux/kernel.h> 25 #include <linux/list.h> 26 #include <linux/mfd/core.h> 27 #include <linux/mfd/iqs62x.h> 28 #include <linux/module.h> 29 #include <linux/notifier.h> 30 #include <linux/of_device.h> 31 #include <linux/property.h> 32 #include <linux/regmap.h> 33 #include <linux/slab.h> 34 #include <asm/unaligned.h> 35 36 #define IQS62X_PROD_NUM 0x00 37 38 #define IQS62X_SYS_FLAGS 0x10 39 #define IQS62X_SYS_FLAGS_IN_ATI BIT(2) 40 41 #define IQS620_HALL_FLAGS 0x16 42 #define IQS621_HALL_FLAGS 0x19 43 #define IQS622_HALL_FLAGS IQS621_HALL_FLAGS 44 45 #define IQS624_INTERVAL_NUM 0x18 46 #define IQS625_INTERVAL_NUM 0x12 47 48 #define IQS622_PROX_SETTINGS_4 0x48 49 #define IQS620_PROX_SETTINGS_4 0x50 50 #define IQS620_PROX_SETTINGS_4_SAR_EN BIT(7) 51 52 #define IQS621_ALS_CAL_DIV_LUX 0x82 53 #define IQS621_ALS_CAL_DIV_IR 0x83 54 55 #define IQS620_TEMP_CAL_MULT 0xC2 56 #define IQS620_TEMP_CAL_DIV 0xC3 57 #define IQS620_TEMP_CAL_OFFS 0xC4 58 59 #define IQS62X_SYS_SETTINGS 0xD0 60 #define IQS62X_SYS_SETTINGS_ACK_RESET BIT(6) 61 #define IQS62X_SYS_SETTINGS_EVENT_MODE BIT(5) 62 #define IQS62X_SYS_SETTINGS_CLK_DIV BIT(4) 63 #define IQS62X_SYS_SETTINGS_REDO_ATI BIT(1) 64 65 #define IQS62X_PWR_SETTINGS 0xD2 66 #define IQS62X_PWR_SETTINGS_DIS_AUTO BIT(5) 67 #define IQS62X_PWR_SETTINGS_PWR_MODE_MASK (BIT(4) | BIT(3)) 68 #define IQS62X_PWR_SETTINGS_PWR_MODE_HALT (BIT(4) | BIT(3)) 69 #define IQS62X_PWR_SETTINGS_PWR_MODE_NORM 0 70 71 #define IQS62X_OTP_CMD 0xF0 72 #define IQS62X_OTP_CMD_FG3 0x13 73 #define IQS62X_OTP_DATA 0xF1 74 #define IQS62X_MAX_REG 0xFF 75 76 #define IQS62X_HALL_CAL_MASK GENMASK(3, 0) 77 78 #define IQS62X_FW_REC_TYPE_INFO 0 79 #define IQS62X_FW_REC_TYPE_PROD 1 80 #define IQS62X_FW_REC_TYPE_HALL 2 81 #define IQS62X_FW_REC_TYPE_MASK 3 82 #define IQS62X_FW_REC_TYPE_DATA 4 83 84 #define IQS62X_ATI_POLL_SLEEP_US 10000 85 #define IQS62X_ATI_POLL_TIMEOUT_US 500000 86 #define IQS62X_ATI_STABLE_DELAY_MS 150 87 88 struct iqs62x_fw_rec { 89 u8 type; 90 u8 addr; 91 u8 len; 92 u8 data; 93 } __packed; 94 95 struct iqs62x_fw_blk { 96 struct list_head list; 97 u8 addr; 98 u8 mask; 99 u8 len; 100 u8 data[]; 101 }; 102 103 struct iqs62x_info { 104 u8 prod_num; 105 u8 sw_num; 106 u8 hw_num; 107 } __packed; 108 109 static int iqs62x_dev_init(struct iqs62x_core *iqs62x) 110 { 111 struct iqs62x_fw_blk *fw_blk; 112 unsigned int val; 113 int ret; 114 u8 clk_div = 1; 115 116 list_for_each_entry(fw_blk, &iqs62x->fw_blk_head, list) { 117 if (fw_blk->mask) 118 ret = regmap_update_bits(iqs62x->regmap, fw_blk->addr, 119 fw_blk->mask, *fw_blk->data); 120 else 121 ret = regmap_raw_write(iqs62x->regmap, fw_blk->addr, 122 fw_blk->data, fw_blk->len); 123 if (ret) 124 return ret; 125 } 126 127 switch (iqs62x->dev_desc->prod_num) { 128 case IQS620_PROD_NUM: 129 case IQS622_PROD_NUM: 130 ret = regmap_read(iqs62x->regmap, 131 iqs62x->dev_desc->prox_settings, &val); 132 if (ret) 133 return ret; 134 135 if (val & IQS620_PROX_SETTINGS_4_SAR_EN) 136 iqs62x->ui_sel = IQS62X_UI_SAR1; 137 fallthrough; 138 139 case IQS621_PROD_NUM: 140 ret = regmap_write(iqs62x->regmap, IQS620_GLBL_EVENT_MASK, 141 IQS620_GLBL_EVENT_MASK_PMU | 142 iqs62x->dev_desc->prox_mask | 143 iqs62x->dev_desc->sar_mask | 144 iqs62x->dev_desc->hall_mask | 145 iqs62x->dev_desc->hyst_mask | 146 iqs62x->dev_desc->temp_mask | 147 iqs62x->dev_desc->als_mask | 148 iqs62x->dev_desc->ir_mask); 149 if (ret) 150 return ret; 151 break; 152 153 default: 154 ret = regmap_write(iqs62x->regmap, IQS624_HALL_UI, 155 IQS624_HALL_UI_WHL_EVENT | 156 IQS624_HALL_UI_INT_EVENT | 157 IQS624_HALL_UI_AUTO_CAL); 158 if (ret) 159 return ret; 160 161 /* 162 * The IQS625 default interval divider is below the minimum 163 * permissible value, and the datasheet mandates that it is 164 * corrected during initialization (unless an updated value 165 * has already been provided by firmware). 166 * 167 * To protect against an unacceptably low user-entered value 168 * stored in the firmware, the same check is extended to the 169 * IQS624 as well. 170 */ 171 ret = regmap_read(iqs62x->regmap, IQS624_INTERVAL_DIV, &val); 172 if (ret) 173 return ret; 174 175 if (val >= iqs62x->dev_desc->interval_div) 176 break; 177 178 ret = regmap_write(iqs62x->regmap, IQS624_INTERVAL_DIV, 179 iqs62x->dev_desc->interval_div); 180 if (ret) 181 return ret; 182 } 183 184 ret = regmap_read(iqs62x->regmap, IQS62X_SYS_SETTINGS, &val); 185 if (ret) 186 return ret; 187 188 if (val & IQS62X_SYS_SETTINGS_CLK_DIV) 189 clk_div = iqs62x->dev_desc->clk_div; 190 191 ret = regmap_write(iqs62x->regmap, IQS62X_SYS_SETTINGS, val | 192 IQS62X_SYS_SETTINGS_ACK_RESET | 193 IQS62X_SYS_SETTINGS_EVENT_MODE | 194 IQS62X_SYS_SETTINGS_REDO_ATI); 195 if (ret) 196 return ret; 197 198 ret = regmap_read_poll_timeout(iqs62x->regmap, IQS62X_SYS_FLAGS, val, 199 !(val & IQS62X_SYS_FLAGS_IN_ATI), 200 IQS62X_ATI_POLL_SLEEP_US, 201 IQS62X_ATI_POLL_TIMEOUT_US * clk_div); 202 if (ret) 203 return ret; 204 205 msleep(IQS62X_ATI_STABLE_DELAY_MS * clk_div); 206 207 return 0; 208 } 209 210 static int iqs62x_firmware_parse(struct iqs62x_core *iqs62x, 211 const struct firmware *fw) 212 { 213 struct i2c_client *client = iqs62x->client; 214 struct iqs62x_fw_rec *fw_rec; 215 struct iqs62x_fw_blk *fw_blk; 216 unsigned int val; 217 size_t pos = 0; 218 int ret = 0; 219 u8 mask, len, *data; 220 u8 hall_cal_index = 0; 221 222 while (pos < fw->size) { 223 if (pos + sizeof(*fw_rec) > fw->size) { 224 ret = -EINVAL; 225 break; 226 } 227 fw_rec = (struct iqs62x_fw_rec *)(fw->data + pos); 228 pos += sizeof(*fw_rec); 229 230 if (pos + fw_rec->len - 1 > fw->size) { 231 ret = -EINVAL; 232 break; 233 } 234 pos += fw_rec->len - 1; 235 236 switch (fw_rec->type) { 237 case IQS62X_FW_REC_TYPE_INFO: 238 continue; 239 240 case IQS62X_FW_REC_TYPE_PROD: 241 if (fw_rec->data == iqs62x->dev_desc->prod_num) 242 continue; 243 244 dev_err(&client->dev, 245 "Incompatible product number: 0x%02X\n", 246 fw_rec->data); 247 ret = -EINVAL; 248 break; 249 250 case IQS62X_FW_REC_TYPE_HALL: 251 if (!hall_cal_index) { 252 ret = regmap_write(iqs62x->regmap, 253 IQS62X_OTP_CMD, 254 IQS62X_OTP_CMD_FG3); 255 if (ret) 256 break; 257 258 ret = regmap_read(iqs62x->regmap, 259 IQS62X_OTP_DATA, &val); 260 if (ret) 261 break; 262 263 hall_cal_index = val & IQS62X_HALL_CAL_MASK; 264 if (!hall_cal_index) { 265 dev_err(&client->dev, 266 "Uncalibrated device\n"); 267 ret = -ENODATA; 268 break; 269 } 270 } 271 272 if (hall_cal_index > fw_rec->len) { 273 ret = -EINVAL; 274 break; 275 } 276 277 mask = 0; 278 data = &fw_rec->data + hall_cal_index - 1; 279 len = sizeof(*data); 280 break; 281 282 case IQS62X_FW_REC_TYPE_MASK: 283 if (fw_rec->len < (sizeof(mask) + sizeof(*data))) { 284 ret = -EINVAL; 285 break; 286 } 287 288 mask = fw_rec->data; 289 data = &fw_rec->data + sizeof(mask); 290 len = sizeof(*data); 291 break; 292 293 case IQS62X_FW_REC_TYPE_DATA: 294 mask = 0; 295 data = &fw_rec->data; 296 len = fw_rec->len; 297 break; 298 299 default: 300 dev_err(&client->dev, 301 "Unrecognized record type: 0x%02X\n", 302 fw_rec->type); 303 ret = -EINVAL; 304 } 305 306 if (ret) 307 break; 308 309 fw_blk = devm_kzalloc(&client->dev, 310 struct_size(fw_blk, data, len), 311 GFP_KERNEL); 312 if (!fw_blk) { 313 ret = -ENOMEM; 314 break; 315 } 316 317 fw_blk->addr = fw_rec->addr; 318 fw_blk->mask = mask; 319 fw_blk->len = len; 320 memcpy(fw_blk->data, data, len); 321 322 list_add(&fw_blk->list, &iqs62x->fw_blk_head); 323 } 324 325 release_firmware(fw); 326 327 return ret; 328 } 329 330 const struct iqs62x_event_desc iqs62x_events[IQS62X_NUM_EVENTS] = { 331 [IQS62X_EVENT_PROX_CH0_T] = { 332 .reg = IQS62X_EVENT_PROX, 333 .mask = BIT(4), 334 .val = BIT(4), 335 }, 336 [IQS62X_EVENT_PROX_CH0_P] = { 337 .reg = IQS62X_EVENT_PROX, 338 .mask = BIT(0), 339 .val = BIT(0), 340 }, 341 [IQS62X_EVENT_PROX_CH1_T] = { 342 .reg = IQS62X_EVENT_PROX, 343 .mask = BIT(5), 344 .val = BIT(5), 345 }, 346 [IQS62X_EVENT_PROX_CH1_P] = { 347 .reg = IQS62X_EVENT_PROX, 348 .mask = BIT(1), 349 .val = BIT(1), 350 }, 351 [IQS62X_EVENT_PROX_CH2_T] = { 352 .reg = IQS62X_EVENT_PROX, 353 .mask = BIT(6), 354 .val = BIT(6), 355 }, 356 [IQS62X_EVENT_PROX_CH2_P] = { 357 .reg = IQS62X_EVENT_PROX, 358 .mask = BIT(2), 359 .val = BIT(2), 360 }, 361 [IQS62X_EVENT_HYST_POS_T] = { 362 .reg = IQS62X_EVENT_HYST, 363 .mask = BIT(6) | BIT(7), 364 .val = BIT(6), 365 }, 366 [IQS62X_EVENT_HYST_POS_P] = { 367 .reg = IQS62X_EVENT_HYST, 368 .mask = BIT(5) | BIT(7), 369 .val = BIT(5), 370 }, 371 [IQS62X_EVENT_HYST_NEG_T] = { 372 .reg = IQS62X_EVENT_HYST, 373 .mask = BIT(6) | BIT(7), 374 .val = BIT(6) | BIT(7), 375 }, 376 [IQS62X_EVENT_HYST_NEG_P] = { 377 .reg = IQS62X_EVENT_HYST, 378 .mask = BIT(5) | BIT(7), 379 .val = BIT(5) | BIT(7), 380 }, 381 [IQS62X_EVENT_SAR1_ACT] = { 382 .reg = IQS62X_EVENT_HYST, 383 .mask = BIT(4), 384 .val = BIT(4), 385 }, 386 [IQS62X_EVENT_SAR1_QRD] = { 387 .reg = IQS62X_EVENT_HYST, 388 .mask = BIT(2), 389 .val = BIT(2), 390 }, 391 [IQS62X_EVENT_SAR1_MOVE] = { 392 .reg = IQS62X_EVENT_HYST, 393 .mask = BIT(1), 394 .val = BIT(1), 395 }, 396 [IQS62X_EVENT_SAR1_HALT] = { 397 .reg = IQS62X_EVENT_HYST, 398 .mask = BIT(0), 399 .val = BIT(0), 400 }, 401 [IQS62X_EVENT_WHEEL_UP] = { 402 .reg = IQS62X_EVENT_WHEEL, 403 .mask = BIT(7) | BIT(6), 404 .val = BIT(7), 405 }, 406 [IQS62X_EVENT_WHEEL_DN] = { 407 .reg = IQS62X_EVENT_WHEEL, 408 .mask = BIT(7) | BIT(6), 409 .val = BIT(7) | BIT(6), 410 }, 411 [IQS62X_EVENT_HALL_N_T] = { 412 .reg = IQS62X_EVENT_HALL, 413 .mask = BIT(2) | BIT(0), 414 .val = BIT(2), 415 }, 416 [IQS62X_EVENT_HALL_N_P] = { 417 .reg = IQS62X_EVENT_HALL, 418 .mask = BIT(1) | BIT(0), 419 .val = BIT(1), 420 }, 421 [IQS62X_EVENT_HALL_S_T] = { 422 .reg = IQS62X_EVENT_HALL, 423 .mask = BIT(2) | BIT(0), 424 .val = BIT(2) | BIT(0), 425 }, 426 [IQS62X_EVENT_HALL_S_P] = { 427 .reg = IQS62X_EVENT_HALL, 428 .mask = BIT(1) | BIT(0), 429 .val = BIT(1) | BIT(0), 430 }, 431 [IQS62X_EVENT_SYS_RESET] = { 432 .reg = IQS62X_EVENT_SYS, 433 .mask = BIT(7), 434 .val = BIT(7), 435 }, 436 }; 437 EXPORT_SYMBOL_GPL(iqs62x_events); 438 439 static irqreturn_t iqs62x_irq(int irq, void *context) 440 { 441 struct iqs62x_core *iqs62x = context; 442 struct i2c_client *client = iqs62x->client; 443 struct iqs62x_event_data event_data; 444 struct iqs62x_event_desc event_desc; 445 enum iqs62x_event_reg event_reg; 446 unsigned long event_flags = 0; 447 int ret, i, j; 448 u8 event_map[IQS62X_EVENT_SIZE]; 449 450 /* 451 * The device asserts the RDY output to signal the beginning of a 452 * communication window, which is closed by an I2C stop condition. 453 * As such, all interrupt status is captured in a single read and 454 * broadcast to any interested sub-device drivers. 455 */ 456 ret = regmap_raw_read(iqs62x->regmap, IQS62X_SYS_FLAGS, event_map, 457 sizeof(event_map)); 458 if (ret) { 459 dev_err(&client->dev, "Failed to read device status: %d\n", 460 ret); 461 return IRQ_NONE; 462 } 463 464 for (i = 0; i < sizeof(event_map); i++) { 465 event_reg = iqs62x->dev_desc->event_regs[iqs62x->ui_sel][i]; 466 467 switch (event_reg) { 468 case IQS62X_EVENT_UI_LO: 469 event_data.ui_data = get_unaligned_le16(&event_map[i]); 470 fallthrough; 471 472 case IQS62X_EVENT_UI_HI: 473 case IQS62X_EVENT_NONE: 474 continue; 475 476 case IQS62X_EVENT_ALS: 477 event_data.als_flags = event_map[i]; 478 continue; 479 480 case IQS62X_EVENT_IR: 481 event_data.ir_flags = event_map[i]; 482 continue; 483 484 case IQS62X_EVENT_INTER: 485 event_data.interval = event_map[i]; 486 continue; 487 488 case IQS62X_EVENT_HYST: 489 event_map[i] <<= iqs62x->dev_desc->hyst_shift; 490 fallthrough; 491 492 case IQS62X_EVENT_WHEEL: 493 case IQS62X_EVENT_HALL: 494 case IQS62X_EVENT_PROX: 495 case IQS62X_EVENT_SYS: 496 break; 497 } 498 499 for (j = 0; j < IQS62X_NUM_EVENTS; j++) { 500 event_desc = iqs62x_events[j]; 501 502 if (event_desc.reg != event_reg) 503 continue; 504 505 if ((event_map[i] & event_desc.mask) == event_desc.val) 506 event_flags |= BIT(j); 507 } 508 } 509 510 /* 511 * The device resets itself in response to the I2C master stalling 512 * communication past a fixed timeout. In this case, all registers 513 * are restored and any interested sub-device drivers are notified. 514 */ 515 if (event_flags & BIT(IQS62X_EVENT_SYS_RESET)) { 516 dev_err(&client->dev, "Unexpected device reset\n"); 517 518 ret = iqs62x_dev_init(iqs62x); 519 if (ret) { 520 dev_err(&client->dev, 521 "Failed to re-initialize device: %d\n", ret); 522 return IRQ_NONE; 523 } 524 } 525 526 ret = blocking_notifier_call_chain(&iqs62x->nh, event_flags, 527 &event_data); 528 if (ret & NOTIFY_STOP_MASK) 529 return IRQ_NONE; 530 531 /* 532 * Once the communication window is closed, a small delay is added to 533 * ensure the device's RDY output has been deasserted by the time the 534 * interrupt handler returns. 535 */ 536 usleep_range(150, 200); 537 538 return IRQ_HANDLED; 539 } 540 541 static void iqs62x_firmware_load(const struct firmware *fw, void *context) 542 { 543 struct iqs62x_core *iqs62x = context; 544 struct i2c_client *client = iqs62x->client; 545 int ret; 546 547 if (fw) { 548 ret = iqs62x_firmware_parse(iqs62x, fw); 549 if (ret) { 550 dev_err(&client->dev, "Failed to parse firmware: %d\n", 551 ret); 552 goto err_out; 553 } 554 } 555 556 ret = iqs62x_dev_init(iqs62x); 557 if (ret) { 558 dev_err(&client->dev, "Failed to initialize device: %d\n", ret); 559 goto err_out; 560 } 561 562 ret = devm_request_threaded_irq(&client->dev, client->irq, 563 NULL, iqs62x_irq, IRQF_ONESHOT, 564 client->name, iqs62x); 565 if (ret) { 566 dev_err(&client->dev, "Failed to request IRQ: %d\n", ret); 567 goto err_out; 568 } 569 570 ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE, 571 iqs62x->dev_desc->sub_devs, 572 iqs62x->dev_desc->num_sub_devs, 573 NULL, 0, NULL); 574 if (ret) 575 dev_err(&client->dev, "Failed to add sub-devices: %d\n", ret); 576 577 err_out: 578 complete_all(&iqs62x->fw_done); 579 } 580 581 static const struct mfd_cell iqs620at_sub_devs[] = { 582 { 583 .name = "iqs62x-keys", 584 .of_compatible = "azoteq,iqs620a-keys", 585 }, 586 { 587 .name = "iqs620a-pwm", 588 .of_compatible = "azoteq,iqs620a-pwm", 589 }, 590 { .name = "iqs620at-temp", }, 591 }; 592 593 static const struct mfd_cell iqs620a_sub_devs[] = { 594 { 595 .name = "iqs62x-keys", 596 .of_compatible = "azoteq,iqs620a-keys", 597 }, 598 { 599 .name = "iqs620a-pwm", 600 .of_compatible = "azoteq,iqs620a-pwm", 601 }, 602 }; 603 604 static const struct mfd_cell iqs621_sub_devs[] = { 605 { 606 .name = "iqs62x-keys", 607 .of_compatible = "azoteq,iqs621-keys", 608 }, 609 { .name = "iqs621-als", }, 610 }; 611 612 static const struct mfd_cell iqs622_sub_devs[] = { 613 { 614 .name = "iqs62x-keys", 615 .of_compatible = "azoteq,iqs622-keys", 616 }, 617 { .name = "iqs621-als", }, 618 }; 619 620 static const struct mfd_cell iqs624_sub_devs[] = { 621 { 622 .name = "iqs62x-keys", 623 .of_compatible = "azoteq,iqs624-keys", 624 }, 625 { .name = "iqs624-pos", }, 626 }; 627 628 static const struct mfd_cell iqs625_sub_devs[] = { 629 { 630 .name = "iqs62x-keys", 631 .of_compatible = "azoteq,iqs625-keys", 632 }, 633 { .name = "iqs624-pos", }, 634 }; 635 636 static const u8 iqs620at_cal_regs[] = { 637 IQS620_TEMP_CAL_MULT, 638 IQS620_TEMP_CAL_DIV, 639 IQS620_TEMP_CAL_OFFS, 640 }; 641 642 static const u8 iqs621_cal_regs[] = { 643 IQS621_ALS_CAL_DIV_LUX, 644 IQS621_ALS_CAL_DIV_IR, 645 }; 646 647 static const enum iqs62x_event_reg iqs620a_event_regs[][IQS62X_EVENT_SIZE] = { 648 [IQS62X_UI_PROX] = { 649 IQS62X_EVENT_SYS, /* 0x10 */ 650 IQS62X_EVENT_NONE, 651 IQS62X_EVENT_PROX, /* 0x12 */ 652 IQS62X_EVENT_HYST, /* 0x13 */ 653 IQS62X_EVENT_NONE, 654 IQS62X_EVENT_NONE, 655 IQS62X_EVENT_HALL, /* 0x16 */ 656 IQS62X_EVENT_NONE, 657 IQS62X_EVENT_NONE, 658 IQS62X_EVENT_NONE, 659 }, 660 [IQS62X_UI_SAR1] = { 661 IQS62X_EVENT_SYS, /* 0x10 */ 662 IQS62X_EVENT_NONE, 663 IQS62X_EVENT_NONE, 664 IQS62X_EVENT_HYST, /* 0x13 */ 665 IQS62X_EVENT_NONE, 666 IQS62X_EVENT_NONE, 667 IQS62X_EVENT_HALL, /* 0x16 */ 668 IQS62X_EVENT_NONE, 669 IQS62X_EVENT_NONE, 670 IQS62X_EVENT_NONE, 671 }, 672 }; 673 674 static const enum iqs62x_event_reg iqs621_event_regs[][IQS62X_EVENT_SIZE] = { 675 [IQS62X_UI_PROX] = { 676 IQS62X_EVENT_SYS, /* 0x10 */ 677 IQS62X_EVENT_NONE, 678 IQS62X_EVENT_PROX, /* 0x12 */ 679 IQS62X_EVENT_HYST, /* 0x13 */ 680 IQS62X_EVENT_NONE, 681 IQS62X_EVENT_NONE, 682 IQS62X_EVENT_ALS, /* 0x16 */ 683 IQS62X_EVENT_UI_LO, /* 0x17 */ 684 IQS62X_EVENT_UI_HI, /* 0x18 */ 685 IQS62X_EVENT_HALL, /* 0x19 */ 686 }, 687 }; 688 689 static const enum iqs62x_event_reg iqs622_event_regs[][IQS62X_EVENT_SIZE] = { 690 [IQS62X_UI_PROX] = { 691 IQS62X_EVENT_SYS, /* 0x10 */ 692 IQS62X_EVENT_NONE, 693 IQS62X_EVENT_PROX, /* 0x12 */ 694 IQS62X_EVENT_NONE, 695 IQS62X_EVENT_ALS, /* 0x14 */ 696 IQS62X_EVENT_NONE, 697 IQS62X_EVENT_IR, /* 0x16 */ 698 IQS62X_EVENT_UI_LO, /* 0x17 */ 699 IQS62X_EVENT_UI_HI, /* 0x18 */ 700 IQS62X_EVENT_HALL, /* 0x19 */ 701 }, 702 [IQS62X_UI_SAR1] = { 703 IQS62X_EVENT_SYS, /* 0x10 */ 704 IQS62X_EVENT_NONE, 705 IQS62X_EVENT_NONE, 706 IQS62X_EVENT_HYST, /* 0x13 */ 707 IQS62X_EVENT_ALS, /* 0x14 */ 708 IQS62X_EVENT_NONE, 709 IQS62X_EVENT_IR, /* 0x16 */ 710 IQS62X_EVENT_UI_LO, /* 0x17 */ 711 IQS62X_EVENT_UI_HI, /* 0x18 */ 712 IQS62X_EVENT_HALL, /* 0x19 */ 713 }, 714 }; 715 716 static const enum iqs62x_event_reg iqs624_event_regs[][IQS62X_EVENT_SIZE] = { 717 [IQS62X_UI_PROX] = { 718 IQS62X_EVENT_SYS, /* 0x10 */ 719 IQS62X_EVENT_NONE, 720 IQS62X_EVENT_PROX, /* 0x12 */ 721 IQS62X_EVENT_NONE, 722 IQS62X_EVENT_WHEEL, /* 0x14 */ 723 IQS62X_EVENT_NONE, 724 IQS62X_EVENT_UI_LO, /* 0x16 */ 725 IQS62X_EVENT_UI_HI, /* 0x17 */ 726 IQS62X_EVENT_INTER, /* 0x18 */ 727 IQS62X_EVENT_NONE, 728 }, 729 }; 730 731 static const enum iqs62x_event_reg iqs625_event_regs[][IQS62X_EVENT_SIZE] = { 732 [IQS62X_UI_PROX] = { 733 IQS62X_EVENT_SYS, /* 0x10 */ 734 IQS62X_EVENT_PROX, /* 0x11 */ 735 IQS62X_EVENT_INTER, /* 0x12 */ 736 IQS62X_EVENT_NONE, 737 IQS62X_EVENT_NONE, 738 IQS62X_EVENT_NONE, 739 IQS62X_EVENT_NONE, 740 IQS62X_EVENT_NONE, 741 IQS62X_EVENT_NONE, 742 IQS62X_EVENT_NONE, 743 }, 744 }; 745 746 static const struct iqs62x_dev_desc iqs62x_devs[] = { 747 { 748 .dev_name = "iqs620at", 749 .sub_devs = iqs620at_sub_devs, 750 .num_sub_devs = ARRAY_SIZE(iqs620at_sub_devs), 751 752 .prod_num = IQS620_PROD_NUM, 753 .sw_num = 0x08, 754 .cal_regs = iqs620at_cal_regs, 755 .num_cal_regs = ARRAY_SIZE(iqs620at_cal_regs), 756 757 .prox_mask = BIT(0), 758 .sar_mask = BIT(1) | BIT(7), 759 .hall_mask = BIT(2), 760 .hyst_mask = BIT(3), 761 .temp_mask = BIT(4), 762 763 .prox_settings = IQS620_PROX_SETTINGS_4, 764 .hall_flags = IQS620_HALL_FLAGS, 765 766 .clk_div = 4, 767 .fw_name = "iqs620a.bin", 768 .event_regs = &iqs620a_event_regs[IQS62X_UI_PROX], 769 }, 770 { 771 .dev_name = "iqs620a", 772 .sub_devs = iqs620a_sub_devs, 773 .num_sub_devs = ARRAY_SIZE(iqs620a_sub_devs), 774 775 .prod_num = IQS620_PROD_NUM, 776 .sw_num = 0x08, 777 778 .prox_mask = BIT(0), 779 .sar_mask = BIT(1) | BIT(7), 780 .hall_mask = BIT(2), 781 .hyst_mask = BIT(3), 782 .temp_mask = BIT(4), 783 784 .prox_settings = IQS620_PROX_SETTINGS_4, 785 .hall_flags = IQS620_HALL_FLAGS, 786 787 .clk_div = 4, 788 .fw_name = "iqs620a.bin", 789 .event_regs = &iqs620a_event_regs[IQS62X_UI_PROX], 790 }, 791 { 792 .dev_name = "iqs621", 793 .sub_devs = iqs621_sub_devs, 794 .num_sub_devs = ARRAY_SIZE(iqs621_sub_devs), 795 796 .prod_num = IQS621_PROD_NUM, 797 .sw_num = 0x09, 798 .cal_regs = iqs621_cal_regs, 799 .num_cal_regs = ARRAY_SIZE(iqs621_cal_regs), 800 801 .prox_mask = BIT(0), 802 .hall_mask = BIT(1), 803 .als_mask = BIT(2), 804 .hyst_mask = BIT(3), 805 .temp_mask = BIT(4), 806 807 .als_flags = IQS621_ALS_FLAGS, 808 .hall_flags = IQS621_HALL_FLAGS, 809 .hyst_shift = 5, 810 811 .clk_div = 2, 812 .fw_name = "iqs621.bin", 813 .event_regs = &iqs621_event_regs[IQS62X_UI_PROX], 814 }, 815 { 816 .dev_name = "iqs622", 817 .sub_devs = iqs622_sub_devs, 818 .num_sub_devs = ARRAY_SIZE(iqs622_sub_devs), 819 820 .prod_num = IQS622_PROD_NUM, 821 .sw_num = 0x06, 822 823 .prox_mask = BIT(0), 824 .sar_mask = BIT(1), 825 .hall_mask = BIT(2), 826 .als_mask = BIT(3), 827 .ir_mask = BIT(4), 828 829 .prox_settings = IQS622_PROX_SETTINGS_4, 830 .als_flags = IQS622_ALS_FLAGS, 831 .hall_flags = IQS622_HALL_FLAGS, 832 833 .clk_div = 2, 834 .fw_name = "iqs622.bin", 835 .event_regs = &iqs622_event_regs[IQS62X_UI_PROX], 836 }, 837 { 838 .dev_name = "iqs624", 839 .sub_devs = iqs624_sub_devs, 840 .num_sub_devs = ARRAY_SIZE(iqs624_sub_devs), 841 842 .prod_num = IQS624_PROD_NUM, 843 .sw_num = 0x0B, 844 845 .interval = IQS624_INTERVAL_NUM, 846 .interval_div = 3, 847 848 .clk_div = 2, 849 .fw_name = "iqs624.bin", 850 .event_regs = &iqs624_event_regs[IQS62X_UI_PROX], 851 }, 852 { 853 .dev_name = "iqs625", 854 .sub_devs = iqs625_sub_devs, 855 .num_sub_devs = ARRAY_SIZE(iqs625_sub_devs), 856 857 .prod_num = IQS625_PROD_NUM, 858 .sw_num = 0x0B, 859 860 .interval = IQS625_INTERVAL_NUM, 861 .interval_div = 10, 862 863 .clk_div = 2, 864 .fw_name = "iqs625.bin", 865 .event_regs = &iqs625_event_regs[IQS62X_UI_PROX], 866 }, 867 }; 868 869 static const struct regmap_config iqs62x_regmap_config = { 870 .reg_bits = 8, 871 .val_bits = 8, 872 .max_register = IQS62X_MAX_REG, 873 }; 874 875 static int iqs62x_probe(struct i2c_client *client) 876 { 877 struct iqs62x_core *iqs62x; 878 struct iqs62x_info info; 879 unsigned int val; 880 int ret, i, j; 881 u8 sw_num = 0; 882 const char *fw_name = NULL; 883 884 iqs62x = devm_kzalloc(&client->dev, sizeof(*iqs62x), GFP_KERNEL); 885 if (!iqs62x) 886 return -ENOMEM; 887 888 i2c_set_clientdata(client, iqs62x); 889 iqs62x->client = client; 890 891 BLOCKING_INIT_NOTIFIER_HEAD(&iqs62x->nh); 892 INIT_LIST_HEAD(&iqs62x->fw_blk_head); 893 init_completion(&iqs62x->fw_done); 894 895 iqs62x->regmap = devm_regmap_init_i2c(client, &iqs62x_regmap_config); 896 if (IS_ERR(iqs62x->regmap)) { 897 ret = PTR_ERR(iqs62x->regmap); 898 dev_err(&client->dev, "Failed to initialize register map: %d\n", 899 ret); 900 return ret; 901 } 902 903 ret = regmap_raw_read(iqs62x->regmap, IQS62X_PROD_NUM, &info, 904 sizeof(info)); 905 if (ret) 906 return ret; 907 908 /* 909 * The following sequence validates the device's product and software 910 * numbers. It then determines if the device is factory-calibrated by 911 * checking for nonzero values in the device's designated calibration 912 * registers (if applicable). Depending on the device, the absence of 913 * calibration data indicates a reduced feature set or invalid device. 914 * 915 * For devices given in both calibrated and uncalibrated versions, the 916 * calibrated version (e.g. IQS620AT) appears first in the iqs62x_devs 917 * array. The uncalibrated version (e.g. IQS620A) appears next and has 918 * the same product and software numbers, but no calibration registers 919 * are specified. 920 */ 921 for (i = 0; i < ARRAY_SIZE(iqs62x_devs); i++) { 922 if (info.prod_num != iqs62x_devs[i].prod_num) 923 continue; 924 925 iqs62x->dev_desc = &iqs62x_devs[i]; 926 927 if (info.sw_num < iqs62x->dev_desc->sw_num) 928 continue; 929 930 sw_num = info.sw_num; 931 932 /* 933 * Read each of the device's designated calibration registers, 934 * if any, and exit from the inner loop early if any are equal 935 * to zero (indicating the device is uncalibrated). This could 936 * be acceptable depending on the device (e.g. IQS620A instead 937 * of IQS620AT). 938 */ 939 for (j = 0; j < iqs62x->dev_desc->num_cal_regs; j++) { 940 ret = regmap_read(iqs62x->regmap, 941 iqs62x->dev_desc->cal_regs[j], &val); 942 if (ret) 943 return ret; 944 945 if (!val) 946 break; 947 } 948 949 /* 950 * If the number of nonzero values read from the device equals 951 * the number of designated calibration registers (which could 952 * be zero), exit from the outer loop early to signal that the 953 * device's product and software numbers match a known device, 954 * and the device is calibrated (if applicable). 955 */ 956 if (j == iqs62x->dev_desc->num_cal_regs) 957 break; 958 } 959 960 if (!iqs62x->dev_desc) { 961 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n", 962 info.prod_num); 963 return -EINVAL; 964 } 965 966 if (!sw_num) { 967 dev_err(&client->dev, "Unrecognized software number: 0x%02X\n", 968 info.sw_num); 969 return -EINVAL; 970 } 971 972 if (i == ARRAY_SIZE(iqs62x_devs)) { 973 dev_err(&client->dev, "Uncalibrated device\n"); 974 return -ENODATA; 975 } 976 977 device_property_read_string(&client->dev, "firmware-name", &fw_name); 978 979 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG, 980 fw_name ? : iqs62x->dev_desc->fw_name, 981 &client->dev, GFP_KERNEL, iqs62x, 982 iqs62x_firmware_load); 983 if (ret) 984 dev_err(&client->dev, "Failed to request firmware: %d\n", ret); 985 986 return ret; 987 } 988 989 static int iqs62x_remove(struct i2c_client *client) 990 { 991 struct iqs62x_core *iqs62x = i2c_get_clientdata(client); 992 993 wait_for_completion(&iqs62x->fw_done); 994 995 return 0; 996 } 997 998 static int __maybe_unused iqs62x_suspend(struct device *dev) 999 { 1000 struct iqs62x_core *iqs62x = dev_get_drvdata(dev); 1001 int ret; 1002 1003 wait_for_completion(&iqs62x->fw_done); 1004 1005 /* 1006 * As per the datasheet, automatic mode switching must be disabled 1007 * before the device is placed in or taken out of halt mode. 1008 */ 1009 ret = regmap_update_bits(iqs62x->regmap, IQS62X_PWR_SETTINGS, 1010 IQS62X_PWR_SETTINGS_DIS_AUTO, 0xFF); 1011 if (ret) 1012 return ret; 1013 1014 return regmap_update_bits(iqs62x->regmap, IQS62X_PWR_SETTINGS, 1015 IQS62X_PWR_SETTINGS_PWR_MODE_MASK, 1016 IQS62X_PWR_SETTINGS_PWR_MODE_HALT); 1017 } 1018 1019 static int __maybe_unused iqs62x_resume(struct device *dev) 1020 { 1021 struct iqs62x_core *iqs62x = dev_get_drvdata(dev); 1022 int ret; 1023 1024 ret = regmap_update_bits(iqs62x->regmap, IQS62X_PWR_SETTINGS, 1025 IQS62X_PWR_SETTINGS_PWR_MODE_MASK, 1026 IQS62X_PWR_SETTINGS_PWR_MODE_NORM); 1027 if (ret) 1028 return ret; 1029 1030 return regmap_update_bits(iqs62x->regmap, IQS62X_PWR_SETTINGS, 1031 IQS62X_PWR_SETTINGS_DIS_AUTO, 0); 1032 } 1033 1034 static SIMPLE_DEV_PM_OPS(iqs62x_pm, iqs62x_suspend, iqs62x_resume); 1035 1036 static const struct of_device_id iqs62x_of_match[] = { 1037 { .compatible = "azoteq,iqs620a" }, 1038 { .compatible = "azoteq,iqs621" }, 1039 { .compatible = "azoteq,iqs622" }, 1040 { .compatible = "azoteq,iqs624" }, 1041 { .compatible = "azoteq,iqs625" }, 1042 { } 1043 }; 1044 MODULE_DEVICE_TABLE(of, iqs62x_of_match); 1045 1046 static struct i2c_driver iqs62x_i2c_driver = { 1047 .driver = { 1048 .name = "iqs62x", 1049 .of_match_table = iqs62x_of_match, 1050 .pm = &iqs62x_pm, 1051 }, 1052 .probe_new = iqs62x_probe, 1053 .remove = iqs62x_remove, 1054 }; 1055 module_i2c_driver(iqs62x_i2c_driver); 1056 1057 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>"); 1058 MODULE_DESCRIPTION("Azoteq IQS620A/621/622/624/625 Multi-Function Sensors"); 1059 MODULE_LICENSE("GPL"); 1060