1603aed8fSIlpo Järvinen // SPDX-License-Identifier: GPL-2.0
2603aed8fSIlpo Järvinen /*
3603aed8fSIlpo Järvinen  * Intel MAX 10 Board Management Controller chip
4603aed8fSIlpo Järvinen  *
5603aed8fSIlpo Järvinen  * Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
6603aed8fSIlpo Järvinen  */
7603aed8fSIlpo Järvinen #include <linux/bitfield.h>
8603aed8fSIlpo Järvinen #include <linux/dev_printk.h>
9603aed8fSIlpo Järvinen #include <linux/init.h>
10603aed8fSIlpo Järvinen #include <linux/mfd/core.h>
11603aed8fSIlpo Järvinen #include <linux/mfd/intel-m10-bmc.h>
12603aed8fSIlpo Järvinen #include <linux/module.h>
13603aed8fSIlpo Järvinen #include <linux/regmap.h>
14603aed8fSIlpo Järvinen #include <linux/spi/spi.h>
15603aed8fSIlpo Järvinen 
16603aed8fSIlpo Järvinen static const struct regmap_range m10bmc_regmap_range[] = {
17bcababfcSIlpo Järvinen 	regmap_reg_range(M10BMC_N3000_LEGACY_BUILD_VER, M10BMC_N3000_LEGACY_BUILD_VER),
18bcababfcSIlpo Järvinen 	regmap_reg_range(M10BMC_N3000_SYS_BASE, M10BMC_N3000_SYS_END),
19bcababfcSIlpo Järvinen 	regmap_reg_range(M10BMC_N3000_FLASH_BASE, M10BMC_N3000_FLASH_END),
20603aed8fSIlpo Järvinen };
21603aed8fSIlpo Järvinen 
22603aed8fSIlpo Järvinen static const struct regmap_access_table m10bmc_access_table = {
23603aed8fSIlpo Järvinen 	.yes_ranges	= m10bmc_regmap_range,
24603aed8fSIlpo Järvinen 	.n_yes_ranges	= ARRAY_SIZE(m10bmc_regmap_range),
25603aed8fSIlpo Järvinen };
26603aed8fSIlpo Järvinen 
27603aed8fSIlpo Järvinen static struct regmap_config intel_m10bmc_regmap_config = {
28603aed8fSIlpo Järvinen 	.reg_bits = 32,
29603aed8fSIlpo Järvinen 	.val_bits = 32,
30603aed8fSIlpo Järvinen 	.reg_stride = 4,
31603aed8fSIlpo Järvinen 	.wr_table = &m10bmc_access_table,
32603aed8fSIlpo Järvinen 	.rd_table = &m10bmc_access_table,
33bcababfcSIlpo Järvinen 	.max_register = M10BMC_N3000_MEM_END,
34603aed8fSIlpo Järvinen };
35603aed8fSIlpo Järvinen 
check_m10bmc_version(struct intel_m10bmc * ddata)36603aed8fSIlpo Järvinen static int check_m10bmc_version(struct intel_m10bmc *ddata)
37603aed8fSIlpo Järvinen {
38603aed8fSIlpo Järvinen 	unsigned int v;
39603aed8fSIlpo Järvinen 	int ret;
40603aed8fSIlpo Järvinen 
41603aed8fSIlpo Järvinen 	/*
42603aed8fSIlpo Järvinen 	 * This check is to filter out the very old legacy BMC versions. In the
43603aed8fSIlpo Järvinen 	 * old BMC chips, the BMC version info is stored in the old version
44bcababfcSIlpo Järvinen 	 * register (M10BMC_N3000_LEGACY_BUILD_VER), so its read out value would have
45bcababfcSIlpo Järvinen 	 * not been M10BMC_N3000_VER_LEGACY_INVALID (0xffffffff). But in new BMC
46603aed8fSIlpo Järvinen 	 * chips that the driver supports, the value of this register should be
47bcababfcSIlpo Järvinen 	 * M10BMC_N3000_VER_LEGACY_INVALID.
48603aed8fSIlpo Järvinen 	 */
49bcababfcSIlpo Järvinen 	ret = m10bmc_raw_read(ddata, M10BMC_N3000_LEGACY_BUILD_VER, &v);
50603aed8fSIlpo Järvinen 	if (ret)
51603aed8fSIlpo Järvinen 		return -ENODEV;
52603aed8fSIlpo Järvinen 
53bcababfcSIlpo Järvinen 	if (v != M10BMC_N3000_VER_LEGACY_INVALID) {
54603aed8fSIlpo Järvinen 		dev_err(ddata->dev, "bad version M10BMC detected\n");
55603aed8fSIlpo Järvinen 		return -ENODEV;
56603aed8fSIlpo Järvinen 	}
57603aed8fSIlpo Järvinen 
58603aed8fSIlpo Järvinen 	return 0;
59603aed8fSIlpo Järvinen }
60603aed8fSIlpo Järvinen 
intel_m10_bmc_spi_probe(struct spi_device * spi)61603aed8fSIlpo Järvinen static int intel_m10_bmc_spi_probe(struct spi_device *spi)
62603aed8fSIlpo Järvinen {
63603aed8fSIlpo Järvinen 	const struct spi_device_id *id = spi_get_device_id(spi);
64603aed8fSIlpo Järvinen 	const struct intel_m10bmc_platform_info *info;
65603aed8fSIlpo Järvinen 	struct device *dev = &spi->dev;
66603aed8fSIlpo Järvinen 	struct intel_m10bmc *ddata;
67603aed8fSIlpo Järvinen 	int ret;
68603aed8fSIlpo Järvinen 
69603aed8fSIlpo Järvinen 	ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
70603aed8fSIlpo Järvinen 	if (!ddata)
71603aed8fSIlpo Järvinen 		return -ENOMEM;
72603aed8fSIlpo Järvinen 
73603aed8fSIlpo Järvinen 	info = (struct intel_m10bmc_platform_info *)id->driver_data;
74603aed8fSIlpo Järvinen 	ddata->dev = dev;
75603aed8fSIlpo Järvinen 
76603aed8fSIlpo Järvinen 	ddata->regmap = devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config);
77603aed8fSIlpo Järvinen 	if (IS_ERR(ddata->regmap)) {
78603aed8fSIlpo Järvinen 		ret = PTR_ERR(ddata->regmap);
79603aed8fSIlpo Järvinen 		dev_err(dev, "Failed to allocate regmap: %d\n", ret);
80603aed8fSIlpo Järvinen 		return ret;
81603aed8fSIlpo Järvinen 	}
82603aed8fSIlpo Järvinen 
83603aed8fSIlpo Järvinen 	spi_set_drvdata(spi, ddata);
84603aed8fSIlpo Järvinen 
85603aed8fSIlpo Järvinen 	ret = check_m10bmc_version(ddata);
86603aed8fSIlpo Järvinen 	if (ret) {
87603aed8fSIlpo Järvinen 		dev_err(dev, "Failed to identify m10bmc hardware\n");
88603aed8fSIlpo Järvinen 		return ret;
89603aed8fSIlpo Järvinen 	}
90603aed8fSIlpo Järvinen 
91603aed8fSIlpo Järvinen 	return m10bmc_dev_init(ddata, info);
92603aed8fSIlpo Järvinen }
93603aed8fSIlpo Järvinen 
946052a005SIlpo Järvinen static const struct m10bmc_csr_map m10bmc_n3000_csr_map = {
95bcababfcSIlpo Järvinen 	.base = M10BMC_N3000_SYS_BASE,
96bcababfcSIlpo Järvinen 	.build_version = M10BMC_N3000_BUILD_VER,
97bcababfcSIlpo Järvinen 	.fw_version = NIOS2_N3000_FW_VERSION,
98bcababfcSIlpo Järvinen 	.mac_low = M10BMC_N3000_MAC_LOW,
99bcababfcSIlpo Järvinen 	.mac_high = M10BMC_N3000_MAC_HIGH,
100bcababfcSIlpo Järvinen 	.doorbell = M10BMC_N3000_DOORBELL,
101bcababfcSIlpo Järvinen 	.auth_result = M10BMC_N3000_AUTH_RESULT,
102bcababfcSIlpo Järvinen 	.bmc_prog_addr = M10BMC_N3000_BMC_PROG_ADDR,
103bcababfcSIlpo Järvinen 	.bmc_reh_addr = M10BMC_N3000_BMC_REH_ADDR,
104bcababfcSIlpo Järvinen 	.bmc_magic = M10BMC_N3000_BMC_PROG_MAGIC,
105bcababfcSIlpo Järvinen 	.sr_prog_addr = M10BMC_N3000_SR_PROG_ADDR,
106bcababfcSIlpo Järvinen 	.sr_reh_addr = M10BMC_N3000_SR_REH_ADDR,
107bcababfcSIlpo Järvinen 	.sr_magic = M10BMC_N3000_SR_PROG_MAGIC,
108bcababfcSIlpo Järvinen 	.pr_prog_addr = M10BMC_N3000_PR_PROG_ADDR,
109bcababfcSIlpo Järvinen 	.pr_reh_addr = M10BMC_N3000_PR_REH_ADDR,
110bcababfcSIlpo Järvinen 	.pr_magic = M10BMC_N3000_PR_PROG_MAGIC,
111bcababfcSIlpo Järvinen 	.rsu_update_counter = M10BMC_N3000_STAGING_FLASH_COUNT,
1126052a005SIlpo Järvinen };
1136052a005SIlpo Järvinen 
114603aed8fSIlpo Järvinen static struct mfd_cell m10bmc_d5005_subdevs[] = {
115603aed8fSIlpo Järvinen 	{ .name = "d5005bmc-hwmon" },
116603aed8fSIlpo Järvinen 	{ .name = "d5005bmc-sec-update" },
117603aed8fSIlpo Järvinen };
118603aed8fSIlpo Järvinen 
119*867cae44SIlpo Järvinen static const struct regmap_range m10bmc_d5005_fw_handshake_regs[] = {
120*867cae44SIlpo Järvinen 	regmap_reg_range(M10BMC_N3000_TELEM_START, M10BMC_D5005_TELEM_END),
121*867cae44SIlpo Järvinen };
122*867cae44SIlpo Järvinen 
123603aed8fSIlpo Järvinen static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
124603aed8fSIlpo Järvinen 	{ .name = "n3000bmc-hwmon" },
125603aed8fSIlpo Järvinen 	{ .name = "n3000bmc-retimer" },
126603aed8fSIlpo Järvinen 	{ .name = "n3000bmc-sec-update" },
127603aed8fSIlpo Järvinen };
128603aed8fSIlpo Järvinen 
129*867cae44SIlpo Järvinen static const struct regmap_range m10bmc_n3000_fw_handshake_regs[] = {
130*867cae44SIlpo Järvinen 	regmap_reg_range(M10BMC_N3000_TELEM_START, M10BMC_N3000_TELEM_END),
131*867cae44SIlpo Järvinen };
132*867cae44SIlpo Järvinen 
133603aed8fSIlpo Järvinen static struct mfd_cell m10bmc_n5010_subdevs[] = {
134603aed8fSIlpo Järvinen 	{ .name = "n5010bmc-hwmon" },
135603aed8fSIlpo Järvinen };
136603aed8fSIlpo Järvinen 
137603aed8fSIlpo Järvinen static const struct intel_m10bmc_platform_info m10bmc_spi_n3000 = {
138603aed8fSIlpo Järvinen 	.cells = m10bmc_pacn3000_subdevs,
139603aed8fSIlpo Järvinen 	.n_cells = ARRAY_SIZE(m10bmc_pacn3000_subdevs),
140*867cae44SIlpo Järvinen 	.handshake_sys_reg_ranges = m10bmc_n3000_fw_handshake_regs,
141*867cae44SIlpo Järvinen 	.handshake_sys_reg_nranges = ARRAY_SIZE(m10bmc_n3000_fw_handshake_regs),
1426052a005SIlpo Järvinen 	.csr_map = &m10bmc_n3000_csr_map,
143603aed8fSIlpo Järvinen };
144603aed8fSIlpo Järvinen 
145603aed8fSIlpo Järvinen static const struct intel_m10bmc_platform_info m10bmc_spi_d5005 = {
146603aed8fSIlpo Järvinen 	.cells = m10bmc_d5005_subdevs,
147603aed8fSIlpo Järvinen 	.n_cells = ARRAY_SIZE(m10bmc_d5005_subdevs),
148*867cae44SIlpo Järvinen 	.handshake_sys_reg_ranges = m10bmc_d5005_fw_handshake_regs,
149*867cae44SIlpo Järvinen 	.handshake_sys_reg_nranges = ARRAY_SIZE(m10bmc_d5005_fw_handshake_regs),
1506052a005SIlpo Järvinen 	.csr_map = &m10bmc_n3000_csr_map,
151603aed8fSIlpo Järvinen };
152603aed8fSIlpo Järvinen 
153603aed8fSIlpo Järvinen static const struct intel_m10bmc_platform_info m10bmc_spi_n5010 = {
154603aed8fSIlpo Järvinen 	.cells = m10bmc_n5010_subdevs,
155603aed8fSIlpo Järvinen 	.n_cells = ARRAY_SIZE(m10bmc_n5010_subdevs),
156*867cae44SIlpo Järvinen 	.handshake_sys_reg_ranges = m10bmc_n3000_fw_handshake_regs,
157*867cae44SIlpo Järvinen 	.handshake_sys_reg_nranges = ARRAY_SIZE(m10bmc_n3000_fw_handshake_regs),
1586052a005SIlpo Järvinen 	.csr_map = &m10bmc_n3000_csr_map,
159603aed8fSIlpo Järvinen };
160603aed8fSIlpo Järvinen 
161603aed8fSIlpo Järvinen static const struct spi_device_id m10bmc_spi_id[] = {
162603aed8fSIlpo Järvinen 	{ "m10-n3000", (kernel_ulong_t)&m10bmc_spi_n3000 },
163603aed8fSIlpo Järvinen 	{ "m10-d5005", (kernel_ulong_t)&m10bmc_spi_d5005 },
164603aed8fSIlpo Järvinen 	{ "m10-n5010", (kernel_ulong_t)&m10bmc_spi_n5010 },
165603aed8fSIlpo Järvinen 	{ }
166603aed8fSIlpo Järvinen };
167603aed8fSIlpo Järvinen MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
168603aed8fSIlpo Järvinen 
169603aed8fSIlpo Järvinen static struct spi_driver intel_m10bmc_spi_driver = {
170603aed8fSIlpo Järvinen 	.driver = {
171603aed8fSIlpo Järvinen 		.name = "intel-m10-bmc",
172603aed8fSIlpo Järvinen 		.dev_groups = m10bmc_dev_groups,
173603aed8fSIlpo Järvinen 	},
174603aed8fSIlpo Järvinen 	.probe = intel_m10_bmc_spi_probe,
175603aed8fSIlpo Järvinen 	.id_table = m10bmc_spi_id,
176603aed8fSIlpo Järvinen };
177603aed8fSIlpo Järvinen module_spi_driver(intel_m10bmc_spi_driver);
178603aed8fSIlpo Järvinen 
179603aed8fSIlpo Järvinen MODULE_DESCRIPTION("Intel MAX 10 BMC SPI bus interface");
180603aed8fSIlpo Järvinen MODULE_AUTHOR("Intel Corporation");
181603aed8fSIlpo Järvinen MODULE_LICENSE("GPL v2");
182603aed8fSIlpo Järvinen MODULE_ALIAS("spi:intel-m10-bmc");
183b3ecc7f3SIlpo Järvinen MODULE_IMPORT_NS(INTEL_M10_BMC_CORE);
184