1 /* 2 * Driver for Motorola PCAP2 as present in EZX phones 3 * 4 * Copyright (C) 2006 Harald Welte <laforge@openezx.org> 5 * Copyright (C) 2009 Daniel Ribeiro <drwyrm@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 */ 12 13 #include <linux/module.h> 14 #include <linux/kernel.h> 15 #include <linux/platform_device.h> 16 #include <linux/interrupt.h> 17 #include <linux/irq.h> 18 #include <linux/mfd/ezx-pcap.h> 19 #include <linux/spi/spi.h> 20 #include <linux/gpio.h> 21 #include <linux/slab.h> 22 23 #define PCAP_ADC_MAXQ 8 24 struct pcap_adc_request { 25 u8 bank; 26 u8 ch[2]; 27 u32 flags; 28 void (*callback)(void *, u16[]); 29 void *data; 30 }; 31 32 struct pcap_adc_sync_request { 33 u16 res[2]; 34 struct completion completion; 35 }; 36 37 struct pcap_chip { 38 struct spi_device *spi; 39 40 /* IO */ 41 u32 buf; 42 struct mutex io_mutex; 43 44 /* IRQ */ 45 unsigned int irq_base; 46 u32 msr; 47 struct work_struct isr_work; 48 struct work_struct msr_work; 49 struct workqueue_struct *workqueue; 50 51 /* ADC */ 52 struct pcap_adc_request *adc_queue[PCAP_ADC_MAXQ]; 53 u8 adc_head; 54 u8 adc_tail; 55 struct mutex adc_mutex; 56 }; 57 58 /* IO */ 59 static int ezx_pcap_putget(struct pcap_chip *pcap, u32 *data) 60 { 61 struct spi_transfer t; 62 struct spi_message m; 63 int status; 64 65 memset(&t, 0, sizeof t); 66 spi_message_init(&m); 67 t.len = sizeof(u32); 68 spi_message_add_tail(&t, &m); 69 70 pcap->buf = *data; 71 t.tx_buf = (u8 *) &pcap->buf; 72 t.rx_buf = (u8 *) &pcap->buf; 73 status = spi_sync(pcap->spi, &m); 74 75 if (status == 0) 76 *data = pcap->buf; 77 78 return status; 79 } 80 81 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value) 82 { 83 int ret; 84 85 mutex_lock(&pcap->io_mutex); 86 value &= PCAP_REGISTER_VALUE_MASK; 87 value |= PCAP_REGISTER_WRITE_OP_BIT 88 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 89 ret = ezx_pcap_putget(pcap, &value); 90 mutex_unlock(&pcap->io_mutex); 91 92 return ret; 93 } 94 EXPORT_SYMBOL_GPL(ezx_pcap_write); 95 96 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value) 97 { 98 int ret; 99 100 mutex_lock(&pcap->io_mutex); 101 *value = PCAP_REGISTER_READ_OP_BIT 102 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 103 104 ret = ezx_pcap_putget(pcap, value); 105 mutex_unlock(&pcap->io_mutex); 106 107 return ret; 108 } 109 EXPORT_SYMBOL_GPL(ezx_pcap_read); 110 111 int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val) 112 { 113 int ret; 114 u32 tmp = PCAP_REGISTER_READ_OP_BIT | 115 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 116 117 mutex_lock(&pcap->io_mutex); 118 ret = ezx_pcap_putget(pcap, &tmp); 119 if (ret) 120 goto out_unlock; 121 122 tmp &= (PCAP_REGISTER_VALUE_MASK & ~mask); 123 tmp |= (val & mask) | PCAP_REGISTER_WRITE_OP_BIT | 124 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 125 126 ret = ezx_pcap_putget(pcap, &tmp); 127 out_unlock: 128 mutex_unlock(&pcap->io_mutex); 129 130 return ret; 131 } 132 EXPORT_SYMBOL_GPL(ezx_pcap_set_bits); 133 134 /* IRQ */ 135 int irq_to_pcap(struct pcap_chip *pcap, int irq) 136 { 137 return irq - pcap->irq_base; 138 } 139 EXPORT_SYMBOL_GPL(irq_to_pcap); 140 141 int pcap_to_irq(struct pcap_chip *pcap, int irq) 142 { 143 return pcap->irq_base + irq; 144 } 145 EXPORT_SYMBOL_GPL(pcap_to_irq); 146 147 static void pcap_mask_irq(struct irq_data *d) 148 { 149 struct pcap_chip *pcap = irq_data_get_irq_chip_data(d); 150 151 pcap->msr |= 1 << irq_to_pcap(pcap, d->irq); 152 queue_work(pcap->workqueue, &pcap->msr_work); 153 } 154 155 static void pcap_unmask_irq(struct irq_data *d) 156 { 157 struct pcap_chip *pcap = irq_data_get_irq_chip_data(d); 158 159 pcap->msr &= ~(1 << irq_to_pcap(pcap, d->irq)); 160 queue_work(pcap->workqueue, &pcap->msr_work); 161 } 162 163 static struct irq_chip pcap_irq_chip = { 164 .name = "pcap", 165 .irq_mask = pcap_mask_irq, 166 .irq_unmask = pcap_unmask_irq, 167 }; 168 169 static void pcap_msr_work(struct work_struct *work) 170 { 171 struct pcap_chip *pcap = container_of(work, struct pcap_chip, msr_work); 172 173 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); 174 } 175 176 static void pcap_isr_work(struct work_struct *work) 177 { 178 struct pcap_chip *pcap = container_of(work, struct pcap_chip, isr_work); 179 struct pcap_platform_data *pdata = pcap->spi->dev.platform_data; 180 u32 msr, isr, int_sel, service; 181 int irq; 182 183 do { 184 ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); 185 ezx_pcap_read(pcap, PCAP_REG_ISR, &isr); 186 187 /* We cant service/ack irqs that are assigned to port 2 */ 188 if (!(pdata->config & PCAP_SECOND_PORT)) { 189 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); 190 isr &= ~int_sel; 191 } 192 193 ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr); 194 ezx_pcap_write(pcap, PCAP_REG_ISR, isr); 195 196 local_irq_disable(); 197 service = isr & ~msr; 198 for (irq = pcap->irq_base; service; service >>= 1, irq++) { 199 if (service & 1) { 200 struct irq_desc *desc = irq_to_desc(irq); 201 202 if (WARN(!desc, "Invalid PCAP IRQ %d\n", irq)) 203 break; 204 205 if (desc->status & IRQ_DISABLED) 206 note_interrupt(irq, desc, IRQ_NONE); 207 else 208 desc->handle_irq(irq, desc); 209 } 210 } 211 local_irq_enable(); 212 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); 213 } while (gpio_get_value(irq_to_gpio(pcap->spi->irq))); 214 } 215 216 static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) 217 { 218 struct pcap_chip *pcap = get_irq_data(irq); 219 220 desc->irq_data.chip->irq_ack(&desc->irq_data); 221 queue_work(pcap->workqueue, &pcap->isr_work); 222 return; 223 } 224 225 /* ADC */ 226 void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits) 227 { 228 u32 tmp; 229 230 mutex_lock(&pcap->adc_mutex); 231 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 232 tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 233 tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 234 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 235 mutex_unlock(&pcap->adc_mutex); 236 } 237 EXPORT_SYMBOL_GPL(pcap_set_ts_bits); 238 239 static void pcap_disable_adc(struct pcap_chip *pcap) 240 { 241 u32 tmp; 242 243 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 244 tmp &= ~(PCAP_ADC_ADEN|PCAP_ADC_BATT_I_ADC|PCAP_ADC_BATT_I_POLARITY); 245 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 246 } 247 248 static void pcap_adc_trigger(struct pcap_chip *pcap) 249 { 250 u32 tmp; 251 u8 head; 252 253 mutex_lock(&pcap->adc_mutex); 254 head = pcap->adc_head; 255 if (!pcap->adc_queue[head]) { 256 /* queue is empty, save power */ 257 pcap_disable_adc(pcap); 258 mutex_unlock(&pcap->adc_mutex); 259 return; 260 } 261 /* start conversion on requested bank, save TS_M bits */ 262 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 263 tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 264 tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; 265 266 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) 267 tmp |= PCAP_ADC_AD_SEL1; 268 269 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 270 mutex_unlock(&pcap->adc_mutex); 271 ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); 272 } 273 274 static irqreturn_t pcap_adc_irq(int irq, void *_pcap) 275 { 276 struct pcap_chip *pcap = _pcap; 277 struct pcap_adc_request *req; 278 u16 res[2]; 279 u32 tmp; 280 281 mutex_lock(&pcap->adc_mutex); 282 req = pcap->adc_queue[pcap->adc_head]; 283 284 if (WARN(!req, "adc irq without pending request\n")) { 285 mutex_unlock(&pcap->adc_mutex); 286 return IRQ_HANDLED; 287 } 288 289 /* read requested channels results */ 290 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 291 tmp &= ~(PCAP_ADC_ADA1_MASK | PCAP_ADC_ADA2_MASK); 292 tmp |= (req->ch[0] << PCAP_ADC_ADA1_SHIFT); 293 tmp |= (req->ch[1] << PCAP_ADC_ADA2_SHIFT); 294 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 295 ezx_pcap_read(pcap, PCAP_REG_ADR, &tmp); 296 res[0] = (tmp & PCAP_ADR_ADD1_MASK) >> PCAP_ADR_ADD1_SHIFT; 297 res[1] = (tmp & PCAP_ADR_ADD2_MASK) >> PCAP_ADR_ADD2_SHIFT; 298 299 pcap->adc_queue[pcap->adc_head] = NULL; 300 pcap->adc_head = (pcap->adc_head + 1) & (PCAP_ADC_MAXQ - 1); 301 mutex_unlock(&pcap->adc_mutex); 302 303 /* pass the results and release memory */ 304 req->callback(req->data, res); 305 kfree(req); 306 307 /* trigger next conversion (if any) on queue */ 308 pcap_adc_trigger(pcap); 309 310 return IRQ_HANDLED; 311 } 312 313 int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], 314 void *callback, void *data) 315 { 316 struct pcap_adc_request *req; 317 318 /* This will be freed after we have a result */ 319 req = kmalloc(sizeof(struct pcap_adc_request), GFP_KERNEL); 320 if (!req) 321 return -ENOMEM; 322 323 req->bank = bank; 324 req->flags = flags; 325 req->ch[0] = ch[0]; 326 req->ch[1] = ch[1]; 327 req->callback = callback; 328 req->data = data; 329 330 mutex_lock(&pcap->adc_mutex); 331 if (pcap->adc_queue[pcap->adc_tail]) { 332 mutex_unlock(&pcap->adc_mutex); 333 kfree(req); 334 return -EBUSY; 335 } 336 pcap->adc_queue[pcap->adc_tail] = req; 337 pcap->adc_tail = (pcap->adc_tail + 1) & (PCAP_ADC_MAXQ - 1); 338 mutex_unlock(&pcap->adc_mutex); 339 340 /* start conversion */ 341 pcap_adc_trigger(pcap); 342 343 return 0; 344 } 345 EXPORT_SYMBOL_GPL(pcap_adc_async); 346 347 static void pcap_adc_sync_cb(void *param, u16 res[]) 348 { 349 struct pcap_adc_sync_request *req = param; 350 351 req->res[0] = res[0]; 352 req->res[1] = res[1]; 353 complete(&req->completion); 354 } 355 356 int pcap_adc_sync(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], 357 u16 res[]) 358 { 359 struct pcap_adc_sync_request sync_data; 360 int ret; 361 362 init_completion(&sync_data.completion); 363 ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb, 364 &sync_data); 365 if (ret) 366 return ret; 367 wait_for_completion(&sync_data.completion); 368 res[0] = sync_data.res[0]; 369 res[1] = sync_data.res[1]; 370 371 return 0; 372 } 373 EXPORT_SYMBOL_GPL(pcap_adc_sync); 374 375 /* subdevs */ 376 static int pcap_remove_subdev(struct device *dev, void *unused) 377 { 378 platform_device_unregister(to_platform_device(dev)); 379 return 0; 380 } 381 382 static int __devinit pcap_add_subdev(struct pcap_chip *pcap, 383 struct pcap_subdev *subdev) 384 { 385 struct platform_device *pdev; 386 int ret; 387 388 pdev = platform_device_alloc(subdev->name, subdev->id); 389 if (!pdev) 390 return -ENOMEM; 391 392 pdev->dev.parent = &pcap->spi->dev; 393 pdev->dev.platform_data = subdev->platform_data; 394 395 ret = platform_device_add(pdev); 396 if (ret) 397 platform_device_put(pdev); 398 399 return ret; 400 } 401 402 static int __devexit ezx_pcap_remove(struct spi_device *spi) 403 { 404 struct pcap_chip *pcap = dev_get_drvdata(&spi->dev); 405 struct pcap_platform_data *pdata = spi->dev.platform_data; 406 int i, adc_irq; 407 408 /* remove all registered subdevs */ 409 device_for_each_child(&spi->dev, NULL, pcap_remove_subdev); 410 411 /* cleanup ADC */ 412 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ? 413 PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE); 414 free_irq(adc_irq, pcap); 415 mutex_lock(&pcap->adc_mutex); 416 for (i = 0; i < PCAP_ADC_MAXQ; i++) 417 kfree(pcap->adc_queue[i]); 418 mutex_unlock(&pcap->adc_mutex); 419 420 /* cleanup irqchip */ 421 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 422 set_irq_chip_and_handler(i, NULL, NULL); 423 424 destroy_workqueue(pcap->workqueue); 425 426 kfree(pcap); 427 428 return 0; 429 } 430 431 static int __devinit ezx_pcap_probe(struct spi_device *spi) 432 { 433 struct pcap_platform_data *pdata = spi->dev.platform_data; 434 struct pcap_chip *pcap; 435 int i, adc_irq; 436 int ret = -ENODEV; 437 438 /* platform data is required */ 439 if (!pdata) 440 goto ret; 441 442 pcap = kzalloc(sizeof(*pcap), GFP_KERNEL); 443 if (!pcap) { 444 ret = -ENOMEM; 445 goto ret; 446 } 447 448 mutex_init(&pcap->io_mutex); 449 mutex_init(&pcap->adc_mutex); 450 INIT_WORK(&pcap->isr_work, pcap_isr_work); 451 INIT_WORK(&pcap->msr_work, pcap_msr_work); 452 dev_set_drvdata(&spi->dev, pcap); 453 454 /* setup spi */ 455 spi->bits_per_word = 32; 456 spi->mode = SPI_MODE_0 | (pdata->config & PCAP_CS_AH ? SPI_CS_HIGH : 0); 457 ret = spi_setup(spi); 458 if (ret) 459 goto free_pcap; 460 461 pcap->spi = spi; 462 463 /* setup irq */ 464 pcap->irq_base = pdata->irq_base; 465 pcap->workqueue = create_singlethread_workqueue("pcapd"); 466 if (!pcap->workqueue) { 467 ret = -ENOMEM; 468 dev_err(&spi->dev, "cant create pcap thread\n"); 469 goto free_pcap; 470 } 471 472 /* redirect interrupts to AP, except adcdone2 */ 473 if (!(pdata->config & PCAP_SECOND_PORT)) 474 ezx_pcap_write(pcap, PCAP_REG_INT_SEL, 475 (1 << PCAP_IRQ_ADCDONE2)); 476 477 /* setup irq chip */ 478 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) { 479 set_irq_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq); 480 set_irq_chip_data(i, pcap); 481 #ifdef CONFIG_ARM 482 set_irq_flags(i, IRQF_VALID); 483 #else 484 set_irq_noprobe(i); 485 #endif 486 } 487 488 /* mask/ack all PCAP interrupts */ 489 ezx_pcap_write(pcap, PCAP_REG_MSR, PCAP_MASK_ALL_INTERRUPT); 490 ezx_pcap_write(pcap, PCAP_REG_ISR, PCAP_CLEAR_INTERRUPT_REGISTER); 491 pcap->msr = PCAP_MASK_ALL_INTERRUPT; 492 493 set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING); 494 set_irq_data(spi->irq, pcap); 495 set_irq_chained_handler(spi->irq, pcap_irq_handler); 496 set_irq_wake(spi->irq, 1); 497 498 /* ADC */ 499 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ? 500 PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE); 501 502 ret = request_irq(adc_irq, pcap_adc_irq, 0, "ADC", pcap); 503 if (ret) 504 goto free_irqchip; 505 506 /* setup subdevs */ 507 for (i = 0; i < pdata->num_subdevs; i++) { 508 ret = pcap_add_subdev(pcap, &pdata->subdevs[i]); 509 if (ret) 510 goto remove_subdevs; 511 } 512 513 /* board specific quirks */ 514 if (pdata->init) 515 pdata->init(pcap); 516 517 return 0; 518 519 remove_subdevs: 520 device_for_each_child(&spi->dev, NULL, pcap_remove_subdev); 521 /* free_adc: */ 522 free_irq(adc_irq, pcap); 523 free_irqchip: 524 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 525 set_irq_chip_and_handler(i, NULL, NULL); 526 /* destroy_workqueue: */ 527 destroy_workqueue(pcap->workqueue); 528 free_pcap: 529 kfree(pcap); 530 ret: 531 return ret; 532 } 533 534 static struct spi_driver ezxpcap_driver = { 535 .probe = ezx_pcap_probe, 536 .remove = __devexit_p(ezx_pcap_remove), 537 .driver = { 538 .name = "ezx-pcap", 539 .owner = THIS_MODULE, 540 }, 541 }; 542 543 static int __init ezx_pcap_init(void) 544 { 545 return spi_register_driver(&ezxpcap_driver); 546 } 547 548 static void __exit ezx_pcap_exit(void) 549 { 550 spi_unregister_driver(&ezxpcap_driver); 551 } 552 553 subsys_initcall(ezx_pcap_init); 554 module_exit(ezx_pcap_exit); 555 556 MODULE_LICENSE("GPL"); 557 MODULE_AUTHOR("Daniel Ribeiro / Harald Welte"); 558 MODULE_DESCRIPTION("Motorola PCAP2 ASIC Driver"); 559 MODULE_ALIAS("spi:ezx-pcap"); 560