113a09f93SDaniel Ribeiro /* 213a09f93SDaniel Ribeiro * Driver for Motorola PCAP2 as present in EZX phones 313a09f93SDaniel Ribeiro * 413a09f93SDaniel Ribeiro * Copyright (C) 2006 Harald Welte <laforge@openezx.org> 513a09f93SDaniel Ribeiro * Copyright (C) 2009 Daniel Ribeiro <drwyrm@gmail.com> 613a09f93SDaniel Ribeiro * 713a09f93SDaniel Ribeiro * This program is free software; you can redistribute it and/or modify 813a09f93SDaniel Ribeiro * it under the terms of the GNU General Public License version 2 as 913a09f93SDaniel Ribeiro * published by the Free Software Foundation. 1013a09f93SDaniel Ribeiro * 1113a09f93SDaniel Ribeiro */ 1213a09f93SDaniel Ribeiro 1313a09f93SDaniel Ribeiro #include <linux/module.h> 1413a09f93SDaniel Ribeiro #include <linux/kernel.h> 1513a09f93SDaniel Ribeiro #include <linux/platform_device.h> 1613a09f93SDaniel Ribeiro #include <linux/interrupt.h> 1713a09f93SDaniel Ribeiro #include <linux/irq.h> 1813a09f93SDaniel Ribeiro #include <linux/mfd/ezx-pcap.h> 1913a09f93SDaniel Ribeiro #include <linux/spi/spi.h> 20b1148fd4SDaniel Ribeiro #include <linux/gpio.h> 215a0e3ad6STejun Heo #include <linux/slab.h> 2213a09f93SDaniel Ribeiro 2313a09f93SDaniel Ribeiro #define PCAP_ADC_MAXQ 8 2413a09f93SDaniel Ribeiro struct pcap_adc_request { 2513a09f93SDaniel Ribeiro u8 bank; 2613a09f93SDaniel Ribeiro u8 ch[2]; 2713a09f93SDaniel Ribeiro u32 flags; 2813a09f93SDaniel Ribeiro void (*callback)(void *, u16[]); 2913a09f93SDaniel Ribeiro void *data; 3013a09f93SDaniel Ribeiro }; 3113a09f93SDaniel Ribeiro 3213a09f93SDaniel Ribeiro struct pcap_adc_sync_request { 3313a09f93SDaniel Ribeiro u16 res[2]; 3413a09f93SDaniel Ribeiro struct completion completion; 3513a09f93SDaniel Ribeiro }; 3613a09f93SDaniel Ribeiro 3713a09f93SDaniel Ribeiro struct pcap_chip { 3813a09f93SDaniel Ribeiro struct spi_device *spi; 3913a09f93SDaniel Ribeiro 4013a09f93SDaniel Ribeiro /* IO */ 4113a09f93SDaniel Ribeiro u32 buf; 4213a09f93SDaniel Ribeiro struct mutex io_mutex; 4313a09f93SDaniel Ribeiro 4413a09f93SDaniel Ribeiro /* IRQ */ 4513a09f93SDaniel Ribeiro unsigned int irq_base; 4613a09f93SDaniel Ribeiro u32 msr; 4713a09f93SDaniel Ribeiro struct work_struct isr_work; 4813a09f93SDaniel Ribeiro struct work_struct msr_work; 4913a09f93SDaniel Ribeiro struct workqueue_struct *workqueue; 5013a09f93SDaniel Ribeiro 5113a09f93SDaniel Ribeiro /* ADC */ 5213a09f93SDaniel Ribeiro struct pcap_adc_request *adc_queue[PCAP_ADC_MAXQ]; 5313a09f93SDaniel Ribeiro u8 adc_head; 5413a09f93SDaniel Ribeiro u8 adc_tail; 5513a09f93SDaniel Ribeiro struct mutex adc_mutex; 5613a09f93SDaniel Ribeiro }; 5713a09f93SDaniel Ribeiro 5813a09f93SDaniel Ribeiro /* IO */ 5913a09f93SDaniel Ribeiro static int ezx_pcap_putget(struct pcap_chip *pcap, u32 *data) 6013a09f93SDaniel Ribeiro { 6113a09f93SDaniel Ribeiro struct spi_transfer t; 6213a09f93SDaniel Ribeiro struct spi_message m; 6313a09f93SDaniel Ribeiro int status; 6413a09f93SDaniel Ribeiro 6513a09f93SDaniel Ribeiro memset(&t, 0, sizeof t); 6613a09f93SDaniel Ribeiro spi_message_init(&m); 6713a09f93SDaniel Ribeiro t.len = sizeof(u32); 6813a09f93SDaniel Ribeiro spi_message_add_tail(&t, &m); 6913a09f93SDaniel Ribeiro 7013a09f93SDaniel Ribeiro pcap->buf = *data; 7113a09f93SDaniel Ribeiro t.tx_buf = (u8 *) &pcap->buf; 7213a09f93SDaniel Ribeiro t.rx_buf = (u8 *) &pcap->buf; 7313a09f93SDaniel Ribeiro status = spi_sync(pcap->spi, &m); 7413a09f93SDaniel Ribeiro 7513a09f93SDaniel Ribeiro if (status == 0) 7613a09f93SDaniel Ribeiro *data = pcap->buf; 7713a09f93SDaniel Ribeiro 7813a09f93SDaniel Ribeiro return status; 7913a09f93SDaniel Ribeiro } 8013a09f93SDaniel Ribeiro 8113a09f93SDaniel Ribeiro int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value) 8213a09f93SDaniel Ribeiro { 8313a09f93SDaniel Ribeiro int ret; 8413a09f93SDaniel Ribeiro 8513a09f93SDaniel Ribeiro mutex_lock(&pcap->io_mutex); 8613a09f93SDaniel Ribeiro value &= PCAP_REGISTER_VALUE_MASK; 8713a09f93SDaniel Ribeiro value |= PCAP_REGISTER_WRITE_OP_BIT 8813a09f93SDaniel Ribeiro | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 8913a09f93SDaniel Ribeiro ret = ezx_pcap_putget(pcap, &value); 9013a09f93SDaniel Ribeiro mutex_unlock(&pcap->io_mutex); 9113a09f93SDaniel Ribeiro 9213a09f93SDaniel Ribeiro return ret; 9313a09f93SDaniel Ribeiro } 9413a09f93SDaniel Ribeiro EXPORT_SYMBOL_GPL(ezx_pcap_write); 9513a09f93SDaniel Ribeiro 9613a09f93SDaniel Ribeiro int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value) 9713a09f93SDaniel Ribeiro { 9813a09f93SDaniel Ribeiro int ret; 9913a09f93SDaniel Ribeiro 10013a09f93SDaniel Ribeiro mutex_lock(&pcap->io_mutex); 10113a09f93SDaniel Ribeiro *value = PCAP_REGISTER_READ_OP_BIT 10213a09f93SDaniel Ribeiro | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 10313a09f93SDaniel Ribeiro 10413a09f93SDaniel Ribeiro ret = ezx_pcap_putget(pcap, value); 10513a09f93SDaniel Ribeiro mutex_unlock(&pcap->io_mutex); 10613a09f93SDaniel Ribeiro 10713a09f93SDaniel Ribeiro return ret; 10813a09f93SDaniel Ribeiro } 10913a09f93SDaniel Ribeiro EXPORT_SYMBOL_GPL(ezx_pcap_read); 11013a09f93SDaniel Ribeiro 111e9a22635SDaniel Ribeiro int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val) 112e9a22635SDaniel Ribeiro { 113e9a22635SDaniel Ribeiro int ret; 114e9a22635SDaniel Ribeiro u32 tmp = PCAP_REGISTER_READ_OP_BIT | 115e9a22635SDaniel Ribeiro (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 116e9a22635SDaniel Ribeiro 117e9a22635SDaniel Ribeiro mutex_lock(&pcap->io_mutex); 118e9a22635SDaniel Ribeiro ret = ezx_pcap_putget(pcap, &tmp); 119e9a22635SDaniel Ribeiro if (ret) 120e9a22635SDaniel Ribeiro goto out_unlock; 121e9a22635SDaniel Ribeiro 122e9a22635SDaniel Ribeiro tmp &= (PCAP_REGISTER_VALUE_MASK & ~mask); 123e9a22635SDaniel Ribeiro tmp |= (val & mask) | PCAP_REGISTER_WRITE_OP_BIT | 124e9a22635SDaniel Ribeiro (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); 125e9a22635SDaniel Ribeiro 126e9a22635SDaniel Ribeiro ret = ezx_pcap_putget(pcap, &tmp); 127e9a22635SDaniel Ribeiro out_unlock: 128e9a22635SDaniel Ribeiro mutex_unlock(&pcap->io_mutex); 129e9a22635SDaniel Ribeiro 130e9a22635SDaniel Ribeiro return ret; 131e9a22635SDaniel Ribeiro } 132e9a22635SDaniel Ribeiro EXPORT_SYMBOL_GPL(ezx_pcap_set_bits); 133e9a22635SDaniel Ribeiro 13413a09f93SDaniel Ribeiro /* IRQ */ 1359f7b07d6SDaniel Ribeiro int irq_to_pcap(struct pcap_chip *pcap, int irq) 13613a09f93SDaniel Ribeiro { 1379f7b07d6SDaniel Ribeiro return irq - pcap->irq_base; 13813a09f93SDaniel Ribeiro } 1399f7b07d6SDaniel Ribeiro EXPORT_SYMBOL_GPL(irq_to_pcap); 14013a09f93SDaniel Ribeiro 14113a09f93SDaniel Ribeiro int pcap_to_irq(struct pcap_chip *pcap, int irq) 14213a09f93SDaniel Ribeiro { 14313a09f93SDaniel Ribeiro return pcap->irq_base + irq; 14413a09f93SDaniel Ribeiro } 14513a09f93SDaniel Ribeiro EXPORT_SYMBOL_GPL(pcap_to_irq); 14613a09f93SDaniel Ribeiro 147c232f22fSLennert Buytenhek static void pcap_mask_irq(struct irq_data *d) 14813a09f93SDaniel Ribeiro { 149c232f22fSLennert Buytenhek struct pcap_chip *pcap = irq_data_get_irq_chip_data(d); 15013a09f93SDaniel Ribeiro 151c232f22fSLennert Buytenhek pcap->msr |= 1 << irq_to_pcap(pcap, d->irq); 15213a09f93SDaniel Ribeiro queue_work(pcap->workqueue, &pcap->msr_work); 15313a09f93SDaniel Ribeiro } 15413a09f93SDaniel Ribeiro 155c232f22fSLennert Buytenhek static void pcap_unmask_irq(struct irq_data *d) 15613a09f93SDaniel Ribeiro { 157c232f22fSLennert Buytenhek struct pcap_chip *pcap = irq_data_get_irq_chip_data(d); 15813a09f93SDaniel Ribeiro 159c232f22fSLennert Buytenhek pcap->msr &= ~(1 << irq_to_pcap(pcap, d->irq)); 16013a09f93SDaniel Ribeiro queue_work(pcap->workqueue, &pcap->msr_work); 16113a09f93SDaniel Ribeiro } 16213a09f93SDaniel Ribeiro 16313a09f93SDaniel Ribeiro static struct irq_chip pcap_irq_chip = { 16413a09f93SDaniel Ribeiro .name = "pcap", 16573a6839fSThomas Gleixner .irq_disable = pcap_mask_irq, 166c232f22fSLennert Buytenhek .irq_mask = pcap_mask_irq, 167c232f22fSLennert Buytenhek .irq_unmask = pcap_unmask_irq, 16813a09f93SDaniel Ribeiro }; 16913a09f93SDaniel Ribeiro 17013a09f93SDaniel Ribeiro static void pcap_msr_work(struct work_struct *work) 17113a09f93SDaniel Ribeiro { 17213a09f93SDaniel Ribeiro struct pcap_chip *pcap = container_of(work, struct pcap_chip, msr_work); 17313a09f93SDaniel Ribeiro 17413a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); 17513a09f93SDaniel Ribeiro } 17613a09f93SDaniel Ribeiro 17713a09f93SDaniel Ribeiro static void pcap_isr_work(struct work_struct *work) 17813a09f93SDaniel Ribeiro { 17913a09f93SDaniel Ribeiro struct pcap_chip *pcap = container_of(work, struct pcap_chip, isr_work); 18013a09f93SDaniel Ribeiro struct pcap_platform_data *pdata = pcap->spi->dev.platform_data; 18113a09f93SDaniel Ribeiro u32 msr, isr, int_sel, service; 18213a09f93SDaniel Ribeiro int irq; 18313a09f93SDaniel Ribeiro 184b1148fd4SDaniel Ribeiro do { 18513a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); 18613a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ISR, &isr); 18713a09f93SDaniel Ribeiro 18825985edcSLucas De Marchi /* We can't service/ack irqs that are assigned to port 2 */ 18913a09f93SDaniel Ribeiro if (!(pdata->config & PCAP_SECOND_PORT)) { 19013a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); 19113a09f93SDaniel Ribeiro isr &= ~int_sel; 19213a09f93SDaniel Ribeiro } 193b1148fd4SDaniel Ribeiro 194b1148fd4SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr); 19513a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ISR, isr); 19613a09f93SDaniel Ribeiro 19713a09f93SDaniel Ribeiro local_irq_disable(); 19813a09f93SDaniel Ribeiro service = isr & ~msr; 19913a09f93SDaniel Ribeiro for (irq = pcap->irq_base; service; service >>= 1, irq++) { 20073a6839fSThomas Gleixner if (service & 1) 20173a6839fSThomas Gleixner generic_handle_irq(irq); 20213a09f93SDaniel Ribeiro } 20313a09f93SDaniel Ribeiro local_irq_enable(); 204b1148fd4SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); 20559ee93a5SArnd Bergmann } while (gpio_get_value(pdata->gpio)); 20613a09f93SDaniel Ribeiro } 20713a09f93SDaniel Ribeiro 20813a09f93SDaniel Ribeiro static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) 20913a09f93SDaniel Ribeiro { 210d5bb1221SThomas Gleixner struct pcap_chip *pcap = irq_get_handler_data(irq); 21113a09f93SDaniel Ribeiro 212c232f22fSLennert Buytenhek desc->irq_data.chip->irq_ack(&desc->irq_data); 21313a09f93SDaniel Ribeiro queue_work(pcap->workqueue, &pcap->isr_work); 21413a09f93SDaniel Ribeiro return; 21513a09f93SDaniel Ribeiro } 21613a09f93SDaniel Ribeiro 21713a09f93SDaniel Ribeiro /* ADC */ 218ecd78cbdSDaniel Ribeiro void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits) 219ecd78cbdSDaniel Ribeiro { 220ecd78cbdSDaniel Ribeiro u32 tmp; 221ecd78cbdSDaniel Ribeiro 222ecd78cbdSDaniel Ribeiro mutex_lock(&pcap->adc_mutex); 223ecd78cbdSDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 224ecd78cbdSDaniel Ribeiro tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 225ecd78cbdSDaniel Ribeiro tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 226ecd78cbdSDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 227ecd78cbdSDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 228ecd78cbdSDaniel Ribeiro } 229ecd78cbdSDaniel Ribeiro EXPORT_SYMBOL_GPL(pcap_set_ts_bits); 230ecd78cbdSDaniel Ribeiro 23113a09f93SDaniel Ribeiro static void pcap_disable_adc(struct pcap_chip *pcap) 23213a09f93SDaniel Ribeiro { 23313a09f93SDaniel Ribeiro u32 tmp; 23413a09f93SDaniel Ribeiro 23513a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 23613a09f93SDaniel Ribeiro tmp &= ~(PCAP_ADC_ADEN|PCAP_ADC_BATT_I_ADC|PCAP_ADC_BATT_I_POLARITY); 23713a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 23813a09f93SDaniel Ribeiro } 23913a09f93SDaniel Ribeiro 24013a09f93SDaniel Ribeiro static void pcap_adc_trigger(struct pcap_chip *pcap) 24113a09f93SDaniel Ribeiro { 24213a09f93SDaniel Ribeiro u32 tmp; 24313a09f93SDaniel Ribeiro u8 head; 24413a09f93SDaniel Ribeiro 24513a09f93SDaniel Ribeiro mutex_lock(&pcap->adc_mutex); 24613a09f93SDaniel Ribeiro head = pcap->adc_head; 24713a09f93SDaniel Ribeiro if (!pcap->adc_queue[head]) { 24813a09f93SDaniel Ribeiro /* queue is empty, save power */ 24913a09f93SDaniel Ribeiro pcap_disable_adc(pcap); 25013a09f93SDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 25113a09f93SDaniel Ribeiro return; 25213a09f93SDaniel Ribeiro } 253ecd78cbdSDaniel Ribeiro /* start conversion on requested bank, save TS_M bits */ 254ecd78cbdSDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 255ecd78cbdSDaniel Ribeiro tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); 256ecd78cbdSDaniel Ribeiro tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; 25713a09f93SDaniel Ribeiro 25813a09f93SDaniel Ribeiro if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) 25913a09f93SDaniel Ribeiro tmp |= PCAP_ADC_AD_SEL1; 26013a09f93SDaniel Ribeiro 26113a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 262ecd78cbdSDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 26313a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); 26413a09f93SDaniel Ribeiro } 26513a09f93SDaniel Ribeiro 26613a09f93SDaniel Ribeiro static irqreturn_t pcap_adc_irq(int irq, void *_pcap) 26713a09f93SDaniel Ribeiro { 26813a09f93SDaniel Ribeiro struct pcap_chip *pcap = _pcap; 26913a09f93SDaniel Ribeiro struct pcap_adc_request *req; 27013a09f93SDaniel Ribeiro u16 res[2]; 27113a09f93SDaniel Ribeiro u32 tmp; 27213a09f93SDaniel Ribeiro 27313a09f93SDaniel Ribeiro mutex_lock(&pcap->adc_mutex); 27413a09f93SDaniel Ribeiro req = pcap->adc_queue[pcap->adc_head]; 27513a09f93SDaniel Ribeiro 276e0084aa9SJoe Perches if (WARN(!req, "adc irq without pending request\n")) { 2771c90ea2cSDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 27813a09f93SDaniel Ribeiro return IRQ_HANDLED; 2791c90ea2cSDaniel Ribeiro } 28013a09f93SDaniel Ribeiro 28113a09f93SDaniel Ribeiro /* read requested channels results */ 28213a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); 28313a09f93SDaniel Ribeiro tmp &= ~(PCAP_ADC_ADA1_MASK | PCAP_ADC_ADA2_MASK); 28413a09f93SDaniel Ribeiro tmp |= (req->ch[0] << PCAP_ADC_ADA1_SHIFT); 28513a09f93SDaniel Ribeiro tmp |= (req->ch[1] << PCAP_ADC_ADA2_SHIFT); 28613a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 28713a09f93SDaniel Ribeiro ezx_pcap_read(pcap, PCAP_REG_ADR, &tmp); 28813a09f93SDaniel Ribeiro res[0] = (tmp & PCAP_ADR_ADD1_MASK) >> PCAP_ADR_ADD1_SHIFT; 28913a09f93SDaniel Ribeiro res[1] = (tmp & PCAP_ADR_ADD2_MASK) >> PCAP_ADR_ADD2_SHIFT; 29013a09f93SDaniel Ribeiro 29113a09f93SDaniel Ribeiro pcap->adc_queue[pcap->adc_head] = NULL; 29213a09f93SDaniel Ribeiro pcap->adc_head = (pcap->adc_head + 1) & (PCAP_ADC_MAXQ - 1); 29313a09f93SDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 29413a09f93SDaniel Ribeiro 29513a09f93SDaniel Ribeiro /* pass the results and release memory */ 29613a09f93SDaniel Ribeiro req->callback(req->data, res); 29713a09f93SDaniel Ribeiro kfree(req); 29813a09f93SDaniel Ribeiro 29913a09f93SDaniel Ribeiro /* trigger next conversion (if any) on queue */ 30013a09f93SDaniel Ribeiro pcap_adc_trigger(pcap); 30113a09f93SDaniel Ribeiro 30213a09f93SDaniel Ribeiro return IRQ_HANDLED; 30313a09f93SDaniel Ribeiro } 30413a09f93SDaniel Ribeiro 30513a09f93SDaniel Ribeiro int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], 30613a09f93SDaniel Ribeiro void *callback, void *data) 30713a09f93SDaniel Ribeiro { 30813a09f93SDaniel Ribeiro struct pcap_adc_request *req; 30913a09f93SDaniel Ribeiro 31013a09f93SDaniel Ribeiro /* This will be freed after we have a result */ 31113a09f93SDaniel Ribeiro req = kmalloc(sizeof(struct pcap_adc_request), GFP_KERNEL); 31213a09f93SDaniel Ribeiro if (!req) 31313a09f93SDaniel Ribeiro return -ENOMEM; 31413a09f93SDaniel Ribeiro 31513a09f93SDaniel Ribeiro req->bank = bank; 31613a09f93SDaniel Ribeiro req->flags = flags; 31713a09f93SDaniel Ribeiro req->ch[0] = ch[0]; 31813a09f93SDaniel Ribeiro req->ch[1] = ch[1]; 31913a09f93SDaniel Ribeiro req->callback = callback; 32013a09f93SDaniel Ribeiro req->data = data; 32113a09f93SDaniel Ribeiro 32213a09f93SDaniel Ribeiro mutex_lock(&pcap->adc_mutex); 32313a09f93SDaniel Ribeiro if (pcap->adc_queue[pcap->adc_tail]) { 32413a09f93SDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 32513a09f93SDaniel Ribeiro kfree(req); 32613a09f93SDaniel Ribeiro return -EBUSY; 32713a09f93SDaniel Ribeiro } 32813a09f93SDaniel Ribeiro pcap->adc_queue[pcap->adc_tail] = req; 32913a09f93SDaniel Ribeiro pcap->adc_tail = (pcap->adc_tail + 1) & (PCAP_ADC_MAXQ - 1); 33013a09f93SDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 33113a09f93SDaniel Ribeiro 33213a09f93SDaniel Ribeiro /* start conversion */ 33313a09f93SDaniel Ribeiro pcap_adc_trigger(pcap); 33413a09f93SDaniel Ribeiro 33513a09f93SDaniel Ribeiro return 0; 33613a09f93SDaniel Ribeiro } 33713a09f93SDaniel Ribeiro EXPORT_SYMBOL_GPL(pcap_adc_async); 33813a09f93SDaniel Ribeiro 33913a09f93SDaniel Ribeiro static void pcap_adc_sync_cb(void *param, u16 res[]) 34013a09f93SDaniel Ribeiro { 34113a09f93SDaniel Ribeiro struct pcap_adc_sync_request *req = param; 34213a09f93SDaniel Ribeiro 34313a09f93SDaniel Ribeiro req->res[0] = res[0]; 34413a09f93SDaniel Ribeiro req->res[1] = res[1]; 34513a09f93SDaniel Ribeiro complete(&req->completion); 34613a09f93SDaniel Ribeiro } 34713a09f93SDaniel Ribeiro 34813a09f93SDaniel Ribeiro int pcap_adc_sync(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[], 34913a09f93SDaniel Ribeiro u16 res[]) 35013a09f93SDaniel Ribeiro { 35113a09f93SDaniel Ribeiro struct pcap_adc_sync_request sync_data; 35213a09f93SDaniel Ribeiro int ret; 35313a09f93SDaniel Ribeiro 35413a09f93SDaniel Ribeiro init_completion(&sync_data.completion); 35513a09f93SDaniel Ribeiro ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb, 35613a09f93SDaniel Ribeiro &sync_data); 35713a09f93SDaniel Ribeiro if (ret) 35813a09f93SDaniel Ribeiro return ret; 35913a09f93SDaniel Ribeiro wait_for_completion(&sync_data.completion); 36013a09f93SDaniel Ribeiro res[0] = sync_data.res[0]; 36113a09f93SDaniel Ribeiro res[1] = sync_data.res[1]; 36213a09f93SDaniel Ribeiro 36313a09f93SDaniel Ribeiro return 0; 36413a09f93SDaniel Ribeiro } 36513a09f93SDaniel Ribeiro EXPORT_SYMBOL_GPL(pcap_adc_sync); 36613a09f93SDaniel Ribeiro 36713a09f93SDaniel Ribeiro /* subdevs */ 36813a09f93SDaniel Ribeiro static int pcap_remove_subdev(struct device *dev, void *unused) 36913a09f93SDaniel Ribeiro { 37013a09f93SDaniel Ribeiro platform_device_unregister(to_platform_device(dev)); 37113a09f93SDaniel Ribeiro return 0; 37213a09f93SDaniel Ribeiro } 37313a09f93SDaniel Ribeiro 37413a09f93SDaniel Ribeiro static int __devinit pcap_add_subdev(struct pcap_chip *pcap, 37513a09f93SDaniel Ribeiro struct pcap_subdev *subdev) 37613a09f93SDaniel Ribeiro { 37713a09f93SDaniel Ribeiro struct platform_device *pdev; 37809ff21e0SAxel Lin int ret; 37913a09f93SDaniel Ribeiro 38013a09f93SDaniel Ribeiro pdev = platform_device_alloc(subdev->name, subdev->id); 38109ff21e0SAxel Lin if (!pdev) 38209ff21e0SAxel Lin return -ENOMEM; 38309ff21e0SAxel Lin 38413a09f93SDaniel Ribeiro pdev->dev.parent = &pcap->spi->dev; 38513a09f93SDaniel Ribeiro pdev->dev.platform_data = subdev->platform_data; 38613a09f93SDaniel Ribeiro 38709ff21e0SAxel Lin ret = platform_device_add(pdev); 38809ff21e0SAxel Lin if (ret) 38909ff21e0SAxel Lin platform_device_put(pdev); 39009ff21e0SAxel Lin 39109ff21e0SAxel Lin return ret; 39213a09f93SDaniel Ribeiro } 39313a09f93SDaniel Ribeiro 39413a09f93SDaniel Ribeiro static int __devexit ezx_pcap_remove(struct spi_device *spi) 39513a09f93SDaniel Ribeiro { 39613a09f93SDaniel Ribeiro struct pcap_chip *pcap = dev_get_drvdata(&spi->dev); 39713a09f93SDaniel Ribeiro struct pcap_platform_data *pdata = spi->dev.platform_data; 39813a09f93SDaniel Ribeiro int i, adc_irq; 39913a09f93SDaniel Ribeiro 40013a09f93SDaniel Ribeiro /* remove all registered subdevs */ 40113a09f93SDaniel Ribeiro device_for_each_child(&spi->dev, NULL, pcap_remove_subdev); 40213a09f93SDaniel Ribeiro 40313a09f93SDaniel Ribeiro /* cleanup ADC */ 40413a09f93SDaniel Ribeiro adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ? 40513a09f93SDaniel Ribeiro PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE); 40613a09f93SDaniel Ribeiro free_irq(adc_irq, pcap); 40713a09f93SDaniel Ribeiro mutex_lock(&pcap->adc_mutex); 40813a09f93SDaniel Ribeiro for (i = 0; i < PCAP_ADC_MAXQ; i++) 40913a09f93SDaniel Ribeiro kfree(pcap->adc_queue[i]); 41013a09f93SDaniel Ribeiro mutex_unlock(&pcap->adc_mutex); 41113a09f93SDaniel Ribeiro 41213a09f93SDaniel Ribeiro /* cleanup irqchip */ 41313a09f93SDaniel Ribeiro for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 414d5bb1221SThomas Gleixner irq_set_chip_and_handler(i, NULL, NULL); 41513a09f93SDaniel Ribeiro 41613a09f93SDaniel Ribeiro destroy_workqueue(pcap->workqueue); 41713a09f93SDaniel Ribeiro 41813a09f93SDaniel Ribeiro kfree(pcap); 41913a09f93SDaniel Ribeiro 42013a09f93SDaniel Ribeiro return 0; 42113a09f93SDaniel Ribeiro } 42213a09f93SDaniel Ribeiro 42313a09f93SDaniel Ribeiro static int __devinit ezx_pcap_probe(struct spi_device *spi) 42413a09f93SDaniel Ribeiro { 42513a09f93SDaniel Ribeiro struct pcap_platform_data *pdata = spi->dev.platform_data; 42613a09f93SDaniel Ribeiro struct pcap_chip *pcap; 42713a09f93SDaniel Ribeiro int i, adc_irq; 42813a09f93SDaniel Ribeiro int ret = -ENODEV; 42913a09f93SDaniel Ribeiro 43013a09f93SDaniel Ribeiro /* platform data is required */ 43113a09f93SDaniel Ribeiro if (!pdata) 43213a09f93SDaniel Ribeiro goto ret; 43313a09f93SDaniel Ribeiro 43413a09f93SDaniel Ribeiro pcap = kzalloc(sizeof(*pcap), GFP_KERNEL); 43513a09f93SDaniel Ribeiro if (!pcap) { 43613a09f93SDaniel Ribeiro ret = -ENOMEM; 43713a09f93SDaniel Ribeiro goto ret; 43813a09f93SDaniel Ribeiro } 43913a09f93SDaniel Ribeiro 44013a09f93SDaniel Ribeiro mutex_init(&pcap->io_mutex); 44113a09f93SDaniel Ribeiro mutex_init(&pcap->adc_mutex); 44213a09f93SDaniel Ribeiro INIT_WORK(&pcap->isr_work, pcap_isr_work); 44313a09f93SDaniel Ribeiro INIT_WORK(&pcap->msr_work, pcap_msr_work); 44413a09f93SDaniel Ribeiro dev_set_drvdata(&spi->dev, pcap); 44513a09f93SDaniel Ribeiro 44613a09f93SDaniel Ribeiro /* setup spi */ 44713a09f93SDaniel Ribeiro spi->bits_per_word = 32; 44813a09f93SDaniel Ribeiro spi->mode = SPI_MODE_0 | (pdata->config & PCAP_CS_AH ? SPI_CS_HIGH : 0); 44913a09f93SDaniel Ribeiro ret = spi_setup(spi); 45013a09f93SDaniel Ribeiro if (ret) 45113a09f93SDaniel Ribeiro goto free_pcap; 45213a09f93SDaniel Ribeiro 45313a09f93SDaniel Ribeiro pcap->spi = spi; 45413a09f93SDaniel Ribeiro 45513a09f93SDaniel Ribeiro /* setup irq */ 45613a09f93SDaniel Ribeiro pcap->irq_base = pdata->irq_base; 45713a09f93SDaniel Ribeiro pcap->workqueue = create_singlethread_workqueue("pcapd"); 45813a09f93SDaniel Ribeiro if (!pcap->workqueue) { 45947dabaeeSAxel Lin ret = -ENOMEM; 46025985edcSLucas De Marchi dev_err(&spi->dev, "can't create pcap thread\n"); 46113a09f93SDaniel Ribeiro goto free_pcap; 46213a09f93SDaniel Ribeiro } 46313a09f93SDaniel Ribeiro 46413a09f93SDaniel Ribeiro /* redirect interrupts to AP, except adcdone2 */ 46513a09f93SDaniel Ribeiro if (!(pdata->config & PCAP_SECOND_PORT)) 46613a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_INT_SEL, 46713a09f93SDaniel Ribeiro (1 << PCAP_IRQ_ADCDONE2)); 46813a09f93SDaniel Ribeiro 46913a09f93SDaniel Ribeiro /* setup irq chip */ 47013a09f93SDaniel Ribeiro for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) { 471d5bb1221SThomas Gleixner irq_set_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq); 472d5bb1221SThomas Gleixner irq_set_chip_data(i, pcap); 47313a09f93SDaniel Ribeiro #ifdef CONFIG_ARM 47413a09f93SDaniel Ribeiro set_irq_flags(i, IRQF_VALID); 47513a09f93SDaniel Ribeiro #else 476d5bb1221SThomas Gleixner irq_set_noprobe(i); 47713a09f93SDaniel Ribeiro #endif 47813a09f93SDaniel Ribeiro } 47913a09f93SDaniel Ribeiro 48013a09f93SDaniel Ribeiro /* mask/ack all PCAP interrupts */ 48113a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_MSR, PCAP_MASK_ALL_INTERRUPT); 48213a09f93SDaniel Ribeiro ezx_pcap_write(pcap, PCAP_REG_ISR, PCAP_CLEAR_INTERRUPT_REGISTER); 48313a09f93SDaniel Ribeiro pcap->msr = PCAP_MASK_ALL_INTERRUPT; 48413a09f93SDaniel Ribeiro 485d5bb1221SThomas Gleixner irq_set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING); 486d5bb1221SThomas Gleixner irq_set_handler_data(spi->irq, pcap); 487d5bb1221SThomas Gleixner irq_set_chained_handler(spi->irq, pcap_irq_handler); 488d5bb1221SThomas Gleixner irq_set_irq_wake(spi->irq, 1); 48913a09f93SDaniel Ribeiro 49013a09f93SDaniel Ribeiro /* ADC */ 49113a09f93SDaniel Ribeiro adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ? 49213a09f93SDaniel Ribeiro PCAP_IRQ_ADCDONE2 : PCAP_IRQ_ADCDONE); 49313a09f93SDaniel Ribeiro 49413a09f93SDaniel Ribeiro ret = request_irq(adc_irq, pcap_adc_irq, 0, "ADC", pcap); 49513a09f93SDaniel Ribeiro if (ret) 49613a09f93SDaniel Ribeiro goto free_irqchip; 49713a09f93SDaniel Ribeiro 49813a09f93SDaniel Ribeiro /* setup subdevs */ 49913a09f93SDaniel Ribeiro for (i = 0; i < pdata->num_subdevs; i++) { 50013a09f93SDaniel Ribeiro ret = pcap_add_subdev(pcap, &pdata->subdevs[i]); 50113a09f93SDaniel Ribeiro if (ret) 50213a09f93SDaniel Ribeiro goto remove_subdevs; 50313a09f93SDaniel Ribeiro } 50413a09f93SDaniel Ribeiro 50513a09f93SDaniel Ribeiro /* board specific quirks */ 50613a09f93SDaniel Ribeiro if (pdata->init) 50713a09f93SDaniel Ribeiro pdata->init(pcap); 50813a09f93SDaniel Ribeiro 50913a09f93SDaniel Ribeiro return 0; 51013a09f93SDaniel Ribeiro 51113a09f93SDaniel Ribeiro remove_subdevs: 51213a09f93SDaniel Ribeiro device_for_each_child(&spi->dev, NULL, pcap_remove_subdev); 51313a09f93SDaniel Ribeiro /* free_adc: */ 51413a09f93SDaniel Ribeiro free_irq(adc_irq, pcap); 51513a09f93SDaniel Ribeiro free_irqchip: 51613a09f93SDaniel Ribeiro for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 517d5bb1221SThomas Gleixner irq_set_chip_and_handler(i, NULL, NULL); 51813a09f93SDaniel Ribeiro /* destroy_workqueue: */ 51913a09f93SDaniel Ribeiro destroy_workqueue(pcap->workqueue); 52013a09f93SDaniel Ribeiro free_pcap: 52113a09f93SDaniel Ribeiro kfree(pcap); 52213a09f93SDaniel Ribeiro ret: 52313a09f93SDaniel Ribeiro return ret; 52413a09f93SDaniel Ribeiro } 52513a09f93SDaniel Ribeiro 52613a09f93SDaniel Ribeiro static struct spi_driver ezxpcap_driver = { 52713a09f93SDaniel Ribeiro .probe = ezx_pcap_probe, 52813a09f93SDaniel Ribeiro .remove = __devexit_p(ezx_pcap_remove), 52913a09f93SDaniel Ribeiro .driver = { 53013a09f93SDaniel Ribeiro .name = "ezx-pcap", 53113a09f93SDaniel Ribeiro .owner = THIS_MODULE, 53213a09f93SDaniel Ribeiro }, 53313a09f93SDaniel Ribeiro }; 53413a09f93SDaniel Ribeiro 53513a09f93SDaniel Ribeiro static int __init ezx_pcap_init(void) 53613a09f93SDaniel Ribeiro { 53713a09f93SDaniel Ribeiro return spi_register_driver(&ezxpcap_driver); 53813a09f93SDaniel Ribeiro } 53913a09f93SDaniel Ribeiro 54013a09f93SDaniel Ribeiro static void __exit ezx_pcap_exit(void) 54113a09f93SDaniel Ribeiro { 54213a09f93SDaniel Ribeiro spi_unregister_driver(&ezxpcap_driver); 54313a09f93SDaniel Ribeiro } 54413a09f93SDaniel Ribeiro 545f078237bSAntonio Ospite subsys_initcall(ezx_pcap_init); 54613a09f93SDaniel Ribeiro module_exit(ezx_pcap_exit); 54713a09f93SDaniel Ribeiro 54813a09f93SDaniel Ribeiro MODULE_LICENSE("GPL"); 54913a09f93SDaniel Ribeiro MODULE_AUTHOR("Daniel Ribeiro / Harald Welte"); 55013a09f93SDaniel Ribeiro MODULE_DESCRIPTION("Motorola PCAP2 ASIC Driver"); 551e0626e38SAnton Vorontsov MODULE_ALIAS("spi:ezx-pcap"); 552