12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
22896434cSAshish Jangam /*
32896434cSAshish Jangam * Device access for Dialog DA9055 PMICs.
42896434cSAshish Jangam *
52896434cSAshish Jangam * Copyright(c) 2012 Dialog Semiconductor Ltd.
62896434cSAshish Jangam *
72896434cSAshish Jangam * Author: David Dajun Chen <dchen@diasemi.com>
82896434cSAshish Jangam */
92896434cSAshish Jangam
102896434cSAshish Jangam #include <linux/module.h>
112896434cSAshish Jangam #include <linux/device.h>
122896434cSAshish Jangam #include <linux/input.h>
132896434cSAshish Jangam #include <linux/irq.h>
142896434cSAshish Jangam #include <linux/mutex.h>
152896434cSAshish Jangam
162896434cSAshish Jangam #include <linux/mfd/core.h>
172896434cSAshish Jangam #include <linux/mfd/da9055/core.h>
182896434cSAshish Jangam #include <linux/mfd/da9055/pdata.h>
192896434cSAshish Jangam #include <linux/mfd/da9055/reg.h>
202896434cSAshish Jangam
212896434cSAshish Jangam #define DA9055_IRQ_NONKEY_MASK 0x01
222896434cSAshish Jangam #define DA9055_IRQ_ALM_MASK 0x02
232896434cSAshish Jangam #define DA9055_IRQ_TICK_MASK 0x04
242896434cSAshish Jangam #define DA9055_IRQ_ADC_MASK 0x08
252896434cSAshish Jangam #define DA9055_IRQ_BUCK_ILIM_MASK 0x08
262896434cSAshish Jangam
da9055_register_readable(struct device * dev,unsigned int reg)272896434cSAshish Jangam static bool da9055_register_readable(struct device *dev, unsigned int reg)
282896434cSAshish Jangam {
292896434cSAshish Jangam switch (reg) {
302896434cSAshish Jangam case DA9055_REG_STATUS_A:
312896434cSAshish Jangam case DA9055_REG_STATUS_B:
322896434cSAshish Jangam case DA9055_REG_EVENT_A:
332896434cSAshish Jangam case DA9055_REG_EVENT_B:
342896434cSAshish Jangam case DA9055_REG_EVENT_C:
352896434cSAshish Jangam case DA9055_REG_IRQ_MASK_A:
362896434cSAshish Jangam case DA9055_REG_IRQ_MASK_B:
372896434cSAshish Jangam case DA9055_REG_IRQ_MASK_C:
382896434cSAshish Jangam
392896434cSAshish Jangam case DA9055_REG_CONTROL_A:
402896434cSAshish Jangam case DA9055_REG_CONTROL_B:
412896434cSAshish Jangam case DA9055_REG_CONTROL_C:
422896434cSAshish Jangam case DA9055_REG_CONTROL_D:
432896434cSAshish Jangam case DA9055_REG_CONTROL_E:
442896434cSAshish Jangam
452896434cSAshish Jangam case DA9055_REG_ADC_MAN:
462896434cSAshish Jangam case DA9055_REG_ADC_CONT:
472896434cSAshish Jangam case DA9055_REG_VSYS_MON:
482896434cSAshish Jangam case DA9055_REG_ADC_RES_L:
492896434cSAshish Jangam case DA9055_REG_ADC_RES_H:
502896434cSAshish Jangam case DA9055_REG_VSYS_RES:
512896434cSAshish Jangam case DA9055_REG_ADCIN1_RES:
522896434cSAshish Jangam case DA9055_REG_ADCIN2_RES:
532896434cSAshish Jangam case DA9055_REG_ADCIN3_RES:
542896434cSAshish Jangam
552896434cSAshish Jangam case DA9055_REG_COUNT_S:
562896434cSAshish Jangam case DA9055_REG_COUNT_MI:
572896434cSAshish Jangam case DA9055_REG_COUNT_H:
582896434cSAshish Jangam case DA9055_REG_COUNT_D:
592896434cSAshish Jangam case DA9055_REG_COUNT_MO:
602896434cSAshish Jangam case DA9055_REG_COUNT_Y:
612896434cSAshish Jangam case DA9055_REG_ALARM_H:
622896434cSAshish Jangam case DA9055_REG_ALARM_D:
632896434cSAshish Jangam case DA9055_REG_ALARM_MI:
642896434cSAshish Jangam case DA9055_REG_ALARM_MO:
652896434cSAshish Jangam case DA9055_REG_ALARM_Y:
662896434cSAshish Jangam
672896434cSAshish Jangam case DA9055_REG_GPIO0_1:
682896434cSAshish Jangam case DA9055_REG_GPIO2:
692896434cSAshish Jangam case DA9055_REG_GPIO_MODE0_2:
702896434cSAshish Jangam
712896434cSAshish Jangam case DA9055_REG_BCORE_CONT:
722896434cSAshish Jangam case DA9055_REG_BMEM_CONT:
732896434cSAshish Jangam case DA9055_REG_LDO1_CONT:
742896434cSAshish Jangam case DA9055_REG_LDO2_CONT:
752896434cSAshish Jangam case DA9055_REG_LDO3_CONT:
762896434cSAshish Jangam case DA9055_REG_LDO4_CONT:
772896434cSAshish Jangam case DA9055_REG_LDO5_CONT:
782896434cSAshish Jangam case DA9055_REG_LDO6_CONT:
792896434cSAshish Jangam case DA9055_REG_BUCK_LIM:
802896434cSAshish Jangam case DA9055_REG_BCORE_MODE:
812896434cSAshish Jangam case DA9055_REG_VBCORE_A:
822896434cSAshish Jangam case DA9055_REG_VBMEM_A:
832896434cSAshish Jangam case DA9055_REG_VLDO1_A:
842896434cSAshish Jangam case DA9055_REG_VLDO2_A:
852896434cSAshish Jangam case DA9055_REG_VLDO3_A:
862896434cSAshish Jangam case DA9055_REG_VLDO4_A:
872896434cSAshish Jangam case DA9055_REG_VLDO5_A:
882896434cSAshish Jangam case DA9055_REG_VLDO6_A:
892896434cSAshish Jangam case DA9055_REG_VBCORE_B:
902896434cSAshish Jangam case DA9055_REG_VBMEM_B:
912896434cSAshish Jangam case DA9055_REG_VLDO1_B:
922896434cSAshish Jangam case DA9055_REG_VLDO2_B:
932896434cSAshish Jangam case DA9055_REG_VLDO3_B:
942896434cSAshish Jangam case DA9055_REG_VLDO4_B:
952896434cSAshish Jangam case DA9055_REG_VLDO5_B:
962896434cSAshish Jangam case DA9055_REG_VLDO6_B:
972896434cSAshish Jangam return true;
982896434cSAshish Jangam default:
992896434cSAshish Jangam return false;
1002896434cSAshish Jangam }
1012896434cSAshish Jangam }
1022896434cSAshish Jangam
da9055_register_writeable(struct device * dev,unsigned int reg)1032896434cSAshish Jangam static bool da9055_register_writeable(struct device *dev, unsigned int reg)
1042896434cSAshish Jangam {
1052896434cSAshish Jangam switch (reg) {
1062896434cSAshish Jangam case DA9055_REG_STATUS_A:
1072896434cSAshish Jangam case DA9055_REG_STATUS_B:
1082896434cSAshish Jangam case DA9055_REG_EVENT_A:
1092896434cSAshish Jangam case DA9055_REG_EVENT_B:
1102896434cSAshish Jangam case DA9055_REG_EVENT_C:
1112896434cSAshish Jangam case DA9055_REG_IRQ_MASK_A:
1122896434cSAshish Jangam case DA9055_REG_IRQ_MASK_B:
1132896434cSAshish Jangam case DA9055_REG_IRQ_MASK_C:
1142896434cSAshish Jangam
1152896434cSAshish Jangam case DA9055_REG_CONTROL_A:
1162896434cSAshish Jangam case DA9055_REG_CONTROL_B:
1172896434cSAshish Jangam case DA9055_REG_CONTROL_C:
1182896434cSAshish Jangam case DA9055_REG_CONTROL_D:
1192896434cSAshish Jangam case DA9055_REG_CONTROL_E:
1202896434cSAshish Jangam
1212896434cSAshish Jangam case DA9055_REG_ADC_MAN:
1222896434cSAshish Jangam case DA9055_REG_ADC_CONT:
1232896434cSAshish Jangam case DA9055_REG_VSYS_MON:
1242896434cSAshish Jangam case DA9055_REG_ADC_RES_L:
1252896434cSAshish Jangam case DA9055_REG_ADC_RES_H:
1262896434cSAshish Jangam case DA9055_REG_VSYS_RES:
1272896434cSAshish Jangam case DA9055_REG_ADCIN1_RES:
1282896434cSAshish Jangam case DA9055_REG_ADCIN2_RES:
1292896434cSAshish Jangam case DA9055_REG_ADCIN3_RES:
1302896434cSAshish Jangam
1312896434cSAshish Jangam case DA9055_REG_COUNT_S:
1322896434cSAshish Jangam case DA9055_REG_COUNT_MI:
1332896434cSAshish Jangam case DA9055_REG_COUNT_H:
1342896434cSAshish Jangam case DA9055_REG_COUNT_D:
1352896434cSAshish Jangam case DA9055_REG_COUNT_MO:
1362896434cSAshish Jangam case DA9055_REG_COUNT_Y:
1372896434cSAshish Jangam case DA9055_REG_ALARM_H:
1382896434cSAshish Jangam case DA9055_REG_ALARM_D:
1392896434cSAshish Jangam case DA9055_REG_ALARM_MI:
1402896434cSAshish Jangam case DA9055_REG_ALARM_MO:
1412896434cSAshish Jangam case DA9055_REG_ALARM_Y:
1422896434cSAshish Jangam
1432896434cSAshish Jangam case DA9055_REG_GPIO0_1:
1442896434cSAshish Jangam case DA9055_REG_GPIO2:
1452896434cSAshish Jangam case DA9055_REG_GPIO_MODE0_2:
1462896434cSAshish Jangam
1472896434cSAshish Jangam case DA9055_REG_BCORE_CONT:
1482896434cSAshish Jangam case DA9055_REG_BMEM_CONT:
1492896434cSAshish Jangam case DA9055_REG_LDO1_CONT:
1502896434cSAshish Jangam case DA9055_REG_LDO2_CONT:
1512896434cSAshish Jangam case DA9055_REG_LDO3_CONT:
1522896434cSAshish Jangam case DA9055_REG_LDO4_CONT:
1532896434cSAshish Jangam case DA9055_REG_LDO5_CONT:
1542896434cSAshish Jangam case DA9055_REG_LDO6_CONT:
1552896434cSAshish Jangam case DA9055_REG_BUCK_LIM:
1562896434cSAshish Jangam case DA9055_REG_BCORE_MODE:
1572896434cSAshish Jangam case DA9055_REG_VBCORE_A:
1582896434cSAshish Jangam case DA9055_REG_VBMEM_A:
1592896434cSAshish Jangam case DA9055_REG_VLDO1_A:
1602896434cSAshish Jangam case DA9055_REG_VLDO2_A:
1612896434cSAshish Jangam case DA9055_REG_VLDO3_A:
1622896434cSAshish Jangam case DA9055_REG_VLDO4_A:
1632896434cSAshish Jangam case DA9055_REG_VLDO5_A:
1642896434cSAshish Jangam case DA9055_REG_VLDO6_A:
1652896434cSAshish Jangam case DA9055_REG_VBCORE_B:
1662896434cSAshish Jangam case DA9055_REG_VBMEM_B:
1672896434cSAshish Jangam case DA9055_REG_VLDO1_B:
1682896434cSAshish Jangam case DA9055_REG_VLDO2_B:
1692896434cSAshish Jangam case DA9055_REG_VLDO3_B:
1702896434cSAshish Jangam case DA9055_REG_VLDO4_B:
1712896434cSAshish Jangam case DA9055_REG_VLDO5_B:
1722896434cSAshish Jangam case DA9055_REG_VLDO6_B:
1732896434cSAshish Jangam return true;
1742896434cSAshish Jangam default:
1752896434cSAshish Jangam return false;
1762896434cSAshish Jangam }
1772896434cSAshish Jangam }
1782896434cSAshish Jangam
da9055_register_volatile(struct device * dev,unsigned int reg)1792896434cSAshish Jangam static bool da9055_register_volatile(struct device *dev, unsigned int reg)
1802896434cSAshish Jangam {
1812896434cSAshish Jangam switch (reg) {
1822896434cSAshish Jangam case DA9055_REG_STATUS_A:
1832896434cSAshish Jangam case DA9055_REG_STATUS_B:
1842896434cSAshish Jangam case DA9055_REG_EVENT_A:
1852896434cSAshish Jangam case DA9055_REG_EVENT_B:
1862896434cSAshish Jangam case DA9055_REG_EVENT_C:
1872896434cSAshish Jangam
1882896434cSAshish Jangam case DA9055_REG_CONTROL_A:
1892896434cSAshish Jangam case DA9055_REG_CONTROL_E:
1902896434cSAshish Jangam
1912896434cSAshish Jangam case DA9055_REG_ADC_MAN:
1922896434cSAshish Jangam case DA9055_REG_ADC_RES_L:
1932896434cSAshish Jangam case DA9055_REG_ADC_RES_H:
1942896434cSAshish Jangam case DA9055_REG_VSYS_RES:
1952896434cSAshish Jangam case DA9055_REG_ADCIN1_RES:
1962896434cSAshish Jangam case DA9055_REG_ADCIN2_RES:
1972896434cSAshish Jangam case DA9055_REG_ADCIN3_RES:
1982896434cSAshish Jangam
1992896434cSAshish Jangam case DA9055_REG_COUNT_S:
2002896434cSAshish Jangam case DA9055_REG_COUNT_MI:
2012896434cSAshish Jangam case DA9055_REG_COUNT_H:
2022896434cSAshish Jangam case DA9055_REG_COUNT_D:
2032896434cSAshish Jangam case DA9055_REG_COUNT_MO:
2042896434cSAshish Jangam case DA9055_REG_COUNT_Y:
2052896434cSAshish Jangam case DA9055_REG_ALARM_MI:
2062896434cSAshish Jangam
2072896434cSAshish Jangam case DA9055_REG_BCORE_CONT:
2082896434cSAshish Jangam case DA9055_REG_BMEM_CONT:
2092896434cSAshish Jangam case DA9055_REG_LDO1_CONT:
2102896434cSAshish Jangam case DA9055_REG_LDO2_CONT:
2112896434cSAshish Jangam case DA9055_REG_LDO3_CONT:
2122896434cSAshish Jangam case DA9055_REG_LDO4_CONT:
2132896434cSAshish Jangam case DA9055_REG_LDO5_CONT:
2142896434cSAshish Jangam case DA9055_REG_LDO6_CONT:
2152896434cSAshish Jangam return true;
2162896434cSAshish Jangam default:
2172896434cSAshish Jangam return false;
2182896434cSAshish Jangam }
2192896434cSAshish Jangam }
2202896434cSAshish Jangam
2217ce7b26fSKrzysztof Kozlowski static const struct regmap_irq da9055_irqs[] = {
2222896434cSAshish Jangam [DA9055_IRQ_NONKEY] = {
2232896434cSAshish Jangam .reg_offset = 0,
2242896434cSAshish Jangam .mask = DA9055_IRQ_NONKEY_MASK,
2252896434cSAshish Jangam },
2262896434cSAshish Jangam [DA9055_IRQ_ALARM] = {
2272896434cSAshish Jangam .reg_offset = 0,
2282896434cSAshish Jangam .mask = DA9055_IRQ_ALM_MASK,
2292896434cSAshish Jangam },
2302896434cSAshish Jangam [DA9055_IRQ_TICK] = {
2312896434cSAshish Jangam .reg_offset = 0,
2322896434cSAshish Jangam .mask = DA9055_IRQ_TICK_MASK,
2332896434cSAshish Jangam },
2342896434cSAshish Jangam [DA9055_IRQ_HWMON] = {
2352896434cSAshish Jangam .reg_offset = 0,
2362896434cSAshish Jangam .mask = DA9055_IRQ_ADC_MASK,
2372896434cSAshish Jangam },
2382896434cSAshish Jangam [DA9055_IRQ_REGULATOR] = {
2392896434cSAshish Jangam .reg_offset = 1,
2402896434cSAshish Jangam .mask = DA9055_IRQ_BUCK_ILIM_MASK,
2412896434cSAshish Jangam },
2422896434cSAshish Jangam };
2432896434cSAshish Jangam
2447ce7b26fSKrzysztof Kozlowski const struct regmap_config da9055_regmap_config = {
2452896434cSAshish Jangam .reg_bits = 8,
2462896434cSAshish Jangam .val_bits = 8,
2472896434cSAshish Jangam
2482896434cSAshish Jangam .cache_type = REGCACHE_RBTREE,
2492896434cSAshish Jangam
2502896434cSAshish Jangam .max_register = DA9055_MAX_REGISTER_CNT,
2512896434cSAshish Jangam .readable_reg = da9055_register_readable,
2522896434cSAshish Jangam .writeable_reg = da9055_register_writeable,
2532896434cSAshish Jangam .volatile_reg = da9055_register_volatile,
2542896434cSAshish Jangam };
2552896434cSAshish Jangam EXPORT_SYMBOL_GPL(da9055_regmap_config);
2562896434cSAshish Jangam
257*5ac4b850SZhen Lei static const struct resource da9055_onkey_resource =
258*5ac4b850SZhen Lei DEFINE_RES_IRQ_NAMED(DA9055_IRQ_NONKEY, "ONKEY");
2592896434cSAshish Jangam
260a0fa0abeSRikard Falkeborn static const struct resource da9055_rtc_resource[] = {
261*5ac4b850SZhen Lei DEFINE_RES_IRQ_NAMED(DA9055_IRQ_ALARM, "ALM"),
262*5ac4b850SZhen Lei DEFINE_RES_IRQ_NAMED(DA9055_IRQ_TICK, "TICK"),
2632896434cSAshish Jangam };
2642896434cSAshish Jangam
265*5ac4b850SZhen Lei static const struct resource da9055_hwmon_resource =
266*5ac4b850SZhen Lei DEFINE_RES_IRQ_NAMED(DA9055_IRQ_HWMON, "HWMON");
2672896434cSAshish Jangam
268*5ac4b850SZhen Lei static const struct resource da9055_ld05_6_resource =
269*5ac4b850SZhen Lei DEFINE_RES_IRQ_NAMED(DA9055_IRQ_REGULATOR, "REGULATOR");
2702896434cSAshish Jangam
271c8f675ffSGeert Uytterhoeven static const struct mfd_cell da9055_devs[] = {
2722896434cSAshish Jangam {
273bd597f47SSteve Twiss .of_compatible = "dlg,da9055-gpio",
2742896434cSAshish Jangam .name = "da9055-gpio",
2752896434cSAshish Jangam },
2762896434cSAshish Jangam {
277bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
2782896434cSAshish Jangam .name = "da9055-regulator",
2792896434cSAshish Jangam .id = 1,
2802896434cSAshish Jangam },
2812896434cSAshish Jangam {
282bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
2832896434cSAshish Jangam .name = "da9055-regulator",
2842896434cSAshish Jangam .id = 2,
2852896434cSAshish Jangam },
2862896434cSAshish Jangam {
287bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
2882896434cSAshish Jangam .name = "da9055-regulator",
2892896434cSAshish Jangam .id = 3,
2902896434cSAshish Jangam },
2912896434cSAshish Jangam {
292bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
2932896434cSAshish Jangam .name = "da9055-regulator",
2942896434cSAshish Jangam .id = 4,
2952896434cSAshish Jangam },
2962896434cSAshish Jangam {
297bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
2982896434cSAshish Jangam .name = "da9055-regulator",
2992896434cSAshish Jangam .id = 5,
3002896434cSAshish Jangam },
3012896434cSAshish Jangam {
302bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
3032896434cSAshish Jangam .name = "da9055-regulator",
3042896434cSAshish Jangam .id = 6,
3052896434cSAshish Jangam },
3062896434cSAshish Jangam {
307bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
3082896434cSAshish Jangam .name = "da9055-regulator",
3092896434cSAshish Jangam .id = 7,
3102896434cSAshish Jangam .resources = &da9055_ld05_6_resource,
3112896434cSAshish Jangam .num_resources = 1,
3122896434cSAshish Jangam },
3132896434cSAshish Jangam {
314bd597f47SSteve Twiss .of_compatible = "dlg,da9055-regulator",
3152896434cSAshish Jangam .name = "da9055-regulator",
3162896434cSAshish Jangam .resources = &da9055_ld05_6_resource,
3172896434cSAshish Jangam .num_resources = 1,
3182896434cSAshish Jangam .id = 8,
3192896434cSAshish Jangam },
3202896434cSAshish Jangam {
321bd597f47SSteve Twiss .of_compatible = "dlg,da9055-onkey",
3222896434cSAshish Jangam .name = "da9055-onkey",
3232896434cSAshish Jangam .resources = &da9055_onkey_resource,
3242896434cSAshish Jangam .num_resources = 1,
3252896434cSAshish Jangam },
3262896434cSAshish Jangam {
327bd597f47SSteve Twiss .of_compatible = "dlg,da9055-rtc",
3282896434cSAshish Jangam .name = "da9055-rtc",
3292896434cSAshish Jangam .resources = da9055_rtc_resource,
3302896434cSAshish Jangam .num_resources = ARRAY_SIZE(da9055_rtc_resource),
3312896434cSAshish Jangam },
3322896434cSAshish Jangam {
333bd597f47SSteve Twiss .of_compatible = "dlg,da9055-hwmon",
3342896434cSAshish Jangam .name = "da9055-hwmon",
3352896434cSAshish Jangam .resources = &da9055_hwmon_resource,
3362896434cSAshish Jangam .num_resources = 1,
3372896434cSAshish Jangam },
3382896434cSAshish Jangam {
339bd597f47SSteve Twiss .of_compatible = "dlg,da9055-watchdog",
3402896434cSAshish Jangam .name = "da9055-watchdog",
3412896434cSAshish Jangam },
3422896434cSAshish Jangam };
3432896434cSAshish Jangam
3447ce7b26fSKrzysztof Kozlowski static const struct regmap_irq_chip da9055_regmap_irq_chip = {
3452896434cSAshish Jangam .name = "da9055_irq",
3462896434cSAshish Jangam .status_base = DA9055_REG_EVENT_A,
3472896434cSAshish Jangam .mask_base = DA9055_REG_IRQ_MASK_A,
3482896434cSAshish Jangam .ack_base = DA9055_REG_EVENT_A,
3492896434cSAshish Jangam .num_regs = 3,
3502896434cSAshish Jangam .irqs = da9055_irqs,
3512896434cSAshish Jangam .num_irqs = ARRAY_SIZE(da9055_irqs),
3522896434cSAshish Jangam };
3532896434cSAshish Jangam
da9055_device_init(struct da9055 * da9055)354f791be49SBill Pemberton int da9055_device_init(struct da9055 *da9055)
3552896434cSAshish Jangam {
356334a41ceSJingoo Han struct da9055_pdata *pdata = dev_get_platdata(da9055->dev);
3572896434cSAshish Jangam int ret;
3584b3b4a50SAnkur Raina uint8_t clear_events[3] = {0xFF, 0xFF, 0xFF};
3592896434cSAshish Jangam
3602896434cSAshish Jangam if (pdata && pdata->init != NULL)
3612896434cSAshish Jangam pdata->init(da9055);
3622896434cSAshish Jangam
3632896434cSAshish Jangam if (!pdata || !pdata->irq_base)
3642896434cSAshish Jangam da9055->irq_base = -1;
3652896434cSAshish Jangam else
3662896434cSAshish Jangam da9055->irq_base = pdata->irq_base;
3672896434cSAshish Jangam
3684b3b4a50SAnkur Raina ret = da9055_group_write(da9055, DA9055_REG_EVENT_A, 3, clear_events);
3694b3b4a50SAnkur Raina if (ret < 0)
3704b3b4a50SAnkur Raina return ret;
3714b3b4a50SAnkur Raina
3722896434cSAshish Jangam ret = regmap_add_irq_chip(da9055->regmap, da9055->chip_irq,
3733cec5f4eSAshish Jangam IRQF_TRIGGER_LOW | IRQF_ONESHOT,
3742896434cSAshish Jangam da9055->irq_base, &da9055_regmap_irq_chip,
3752896434cSAshish Jangam &da9055->irq_data);
3762896434cSAshish Jangam if (ret < 0)
3772896434cSAshish Jangam return ret;
3782896434cSAshish Jangam
3792896434cSAshish Jangam da9055->irq_base = regmap_irq_chip_get_base(da9055->irq_data);
3802896434cSAshish Jangam
3812896434cSAshish Jangam ret = mfd_add_devices(da9055->dev, -1,
3822896434cSAshish Jangam da9055_devs, ARRAY_SIZE(da9055_devs),
3832896434cSAshish Jangam NULL, da9055->irq_base, NULL);
3842896434cSAshish Jangam if (ret)
3852896434cSAshish Jangam goto err;
3862896434cSAshish Jangam
3872896434cSAshish Jangam return 0;
3882896434cSAshish Jangam
3892896434cSAshish Jangam err:
3902896434cSAshish Jangam mfd_remove_devices(da9055->dev);
3912896434cSAshish Jangam return ret;
3922896434cSAshish Jangam }
3932896434cSAshish Jangam
da9055_device_exit(struct da9055 * da9055)3944740f73fSBill Pemberton void da9055_device_exit(struct da9055 *da9055)
3952896434cSAshish Jangam {
3962896434cSAshish Jangam regmap_del_irq_chip(da9055->chip_irq, da9055->irq_data);
3972896434cSAshish Jangam mfd_remove_devices(da9055->dev);
3982896434cSAshish Jangam }
3992896434cSAshish Jangam
4002896434cSAshish Jangam MODULE_DESCRIPTION("Core support for the DA9055 PMIC");
4012896434cSAshish Jangam MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
402