xref: /openbmc/linux/drivers/mfd/bd9571mwv.c (revision bfb26be7)
1*bfb26be7SYoshihiro Shimoda // SPDX-License-Identifier: GPL-2.0-only
2d3ea2127SMarek Vasut /*
3d3ea2127SMarek Vasut  * ROHM BD9571MWV-M MFD driver
4d3ea2127SMarek Vasut  *
5d3ea2127SMarek Vasut  * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
6d3ea2127SMarek Vasut  *
7d3ea2127SMarek Vasut  * Based on the TPS65086 driver
8d3ea2127SMarek Vasut  */
9d3ea2127SMarek Vasut 
10d3ea2127SMarek Vasut #include <linux/i2c.h>
11d3ea2127SMarek Vasut #include <linux/interrupt.h>
12d3ea2127SMarek Vasut #include <linux/mfd/core.h>
13d3ea2127SMarek Vasut #include <linux/module.h>
14d3ea2127SMarek Vasut 
15d3ea2127SMarek Vasut #include <linux/mfd/bd9571mwv.h>
16d3ea2127SMarek Vasut 
17d3ea2127SMarek Vasut static const struct mfd_cell bd9571mwv_cells[] = {
18d3ea2127SMarek Vasut 	{ .name = "bd9571mwv-regulator", },
19d3ea2127SMarek Vasut 	{ .name = "bd9571mwv-gpio", },
20d3ea2127SMarek Vasut };
21d3ea2127SMarek Vasut 
22d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_readable_yes_ranges[] = {
23d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
247b569bcbSGeert Uytterhoeven 	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
25d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)),
26d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID),
27d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT),
28d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC),
29d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
30d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
31d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
32d3ea2127SMarek Vasut };
33d3ea2127SMarek Vasut 
34d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_readable_table = {
35d3ea2127SMarek Vasut 	.yes_ranges	= bd9571mwv_readable_yes_ranges,
36d3ea2127SMarek Vasut 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_readable_yes_ranges),
37d3ea2127SMarek Vasut };
38d3ea2127SMarek Vasut 
39d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_writable_yes_ranges[] = {
407b569bcbSGeert Uytterhoeven 	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
41d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)),
42d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
43d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
44d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
45d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
46d3ea2127SMarek Vasut };
47d3ea2127SMarek Vasut 
48d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_writable_table = {
49d3ea2127SMarek Vasut 	.yes_ranges	= bd9571mwv_writable_yes_ranges,
50d3ea2127SMarek Vasut 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_writable_yes_ranges),
51d3ea2127SMarek Vasut };
52d3ea2127SMarek Vasut 
53d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = {
54b0aff01eSDien Pham 	regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC),
55d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
56d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
57d3ea2127SMarek Vasut 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
58d3ea2127SMarek Vasut };
59d3ea2127SMarek Vasut 
60d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_volatile_table = {
61d3ea2127SMarek Vasut 	.yes_ranges	= bd9571mwv_volatile_yes_ranges,
62d3ea2127SMarek Vasut 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_volatile_yes_ranges),
63d3ea2127SMarek Vasut };
64d3ea2127SMarek Vasut 
65d3ea2127SMarek Vasut static const struct regmap_config bd9571mwv_regmap_config = {
66d3ea2127SMarek Vasut 	.reg_bits	= 8,
67d3ea2127SMarek Vasut 	.val_bits	= 8,
68d3ea2127SMarek Vasut 	.cache_type	= REGCACHE_RBTREE,
69d3ea2127SMarek Vasut 	.rd_table	= &bd9571mwv_readable_table,
70d3ea2127SMarek Vasut 	.wr_table	= &bd9571mwv_writable_table,
71d3ea2127SMarek Vasut 	.volatile_table	= &bd9571mwv_volatile_table,
72d3ea2127SMarek Vasut 	.max_register	= 0xff,
73d3ea2127SMarek Vasut };
74d3ea2127SMarek Vasut 
75d3ea2127SMarek Vasut static const struct regmap_irq bd9571mwv_irqs[] = {
76d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0,
77d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_MD1_INT),
78d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0,
79d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_MD2_E1_INT),
80d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0,
81d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_MD2_E2_INT),
82d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0,
83d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_PROT_ERR_INT),
84d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0,
85d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_GP_INT),
86d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0,
87d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_128H_OF_INT),
88d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0,
89d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_WDT_OF_INT),
90d3ea2127SMarek Vasut 	REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0,
91d3ea2127SMarek Vasut 		       BD9571MWV_INT_INTREQ_BKUP_TRG_INT),
92d3ea2127SMarek Vasut };
93d3ea2127SMarek Vasut 
94d3ea2127SMarek Vasut static struct regmap_irq_chip bd9571mwv_irq_chip = {
95d3ea2127SMarek Vasut 	.name		= "bd9571mwv",
96d3ea2127SMarek Vasut 	.status_base	= BD9571MWV_INT_INTREQ,
97d3ea2127SMarek Vasut 	.mask_base	= BD9571MWV_INT_INTMASK,
98d3ea2127SMarek Vasut 	.ack_base	= BD9571MWV_INT_INTREQ,
99d3ea2127SMarek Vasut 	.init_ack_masked = true,
100d3ea2127SMarek Vasut 	.num_regs	= 1,
101d3ea2127SMarek Vasut 	.irqs		= bd9571mwv_irqs,
102d3ea2127SMarek Vasut 	.num_irqs	= ARRAY_SIZE(bd9571mwv_irqs),
103d3ea2127SMarek Vasut };
104d3ea2127SMarek Vasut 
105d3ea2127SMarek Vasut static int bd9571mwv_identify(struct bd9571mwv *bd)
106d3ea2127SMarek Vasut {
107d3ea2127SMarek Vasut 	struct device *dev = bd->dev;
108d3ea2127SMarek Vasut 	unsigned int value;
109d3ea2127SMarek Vasut 	int ret;
110d3ea2127SMarek Vasut 
111d3ea2127SMarek Vasut 	ret = regmap_read(bd->regmap, BD9571MWV_VENDOR_CODE, &value);
112d3ea2127SMarek Vasut 	if (ret) {
113d3ea2127SMarek Vasut 		dev_err(dev, "Failed to read vendor code register (ret=%i)\n",
114d3ea2127SMarek Vasut 			ret);
115d3ea2127SMarek Vasut 		return ret;
116d3ea2127SMarek Vasut 	}
117d3ea2127SMarek Vasut 
118d3ea2127SMarek Vasut 	if (value != BD9571MWV_VENDOR_CODE_VAL) {
119d3ea2127SMarek Vasut 		dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n",
120d3ea2127SMarek Vasut 			value, BD9571MWV_VENDOR_CODE_VAL);
121d3ea2127SMarek Vasut 		return -EINVAL;
122d3ea2127SMarek Vasut 	}
123d3ea2127SMarek Vasut 
124d3ea2127SMarek Vasut 	ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_CODE, &value);
125d3ea2127SMarek Vasut 	if (ret) {
126d3ea2127SMarek Vasut 		dev_err(dev, "Failed to read product code register (ret=%i)\n",
127d3ea2127SMarek Vasut 			ret);
128d3ea2127SMarek Vasut 		return ret;
129d3ea2127SMarek Vasut 	}
130d3ea2127SMarek Vasut 
131d3ea2127SMarek Vasut 	if (value != BD9571MWV_PRODUCT_CODE_VAL) {
132d3ea2127SMarek Vasut 		dev_err(dev, "Invalid product code ID %02x (expected %02x)\n",
133d3ea2127SMarek Vasut 			value, BD9571MWV_PRODUCT_CODE_VAL);
134d3ea2127SMarek Vasut 		return -EINVAL;
135d3ea2127SMarek Vasut 	}
136d3ea2127SMarek Vasut 
137d3ea2127SMarek Vasut 	ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_REVISION, &value);
138d3ea2127SMarek Vasut 	if (ret) {
139d3ea2127SMarek Vasut 		dev_err(dev, "Failed to read revision register (ret=%i)\n",
140d3ea2127SMarek Vasut 			ret);
141d3ea2127SMarek Vasut 		return ret;
142d3ea2127SMarek Vasut 	}
143d3ea2127SMarek Vasut 
144d3ea2127SMarek Vasut 	dev_info(dev, "Device: BD9571MWV rev. %d\n", value & 0xff);
145d3ea2127SMarek Vasut 
146d3ea2127SMarek Vasut 	return 0;
147d3ea2127SMarek Vasut }
148d3ea2127SMarek Vasut 
149d3ea2127SMarek Vasut static int bd9571mwv_probe(struct i2c_client *client,
150d3ea2127SMarek Vasut 			  const struct i2c_device_id *ids)
151d3ea2127SMarek Vasut {
152d3ea2127SMarek Vasut 	struct bd9571mwv *bd;
153d3ea2127SMarek Vasut 	int ret;
154d3ea2127SMarek Vasut 
155d3ea2127SMarek Vasut 	bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL);
156d3ea2127SMarek Vasut 	if (!bd)
157d3ea2127SMarek Vasut 		return -ENOMEM;
158d3ea2127SMarek Vasut 
159d3ea2127SMarek Vasut 	i2c_set_clientdata(client, bd);
160d3ea2127SMarek Vasut 	bd->dev = &client->dev;
161d3ea2127SMarek Vasut 	bd->irq = client->irq;
162d3ea2127SMarek Vasut 
163d3ea2127SMarek Vasut 	bd->regmap = devm_regmap_init_i2c(client, &bd9571mwv_regmap_config);
164d3ea2127SMarek Vasut 	if (IS_ERR(bd->regmap)) {
165d3ea2127SMarek Vasut 		dev_err(bd->dev, "Failed to initialize register map\n");
166d3ea2127SMarek Vasut 		return PTR_ERR(bd->regmap);
167d3ea2127SMarek Vasut 	}
168d3ea2127SMarek Vasut 
169d3ea2127SMarek Vasut 	ret = bd9571mwv_identify(bd);
170d3ea2127SMarek Vasut 	if (ret)
171d3ea2127SMarek Vasut 		return ret;
172d3ea2127SMarek Vasut 
173d3ea2127SMarek Vasut 	ret = regmap_add_irq_chip(bd->regmap, bd->irq, IRQF_ONESHOT, 0,
174d3ea2127SMarek Vasut 				  &bd9571mwv_irq_chip, &bd->irq_data);
175d3ea2127SMarek Vasut 	if (ret) {
176d3ea2127SMarek Vasut 		dev_err(bd->dev, "Failed to register IRQ chip\n");
177d3ea2127SMarek Vasut 		return ret;
178d3ea2127SMarek Vasut 	}
179d3ea2127SMarek Vasut 
180c58ad0f2SYoshihiro Shimoda 	ret = devm_mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO,
181c58ad0f2SYoshihiro Shimoda 				   bd9571mwv_cells, ARRAY_SIZE(bd9571mwv_cells),
182c58ad0f2SYoshihiro Shimoda 				   NULL, 0, regmap_irq_get_domain(bd->irq_data));
183d3ea2127SMarek Vasut 	if (ret) {
184d3ea2127SMarek Vasut 		regmap_del_irq_chip(bd->irq, bd->irq_data);
185d3ea2127SMarek Vasut 		return ret;
186d3ea2127SMarek Vasut 	}
187d3ea2127SMarek Vasut 
188d3ea2127SMarek Vasut 	return 0;
189d3ea2127SMarek Vasut }
190d3ea2127SMarek Vasut 
191d3ea2127SMarek Vasut static int bd9571mwv_remove(struct i2c_client *client)
192d3ea2127SMarek Vasut {
193d3ea2127SMarek Vasut 	struct bd9571mwv *bd = i2c_get_clientdata(client);
194d3ea2127SMarek Vasut 
195d3ea2127SMarek Vasut 	regmap_del_irq_chip(bd->irq, bd->irq_data);
196d3ea2127SMarek Vasut 
197d3ea2127SMarek Vasut 	return 0;
198d3ea2127SMarek Vasut }
199d3ea2127SMarek Vasut 
200d3ea2127SMarek Vasut static const struct of_device_id bd9571mwv_of_match_table[] = {
201d3ea2127SMarek Vasut 	{ .compatible = "rohm,bd9571mwv", },
202d3ea2127SMarek Vasut 	{ /* sentinel */ }
203d3ea2127SMarek Vasut };
204d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table);
205d3ea2127SMarek Vasut 
206d3ea2127SMarek Vasut static const struct i2c_device_id bd9571mwv_id_table[] = {
207d3ea2127SMarek Vasut 	{ "bd9571mwv", 0 },
208d3ea2127SMarek Vasut 	{ /* sentinel */ }
209d3ea2127SMarek Vasut };
210d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table);
211d3ea2127SMarek Vasut 
212d3ea2127SMarek Vasut static struct i2c_driver bd9571mwv_driver = {
213d3ea2127SMarek Vasut 	.driver		= {
214d3ea2127SMarek Vasut 		.name	= "bd9571mwv",
215d3ea2127SMarek Vasut 		.of_match_table = bd9571mwv_of_match_table,
216d3ea2127SMarek Vasut 	},
217d3ea2127SMarek Vasut 	.probe		= bd9571mwv_probe,
218d3ea2127SMarek Vasut 	.remove		= bd9571mwv_remove,
219d3ea2127SMarek Vasut 	.id_table       = bd9571mwv_id_table,
220d3ea2127SMarek Vasut };
221d3ea2127SMarek Vasut module_i2c_driver(bd9571mwv_driver);
222d3ea2127SMarek Vasut 
223d3ea2127SMarek Vasut MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
224d3ea2127SMarek Vasut MODULE_DESCRIPTION("BD9571MWV PMIC Driver");
225d3ea2127SMarek Vasut MODULE_LICENSE("GPL v2");
226