1 /* 2 * MFD core driver for the X-Powers' Power Management ICs 3 * 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 * as well as configurable GPIOs. 7 * 8 * This file contains the interface independent core functions. 9 * 10 * Copyright (C) 2014 Carlo Caione 11 * 12 * Author: Carlo Caione <carlo@caione.org> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19 #include <linux/err.h> 20 #include <linux/delay.h> 21 #include <linux/interrupt.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/regmap.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/mfd/axp20x.h> 28 #include <linux/mfd/core.h> 29 #include <linux/of_device.h> 30 #include <linux/acpi.h> 31 32 #define AXP20X_OFF 0x80 33 34 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 35 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 36 37 static const char * const axp20x_model_names[] = { 38 "AXP152", 39 "AXP202", 40 "AXP209", 41 "AXP221", 42 "AXP223", 43 "AXP288", 44 "AXP803", 45 "AXP806", 46 "AXP809", 47 }; 48 49 static const struct regmap_range axp152_writeable_ranges[] = { 50 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 51 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 52 }; 53 54 static const struct regmap_range axp152_volatile_ranges[] = { 55 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 56 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 57 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 58 }; 59 60 static const struct regmap_access_table axp152_writeable_table = { 61 .yes_ranges = axp152_writeable_ranges, 62 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 63 }; 64 65 static const struct regmap_access_table axp152_volatile_table = { 66 .yes_ranges = axp152_volatile_ranges, 67 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 68 }; 69 70 static const struct regmap_range axp20x_writeable_ranges[] = { 71 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 72 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 73 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 74 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 75 }; 76 77 static const struct regmap_range axp20x_volatile_ranges[] = { 78 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 79 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 80 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 81 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 82 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 83 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 84 }; 85 86 static const struct regmap_access_table axp20x_writeable_table = { 87 .yes_ranges = axp20x_writeable_ranges, 88 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 89 }; 90 91 static const struct regmap_access_table axp20x_volatile_table = { 92 .yes_ranges = axp20x_volatile_ranges, 93 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 94 }; 95 96 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 97 static const struct regmap_range axp22x_writeable_ranges[] = { 98 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 99 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 100 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 101 }; 102 103 static const struct regmap_range axp22x_volatile_ranges[] = { 104 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 105 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 106 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 107 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 108 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 109 }; 110 111 static const struct regmap_access_table axp22x_writeable_table = { 112 .yes_ranges = axp22x_writeable_ranges, 113 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 114 }; 115 116 static const struct regmap_access_table axp22x_volatile_table = { 117 .yes_ranges = axp22x_volatile_ranges, 118 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 119 }; 120 121 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 122 static const struct regmap_range axp288_writeable_ranges[] = { 123 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 124 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 125 }; 126 127 static const struct regmap_range axp288_volatile_ranges[] = { 128 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 129 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 130 regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT), 131 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 132 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 133 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 134 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 135 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 136 }; 137 138 static const struct regmap_access_table axp288_writeable_table = { 139 .yes_ranges = axp288_writeable_ranges, 140 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 141 }; 142 143 static const struct regmap_access_table axp288_volatile_table = { 144 .yes_ranges = axp288_volatile_ranges, 145 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 146 }; 147 148 static const struct regmap_range axp806_writeable_ranges[] = { 149 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 150 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 151 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 152 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 153 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 154 }; 155 156 static const struct regmap_range axp806_volatile_ranges[] = { 157 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 158 }; 159 160 static const struct regmap_access_table axp806_writeable_table = { 161 .yes_ranges = axp806_writeable_ranges, 162 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 163 }; 164 165 static const struct regmap_access_table axp806_volatile_table = { 166 .yes_ranges = axp806_volatile_ranges, 167 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 168 }; 169 170 static struct resource axp152_pek_resources[] = { 171 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 172 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 173 }; 174 175 static struct resource axp20x_ac_power_supply_resources[] = { 176 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 177 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 178 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 179 }; 180 181 static struct resource axp20x_pek_resources[] = { 182 { 183 .name = "PEK_DBR", 184 .start = AXP20X_IRQ_PEK_RIS_EDGE, 185 .end = AXP20X_IRQ_PEK_RIS_EDGE, 186 .flags = IORESOURCE_IRQ, 187 }, { 188 .name = "PEK_DBF", 189 .start = AXP20X_IRQ_PEK_FAL_EDGE, 190 .end = AXP20X_IRQ_PEK_FAL_EDGE, 191 .flags = IORESOURCE_IRQ, 192 }, 193 }; 194 195 static struct resource axp20x_usb_power_supply_resources[] = { 196 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 197 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 198 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 199 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 200 }; 201 202 static struct resource axp22x_usb_power_supply_resources[] = { 203 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 204 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 205 }; 206 207 static struct resource axp22x_pek_resources[] = { 208 { 209 .name = "PEK_DBR", 210 .start = AXP22X_IRQ_PEK_RIS_EDGE, 211 .end = AXP22X_IRQ_PEK_RIS_EDGE, 212 .flags = IORESOURCE_IRQ, 213 }, { 214 .name = "PEK_DBF", 215 .start = AXP22X_IRQ_PEK_FAL_EDGE, 216 .end = AXP22X_IRQ_PEK_FAL_EDGE, 217 .flags = IORESOURCE_IRQ, 218 }, 219 }; 220 221 static struct resource axp288_power_button_resources[] = { 222 { 223 .name = "PEK_DBR", 224 .start = AXP288_IRQ_POKP, 225 .end = AXP288_IRQ_POKP, 226 .flags = IORESOURCE_IRQ, 227 }, 228 { 229 .name = "PEK_DBF", 230 .start = AXP288_IRQ_POKN, 231 .end = AXP288_IRQ_POKN, 232 .flags = IORESOURCE_IRQ, 233 }, 234 }; 235 236 static struct resource axp288_fuel_gauge_resources[] = { 237 { 238 .start = AXP288_IRQ_QWBTU, 239 .end = AXP288_IRQ_QWBTU, 240 .flags = IORESOURCE_IRQ, 241 }, 242 { 243 .start = AXP288_IRQ_WBTU, 244 .end = AXP288_IRQ_WBTU, 245 .flags = IORESOURCE_IRQ, 246 }, 247 { 248 .start = AXP288_IRQ_QWBTO, 249 .end = AXP288_IRQ_QWBTO, 250 .flags = IORESOURCE_IRQ, 251 }, 252 { 253 .start = AXP288_IRQ_WBTO, 254 .end = AXP288_IRQ_WBTO, 255 .flags = IORESOURCE_IRQ, 256 }, 257 { 258 .start = AXP288_IRQ_WL2, 259 .end = AXP288_IRQ_WL2, 260 .flags = IORESOURCE_IRQ, 261 }, 262 { 263 .start = AXP288_IRQ_WL1, 264 .end = AXP288_IRQ_WL1, 265 .flags = IORESOURCE_IRQ, 266 }, 267 }; 268 269 static struct resource axp803_pek_resources[] = { 270 { 271 .name = "PEK_DBR", 272 .start = AXP803_IRQ_PEK_RIS_EDGE, 273 .end = AXP803_IRQ_PEK_RIS_EDGE, 274 .flags = IORESOURCE_IRQ, 275 }, { 276 .name = "PEK_DBF", 277 .start = AXP803_IRQ_PEK_FAL_EDGE, 278 .end = AXP803_IRQ_PEK_FAL_EDGE, 279 .flags = IORESOURCE_IRQ, 280 }, 281 }; 282 283 static struct resource axp809_pek_resources[] = { 284 { 285 .name = "PEK_DBR", 286 .start = AXP809_IRQ_PEK_RIS_EDGE, 287 .end = AXP809_IRQ_PEK_RIS_EDGE, 288 .flags = IORESOURCE_IRQ, 289 }, { 290 .name = "PEK_DBF", 291 .start = AXP809_IRQ_PEK_FAL_EDGE, 292 .end = AXP809_IRQ_PEK_FAL_EDGE, 293 .flags = IORESOURCE_IRQ, 294 }, 295 }; 296 297 static const struct regmap_config axp152_regmap_config = { 298 .reg_bits = 8, 299 .val_bits = 8, 300 .wr_table = &axp152_writeable_table, 301 .volatile_table = &axp152_volatile_table, 302 .max_register = AXP152_PWM1_DUTY_CYCLE, 303 .cache_type = REGCACHE_RBTREE, 304 }; 305 306 static const struct regmap_config axp20x_regmap_config = { 307 .reg_bits = 8, 308 .val_bits = 8, 309 .wr_table = &axp20x_writeable_table, 310 .volatile_table = &axp20x_volatile_table, 311 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 312 .cache_type = REGCACHE_RBTREE, 313 }; 314 315 static const struct regmap_config axp22x_regmap_config = { 316 .reg_bits = 8, 317 .val_bits = 8, 318 .wr_table = &axp22x_writeable_table, 319 .volatile_table = &axp22x_volatile_table, 320 .max_register = AXP22X_BATLOW_THRES1, 321 .cache_type = REGCACHE_RBTREE, 322 }; 323 324 static const struct regmap_config axp288_regmap_config = { 325 .reg_bits = 8, 326 .val_bits = 8, 327 .wr_table = &axp288_writeable_table, 328 .volatile_table = &axp288_volatile_table, 329 .max_register = AXP288_FG_TUNE5, 330 .cache_type = REGCACHE_RBTREE, 331 }; 332 333 static const struct regmap_config axp806_regmap_config = { 334 .reg_bits = 8, 335 .val_bits = 8, 336 .wr_table = &axp806_writeable_table, 337 .volatile_table = &axp806_volatile_table, 338 .max_register = AXP806_REG_ADDR_EXT, 339 .cache_type = REGCACHE_RBTREE, 340 }; 341 342 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 343 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 344 345 static const struct regmap_irq axp152_regmap_irqs[] = { 346 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 347 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 348 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 349 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 350 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 351 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 352 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 353 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 354 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 355 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 356 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 357 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 358 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 359 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 360 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 361 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 362 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 363 }; 364 365 static const struct regmap_irq axp20x_regmap_irqs[] = { 366 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 367 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 368 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 369 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 370 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 371 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 372 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 373 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 374 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 375 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 376 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 377 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 378 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 379 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 380 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 381 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 382 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 383 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 384 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 385 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 386 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 387 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 388 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 389 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 390 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 391 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 392 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 393 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 394 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 395 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 396 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 397 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 398 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 399 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 400 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 401 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 402 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 403 }; 404 405 static const struct regmap_irq axp22x_regmap_irqs[] = { 406 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 407 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 408 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 409 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 410 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 411 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 412 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 413 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 414 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 415 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 416 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 417 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 418 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 419 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 420 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 421 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 422 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 423 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 424 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 425 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 426 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 427 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 428 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 429 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 430 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 431 }; 432 433 /* some IRQs are compatible with axp20x models */ 434 static const struct regmap_irq axp288_regmap_irqs[] = { 435 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 436 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 437 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 438 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 439 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 440 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 441 442 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 443 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 444 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 445 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 446 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 447 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 448 449 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 450 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 451 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 452 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 453 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 454 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 455 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 456 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 457 458 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 459 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 460 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 461 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 462 463 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 464 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 465 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 466 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 467 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 468 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 469 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 470 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 471 472 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 473 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 474 }; 475 476 static const struct regmap_irq axp803_regmap_irqs[] = { 477 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 478 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 479 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 480 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 481 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 482 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 483 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 484 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 485 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 486 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 487 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 488 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 489 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 490 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 491 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 492 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 493 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 494 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 495 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 496 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 497 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 498 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 499 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 500 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 501 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 502 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 503 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 504 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 505 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 506 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 507 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 508 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 509 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 510 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 511 }; 512 513 static const struct regmap_irq axp806_regmap_irqs[] = { 514 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 515 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 516 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 517 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 518 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 519 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 520 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 521 INIT_REGMAP_IRQ(AXP806, PWROK_LONG, 1, 0), 522 INIT_REGMAP_IRQ(AXP806, PWROK_SHORT, 1, 1), 523 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 524 INIT_REGMAP_IRQ(AXP806, PWROK_FALL, 1, 5), 525 INIT_REGMAP_IRQ(AXP806, PWROK_RISE, 1, 6), 526 }; 527 528 static const struct regmap_irq axp809_regmap_irqs[] = { 529 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 530 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 531 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 532 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 533 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 534 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 535 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 536 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 537 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 538 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 539 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 540 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 541 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 542 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 543 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 544 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 545 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 546 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 547 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 548 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 549 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 550 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 551 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 552 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 553 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 554 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 555 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 556 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 557 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 558 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 559 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 560 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 561 }; 562 563 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 564 .name = "axp152_irq_chip", 565 .status_base = AXP152_IRQ1_STATE, 566 .ack_base = AXP152_IRQ1_STATE, 567 .mask_base = AXP152_IRQ1_EN, 568 .mask_invert = true, 569 .init_ack_masked = true, 570 .irqs = axp152_regmap_irqs, 571 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 572 .num_regs = 3, 573 }; 574 575 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 576 .name = "axp20x_irq_chip", 577 .status_base = AXP20X_IRQ1_STATE, 578 .ack_base = AXP20X_IRQ1_STATE, 579 .mask_base = AXP20X_IRQ1_EN, 580 .mask_invert = true, 581 .init_ack_masked = true, 582 .irqs = axp20x_regmap_irqs, 583 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 584 .num_regs = 5, 585 586 }; 587 588 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 589 .name = "axp22x_irq_chip", 590 .status_base = AXP20X_IRQ1_STATE, 591 .ack_base = AXP20X_IRQ1_STATE, 592 .mask_base = AXP20X_IRQ1_EN, 593 .mask_invert = true, 594 .init_ack_masked = true, 595 .irqs = axp22x_regmap_irqs, 596 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 597 .num_regs = 5, 598 }; 599 600 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 601 .name = "axp288_irq_chip", 602 .status_base = AXP20X_IRQ1_STATE, 603 .ack_base = AXP20X_IRQ1_STATE, 604 .mask_base = AXP20X_IRQ1_EN, 605 .mask_invert = true, 606 .init_ack_masked = true, 607 .irqs = axp288_regmap_irqs, 608 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 609 .num_regs = 6, 610 611 }; 612 613 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 614 .name = "axp803", 615 .status_base = AXP20X_IRQ1_STATE, 616 .ack_base = AXP20X_IRQ1_STATE, 617 .mask_base = AXP20X_IRQ1_EN, 618 .mask_invert = true, 619 .init_ack_masked = true, 620 .irqs = axp803_regmap_irqs, 621 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 622 .num_regs = 6, 623 }; 624 625 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 626 .name = "axp806", 627 .status_base = AXP20X_IRQ1_STATE, 628 .ack_base = AXP20X_IRQ1_STATE, 629 .mask_base = AXP20X_IRQ1_EN, 630 .mask_invert = true, 631 .init_ack_masked = true, 632 .irqs = axp806_regmap_irqs, 633 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 634 .num_regs = 2, 635 }; 636 637 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 638 .name = "axp809", 639 .status_base = AXP20X_IRQ1_STATE, 640 .ack_base = AXP20X_IRQ1_STATE, 641 .mask_base = AXP20X_IRQ1_EN, 642 .mask_invert = true, 643 .init_ack_masked = true, 644 .irqs = axp809_regmap_irqs, 645 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 646 .num_regs = 5, 647 }; 648 649 static struct mfd_cell axp20x_cells[] = { 650 { 651 .name = "axp20x-gpio", 652 .of_compatible = "x-powers,axp209-gpio", 653 }, { 654 .name = "axp20x-pek", 655 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 656 .resources = axp20x_pek_resources, 657 }, { 658 .name = "axp20x-regulator", 659 }, { 660 .name = "axp20x-adc", 661 }, { 662 .name = "axp20x-battery-power-supply", 663 .of_compatible = "x-powers,axp209-battery-power-supply", 664 }, { 665 .name = "axp20x-ac-power-supply", 666 .of_compatible = "x-powers,axp202-ac-power-supply", 667 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 668 .resources = axp20x_ac_power_supply_resources, 669 }, { 670 .name = "axp20x-usb-power-supply", 671 .of_compatible = "x-powers,axp202-usb-power-supply", 672 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 673 .resources = axp20x_usb_power_supply_resources, 674 }, 675 }; 676 677 static struct mfd_cell axp221_cells[] = { 678 { 679 .name = "axp20x-pek", 680 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 681 .resources = axp22x_pek_resources, 682 }, { 683 .name = "axp20x-regulator", 684 }, { 685 .name = "axp22x-adc" 686 }, { 687 .name = "axp20x-ac-power-supply", 688 .of_compatible = "x-powers,axp221-ac-power-supply", 689 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 690 .resources = axp20x_ac_power_supply_resources, 691 }, { 692 .name = "axp20x-battery-power-supply", 693 .of_compatible = "x-powers,axp221-battery-power-supply", 694 }, { 695 .name = "axp20x-usb-power-supply", 696 .of_compatible = "x-powers,axp221-usb-power-supply", 697 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 698 .resources = axp22x_usb_power_supply_resources, 699 }, 700 }; 701 702 static struct mfd_cell axp223_cells[] = { 703 { 704 .name = "axp20x-pek", 705 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 706 .resources = axp22x_pek_resources, 707 }, { 708 .name = "axp22x-adc", 709 }, { 710 .name = "axp20x-battery-power-supply", 711 .of_compatible = "x-powers,axp221-battery-power-supply", 712 }, { 713 .name = "axp20x-regulator", 714 }, { 715 .name = "axp20x-ac-power-supply", 716 .of_compatible = "x-powers,axp221-ac-power-supply", 717 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 718 .resources = axp20x_ac_power_supply_resources, 719 }, { 720 .name = "axp20x-usb-power-supply", 721 .of_compatible = "x-powers,axp223-usb-power-supply", 722 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 723 .resources = axp22x_usb_power_supply_resources, 724 }, 725 }; 726 727 static struct mfd_cell axp152_cells[] = { 728 { 729 .name = "axp20x-pek", 730 .num_resources = ARRAY_SIZE(axp152_pek_resources), 731 .resources = axp152_pek_resources, 732 }, 733 }; 734 735 static struct resource axp288_adc_resources[] = { 736 { 737 .name = "GPADC", 738 .start = AXP288_IRQ_GPADC, 739 .end = AXP288_IRQ_GPADC, 740 .flags = IORESOURCE_IRQ, 741 }, 742 }; 743 744 static struct resource axp288_extcon_resources[] = { 745 { 746 .start = AXP288_IRQ_VBUS_FALL, 747 .end = AXP288_IRQ_VBUS_FALL, 748 .flags = IORESOURCE_IRQ, 749 }, 750 { 751 .start = AXP288_IRQ_VBUS_RISE, 752 .end = AXP288_IRQ_VBUS_RISE, 753 .flags = IORESOURCE_IRQ, 754 }, 755 { 756 .start = AXP288_IRQ_MV_CHNG, 757 .end = AXP288_IRQ_MV_CHNG, 758 .flags = IORESOURCE_IRQ, 759 }, 760 { 761 .start = AXP288_IRQ_BC_USB_CHNG, 762 .end = AXP288_IRQ_BC_USB_CHNG, 763 .flags = IORESOURCE_IRQ, 764 }, 765 }; 766 767 static struct resource axp288_charger_resources[] = { 768 { 769 .start = AXP288_IRQ_OV, 770 .end = AXP288_IRQ_OV, 771 .flags = IORESOURCE_IRQ, 772 }, 773 { 774 .start = AXP288_IRQ_DONE, 775 .end = AXP288_IRQ_DONE, 776 .flags = IORESOURCE_IRQ, 777 }, 778 { 779 .start = AXP288_IRQ_CHARGING, 780 .end = AXP288_IRQ_CHARGING, 781 .flags = IORESOURCE_IRQ, 782 }, 783 { 784 .start = AXP288_IRQ_SAFE_QUIT, 785 .end = AXP288_IRQ_SAFE_QUIT, 786 .flags = IORESOURCE_IRQ, 787 }, 788 { 789 .start = AXP288_IRQ_SAFE_ENTER, 790 .end = AXP288_IRQ_SAFE_ENTER, 791 .flags = IORESOURCE_IRQ, 792 }, 793 { 794 .start = AXP288_IRQ_QCBTU, 795 .end = AXP288_IRQ_QCBTU, 796 .flags = IORESOURCE_IRQ, 797 }, 798 { 799 .start = AXP288_IRQ_CBTU, 800 .end = AXP288_IRQ_CBTU, 801 .flags = IORESOURCE_IRQ, 802 }, 803 { 804 .start = AXP288_IRQ_QCBTO, 805 .end = AXP288_IRQ_QCBTO, 806 .flags = IORESOURCE_IRQ, 807 }, 808 { 809 .start = AXP288_IRQ_CBTO, 810 .end = AXP288_IRQ_CBTO, 811 .flags = IORESOURCE_IRQ, 812 }, 813 }; 814 815 static struct mfd_cell axp288_cells[] = { 816 { 817 .name = "axp288_adc", 818 .num_resources = ARRAY_SIZE(axp288_adc_resources), 819 .resources = axp288_adc_resources, 820 }, 821 { 822 .name = "axp288_extcon", 823 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 824 .resources = axp288_extcon_resources, 825 }, 826 { 827 .name = "axp288_charger", 828 .num_resources = ARRAY_SIZE(axp288_charger_resources), 829 .resources = axp288_charger_resources, 830 }, 831 { 832 .name = "axp288_fuel_gauge", 833 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 834 .resources = axp288_fuel_gauge_resources, 835 }, 836 { 837 .name = "axp20x-pek", 838 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 839 .resources = axp288_power_button_resources, 840 }, 841 { 842 .name = "axp288_pmic_acpi", 843 }, 844 }; 845 846 static struct mfd_cell axp803_cells[] = { 847 { 848 .name = "axp20x-pek", 849 .num_resources = ARRAY_SIZE(axp803_pek_resources), 850 .resources = axp803_pek_resources, 851 } 852 }; 853 854 static struct mfd_cell axp806_cells[] = { 855 { 856 .id = 2, 857 .name = "axp20x-regulator", 858 }, 859 }; 860 861 static struct mfd_cell axp809_cells[] = { 862 { 863 .name = "axp20x-pek", 864 .num_resources = ARRAY_SIZE(axp809_pek_resources), 865 .resources = axp809_pek_resources, 866 }, { 867 .id = 1, 868 .name = "axp20x-regulator", 869 }, 870 }; 871 872 static struct axp20x_dev *axp20x_pm_power_off; 873 static void axp20x_power_off(void) 874 { 875 if (axp20x_pm_power_off->variant == AXP288_ID) 876 return; 877 878 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, 879 AXP20X_OFF); 880 881 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 882 msleep(500); 883 } 884 885 int axp20x_match_device(struct axp20x_dev *axp20x) 886 { 887 struct device *dev = axp20x->dev; 888 const struct acpi_device_id *acpi_id; 889 const struct of_device_id *of_id; 890 891 if (dev->of_node) { 892 of_id = of_match_device(dev->driver->of_match_table, dev); 893 if (!of_id) { 894 dev_err(dev, "Unable to match OF ID\n"); 895 return -ENODEV; 896 } 897 axp20x->variant = (long)of_id->data; 898 } else { 899 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 900 if (!acpi_id || !acpi_id->driver_data) { 901 dev_err(dev, "Unable to match ACPI ID and data\n"); 902 return -ENODEV; 903 } 904 axp20x->variant = (long)acpi_id->driver_data; 905 } 906 907 switch (axp20x->variant) { 908 case AXP152_ID: 909 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 910 axp20x->cells = axp152_cells; 911 axp20x->regmap_cfg = &axp152_regmap_config; 912 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 913 break; 914 case AXP202_ID: 915 case AXP209_ID: 916 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 917 axp20x->cells = axp20x_cells; 918 axp20x->regmap_cfg = &axp20x_regmap_config; 919 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 920 break; 921 case AXP221_ID: 922 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 923 axp20x->cells = axp221_cells; 924 axp20x->regmap_cfg = &axp22x_regmap_config; 925 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 926 break; 927 case AXP223_ID: 928 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 929 axp20x->cells = axp223_cells; 930 axp20x->regmap_cfg = &axp22x_regmap_config; 931 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 932 break; 933 case AXP288_ID: 934 axp20x->cells = axp288_cells; 935 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 936 axp20x->regmap_cfg = &axp288_regmap_config; 937 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 938 axp20x->irq_flags = IRQF_TRIGGER_LOW; 939 break; 940 case AXP803_ID: 941 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 942 axp20x->cells = axp803_cells; 943 axp20x->regmap_cfg = &axp288_regmap_config; 944 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 945 break; 946 case AXP806_ID: 947 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 948 axp20x->cells = axp806_cells; 949 axp20x->regmap_cfg = &axp806_regmap_config; 950 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 951 break; 952 case AXP809_ID: 953 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 954 axp20x->cells = axp809_cells; 955 axp20x->regmap_cfg = &axp22x_regmap_config; 956 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 957 break; 958 default: 959 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 960 return -EINVAL; 961 } 962 dev_info(dev, "AXP20x variant %s found\n", 963 axp20x_model_names[axp20x->variant]); 964 965 return 0; 966 } 967 EXPORT_SYMBOL(axp20x_match_device); 968 969 int axp20x_device_probe(struct axp20x_dev *axp20x) 970 { 971 int ret; 972 973 /* 974 * The AXP806 supports either master/standalone or slave mode. 975 * Slave mode allows sharing the serial bus, even with multiple 976 * AXP806 which all have the same hardware address. 977 * 978 * This is done with extra "serial interface address extension", 979 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 980 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 981 * 1 bit customizable at the factory, and 1 bit depending on the 982 * state of an external pin. The latter is writable. The device 983 * will only respond to operations to its other registers when 984 * the these device addressing bits (in the upper 4 bits of the 985 * registers) match. 986 * 987 * By default we support an AXP806 chained to an AXP809 in slave 988 * mode. Boards which use an AXP806 in master mode can set the 989 * property "x-powers,master-mode" to override the default. 990 */ 991 if (axp20x->variant == AXP806_ID) { 992 if (of_property_read_bool(axp20x->dev->of_node, 993 "x-powers,master-mode")) 994 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 995 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 996 else 997 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 998 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 999 } 1000 1001 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1002 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1003 -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); 1004 if (ret) { 1005 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); 1006 return ret; 1007 } 1008 1009 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1010 axp20x->nr_cells, NULL, 0, NULL); 1011 1012 if (ret) { 1013 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1014 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1015 return ret; 1016 } 1017 1018 if (!pm_power_off) { 1019 axp20x_pm_power_off = axp20x; 1020 pm_power_off = axp20x_power_off; 1021 } 1022 1023 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1024 1025 return 0; 1026 } 1027 EXPORT_SYMBOL(axp20x_device_probe); 1028 1029 int axp20x_device_remove(struct axp20x_dev *axp20x) 1030 { 1031 if (axp20x == axp20x_pm_power_off) { 1032 axp20x_pm_power_off = NULL; 1033 pm_power_off = NULL; 1034 } 1035 1036 mfd_remove_devices(axp20x->dev); 1037 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1038 1039 return 0; 1040 } 1041 EXPORT_SYMBOL(axp20x_device_remove); 1042 1043 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1044 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1045 MODULE_LICENSE("GPL"); 1046