1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MFD core driver for the X-Powers' Power Management ICs 4 * 5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7 * as well as configurable GPIOs. 8 * 9 * This file contains the interface independent core functions. 10 * 11 * Copyright (C) 2014 Carlo Caione 12 * 13 * Author: Carlo Caione <carlo@caione.org> 14 */ 15 16 #include <linux/acpi.h> 17 #include <linux/bitops.h> 18 #include <linux/delay.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/axp20x.h> 23 #include <linux/mfd/core.h> 24 #include <linux/module.h> 25 #include <linux/of_device.h> 26 #include <linux/reboot.h> 27 #include <linux/regmap.h> 28 #include <linux/regulator/consumer.h> 29 30 #define AXP20X_OFF BIT(7) 31 32 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 33 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 34 35 static const char * const axp20x_model_names[] = { 36 "AXP152", 37 "AXP192", 38 "AXP202", 39 "AXP209", 40 "AXP221", 41 "AXP223", 42 "AXP288", 43 "AXP313a", 44 "AXP803", 45 "AXP806", 46 "AXP809", 47 "AXP813", 48 "AXP15060", 49 }; 50 51 static const struct regmap_range axp152_writeable_ranges[] = { 52 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 53 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 54 }; 55 56 static const struct regmap_range axp152_volatile_ranges[] = { 57 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 58 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 59 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 60 }; 61 62 static const struct regmap_access_table axp152_writeable_table = { 63 .yes_ranges = axp152_writeable_ranges, 64 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 65 }; 66 67 static const struct regmap_access_table axp152_volatile_table = { 68 .yes_ranges = axp152_volatile_ranges, 69 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 70 }; 71 72 static const struct regmap_range axp20x_writeable_ranges[] = { 73 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 74 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 75 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 76 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 77 }; 78 79 static const struct regmap_range axp20x_volatile_ranges[] = { 80 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 81 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 82 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 83 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 84 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 85 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 86 }; 87 88 static const struct regmap_access_table axp20x_writeable_table = { 89 .yes_ranges = axp20x_writeable_ranges, 90 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 91 }; 92 93 static const struct regmap_access_table axp20x_volatile_table = { 94 .yes_ranges = axp20x_volatile_ranges, 95 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 96 }; 97 98 static const struct regmap_range axp192_writeable_ranges[] = { 99 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)), 100 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE), 101 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL), 102 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL), 103 }; 104 105 static const struct regmap_range axp192_volatile_ranges[] = { 106 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS), 107 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE), 108 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE), 109 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 110 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 111 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE), 112 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE), 113 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL), 114 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL), 115 }; 116 117 static const struct regmap_access_table axp192_writeable_table = { 118 .yes_ranges = axp192_writeable_ranges, 119 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges), 120 }; 121 122 static const struct regmap_access_table axp192_volatile_table = { 123 .yes_ranges = axp192_volatile_ranges, 124 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges), 125 }; 126 127 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 128 static const struct regmap_range axp22x_writeable_ranges[] = { 129 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 130 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 131 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 132 }; 133 134 static const struct regmap_range axp22x_volatile_ranges[] = { 135 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 136 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 137 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 138 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 139 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 140 }; 141 142 static const struct regmap_access_table axp22x_writeable_table = { 143 .yes_ranges = axp22x_writeable_ranges, 144 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 145 }; 146 147 static const struct regmap_access_table axp22x_volatile_table = { 148 .yes_ranges = axp22x_volatile_ranges, 149 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 150 }; 151 152 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 153 static const struct regmap_range axp288_writeable_ranges[] = { 154 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 155 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 156 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 157 }; 158 159 static const struct regmap_range axp288_volatile_ranges[] = { 160 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 161 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 162 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 163 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 164 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 165 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 166 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 167 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 168 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 169 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 170 }; 171 172 static const struct regmap_access_table axp288_writeable_table = { 173 .yes_ranges = axp288_writeable_ranges, 174 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 175 }; 176 177 static const struct regmap_access_table axp288_volatile_table = { 178 .yes_ranges = axp288_volatile_ranges, 179 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 180 }; 181 182 static const struct regmap_range axp806_writeable_ranges[] = { 183 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 184 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 185 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 186 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 187 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 188 }; 189 190 static const struct regmap_range axp313a_writeable_ranges[] = { 191 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 192 }; 193 194 static const struct regmap_range axp313a_volatile_ranges[] = { 195 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 196 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 197 }; 198 199 static const struct regmap_access_table axp313a_writeable_table = { 200 .yes_ranges = axp313a_writeable_ranges, 201 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 202 }; 203 204 static const struct regmap_access_table axp313a_volatile_table = { 205 .yes_ranges = axp313a_volatile_ranges, 206 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 207 }; 208 209 static const struct regmap_range axp806_volatile_ranges[] = { 210 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 211 }; 212 213 static const struct regmap_access_table axp806_writeable_table = { 214 .yes_ranges = axp806_writeable_ranges, 215 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 216 }; 217 218 static const struct regmap_access_table axp806_volatile_table = { 219 .yes_ranges = axp806_volatile_ranges, 220 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 221 }; 222 223 static const struct regmap_range axp15060_writeable_ranges[] = { 224 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 225 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 226 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 227 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 228 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 229 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 230 }; 231 232 static const struct regmap_range axp15060_volatile_ranges[] = { 233 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 234 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 235 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 236 }; 237 238 static const struct regmap_access_table axp15060_writeable_table = { 239 .yes_ranges = axp15060_writeable_ranges, 240 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 241 }; 242 243 static const struct regmap_access_table axp15060_volatile_table = { 244 .yes_ranges = axp15060_volatile_ranges, 245 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 246 }; 247 248 static const struct resource axp152_pek_resources[] = { 249 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 250 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 251 }; 252 253 static const struct resource axp192_ac_power_supply_resources[] = { 254 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 255 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 256 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 257 }; 258 259 static const struct resource axp192_usb_power_supply_resources[] = { 260 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 261 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 262 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"), 263 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 264 }; 265 266 static const struct resource axp20x_ac_power_supply_resources[] = { 267 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 268 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 269 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 270 }; 271 272 static const struct resource axp20x_pek_resources[] = { 273 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 274 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 275 }; 276 277 static const struct resource axp20x_usb_power_supply_resources[] = { 278 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 279 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 280 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 281 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 282 }; 283 284 static const struct resource axp22x_usb_power_supply_resources[] = { 285 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 286 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 287 }; 288 289 /* AXP803 and AXP813/AXP818 share the same interrupts */ 290 static const struct resource axp803_usb_power_supply_resources[] = { 291 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 292 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 293 }; 294 295 static const struct resource axp22x_pek_resources[] = { 296 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 297 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 298 }; 299 300 static const struct resource axp288_power_button_resources[] = { 301 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 302 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 303 }; 304 305 static const struct resource axp288_fuel_gauge_resources[] = { 306 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 307 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 308 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 309 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 310 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 311 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 312 }; 313 314 static const struct resource axp313a_pek_resources[] = { 315 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 316 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 317 }; 318 319 static const struct resource axp803_pek_resources[] = { 320 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 321 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 322 }; 323 324 static const struct resource axp806_pek_resources[] = { 325 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 326 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 327 }; 328 329 static const struct resource axp809_pek_resources[] = { 330 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 331 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 332 }; 333 334 static const struct resource axp15060_pek_resources[] = { 335 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 336 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 337 }; 338 339 static const struct regmap_config axp152_regmap_config = { 340 .reg_bits = 8, 341 .val_bits = 8, 342 .wr_table = &axp152_writeable_table, 343 .volatile_table = &axp152_volatile_table, 344 .max_register = AXP152_PWM1_DUTY_CYCLE, 345 .cache_type = REGCACHE_RBTREE, 346 }; 347 348 static const struct regmap_config axp192_regmap_config = { 349 .reg_bits = 8, 350 .val_bits = 8, 351 .wr_table = &axp192_writeable_table, 352 .volatile_table = &axp192_volatile_table, 353 .max_register = AXP20X_CC_CTRL, 354 .cache_type = REGCACHE_RBTREE, 355 }; 356 357 static const struct regmap_config axp20x_regmap_config = { 358 .reg_bits = 8, 359 .val_bits = 8, 360 .wr_table = &axp20x_writeable_table, 361 .volatile_table = &axp20x_volatile_table, 362 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 363 .cache_type = REGCACHE_RBTREE, 364 }; 365 366 static const struct regmap_config axp22x_regmap_config = { 367 .reg_bits = 8, 368 .val_bits = 8, 369 .wr_table = &axp22x_writeable_table, 370 .volatile_table = &axp22x_volatile_table, 371 .max_register = AXP22X_BATLOW_THRES1, 372 .cache_type = REGCACHE_RBTREE, 373 }; 374 375 static const struct regmap_config axp288_regmap_config = { 376 .reg_bits = 8, 377 .val_bits = 8, 378 .wr_table = &axp288_writeable_table, 379 .volatile_table = &axp288_volatile_table, 380 .max_register = AXP288_FG_TUNE5, 381 .cache_type = REGCACHE_RBTREE, 382 }; 383 384 static const struct regmap_config axp313a_regmap_config = { 385 .reg_bits = 8, 386 .val_bits = 8, 387 .wr_table = &axp313a_writeable_table, 388 .volatile_table = &axp313a_volatile_table, 389 .max_register = AXP313A_IRQ_STATE, 390 .cache_type = REGCACHE_RBTREE, 391 }; 392 393 static const struct regmap_config axp806_regmap_config = { 394 .reg_bits = 8, 395 .val_bits = 8, 396 .wr_table = &axp806_writeable_table, 397 .volatile_table = &axp806_volatile_table, 398 .max_register = AXP806_REG_ADDR_EXT, 399 .cache_type = REGCACHE_RBTREE, 400 }; 401 402 static const struct regmap_config axp15060_regmap_config = { 403 .reg_bits = 8, 404 .val_bits = 8, 405 .wr_table = &axp15060_writeable_table, 406 .volatile_table = &axp15060_volatile_table, 407 .max_register = AXP15060_IRQ2_STATE, 408 .cache_type = REGCACHE_RBTREE, 409 }; 410 411 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 412 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 413 414 static const struct regmap_irq axp152_regmap_irqs[] = { 415 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 416 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 417 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 418 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 419 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 420 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 421 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 422 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 423 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 424 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 425 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 426 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 427 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 428 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 429 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 430 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 431 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 432 }; 433 434 static const struct regmap_irq axp192_regmap_irqs[] = { 435 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7), 436 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6), 437 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5), 438 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4), 439 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3), 440 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2), 441 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1), 442 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7), 443 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6), 444 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5), 445 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4), 446 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3), 447 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2), 448 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1), 449 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0), 450 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7), 451 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6), 452 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5), 453 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4), 454 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3), 455 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1), 456 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0), 457 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7), 458 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6), 459 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5), 460 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4), 461 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3), 462 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2), 463 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0), 464 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7), 465 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2), 466 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1), 467 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0), 468 }; 469 470 static const struct regmap_irq axp20x_regmap_irqs[] = { 471 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 472 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 473 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 474 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 475 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 476 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 477 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 478 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 479 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 480 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 481 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 482 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 483 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 484 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 485 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 486 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 487 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 488 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 489 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 490 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 491 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 492 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 493 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 494 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 495 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 496 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 497 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 498 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 499 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 500 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 501 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 502 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 503 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 504 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 505 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 506 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 507 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 508 }; 509 510 static const struct regmap_irq axp22x_regmap_irqs[] = { 511 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 512 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 513 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 514 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 515 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 516 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 517 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 518 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 519 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 520 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 521 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 522 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 523 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 524 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 525 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 526 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 527 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 528 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 529 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 530 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 531 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 532 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 533 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 534 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 535 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 536 }; 537 538 /* some IRQs are compatible with axp20x models */ 539 static const struct regmap_irq axp288_regmap_irqs[] = { 540 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 541 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 542 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 543 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 544 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 545 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 546 547 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 548 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 549 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 550 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 551 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 552 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 553 554 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 555 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 556 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 557 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 558 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 559 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 560 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 561 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 562 563 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 564 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 565 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 566 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 567 568 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 569 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 570 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 571 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 572 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 573 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 574 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 575 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 576 577 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 578 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 579 }; 580 581 static const struct regmap_irq axp313a_regmap_irqs[] = { 582 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 583 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 584 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 585 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 586 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 587 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 588 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 589 }; 590 591 static const struct regmap_irq axp803_regmap_irqs[] = { 592 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 593 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 594 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 595 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 596 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 597 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 598 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 599 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 600 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 601 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 602 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 603 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 604 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 605 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 606 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 607 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 608 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 609 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 610 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 611 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 612 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 613 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 614 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 615 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 616 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 617 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 618 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 619 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 620 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 621 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 622 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 623 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 624 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 625 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 626 }; 627 628 static const struct regmap_irq axp806_regmap_irqs[] = { 629 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 630 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 631 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 632 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 633 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 634 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 635 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 636 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 637 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 638 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 639 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 640 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 641 }; 642 643 static const struct regmap_irq axp809_regmap_irqs[] = { 644 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 645 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 646 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 647 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 648 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 649 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 650 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 651 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 652 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 653 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 654 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 655 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 656 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 657 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 658 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 659 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 660 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 661 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 662 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 663 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 664 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 665 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 666 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 667 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 668 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 669 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 670 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 671 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 672 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 673 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 674 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 675 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 676 }; 677 678 static const struct regmap_irq axp15060_regmap_irqs[] = { 679 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 680 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 681 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 682 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 683 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 684 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 685 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 686 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 687 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 688 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 689 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 690 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 691 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 692 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 693 }; 694 695 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 696 .name = "axp152_irq_chip", 697 .status_base = AXP152_IRQ1_STATE, 698 .ack_base = AXP152_IRQ1_STATE, 699 .unmask_base = AXP152_IRQ1_EN, 700 .init_ack_masked = true, 701 .irqs = axp152_regmap_irqs, 702 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 703 .num_regs = 3, 704 }; 705 706 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data, 707 unsigned int base, int index) 708 { 709 /* linear mapping for IRQ1 to IRQ4 */ 710 if (index < 4) 711 return base + index; 712 713 /* handle IRQ5 separately */ 714 if (base == AXP192_IRQ1_EN) 715 return AXP192_IRQ5_EN; 716 717 return AXP192_IRQ5_STATE; 718 } 719 720 static const struct regmap_irq_chip axp192_regmap_irq_chip = { 721 .name = "axp192_irq_chip", 722 .status_base = AXP192_IRQ1_STATE, 723 .ack_base = AXP192_IRQ1_STATE, 724 .unmask_base = AXP192_IRQ1_EN, 725 .init_ack_masked = true, 726 .irqs = axp192_regmap_irqs, 727 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs), 728 .num_regs = 5, 729 .get_irq_reg = axp192_get_irq_reg, 730 }; 731 732 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 733 .name = "axp20x_irq_chip", 734 .status_base = AXP20X_IRQ1_STATE, 735 .ack_base = AXP20X_IRQ1_STATE, 736 .unmask_base = AXP20X_IRQ1_EN, 737 .init_ack_masked = true, 738 .irqs = axp20x_regmap_irqs, 739 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 740 .num_regs = 5, 741 742 }; 743 744 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 745 .name = "axp22x_irq_chip", 746 .status_base = AXP20X_IRQ1_STATE, 747 .ack_base = AXP20X_IRQ1_STATE, 748 .unmask_base = AXP20X_IRQ1_EN, 749 .init_ack_masked = true, 750 .irqs = axp22x_regmap_irqs, 751 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 752 .num_regs = 5, 753 }; 754 755 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 756 .name = "axp288_irq_chip", 757 .status_base = AXP20X_IRQ1_STATE, 758 .ack_base = AXP20X_IRQ1_STATE, 759 .unmask_base = AXP20X_IRQ1_EN, 760 .init_ack_masked = true, 761 .irqs = axp288_regmap_irqs, 762 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 763 .num_regs = 6, 764 765 }; 766 767 static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 768 .name = "axp313a_irq_chip", 769 .status_base = AXP313A_IRQ_STATE, 770 .ack_base = AXP313A_IRQ_STATE, 771 .unmask_base = AXP313A_IRQ_EN, 772 .init_ack_masked = true, 773 .irqs = axp313a_regmap_irqs, 774 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 775 .num_regs = 1, 776 }; 777 778 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 779 .name = "axp803", 780 .status_base = AXP20X_IRQ1_STATE, 781 .ack_base = AXP20X_IRQ1_STATE, 782 .unmask_base = AXP20X_IRQ1_EN, 783 .init_ack_masked = true, 784 .irqs = axp803_regmap_irqs, 785 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 786 .num_regs = 6, 787 }; 788 789 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 790 .name = "axp806", 791 .status_base = AXP20X_IRQ1_STATE, 792 .ack_base = AXP20X_IRQ1_STATE, 793 .unmask_base = AXP20X_IRQ1_EN, 794 .init_ack_masked = true, 795 .irqs = axp806_regmap_irqs, 796 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 797 .num_regs = 2, 798 }; 799 800 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 801 .name = "axp809", 802 .status_base = AXP20X_IRQ1_STATE, 803 .ack_base = AXP20X_IRQ1_STATE, 804 .unmask_base = AXP20X_IRQ1_EN, 805 .init_ack_masked = true, 806 .irqs = axp809_regmap_irqs, 807 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 808 .num_regs = 5, 809 }; 810 811 static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 812 .name = "axp15060", 813 .status_base = AXP15060_IRQ1_STATE, 814 .ack_base = AXP15060_IRQ1_STATE, 815 .unmask_base = AXP15060_IRQ1_EN, 816 .init_ack_masked = true, 817 .irqs = axp15060_regmap_irqs, 818 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 819 .num_regs = 2, 820 }; 821 822 static const struct mfd_cell axp192_cells[] = { 823 { 824 .name = "axp192-adc", 825 .of_compatible = "x-powers,axp192-adc", 826 }, { 827 .name = "axp20x-battery-power-supply", 828 .of_compatible = "x-powers,axp192-battery-power-supply", 829 }, { 830 .name = "axp20x-ac-power-supply", 831 .of_compatible = "x-powers,axp202-ac-power-supply", 832 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources), 833 .resources = axp192_ac_power_supply_resources, 834 }, { 835 .name = "axp20x-usb-power-supply", 836 .of_compatible = "x-powers,axp192-usb-power-supply", 837 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources), 838 .resources = axp192_usb_power_supply_resources, 839 }, 840 { .name = "axp20x-regulator" }, 841 }; 842 843 static const struct mfd_cell axp20x_cells[] = { 844 { 845 .name = "axp20x-gpio", 846 .of_compatible = "x-powers,axp209-gpio", 847 }, { 848 .name = "axp20x-pek", 849 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 850 .resources = axp20x_pek_resources, 851 }, { 852 .name = "axp20x-regulator", 853 }, { 854 .name = "axp20x-adc", 855 .of_compatible = "x-powers,axp209-adc", 856 }, { 857 .name = "axp20x-battery-power-supply", 858 .of_compatible = "x-powers,axp209-battery-power-supply", 859 }, { 860 .name = "axp20x-ac-power-supply", 861 .of_compatible = "x-powers,axp202-ac-power-supply", 862 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 863 .resources = axp20x_ac_power_supply_resources, 864 }, { 865 .name = "axp20x-usb-power-supply", 866 .of_compatible = "x-powers,axp202-usb-power-supply", 867 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 868 .resources = axp20x_usb_power_supply_resources, 869 }, 870 }; 871 872 static const struct mfd_cell axp221_cells[] = { 873 { 874 .name = "axp20x-gpio", 875 .of_compatible = "x-powers,axp221-gpio", 876 }, { 877 .name = "axp221-pek", 878 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 879 .resources = axp22x_pek_resources, 880 }, { 881 .name = "axp20x-regulator", 882 }, { 883 .name = "axp22x-adc", 884 .of_compatible = "x-powers,axp221-adc", 885 }, { 886 .name = "axp20x-ac-power-supply", 887 .of_compatible = "x-powers,axp221-ac-power-supply", 888 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 889 .resources = axp20x_ac_power_supply_resources, 890 }, { 891 .name = "axp20x-battery-power-supply", 892 .of_compatible = "x-powers,axp221-battery-power-supply", 893 }, { 894 .name = "axp20x-usb-power-supply", 895 .of_compatible = "x-powers,axp221-usb-power-supply", 896 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 897 .resources = axp22x_usb_power_supply_resources, 898 }, 899 }; 900 901 static const struct mfd_cell axp223_cells[] = { 902 { 903 .name = "axp20x-gpio", 904 .of_compatible = "x-powers,axp221-gpio", 905 }, { 906 .name = "axp221-pek", 907 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 908 .resources = axp22x_pek_resources, 909 }, { 910 .name = "axp22x-adc", 911 .of_compatible = "x-powers,axp221-adc", 912 }, { 913 .name = "axp20x-battery-power-supply", 914 .of_compatible = "x-powers,axp221-battery-power-supply", 915 }, { 916 .name = "axp20x-regulator", 917 }, { 918 .name = "axp20x-ac-power-supply", 919 .of_compatible = "x-powers,axp221-ac-power-supply", 920 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 921 .resources = axp20x_ac_power_supply_resources, 922 }, { 923 .name = "axp20x-usb-power-supply", 924 .of_compatible = "x-powers,axp223-usb-power-supply", 925 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 926 .resources = axp22x_usb_power_supply_resources, 927 }, 928 }; 929 930 static const struct mfd_cell axp152_cells[] = { 931 { 932 .name = "axp20x-pek", 933 .num_resources = ARRAY_SIZE(axp152_pek_resources), 934 .resources = axp152_pek_resources, 935 }, 936 }; 937 938 static struct mfd_cell axp313a_cells[] = { 939 MFD_CELL_NAME("axp20x-regulator"), 940 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 941 }; 942 943 static const struct resource axp288_adc_resources[] = { 944 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 945 }; 946 947 static const struct resource axp288_extcon_resources[] = { 948 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 949 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 950 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 951 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 952 }; 953 954 static const struct resource axp288_charger_resources[] = { 955 DEFINE_RES_IRQ(AXP288_IRQ_OV), 956 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 957 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 958 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 959 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 960 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 961 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 962 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 963 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 964 }; 965 966 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 967 968 static const struct property_entry axp288_fuel_gauge_properties[] = { 969 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 970 { } 971 }; 972 973 static const struct software_node axp288_fuel_gauge_sw_node = { 974 .name = "axp288_fuel_gauge", 975 .properties = axp288_fuel_gauge_properties, 976 }; 977 978 static const struct mfd_cell axp288_cells[] = { 979 { 980 .name = "axp288_adc", 981 .num_resources = ARRAY_SIZE(axp288_adc_resources), 982 .resources = axp288_adc_resources, 983 }, { 984 .name = "axp288_extcon", 985 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 986 .resources = axp288_extcon_resources, 987 }, { 988 .name = "axp288_charger", 989 .num_resources = ARRAY_SIZE(axp288_charger_resources), 990 .resources = axp288_charger_resources, 991 }, { 992 .name = "axp288_fuel_gauge", 993 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 994 .resources = axp288_fuel_gauge_resources, 995 .swnode = &axp288_fuel_gauge_sw_node, 996 }, { 997 .name = "axp221-pek", 998 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 999 .resources = axp288_power_button_resources, 1000 }, { 1001 .name = "axp288_pmic_acpi", 1002 }, 1003 }; 1004 1005 static const struct mfd_cell axp803_cells[] = { 1006 { 1007 .name = "axp221-pek", 1008 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1009 .resources = axp803_pek_resources, 1010 }, { 1011 .name = "axp20x-gpio", 1012 .of_compatible = "x-powers,axp813-gpio", 1013 }, { 1014 .name = "axp813-adc", 1015 .of_compatible = "x-powers,axp813-adc", 1016 }, { 1017 .name = "axp20x-battery-power-supply", 1018 .of_compatible = "x-powers,axp813-battery-power-supply", 1019 }, { 1020 .name = "axp20x-ac-power-supply", 1021 .of_compatible = "x-powers,axp813-ac-power-supply", 1022 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1023 .resources = axp20x_ac_power_supply_resources, 1024 }, { 1025 .name = "axp20x-usb-power-supply", 1026 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1027 .resources = axp803_usb_power_supply_resources, 1028 .of_compatible = "x-powers,axp813-usb-power-supply", 1029 }, 1030 { .name = "axp20x-regulator" }, 1031 }; 1032 1033 static const struct mfd_cell axp806_self_working_cells[] = { 1034 { 1035 .name = "axp221-pek", 1036 .num_resources = ARRAY_SIZE(axp806_pek_resources), 1037 .resources = axp806_pek_resources, 1038 }, 1039 { .name = "axp20x-regulator" }, 1040 }; 1041 1042 static const struct mfd_cell axp806_cells[] = { 1043 { 1044 .id = 2, 1045 .name = "axp20x-regulator", 1046 }, 1047 }; 1048 1049 static const struct mfd_cell axp809_cells[] = { 1050 { 1051 .name = "axp20x-gpio", 1052 .of_compatible = "x-powers,axp221-gpio", 1053 }, { 1054 .name = "axp221-pek", 1055 .num_resources = ARRAY_SIZE(axp809_pek_resources), 1056 .resources = axp809_pek_resources, 1057 }, { 1058 .id = 1, 1059 .name = "axp20x-regulator", 1060 }, 1061 }; 1062 1063 static const struct mfd_cell axp813_cells[] = { 1064 { 1065 .name = "axp221-pek", 1066 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1067 .resources = axp803_pek_resources, 1068 }, { 1069 .name = "axp20x-regulator", 1070 }, { 1071 .name = "axp20x-gpio", 1072 .of_compatible = "x-powers,axp813-gpio", 1073 }, { 1074 .name = "axp813-adc", 1075 .of_compatible = "x-powers,axp813-adc", 1076 }, { 1077 .name = "axp20x-battery-power-supply", 1078 .of_compatible = "x-powers,axp813-battery-power-supply", 1079 }, { 1080 .name = "axp20x-ac-power-supply", 1081 .of_compatible = "x-powers,axp813-ac-power-supply", 1082 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1083 .resources = axp20x_ac_power_supply_resources, 1084 }, { 1085 .name = "axp20x-usb-power-supply", 1086 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1087 .resources = axp803_usb_power_supply_resources, 1088 .of_compatible = "x-powers,axp813-usb-power-supply", 1089 }, 1090 }; 1091 1092 static const struct mfd_cell axp15060_cells[] = { 1093 { 1094 .name = "axp221-pek", 1095 .num_resources = ARRAY_SIZE(axp15060_pek_resources), 1096 .resources = axp15060_pek_resources, 1097 }, { 1098 .name = "axp20x-regulator", 1099 }, 1100 }; 1101 1102 /* For boards that don't have IRQ line connected to SOC. */ 1103 static const struct mfd_cell axp_regulator_only_cells[] = { 1104 { 1105 .name = "axp20x-regulator", 1106 }, 1107 }; 1108 1109 static int axp20x_power_off(struct sys_off_data *data) 1110 { 1111 struct axp20x_dev *axp20x = data->cb_data; 1112 unsigned int shutdown_reg; 1113 1114 switch (axp20x->variant) { 1115 case AXP313A_ID: 1116 shutdown_reg = AXP313A_SHUTDOWN_CTRL; 1117 break; 1118 default: 1119 shutdown_reg = AXP20X_OFF_CTRL; 1120 break; 1121 } 1122 1123 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 1124 1125 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 1126 mdelay(500); 1127 1128 return NOTIFY_DONE; 1129 } 1130 1131 int axp20x_match_device(struct axp20x_dev *axp20x) 1132 { 1133 struct device *dev = axp20x->dev; 1134 const struct acpi_device_id *acpi_id; 1135 const struct of_device_id *of_id; 1136 1137 if (dev->of_node) { 1138 of_id = of_match_device(dev->driver->of_match_table, dev); 1139 if (!of_id) { 1140 dev_err(dev, "Unable to match OF ID\n"); 1141 return -ENODEV; 1142 } 1143 axp20x->variant = (long)of_id->data; 1144 } else { 1145 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 1146 if (!acpi_id || !acpi_id->driver_data) { 1147 dev_err(dev, "Unable to match ACPI ID and data\n"); 1148 return -ENODEV; 1149 } 1150 axp20x->variant = (long)acpi_id->driver_data; 1151 } 1152 1153 switch (axp20x->variant) { 1154 case AXP152_ID: 1155 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1156 axp20x->cells = axp152_cells; 1157 axp20x->regmap_cfg = &axp152_regmap_config; 1158 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1159 break; 1160 case AXP192_ID: 1161 axp20x->nr_cells = ARRAY_SIZE(axp192_cells); 1162 axp20x->cells = axp192_cells; 1163 axp20x->regmap_cfg = &axp192_regmap_config; 1164 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip; 1165 break; 1166 case AXP202_ID: 1167 case AXP209_ID: 1168 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1169 axp20x->cells = axp20x_cells; 1170 axp20x->regmap_cfg = &axp20x_regmap_config; 1171 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1172 break; 1173 case AXP221_ID: 1174 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 1175 axp20x->cells = axp221_cells; 1176 axp20x->regmap_cfg = &axp22x_regmap_config; 1177 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1178 break; 1179 case AXP223_ID: 1180 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 1181 axp20x->cells = axp223_cells; 1182 axp20x->regmap_cfg = &axp22x_regmap_config; 1183 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1184 break; 1185 case AXP288_ID: 1186 axp20x->cells = axp288_cells; 1187 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1188 axp20x->regmap_cfg = &axp288_regmap_config; 1189 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 1190 axp20x->irq_flags = IRQF_TRIGGER_LOW; 1191 break; 1192 case AXP313A_ID: 1193 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1194 axp20x->cells = axp313a_cells; 1195 axp20x->regmap_cfg = &axp313a_regmap_config; 1196 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1197 break; 1198 case AXP803_ID: 1199 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 1200 axp20x->cells = axp803_cells; 1201 axp20x->regmap_cfg = &axp288_regmap_config; 1202 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1203 break; 1204 case AXP806_ID: 1205 /* 1206 * Don't register the power key part if in slave mode or 1207 * if there is no interrupt line. 1208 */ 1209 if (of_property_read_bool(axp20x->dev->of_node, 1210 "x-powers,self-working-mode") && 1211 axp20x->irq > 0) { 1212 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 1213 axp20x->cells = axp806_self_working_cells; 1214 } else { 1215 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 1216 axp20x->cells = axp806_cells; 1217 } 1218 axp20x->regmap_cfg = &axp806_regmap_config; 1219 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 1220 break; 1221 case AXP809_ID: 1222 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 1223 axp20x->cells = axp809_cells; 1224 axp20x->regmap_cfg = &axp22x_regmap_config; 1225 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 1226 break; 1227 case AXP813_ID: 1228 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 1229 axp20x->cells = axp813_cells; 1230 axp20x->regmap_cfg = &axp288_regmap_config; 1231 /* 1232 * The IRQ table given in the datasheet is incorrect. 1233 * In IRQ enable/status registers 1, there are separate 1234 * IRQs for ACIN and VBUS, instead of bits [7:5] being 1235 * the same as bits [4:2]. So it shares the same IRQs 1236 * as the AXP803, rather than the AXP288. 1237 */ 1238 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1239 break; 1240 case AXP15060_ID: 1241 /* 1242 * Don't register the power key part if there is no interrupt 1243 * line. 1244 * 1245 * Since most use cases of AXP PMICs are Allwinner SOCs, board 1246 * designers follow Allwinner's reference design and connects 1247 * IRQ line to SOC, there's no need for those variants to deal 1248 * with cases that IRQ isn't connected. However, AXP15660 is 1249 * used by some other vendors' SOCs that didn't connect IRQ 1250 * line, we need to deal with this case. 1251 */ 1252 if (axp20x->irq > 0) { 1253 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1254 axp20x->cells = axp15060_cells; 1255 } else { 1256 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1257 axp20x->cells = axp_regulator_only_cells; 1258 } 1259 axp20x->regmap_cfg = &axp15060_regmap_config; 1260 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1261 break; 1262 default: 1263 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 1264 return -EINVAL; 1265 } 1266 dev_info(dev, "AXP20x variant %s found\n", 1267 axp20x_model_names[axp20x->variant]); 1268 1269 return 0; 1270 } 1271 EXPORT_SYMBOL(axp20x_match_device); 1272 1273 int axp20x_device_probe(struct axp20x_dev *axp20x) 1274 { 1275 int ret; 1276 1277 /* 1278 * The AXP806 supports either master/standalone or slave mode. 1279 * Slave mode allows sharing the serial bus, even with multiple 1280 * AXP806 which all have the same hardware address. 1281 * 1282 * This is done with extra "serial interface address extension", 1283 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1284 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1285 * 1 bit customizable at the factory, and 1 bit depending on the 1286 * state of an external pin. The latter is writable. The device 1287 * will only respond to operations to its other registers when 1288 * the these device addressing bits (in the upper 4 bits of the 1289 * registers) match. 1290 * 1291 * By default we support an AXP806 chained to an AXP809 in slave 1292 * mode. Boards which use an AXP806 in master mode can set the 1293 * property "x-powers,master-mode" to override the default. 1294 */ 1295 if (axp20x->variant == AXP806_ID) { 1296 if (of_property_read_bool(axp20x->dev->of_node, 1297 "x-powers,master-mode") || 1298 of_property_read_bool(axp20x->dev->of_node, 1299 "x-powers,self-working-mode")) 1300 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1301 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1302 else 1303 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1304 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1305 } 1306 1307 /* Only if there is an interrupt line connected towards the CPU. */ 1308 if (axp20x->irq > 0) { 1309 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1310 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1311 -1, axp20x->regmap_irq_chip, 1312 &axp20x->regmap_irqc); 1313 if (ret) { 1314 dev_err(axp20x->dev, "failed to add irq chip: %d\n", 1315 ret); 1316 return ret; 1317 } 1318 } 1319 1320 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1321 axp20x->nr_cells, NULL, 0, NULL); 1322 1323 if (ret) { 1324 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1325 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1326 return ret; 1327 } 1328 1329 if (axp20x->variant != AXP288_ID) 1330 devm_register_sys_off_handler(axp20x->dev, 1331 SYS_OFF_MODE_POWER_OFF, 1332 SYS_OFF_PRIO_DEFAULT, 1333 axp20x_power_off, axp20x); 1334 1335 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1336 1337 return 0; 1338 } 1339 EXPORT_SYMBOL(axp20x_device_probe); 1340 1341 void axp20x_device_remove(struct axp20x_dev *axp20x) 1342 { 1343 mfd_remove_devices(axp20x->dev); 1344 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1345 } 1346 EXPORT_SYMBOL(axp20x_device_remove); 1347 1348 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1349 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1350 MODULE_LICENSE("GPL"); 1351