1 /* 2 * MFD core driver for the X-Powers' Power Management ICs 3 * 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 * as well as configurable GPIOs. 7 * 8 * This file contains the interface independent core functions. 9 * 10 * Copyright (C) 2014 Carlo Caione 11 * 12 * Author: Carlo Caione <carlo@caione.org> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19 #include <linux/err.h> 20 #include <linux/delay.h> 21 #include <linux/interrupt.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/regmap.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/mfd/axp20x.h> 28 #include <linux/mfd/core.h> 29 #include <linux/of_device.h> 30 #include <linux/acpi.h> 31 32 #define AXP20X_OFF 0x80 33 34 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 35 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 36 37 static const char * const axp20x_model_names[] = { 38 "AXP152", 39 "AXP202", 40 "AXP209", 41 "AXP221", 42 "AXP223", 43 "AXP288", 44 "AXP803", 45 "AXP806", 46 "AXP809", 47 "AXP813", 48 }; 49 50 static const struct regmap_range axp152_writeable_ranges[] = { 51 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 52 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 53 }; 54 55 static const struct regmap_range axp152_volatile_ranges[] = { 56 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 57 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 58 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 59 }; 60 61 static const struct regmap_access_table axp152_writeable_table = { 62 .yes_ranges = axp152_writeable_ranges, 63 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 64 }; 65 66 static const struct regmap_access_table axp152_volatile_table = { 67 .yes_ranges = axp152_volatile_ranges, 68 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 69 }; 70 71 static const struct regmap_range axp20x_writeable_ranges[] = { 72 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 73 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 74 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 75 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 76 }; 77 78 static const struct regmap_range axp20x_volatile_ranges[] = { 79 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 80 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 81 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 82 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 83 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 84 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 85 }; 86 87 static const struct regmap_access_table axp20x_writeable_table = { 88 .yes_ranges = axp20x_writeable_ranges, 89 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 90 }; 91 92 static const struct regmap_access_table axp20x_volatile_table = { 93 .yes_ranges = axp20x_volatile_ranges, 94 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 95 }; 96 97 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 98 static const struct regmap_range axp22x_writeable_ranges[] = { 99 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 100 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 101 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 102 }; 103 104 static const struct regmap_range axp22x_volatile_ranges[] = { 105 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 106 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 107 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 108 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 109 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 110 }; 111 112 static const struct regmap_access_table axp22x_writeable_table = { 113 .yes_ranges = axp22x_writeable_ranges, 114 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 115 }; 116 117 static const struct regmap_access_table axp22x_volatile_table = { 118 .yes_ranges = axp22x_volatile_ranges, 119 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 120 }; 121 122 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 123 static const struct regmap_range axp288_writeable_ranges[] = { 124 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 125 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 126 }; 127 128 static const struct regmap_range axp288_volatile_ranges[] = { 129 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 130 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 131 regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT), 132 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 133 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 134 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 135 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 136 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 137 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 138 }; 139 140 static const struct regmap_access_table axp288_writeable_table = { 141 .yes_ranges = axp288_writeable_ranges, 142 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 143 }; 144 145 static const struct regmap_access_table axp288_volatile_table = { 146 .yes_ranges = axp288_volatile_ranges, 147 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 148 }; 149 150 static const struct regmap_range axp806_writeable_ranges[] = { 151 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 152 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 153 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 154 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 155 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 156 }; 157 158 static const struct regmap_range axp806_volatile_ranges[] = { 159 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 160 }; 161 162 static const struct regmap_access_table axp806_writeable_table = { 163 .yes_ranges = axp806_writeable_ranges, 164 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 165 }; 166 167 static const struct regmap_access_table axp806_volatile_table = { 168 .yes_ranges = axp806_volatile_ranges, 169 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 170 }; 171 172 static const struct resource axp152_pek_resources[] = { 173 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 174 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 175 }; 176 177 static const struct resource axp20x_ac_power_supply_resources[] = { 178 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 179 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 180 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 181 }; 182 183 static const struct resource axp20x_pek_resources[] = { 184 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 185 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 186 }; 187 188 static const struct resource axp20x_usb_power_supply_resources[] = { 189 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 190 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 191 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 192 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 193 }; 194 195 static const struct resource axp22x_usb_power_supply_resources[] = { 196 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 197 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 198 }; 199 200 static const struct resource axp22x_pek_resources[] = { 201 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 202 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 203 }; 204 205 static const struct resource axp288_power_button_resources[] = { 206 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 207 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 208 }; 209 210 static const struct resource axp288_fuel_gauge_resources[] = { 211 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 212 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 213 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 214 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 215 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 216 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 217 }; 218 219 static const struct resource axp803_pek_resources[] = { 220 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 221 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 222 }; 223 224 static const struct resource axp809_pek_resources[] = { 225 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 226 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 227 }; 228 229 static const struct regmap_config axp152_regmap_config = { 230 .reg_bits = 8, 231 .val_bits = 8, 232 .wr_table = &axp152_writeable_table, 233 .volatile_table = &axp152_volatile_table, 234 .max_register = AXP152_PWM1_DUTY_CYCLE, 235 .cache_type = REGCACHE_RBTREE, 236 }; 237 238 static const struct regmap_config axp20x_regmap_config = { 239 .reg_bits = 8, 240 .val_bits = 8, 241 .wr_table = &axp20x_writeable_table, 242 .volatile_table = &axp20x_volatile_table, 243 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 244 .cache_type = REGCACHE_RBTREE, 245 }; 246 247 static const struct regmap_config axp22x_regmap_config = { 248 .reg_bits = 8, 249 .val_bits = 8, 250 .wr_table = &axp22x_writeable_table, 251 .volatile_table = &axp22x_volatile_table, 252 .max_register = AXP22X_BATLOW_THRES1, 253 .cache_type = REGCACHE_RBTREE, 254 }; 255 256 static const struct regmap_config axp288_regmap_config = { 257 .reg_bits = 8, 258 .val_bits = 8, 259 .wr_table = &axp288_writeable_table, 260 .volatile_table = &axp288_volatile_table, 261 .max_register = AXP288_FG_TUNE5, 262 .cache_type = REGCACHE_RBTREE, 263 }; 264 265 static const struct regmap_config axp806_regmap_config = { 266 .reg_bits = 8, 267 .val_bits = 8, 268 .wr_table = &axp806_writeable_table, 269 .volatile_table = &axp806_volatile_table, 270 .max_register = AXP806_REG_ADDR_EXT, 271 .cache_type = REGCACHE_RBTREE, 272 }; 273 274 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 275 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 276 277 static const struct regmap_irq axp152_regmap_irqs[] = { 278 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 279 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 280 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 281 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 282 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 283 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 284 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 285 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 286 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 287 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 288 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 289 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 290 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 291 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 292 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 293 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 294 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 295 }; 296 297 static const struct regmap_irq axp20x_regmap_irqs[] = { 298 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 299 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 300 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 301 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 302 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 303 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 304 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 305 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 306 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 307 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 308 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 309 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 310 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 311 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 312 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 313 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 314 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 315 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 316 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 317 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 318 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 319 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 320 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 321 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 322 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 323 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 324 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 325 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 326 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 327 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 328 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 329 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 330 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 331 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 332 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 333 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 334 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 335 }; 336 337 static const struct regmap_irq axp22x_regmap_irqs[] = { 338 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 339 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 340 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 341 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 342 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 343 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 344 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 345 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 346 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 347 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 348 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 349 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 350 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 351 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 352 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 353 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 354 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 355 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 356 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 357 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 358 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 359 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 360 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 361 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 362 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 363 }; 364 365 /* some IRQs are compatible with axp20x models */ 366 static const struct regmap_irq axp288_regmap_irqs[] = { 367 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 368 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 369 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 370 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 371 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 372 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 373 374 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 375 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 376 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 377 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 378 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 379 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 380 381 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 382 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 383 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 384 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 385 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 386 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 387 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 388 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 389 390 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 391 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 392 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 393 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 394 395 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 396 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 397 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 398 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 399 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 400 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 401 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 402 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 403 404 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 405 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 406 }; 407 408 static const struct regmap_irq axp803_regmap_irqs[] = { 409 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 410 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 411 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 412 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 413 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 414 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 415 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 416 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 417 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 418 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 419 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 420 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 421 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 422 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 423 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 424 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 425 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 426 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 427 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 428 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 429 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 430 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 431 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 432 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 433 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 434 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 435 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 436 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 437 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 438 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 439 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 440 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 441 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 442 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 443 }; 444 445 static const struct regmap_irq axp806_regmap_irqs[] = { 446 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 447 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 448 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 449 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 450 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 451 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 452 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 453 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 454 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 455 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 456 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 457 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 458 }; 459 460 static const struct regmap_irq axp809_regmap_irqs[] = { 461 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 462 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 463 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 464 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 465 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 466 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 467 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 468 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 469 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 470 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 471 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 472 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 473 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 474 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 475 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 476 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 477 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 478 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 479 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 480 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 481 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 482 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 483 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 484 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 485 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 486 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 487 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 488 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 489 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 490 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 491 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 492 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 493 }; 494 495 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 496 .name = "axp152_irq_chip", 497 .status_base = AXP152_IRQ1_STATE, 498 .ack_base = AXP152_IRQ1_STATE, 499 .mask_base = AXP152_IRQ1_EN, 500 .mask_invert = true, 501 .init_ack_masked = true, 502 .irqs = axp152_regmap_irqs, 503 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 504 .num_regs = 3, 505 }; 506 507 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 508 .name = "axp20x_irq_chip", 509 .status_base = AXP20X_IRQ1_STATE, 510 .ack_base = AXP20X_IRQ1_STATE, 511 .mask_base = AXP20X_IRQ1_EN, 512 .mask_invert = true, 513 .init_ack_masked = true, 514 .irqs = axp20x_regmap_irqs, 515 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 516 .num_regs = 5, 517 518 }; 519 520 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 521 .name = "axp22x_irq_chip", 522 .status_base = AXP20X_IRQ1_STATE, 523 .ack_base = AXP20X_IRQ1_STATE, 524 .mask_base = AXP20X_IRQ1_EN, 525 .mask_invert = true, 526 .init_ack_masked = true, 527 .irqs = axp22x_regmap_irqs, 528 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 529 .num_regs = 5, 530 }; 531 532 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 533 .name = "axp288_irq_chip", 534 .status_base = AXP20X_IRQ1_STATE, 535 .ack_base = AXP20X_IRQ1_STATE, 536 .mask_base = AXP20X_IRQ1_EN, 537 .mask_invert = true, 538 .init_ack_masked = true, 539 .irqs = axp288_regmap_irqs, 540 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 541 .num_regs = 6, 542 543 }; 544 545 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 546 .name = "axp803", 547 .status_base = AXP20X_IRQ1_STATE, 548 .ack_base = AXP20X_IRQ1_STATE, 549 .mask_base = AXP20X_IRQ1_EN, 550 .mask_invert = true, 551 .init_ack_masked = true, 552 .irqs = axp803_regmap_irqs, 553 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 554 .num_regs = 6, 555 }; 556 557 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 558 .name = "axp806", 559 .status_base = AXP20X_IRQ1_STATE, 560 .ack_base = AXP20X_IRQ1_STATE, 561 .mask_base = AXP20X_IRQ1_EN, 562 .mask_invert = true, 563 .init_ack_masked = true, 564 .irqs = axp806_regmap_irqs, 565 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 566 .num_regs = 2, 567 }; 568 569 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 570 .name = "axp809", 571 .status_base = AXP20X_IRQ1_STATE, 572 .ack_base = AXP20X_IRQ1_STATE, 573 .mask_base = AXP20X_IRQ1_EN, 574 .mask_invert = true, 575 .init_ack_masked = true, 576 .irqs = axp809_regmap_irqs, 577 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 578 .num_regs = 5, 579 }; 580 581 static const struct mfd_cell axp20x_cells[] = { 582 { 583 .name = "axp20x-gpio", 584 .of_compatible = "x-powers,axp209-gpio", 585 }, { 586 .name = "axp20x-pek", 587 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 588 .resources = axp20x_pek_resources, 589 }, { 590 .name = "axp20x-regulator", 591 }, { 592 .name = "axp20x-adc", 593 .of_compatible = "x-powers,axp209-adc", 594 }, { 595 .name = "axp20x-battery-power-supply", 596 .of_compatible = "x-powers,axp209-battery-power-supply", 597 }, { 598 .name = "axp20x-ac-power-supply", 599 .of_compatible = "x-powers,axp202-ac-power-supply", 600 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 601 .resources = axp20x_ac_power_supply_resources, 602 }, { 603 .name = "axp20x-usb-power-supply", 604 .of_compatible = "x-powers,axp202-usb-power-supply", 605 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 606 .resources = axp20x_usb_power_supply_resources, 607 }, 608 }; 609 610 static const struct mfd_cell axp221_cells[] = { 611 { 612 .name = "axp221-pek", 613 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 614 .resources = axp22x_pek_resources, 615 }, { 616 .name = "axp20x-regulator", 617 }, { 618 .name = "axp22x-adc", 619 .of_compatible = "x-powers,axp221-adc", 620 }, { 621 .name = "axp20x-ac-power-supply", 622 .of_compatible = "x-powers,axp221-ac-power-supply", 623 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 624 .resources = axp20x_ac_power_supply_resources, 625 }, { 626 .name = "axp20x-battery-power-supply", 627 .of_compatible = "x-powers,axp221-battery-power-supply", 628 }, { 629 .name = "axp20x-usb-power-supply", 630 .of_compatible = "x-powers,axp221-usb-power-supply", 631 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 632 .resources = axp22x_usb_power_supply_resources, 633 }, 634 }; 635 636 static const struct mfd_cell axp223_cells[] = { 637 { 638 .name = "axp221-pek", 639 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 640 .resources = axp22x_pek_resources, 641 }, { 642 .name = "axp22x-adc", 643 .of_compatible = "x-powers,axp221-adc", 644 }, { 645 .name = "axp20x-battery-power-supply", 646 .of_compatible = "x-powers,axp221-battery-power-supply", 647 }, { 648 .name = "axp20x-regulator", 649 }, { 650 .name = "axp20x-ac-power-supply", 651 .of_compatible = "x-powers,axp221-ac-power-supply", 652 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 653 .resources = axp20x_ac_power_supply_resources, 654 }, { 655 .name = "axp20x-usb-power-supply", 656 .of_compatible = "x-powers,axp223-usb-power-supply", 657 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 658 .resources = axp22x_usb_power_supply_resources, 659 }, 660 }; 661 662 static const struct mfd_cell axp152_cells[] = { 663 { 664 .name = "axp20x-pek", 665 .num_resources = ARRAY_SIZE(axp152_pek_resources), 666 .resources = axp152_pek_resources, 667 }, 668 }; 669 670 static const struct resource axp288_adc_resources[] = { 671 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 672 }; 673 674 static const struct resource axp288_extcon_resources[] = { 675 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 676 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 677 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 678 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 679 }; 680 681 static const struct resource axp288_charger_resources[] = { 682 DEFINE_RES_IRQ(AXP288_IRQ_OV), 683 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 684 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 685 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 686 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 687 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 688 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 689 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 690 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 691 }; 692 693 static const struct mfd_cell axp288_cells[] = { 694 { 695 .name = "axp288_adc", 696 .num_resources = ARRAY_SIZE(axp288_adc_resources), 697 .resources = axp288_adc_resources, 698 }, 699 { 700 .name = "axp288_extcon", 701 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 702 .resources = axp288_extcon_resources, 703 }, 704 { 705 .name = "axp288_charger", 706 .num_resources = ARRAY_SIZE(axp288_charger_resources), 707 .resources = axp288_charger_resources, 708 }, 709 { 710 .name = "axp288_fuel_gauge", 711 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 712 .resources = axp288_fuel_gauge_resources, 713 }, 714 { 715 .name = "axp221-pek", 716 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 717 .resources = axp288_power_button_resources, 718 }, 719 { 720 .name = "axp288_pmic_acpi", 721 }, 722 }; 723 724 static const struct mfd_cell axp803_cells[] = { 725 { 726 .name = "axp221-pek", 727 .num_resources = ARRAY_SIZE(axp803_pek_resources), 728 .resources = axp803_pek_resources, 729 }, 730 { .name = "axp20x-regulator" }, 731 }; 732 733 static const struct mfd_cell axp806_cells[] = { 734 { 735 .id = 2, 736 .name = "axp20x-regulator", 737 }, 738 }; 739 740 static const struct mfd_cell axp809_cells[] = { 741 { 742 .name = "axp221-pek", 743 .num_resources = ARRAY_SIZE(axp809_pek_resources), 744 .resources = axp809_pek_resources, 745 }, { 746 .id = 1, 747 .name = "axp20x-regulator", 748 }, 749 }; 750 751 static const struct mfd_cell axp813_cells[] = { 752 { 753 .name = "axp221-pek", 754 .num_resources = ARRAY_SIZE(axp803_pek_resources), 755 .resources = axp803_pek_resources, 756 }, { 757 .name = "axp20x-regulator", 758 }, { 759 .name = "axp20x-gpio", 760 .of_compatible = "x-powers,axp813-gpio", 761 }, { 762 .name = "axp813-adc", 763 .of_compatible = "x-powers,axp813-adc", 764 }, { 765 .name = "axp20x-battery-power-supply", 766 .of_compatible = "x-powers,axp813-battery-power-supply", 767 }, 768 }; 769 770 static struct axp20x_dev *axp20x_pm_power_off; 771 static void axp20x_power_off(void) 772 { 773 if (axp20x_pm_power_off->variant == AXP288_ID) 774 return; 775 776 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, 777 AXP20X_OFF); 778 779 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 780 msleep(500); 781 } 782 783 int axp20x_match_device(struct axp20x_dev *axp20x) 784 { 785 struct device *dev = axp20x->dev; 786 const struct acpi_device_id *acpi_id; 787 const struct of_device_id *of_id; 788 789 if (dev->of_node) { 790 of_id = of_match_device(dev->driver->of_match_table, dev); 791 if (!of_id) { 792 dev_err(dev, "Unable to match OF ID\n"); 793 return -ENODEV; 794 } 795 axp20x->variant = (long)of_id->data; 796 } else { 797 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 798 if (!acpi_id || !acpi_id->driver_data) { 799 dev_err(dev, "Unable to match ACPI ID and data\n"); 800 return -ENODEV; 801 } 802 axp20x->variant = (long)acpi_id->driver_data; 803 } 804 805 switch (axp20x->variant) { 806 case AXP152_ID: 807 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 808 axp20x->cells = axp152_cells; 809 axp20x->regmap_cfg = &axp152_regmap_config; 810 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 811 break; 812 case AXP202_ID: 813 case AXP209_ID: 814 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 815 axp20x->cells = axp20x_cells; 816 axp20x->regmap_cfg = &axp20x_regmap_config; 817 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 818 break; 819 case AXP221_ID: 820 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 821 axp20x->cells = axp221_cells; 822 axp20x->regmap_cfg = &axp22x_regmap_config; 823 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 824 break; 825 case AXP223_ID: 826 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 827 axp20x->cells = axp223_cells; 828 axp20x->regmap_cfg = &axp22x_regmap_config; 829 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 830 break; 831 case AXP288_ID: 832 axp20x->cells = axp288_cells; 833 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 834 axp20x->regmap_cfg = &axp288_regmap_config; 835 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 836 axp20x->irq_flags = IRQF_TRIGGER_LOW; 837 break; 838 case AXP803_ID: 839 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 840 axp20x->cells = axp803_cells; 841 axp20x->regmap_cfg = &axp288_regmap_config; 842 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 843 break; 844 case AXP806_ID: 845 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 846 axp20x->cells = axp806_cells; 847 axp20x->regmap_cfg = &axp806_regmap_config; 848 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 849 break; 850 case AXP809_ID: 851 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 852 axp20x->cells = axp809_cells; 853 axp20x->regmap_cfg = &axp22x_regmap_config; 854 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 855 break; 856 case AXP813_ID: 857 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 858 axp20x->cells = axp813_cells; 859 axp20x->regmap_cfg = &axp288_regmap_config; 860 /* 861 * The IRQ table given in the datasheet is incorrect. 862 * In IRQ enable/status registers 1, there are separate 863 * IRQs for ACIN and VBUS, instead of bits [7:5] being 864 * the same as bits [4:2]. So it shares the same IRQs 865 * as the AXP803, rather than the AXP288. 866 */ 867 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 868 break; 869 default: 870 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 871 return -EINVAL; 872 } 873 dev_info(dev, "AXP20x variant %s found\n", 874 axp20x_model_names[axp20x->variant]); 875 876 return 0; 877 } 878 EXPORT_SYMBOL(axp20x_match_device); 879 880 int axp20x_device_probe(struct axp20x_dev *axp20x) 881 { 882 int ret; 883 884 /* 885 * The AXP806 supports either master/standalone or slave mode. 886 * Slave mode allows sharing the serial bus, even with multiple 887 * AXP806 which all have the same hardware address. 888 * 889 * This is done with extra "serial interface address extension", 890 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 891 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 892 * 1 bit customizable at the factory, and 1 bit depending on the 893 * state of an external pin. The latter is writable. The device 894 * will only respond to operations to its other registers when 895 * the these device addressing bits (in the upper 4 bits of the 896 * registers) match. 897 * 898 * By default we support an AXP806 chained to an AXP809 in slave 899 * mode. Boards which use an AXP806 in master mode can set the 900 * property "x-powers,master-mode" to override the default. 901 */ 902 if (axp20x->variant == AXP806_ID) { 903 if (of_property_read_bool(axp20x->dev->of_node, 904 "x-powers,master-mode")) 905 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 906 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 907 else 908 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 909 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 910 } 911 912 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 913 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 914 -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); 915 if (ret) { 916 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); 917 return ret; 918 } 919 920 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 921 axp20x->nr_cells, NULL, 0, NULL); 922 923 if (ret) { 924 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 925 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 926 return ret; 927 } 928 929 if (!pm_power_off) { 930 axp20x_pm_power_off = axp20x; 931 pm_power_off = axp20x_power_off; 932 } 933 934 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 935 936 return 0; 937 } 938 EXPORT_SYMBOL(axp20x_device_probe); 939 940 int axp20x_device_remove(struct axp20x_dev *axp20x) 941 { 942 if (axp20x == axp20x_pm_power_off) { 943 axp20x_pm_power_off = NULL; 944 pm_power_off = NULL; 945 } 946 947 mfd_remove_devices(axp20x->dev); 948 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 949 950 return 0; 951 } 952 EXPORT_SYMBOL(axp20x_device_remove); 953 954 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 955 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 956 MODULE_LICENSE("GPL"); 957