1 /* 2 * MFD core driver for the X-Powers' Power Management ICs 3 * 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 * as well as configurable GPIOs. 7 * 8 * This file contains the interface independent core functions. 9 * 10 * Copyright (C) 2014 Carlo Caione 11 * 12 * Author: Carlo Caione <carlo@caione.org> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19 #include <linux/err.h> 20 #include <linux/delay.h> 21 #include <linux/interrupt.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/regmap.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/mfd/axp20x.h> 28 #include <linux/mfd/core.h> 29 #include <linux/of_device.h> 30 #include <linux/acpi.h> 31 32 #define AXP20X_OFF 0x80 33 34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 35 36 static const char * const axp20x_model_names[] = { 37 "AXP152", 38 "AXP202", 39 "AXP209", 40 "AXP221", 41 "AXP223", 42 "AXP288", 43 "AXP806", 44 "AXP809", 45 }; 46 47 static const struct regmap_range axp152_writeable_ranges[] = { 48 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 49 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 50 }; 51 52 static const struct regmap_range axp152_volatile_ranges[] = { 53 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 54 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 55 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 56 }; 57 58 static const struct regmap_access_table axp152_writeable_table = { 59 .yes_ranges = axp152_writeable_ranges, 60 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 61 }; 62 63 static const struct regmap_access_table axp152_volatile_table = { 64 .yes_ranges = axp152_volatile_ranges, 65 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 66 }; 67 68 static const struct regmap_range axp20x_writeable_ranges[] = { 69 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 70 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 71 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 72 }; 73 74 static const struct regmap_range axp20x_volatile_ranges[] = { 75 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 76 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 77 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 78 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 79 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 80 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 81 }; 82 83 static const struct regmap_access_table axp20x_writeable_table = { 84 .yes_ranges = axp20x_writeable_ranges, 85 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 86 }; 87 88 static const struct regmap_access_table axp20x_volatile_table = { 89 .yes_ranges = axp20x_volatile_ranges, 90 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 91 }; 92 93 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 94 static const struct regmap_range axp22x_writeable_ranges[] = { 95 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 96 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 97 }; 98 99 static const struct regmap_range axp22x_volatile_ranges[] = { 100 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 101 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 102 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 103 regmap_reg_range(AXP22X_PMIC_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 104 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 105 }; 106 107 static const struct regmap_access_table axp22x_writeable_table = { 108 .yes_ranges = axp22x_writeable_ranges, 109 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 110 }; 111 112 static const struct regmap_access_table axp22x_volatile_table = { 113 .yes_ranges = axp22x_volatile_ranges, 114 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 115 }; 116 117 static const struct regmap_range axp288_writeable_ranges[] = { 118 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 119 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 120 }; 121 122 static const struct regmap_range axp288_volatile_ranges[] = { 123 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 124 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 125 regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT), 126 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 127 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 128 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 129 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 130 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 131 }; 132 133 static const struct regmap_access_table axp288_writeable_table = { 134 .yes_ranges = axp288_writeable_ranges, 135 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 136 }; 137 138 static const struct regmap_access_table axp288_volatile_table = { 139 .yes_ranges = axp288_volatile_ranges, 140 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 141 }; 142 143 static const struct regmap_range axp806_writeable_ranges[] = { 144 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 145 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 146 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 147 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 148 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 149 }; 150 151 static const struct regmap_range axp806_volatile_ranges[] = { 152 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 153 }; 154 155 static const struct regmap_access_table axp806_writeable_table = { 156 .yes_ranges = axp806_writeable_ranges, 157 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 158 }; 159 160 static const struct regmap_access_table axp806_volatile_table = { 161 .yes_ranges = axp806_volatile_ranges, 162 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 163 }; 164 165 static struct resource axp152_pek_resources[] = { 166 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 167 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 168 }; 169 170 static struct resource axp20x_ac_power_supply_resources[] = { 171 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 172 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 173 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 174 }; 175 176 static struct resource axp20x_pek_resources[] = { 177 { 178 .name = "PEK_DBR", 179 .start = AXP20X_IRQ_PEK_RIS_EDGE, 180 .end = AXP20X_IRQ_PEK_RIS_EDGE, 181 .flags = IORESOURCE_IRQ, 182 }, { 183 .name = "PEK_DBF", 184 .start = AXP20X_IRQ_PEK_FAL_EDGE, 185 .end = AXP20X_IRQ_PEK_FAL_EDGE, 186 .flags = IORESOURCE_IRQ, 187 }, 188 }; 189 190 static struct resource axp20x_usb_power_supply_resources[] = { 191 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 192 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 193 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 194 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 195 }; 196 197 static struct resource axp22x_usb_power_supply_resources[] = { 198 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 199 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 200 }; 201 202 static struct resource axp22x_pek_resources[] = { 203 { 204 .name = "PEK_DBR", 205 .start = AXP22X_IRQ_PEK_RIS_EDGE, 206 .end = AXP22X_IRQ_PEK_RIS_EDGE, 207 .flags = IORESOURCE_IRQ, 208 }, { 209 .name = "PEK_DBF", 210 .start = AXP22X_IRQ_PEK_FAL_EDGE, 211 .end = AXP22X_IRQ_PEK_FAL_EDGE, 212 .flags = IORESOURCE_IRQ, 213 }, 214 }; 215 216 static struct resource axp288_power_button_resources[] = { 217 { 218 .name = "PEK_DBR", 219 .start = AXP288_IRQ_POKP, 220 .end = AXP288_IRQ_POKP, 221 .flags = IORESOURCE_IRQ, 222 }, 223 { 224 .name = "PEK_DBF", 225 .start = AXP288_IRQ_POKN, 226 .end = AXP288_IRQ_POKN, 227 .flags = IORESOURCE_IRQ, 228 }, 229 }; 230 231 static struct resource axp288_fuel_gauge_resources[] = { 232 { 233 .start = AXP288_IRQ_QWBTU, 234 .end = AXP288_IRQ_QWBTU, 235 .flags = IORESOURCE_IRQ, 236 }, 237 { 238 .start = AXP288_IRQ_WBTU, 239 .end = AXP288_IRQ_WBTU, 240 .flags = IORESOURCE_IRQ, 241 }, 242 { 243 .start = AXP288_IRQ_QWBTO, 244 .end = AXP288_IRQ_QWBTO, 245 .flags = IORESOURCE_IRQ, 246 }, 247 { 248 .start = AXP288_IRQ_WBTO, 249 .end = AXP288_IRQ_WBTO, 250 .flags = IORESOURCE_IRQ, 251 }, 252 { 253 .start = AXP288_IRQ_WL2, 254 .end = AXP288_IRQ_WL2, 255 .flags = IORESOURCE_IRQ, 256 }, 257 { 258 .start = AXP288_IRQ_WL1, 259 .end = AXP288_IRQ_WL1, 260 .flags = IORESOURCE_IRQ, 261 }, 262 }; 263 264 static struct resource axp809_pek_resources[] = { 265 { 266 .name = "PEK_DBR", 267 .start = AXP809_IRQ_PEK_RIS_EDGE, 268 .end = AXP809_IRQ_PEK_RIS_EDGE, 269 .flags = IORESOURCE_IRQ, 270 }, { 271 .name = "PEK_DBF", 272 .start = AXP809_IRQ_PEK_FAL_EDGE, 273 .end = AXP809_IRQ_PEK_FAL_EDGE, 274 .flags = IORESOURCE_IRQ, 275 }, 276 }; 277 278 static const struct regmap_config axp152_regmap_config = { 279 .reg_bits = 8, 280 .val_bits = 8, 281 .wr_table = &axp152_writeable_table, 282 .volatile_table = &axp152_volatile_table, 283 .max_register = AXP152_PWM1_DUTY_CYCLE, 284 .cache_type = REGCACHE_RBTREE, 285 }; 286 287 static const struct regmap_config axp20x_regmap_config = { 288 .reg_bits = 8, 289 .val_bits = 8, 290 .wr_table = &axp20x_writeable_table, 291 .volatile_table = &axp20x_volatile_table, 292 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 293 .cache_type = REGCACHE_RBTREE, 294 }; 295 296 static const struct regmap_config axp22x_regmap_config = { 297 .reg_bits = 8, 298 .val_bits = 8, 299 .wr_table = &axp22x_writeable_table, 300 .volatile_table = &axp22x_volatile_table, 301 .max_register = AXP22X_BATLOW_THRES1, 302 .cache_type = REGCACHE_RBTREE, 303 }; 304 305 static const struct regmap_config axp288_regmap_config = { 306 .reg_bits = 8, 307 .val_bits = 8, 308 .wr_table = &axp288_writeable_table, 309 .volatile_table = &axp288_volatile_table, 310 .max_register = AXP288_FG_TUNE5, 311 .cache_type = REGCACHE_RBTREE, 312 }; 313 314 static const struct regmap_config axp806_regmap_config = { 315 .reg_bits = 8, 316 .val_bits = 8, 317 .wr_table = &axp806_writeable_table, 318 .volatile_table = &axp806_volatile_table, 319 .max_register = AXP806_REG_ADDR_EXT, 320 .cache_type = REGCACHE_RBTREE, 321 }; 322 323 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 324 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 325 326 static const struct regmap_irq axp152_regmap_irqs[] = { 327 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 328 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 329 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 330 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 331 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 332 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 333 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 334 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 335 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 336 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 337 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 338 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 339 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 340 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 341 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 342 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 343 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 344 }; 345 346 static const struct regmap_irq axp20x_regmap_irqs[] = { 347 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 348 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 349 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 350 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 351 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 352 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 353 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 354 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 355 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 356 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 357 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 358 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 359 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 360 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 361 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 362 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 363 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 364 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 365 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 366 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 367 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 368 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 369 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 370 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 371 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 372 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 373 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 374 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 375 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 376 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 377 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 378 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 379 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 380 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 381 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 382 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 383 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 384 }; 385 386 static const struct regmap_irq axp22x_regmap_irqs[] = { 387 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 388 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 389 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 390 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 391 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 392 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 393 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 394 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 395 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 396 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 397 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 398 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 399 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 400 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 401 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 402 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 403 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 404 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 405 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 406 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 407 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 408 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 409 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 410 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 411 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 412 }; 413 414 /* some IRQs are compatible with axp20x models */ 415 static const struct regmap_irq axp288_regmap_irqs[] = { 416 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 417 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 418 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 419 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 420 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 421 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 422 423 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 424 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 425 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 426 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 427 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 428 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 429 430 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 431 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 432 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 433 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 434 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 435 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 436 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 437 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 438 439 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 440 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 441 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 442 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 443 444 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 445 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 446 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 447 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 448 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 449 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 450 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 451 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 452 453 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 454 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 455 }; 456 457 static const struct regmap_irq axp806_regmap_irqs[] = { 458 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 459 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 460 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 461 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 462 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 463 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 464 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 465 INIT_REGMAP_IRQ(AXP806, PWROK_LONG, 1, 0), 466 INIT_REGMAP_IRQ(AXP806, PWROK_SHORT, 1, 1), 467 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 468 INIT_REGMAP_IRQ(AXP806, PWROK_FALL, 1, 5), 469 INIT_REGMAP_IRQ(AXP806, PWROK_RISE, 1, 6), 470 }; 471 472 static const struct regmap_irq axp809_regmap_irqs[] = { 473 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 474 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 475 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 476 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 477 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 478 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 479 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 480 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 481 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 482 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 483 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 484 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 485 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 486 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 487 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 488 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 489 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 490 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 491 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 492 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 493 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 494 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 495 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 496 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 497 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 498 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 499 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 500 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 501 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 502 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 503 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 504 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 505 }; 506 507 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 508 .name = "axp152_irq_chip", 509 .status_base = AXP152_IRQ1_STATE, 510 .ack_base = AXP152_IRQ1_STATE, 511 .mask_base = AXP152_IRQ1_EN, 512 .mask_invert = true, 513 .init_ack_masked = true, 514 .irqs = axp152_regmap_irqs, 515 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 516 .num_regs = 3, 517 }; 518 519 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 520 .name = "axp20x_irq_chip", 521 .status_base = AXP20X_IRQ1_STATE, 522 .ack_base = AXP20X_IRQ1_STATE, 523 .mask_base = AXP20X_IRQ1_EN, 524 .mask_invert = true, 525 .init_ack_masked = true, 526 .irqs = axp20x_regmap_irqs, 527 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 528 .num_regs = 5, 529 530 }; 531 532 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 533 .name = "axp22x_irq_chip", 534 .status_base = AXP20X_IRQ1_STATE, 535 .ack_base = AXP20X_IRQ1_STATE, 536 .mask_base = AXP20X_IRQ1_EN, 537 .mask_invert = true, 538 .init_ack_masked = true, 539 .irqs = axp22x_regmap_irqs, 540 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 541 .num_regs = 5, 542 }; 543 544 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 545 .name = "axp288_irq_chip", 546 .status_base = AXP20X_IRQ1_STATE, 547 .ack_base = AXP20X_IRQ1_STATE, 548 .mask_base = AXP20X_IRQ1_EN, 549 .mask_invert = true, 550 .init_ack_masked = true, 551 .irqs = axp288_regmap_irqs, 552 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 553 .num_regs = 6, 554 555 }; 556 557 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 558 .name = "axp806", 559 .status_base = AXP20X_IRQ1_STATE, 560 .ack_base = AXP20X_IRQ1_STATE, 561 .mask_base = AXP20X_IRQ1_EN, 562 .mask_invert = true, 563 .init_ack_masked = true, 564 .irqs = axp806_regmap_irqs, 565 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 566 .num_regs = 2, 567 }; 568 569 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 570 .name = "axp809", 571 .status_base = AXP20X_IRQ1_STATE, 572 .ack_base = AXP20X_IRQ1_STATE, 573 .mask_base = AXP20X_IRQ1_EN, 574 .mask_invert = true, 575 .init_ack_masked = true, 576 .irqs = axp809_regmap_irqs, 577 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 578 .num_regs = 5, 579 }; 580 581 static struct mfd_cell axp20x_cells[] = { 582 { 583 .name = "axp20x-gpio", 584 .of_compatible = "x-powers,axp209-gpio", 585 }, { 586 .name = "axp20x-pek", 587 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 588 .resources = axp20x_pek_resources, 589 }, { 590 .name = "axp20x-regulator", 591 }, { 592 .name = "axp20x-ac-power-supply", 593 .of_compatible = "x-powers,axp202-ac-power-supply", 594 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 595 .resources = axp20x_ac_power_supply_resources, 596 }, { 597 .name = "axp20x-usb-power-supply", 598 .of_compatible = "x-powers,axp202-usb-power-supply", 599 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 600 .resources = axp20x_usb_power_supply_resources, 601 }, 602 }; 603 604 static struct mfd_cell axp221_cells[] = { 605 { 606 .name = "axp20x-pek", 607 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 608 .resources = axp22x_pek_resources, 609 }, { 610 .name = "axp20x-regulator", 611 }, { 612 .name = "axp20x-usb-power-supply", 613 .of_compatible = "x-powers,axp221-usb-power-supply", 614 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 615 .resources = axp22x_usb_power_supply_resources, 616 }, 617 }; 618 619 static struct mfd_cell axp223_cells[] = { 620 { 621 .name = "axp20x-pek", 622 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 623 .resources = axp22x_pek_resources, 624 }, { 625 .name = "axp20x-regulator", 626 }, { 627 .name = "axp20x-usb-power-supply", 628 .of_compatible = "x-powers,axp223-usb-power-supply", 629 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 630 .resources = axp22x_usb_power_supply_resources, 631 }, 632 }; 633 634 static struct mfd_cell axp152_cells[] = { 635 { 636 .name = "axp20x-pek", 637 .num_resources = ARRAY_SIZE(axp152_pek_resources), 638 .resources = axp152_pek_resources, 639 }, 640 }; 641 642 static struct resource axp288_adc_resources[] = { 643 { 644 .name = "GPADC", 645 .start = AXP288_IRQ_GPADC, 646 .end = AXP288_IRQ_GPADC, 647 .flags = IORESOURCE_IRQ, 648 }, 649 }; 650 651 static struct resource axp288_extcon_resources[] = { 652 { 653 .start = AXP288_IRQ_VBUS_FALL, 654 .end = AXP288_IRQ_VBUS_FALL, 655 .flags = IORESOURCE_IRQ, 656 }, 657 { 658 .start = AXP288_IRQ_VBUS_RISE, 659 .end = AXP288_IRQ_VBUS_RISE, 660 .flags = IORESOURCE_IRQ, 661 }, 662 { 663 .start = AXP288_IRQ_MV_CHNG, 664 .end = AXP288_IRQ_MV_CHNG, 665 .flags = IORESOURCE_IRQ, 666 }, 667 { 668 .start = AXP288_IRQ_BC_USB_CHNG, 669 .end = AXP288_IRQ_BC_USB_CHNG, 670 .flags = IORESOURCE_IRQ, 671 }, 672 }; 673 674 static struct resource axp288_charger_resources[] = { 675 { 676 .start = AXP288_IRQ_OV, 677 .end = AXP288_IRQ_OV, 678 .flags = IORESOURCE_IRQ, 679 }, 680 { 681 .start = AXP288_IRQ_DONE, 682 .end = AXP288_IRQ_DONE, 683 .flags = IORESOURCE_IRQ, 684 }, 685 { 686 .start = AXP288_IRQ_CHARGING, 687 .end = AXP288_IRQ_CHARGING, 688 .flags = IORESOURCE_IRQ, 689 }, 690 { 691 .start = AXP288_IRQ_SAFE_QUIT, 692 .end = AXP288_IRQ_SAFE_QUIT, 693 .flags = IORESOURCE_IRQ, 694 }, 695 { 696 .start = AXP288_IRQ_SAFE_ENTER, 697 .end = AXP288_IRQ_SAFE_ENTER, 698 .flags = IORESOURCE_IRQ, 699 }, 700 { 701 .start = AXP288_IRQ_QCBTU, 702 .end = AXP288_IRQ_QCBTU, 703 .flags = IORESOURCE_IRQ, 704 }, 705 { 706 .start = AXP288_IRQ_CBTU, 707 .end = AXP288_IRQ_CBTU, 708 .flags = IORESOURCE_IRQ, 709 }, 710 { 711 .start = AXP288_IRQ_QCBTO, 712 .end = AXP288_IRQ_QCBTO, 713 .flags = IORESOURCE_IRQ, 714 }, 715 { 716 .start = AXP288_IRQ_CBTO, 717 .end = AXP288_IRQ_CBTO, 718 .flags = IORESOURCE_IRQ, 719 }, 720 }; 721 722 static struct mfd_cell axp288_cells[] = { 723 { 724 .name = "axp288_adc", 725 .num_resources = ARRAY_SIZE(axp288_adc_resources), 726 .resources = axp288_adc_resources, 727 }, 728 { 729 .name = "axp288_extcon", 730 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 731 .resources = axp288_extcon_resources, 732 }, 733 { 734 .name = "axp288_charger", 735 .num_resources = ARRAY_SIZE(axp288_charger_resources), 736 .resources = axp288_charger_resources, 737 }, 738 { 739 .name = "axp288_fuel_gauge", 740 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 741 .resources = axp288_fuel_gauge_resources, 742 }, 743 { 744 .name = "axp20x-pek", 745 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 746 .resources = axp288_power_button_resources, 747 }, 748 { 749 .name = "axp288_pmic_acpi", 750 }, 751 }; 752 753 static struct mfd_cell axp806_cells[] = { 754 { 755 .id = 2, 756 .name = "axp20x-regulator", 757 }, 758 }; 759 760 static struct mfd_cell axp809_cells[] = { 761 { 762 .name = "axp20x-pek", 763 .num_resources = ARRAY_SIZE(axp809_pek_resources), 764 .resources = axp809_pek_resources, 765 }, { 766 .id = 1, 767 .name = "axp20x-regulator", 768 }, 769 }; 770 771 static struct axp20x_dev *axp20x_pm_power_off; 772 static void axp20x_power_off(void) 773 { 774 if (axp20x_pm_power_off->variant == AXP288_ID) 775 return; 776 777 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, 778 AXP20X_OFF); 779 780 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 781 msleep(500); 782 } 783 784 int axp20x_match_device(struct axp20x_dev *axp20x) 785 { 786 struct device *dev = axp20x->dev; 787 const struct acpi_device_id *acpi_id; 788 const struct of_device_id *of_id; 789 790 if (dev->of_node) { 791 of_id = of_match_device(dev->driver->of_match_table, dev); 792 if (!of_id) { 793 dev_err(dev, "Unable to match OF ID\n"); 794 return -ENODEV; 795 } 796 axp20x->variant = (long)of_id->data; 797 } else { 798 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 799 if (!acpi_id || !acpi_id->driver_data) { 800 dev_err(dev, "Unable to match ACPI ID and data\n"); 801 return -ENODEV; 802 } 803 axp20x->variant = (long)acpi_id->driver_data; 804 } 805 806 switch (axp20x->variant) { 807 case AXP152_ID: 808 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 809 axp20x->cells = axp152_cells; 810 axp20x->regmap_cfg = &axp152_regmap_config; 811 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 812 break; 813 case AXP202_ID: 814 case AXP209_ID: 815 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 816 axp20x->cells = axp20x_cells; 817 axp20x->regmap_cfg = &axp20x_regmap_config; 818 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 819 break; 820 case AXP221_ID: 821 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 822 axp20x->cells = axp221_cells; 823 axp20x->regmap_cfg = &axp22x_regmap_config; 824 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 825 break; 826 case AXP223_ID: 827 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 828 axp20x->cells = axp223_cells; 829 axp20x->regmap_cfg = &axp22x_regmap_config; 830 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 831 break; 832 case AXP288_ID: 833 axp20x->cells = axp288_cells; 834 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 835 axp20x->regmap_cfg = &axp288_regmap_config; 836 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 837 axp20x->irq_flags = IRQF_TRIGGER_LOW; 838 break; 839 case AXP806_ID: 840 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 841 axp20x->cells = axp806_cells; 842 axp20x->regmap_cfg = &axp806_regmap_config; 843 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 844 break; 845 case AXP809_ID: 846 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 847 axp20x->cells = axp809_cells; 848 axp20x->regmap_cfg = &axp22x_regmap_config; 849 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 850 break; 851 default: 852 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 853 return -EINVAL; 854 } 855 dev_info(dev, "AXP20x variant %s found\n", 856 axp20x_model_names[axp20x->variant]); 857 858 return 0; 859 } 860 EXPORT_SYMBOL(axp20x_match_device); 861 862 int axp20x_device_probe(struct axp20x_dev *axp20x) 863 { 864 int ret; 865 866 /* 867 * The AXP806 supports either master/standalone or slave mode. 868 * Slave mode allows sharing the serial bus, even with multiple 869 * AXP806 which all have the same hardware address. 870 * 871 * This is done with extra "serial interface address extension", 872 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 873 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 874 * 1 bit customizable at the factory, and 1 bit depending on the 875 * state of an external pin. The latter is writable. The device 876 * will only respond to operations to its other registers when 877 * the these device addressing bits (in the upper 4 bits of the 878 * registers) match. 879 * 880 * Since we only support an AXP806 chained to an AXP809 in slave 881 * mode, and there isn't any existing hardware which uses AXP806 882 * in master mode, or has 2 AXP806s in the same system, we can 883 * just program the register address extension to the slave mode 884 * address. 885 */ 886 if (axp20x->variant == AXP806_ID) 887 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 888 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 889 890 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 891 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 892 -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); 893 if (ret) { 894 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); 895 return ret; 896 } 897 898 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 899 axp20x->nr_cells, NULL, 0, NULL); 900 901 if (ret) { 902 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 903 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 904 return ret; 905 } 906 907 if (!pm_power_off) { 908 axp20x_pm_power_off = axp20x; 909 pm_power_off = axp20x_power_off; 910 } 911 912 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 913 914 return 0; 915 } 916 EXPORT_SYMBOL(axp20x_device_probe); 917 918 int axp20x_device_remove(struct axp20x_dev *axp20x) 919 { 920 if (axp20x == axp20x_pm_power_off) { 921 axp20x_pm_power_off = NULL; 922 pm_power_off = NULL; 923 } 924 925 mfd_remove_devices(axp20x->dev); 926 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 927 928 return 0; 929 } 930 EXPORT_SYMBOL(axp20x_device_remove); 931 932 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 933 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 934 MODULE_LICENSE("GPL"); 935