1 /* 2 * MFD core driver for the X-Powers' Power Management ICs 3 * 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 * as well as configurable GPIOs. 7 * 8 * This file contains the interface independent core functions. 9 * 10 * Copyright (C) 2014 Carlo Caione 11 * 12 * Author: Carlo Caione <carlo@caione.org> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19 #include <linux/acpi.h> 20 #include <linux/bitops.h> 21 #include <linux/delay.h> 22 #include <linux/err.h> 23 #include <linux/interrupt.h> 24 #include <linux/kernel.h> 25 #include <linux/mfd/axp20x.h> 26 #include <linux/mfd/core.h> 27 #include <linux/module.h> 28 #include <linux/of_device.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/regmap.h> 31 #include <linux/regulator/consumer.h> 32 33 #define AXP20X_OFF BIT(7) 34 35 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 36 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 37 38 static const char * const axp20x_model_names[] = { 39 "AXP152", 40 "AXP202", 41 "AXP209", 42 "AXP221", 43 "AXP223", 44 "AXP288", 45 "AXP803", 46 "AXP806", 47 "AXP809", 48 "AXP813", 49 }; 50 51 static const struct regmap_range axp152_writeable_ranges[] = { 52 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 53 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 54 }; 55 56 static const struct regmap_range axp152_volatile_ranges[] = { 57 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 58 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 59 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 60 }; 61 62 static const struct regmap_access_table axp152_writeable_table = { 63 .yes_ranges = axp152_writeable_ranges, 64 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 65 }; 66 67 static const struct regmap_access_table axp152_volatile_table = { 68 .yes_ranges = axp152_volatile_ranges, 69 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 70 }; 71 72 static const struct regmap_range axp20x_writeable_ranges[] = { 73 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 74 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 75 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 76 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 77 }; 78 79 static const struct regmap_range axp20x_volatile_ranges[] = { 80 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 81 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 82 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 83 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 84 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 85 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 86 }; 87 88 static const struct regmap_access_table axp20x_writeable_table = { 89 .yes_ranges = axp20x_writeable_ranges, 90 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 91 }; 92 93 static const struct regmap_access_table axp20x_volatile_table = { 94 .yes_ranges = axp20x_volatile_ranges, 95 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 96 }; 97 98 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 99 static const struct regmap_range axp22x_writeable_ranges[] = { 100 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 101 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 102 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 103 }; 104 105 static const struct regmap_range axp22x_volatile_ranges[] = { 106 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 107 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 108 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 109 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 110 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 111 }; 112 113 static const struct regmap_access_table axp22x_writeable_table = { 114 .yes_ranges = axp22x_writeable_ranges, 115 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 116 }; 117 118 static const struct regmap_access_table axp22x_volatile_table = { 119 .yes_ranges = axp22x_volatile_ranges, 120 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 121 }; 122 123 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 124 static const struct regmap_range axp288_writeable_ranges[] = { 125 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 126 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 127 }; 128 129 static const struct regmap_range axp288_volatile_ranges[] = { 130 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 131 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 132 regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT), 133 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 134 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 135 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 136 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 137 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 138 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 139 }; 140 141 static const struct regmap_access_table axp288_writeable_table = { 142 .yes_ranges = axp288_writeable_ranges, 143 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 144 }; 145 146 static const struct regmap_access_table axp288_volatile_table = { 147 .yes_ranges = axp288_volatile_ranges, 148 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 149 }; 150 151 static const struct regmap_range axp806_writeable_ranges[] = { 152 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 153 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 154 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 155 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 156 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 157 }; 158 159 static const struct regmap_range axp806_volatile_ranges[] = { 160 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 161 }; 162 163 static const struct regmap_access_table axp806_writeable_table = { 164 .yes_ranges = axp806_writeable_ranges, 165 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 166 }; 167 168 static const struct regmap_access_table axp806_volatile_table = { 169 .yes_ranges = axp806_volatile_ranges, 170 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 171 }; 172 173 static const struct resource axp152_pek_resources[] = { 174 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 175 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 176 }; 177 178 static const struct resource axp20x_ac_power_supply_resources[] = { 179 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 180 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 181 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 182 }; 183 184 static const struct resource axp20x_pek_resources[] = { 185 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 186 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 187 }; 188 189 static const struct resource axp20x_usb_power_supply_resources[] = { 190 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 191 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 192 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 193 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 194 }; 195 196 static const struct resource axp22x_usb_power_supply_resources[] = { 197 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 198 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 199 }; 200 201 static const struct resource axp22x_pek_resources[] = { 202 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 203 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 204 }; 205 206 static const struct resource axp288_power_button_resources[] = { 207 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 208 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 209 }; 210 211 static const struct resource axp288_fuel_gauge_resources[] = { 212 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 213 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 214 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 215 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 216 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 217 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 218 }; 219 220 static const struct resource axp803_pek_resources[] = { 221 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 222 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 223 }; 224 225 static const struct resource axp806_pek_resources[] = { 226 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 227 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 228 }; 229 230 static const struct resource axp809_pek_resources[] = { 231 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 232 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 233 }; 234 235 static const struct regmap_config axp152_regmap_config = { 236 .reg_bits = 8, 237 .val_bits = 8, 238 .wr_table = &axp152_writeable_table, 239 .volatile_table = &axp152_volatile_table, 240 .max_register = AXP152_PWM1_DUTY_CYCLE, 241 .cache_type = REGCACHE_RBTREE, 242 }; 243 244 static const struct regmap_config axp20x_regmap_config = { 245 .reg_bits = 8, 246 .val_bits = 8, 247 .wr_table = &axp20x_writeable_table, 248 .volatile_table = &axp20x_volatile_table, 249 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 250 .cache_type = REGCACHE_RBTREE, 251 }; 252 253 static const struct regmap_config axp22x_regmap_config = { 254 .reg_bits = 8, 255 .val_bits = 8, 256 .wr_table = &axp22x_writeable_table, 257 .volatile_table = &axp22x_volatile_table, 258 .max_register = AXP22X_BATLOW_THRES1, 259 .cache_type = REGCACHE_RBTREE, 260 }; 261 262 static const struct regmap_config axp288_regmap_config = { 263 .reg_bits = 8, 264 .val_bits = 8, 265 .wr_table = &axp288_writeable_table, 266 .volatile_table = &axp288_volatile_table, 267 .max_register = AXP288_FG_TUNE5, 268 .cache_type = REGCACHE_RBTREE, 269 }; 270 271 static const struct regmap_config axp806_regmap_config = { 272 .reg_bits = 8, 273 .val_bits = 8, 274 .wr_table = &axp806_writeable_table, 275 .volatile_table = &axp806_volatile_table, 276 .max_register = AXP806_REG_ADDR_EXT, 277 .cache_type = REGCACHE_RBTREE, 278 }; 279 280 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 281 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 282 283 static const struct regmap_irq axp152_regmap_irqs[] = { 284 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 285 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 286 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 287 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 288 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 289 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 290 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 291 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 292 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 293 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 294 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 295 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 296 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 297 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 298 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 299 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 300 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 301 }; 302 303 static const struct regmap_irq axp20x_regmap_irqs[] = { 304 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 305 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 306 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 307 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 308 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 309 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 310 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 311 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 312 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 313 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 314 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 315 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 316 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 317 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 318 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 319 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 320 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 321 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 322 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 323 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 324 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 325 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 326 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 327 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 328 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 329 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 330 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 331 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 332 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 333 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 334 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 335 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 336 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 337 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 338 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 339 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 340 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 341 }; 342 343 static const struct regmap_irq axp22x_regmap_irqs[] = { 344 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 345 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 346 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 347 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 348 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 349 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 350 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 351 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 352 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 353 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 354 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 355 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 356 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 357 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 358 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 359 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 360 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 361 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 362 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 363 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 364 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 365 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 366 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 367 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 368 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 369 }; 370 371 /* some IRQs are compatible with axp20x models */ 372 static const struct regmap_irq axp288_regmap_irqs[] = { 373 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 374 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 375 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 376 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 377 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 378 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 379 380 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 381 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 382 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 383 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 384 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 385 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 386 387 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 388 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 389 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 390 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 391 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 392 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 393 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 394 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 395 396 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 397 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 398 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 399 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 400 401 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 402 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 403 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 404 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 405 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 406 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 407 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 408 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 409 410 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 411 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 412 }; 413 414 static const struct regmap_irq axp803_regmap_irqs[] = { 415 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 416 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 417 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 418 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 419 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 420 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 421 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 422 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 423 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 424 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 425 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 426 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 427 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 428 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 429 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 430 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 431 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 432 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 433 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 434 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 435 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 436 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 437 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 438 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 439 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 440 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 441 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 442 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 443 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 444 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 445 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 446 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 447 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 448 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 449 }; 450 451 static const struct regmap_irq axp806_regmap_irqs[] = { 452 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 453 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 454 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 455 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 456 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 457 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 458 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 459 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 460 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 461 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 462 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 463 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 464 }; 465 466 static const struct regmap_irq axp809_regmap_irqs[] = { 467 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 468 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 469 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 470 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 471 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 472 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 473 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 474 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 475 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 476 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 477 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 478 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 479 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 480 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 481 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 482 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 483 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 484 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 485 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 486 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 487 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 488 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 489 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 490 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 491 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 492 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 493 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 494 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 495 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 496 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 497 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 498 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 499 }; 500 501 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 502 .name = "axp152_irq_chip", 503 .status_base = AXP152_IRQ1_STATE, 504 .ack_base = AXP152_IRQ1_STATE, 505 .mask_base = AXP152_IRQ1_EN, 506 .mask_invert = true, 507 .init_ack_masked = true, 508 .irqs = axp152_regmap_irqs, 509 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 510 .num_regs = 3, 511 }; 512 513 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 514 .name = "axp20x_irq_chip", 515 .status_base = AXP20X_IRQ1_STATE, 516 .ack_base = AXP20X_IRQ1_STATE, 517 .mask_base = AXP20X_IRQ1_EN, 518 .mask_invert = true, 519 .init_ack_masked = true, 520 .irqs = axp20x_regmap_irqs, 521 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 522 .num_regs = 5, 523 524 }; 525 526 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 527 .name = "axp22x_irq_chip", 528 .status_base = AXP20X_IRQ1_STATE, 529 .ack_base = AXP20X_IRQ1_STATE, 530 .mask_base = AXP20X_IRQ1_EN, 531 .mask_invert = true, 532 .init_ack_masked = true, 533 .irqs = axp22x_regmap_irqs, 534 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 535 .num_regs = 5, 536 }; 537 538 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 539 .name = "axp288_irq_chip", 540 .status_base = AXP20X_IRQ1_STATE, 541 .ack_base = AXP20X_IRQ1_STATE, 542 .mask_base = AXP20X_IRQ1_EN, 543 .mask_invert = true, 544 .init_ack_masked = true, 545 .irqs = axp288_regmap_irqs, 546 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 547 .num_regs = 6, 548 549 }; 550 551 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 552 .name = "axp803", 553 .status_base = AXP20X_IRQ1_STATE, 554 .ack_base = AXP20X_IRQ1_STATE, 555 .mask_base = AXP20X_IRQ1_EN, 556 .mask_invert = true, 557 .init_ack_masked = true, 558 .irqs = axp803_regmap_irqs, 559 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 560 .num_regs = 6, 561 }; 562 563 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 564 .name = "axp806", 565 .status_base = AXP20X_IRQ1_STATE, 566 .ack_base = AXP20X_IRQ1_STATE, 567 .mask_base = AXP20X_IRQ1_EN, 568 .mask_invert = true, 569 .init_ack_masked = true, 570 .irqs = axp806_regmap_irqs, 571 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 572 .num_regs = 2, 573 }; 574 575 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 576 .name = "axp809", 577 .status_base = AXP20X_IRQ1_STATE, 578 .ack_base = AXP20X_IRQ1_STATE, 579 .mask_base = AXP20X_IRQ1_EN, 580 .mask_invert = true, 581 .init_ack_masked = true, 582 .irqs = axp809_regmap_irqs, 583 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 584 .num_regs = 5, 585 }; 586 587 static const struct mfd_cell axp20x_cells[] = { 588 { 589 .name = "axp20x-gpio", 590 .of_compatible = "x-powers,axp209-gpio", 591 }, { 592 .name = "axp20x-pek", 593 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 594 .resources = axp20x_pek_resources, 595 }, { 596 .name = "axp20x-regulator", 597 }, { 598 .name = "axp20x-adc", 599 .of_compatible = "x-powers,axp209-adc", 600 }, { 601 .name = "axp20x-battery-power-supply", 602 .of_compatible = "x-powers,axp209-battery-power-supply", 603 }, { 604 .name = "axp20x-ac-power-supply", 605 .of_compatible = "x-powers,axp202-ac-power-supply", 606 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 607 .resources = axp20x_ac_power_supply_resources, 608 }, { 609 .name = "axp20x-usb-power-supply", 610 .of_compatible = "x-powers,axp202-usb-power-supply", 611 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 612 .resources = axp20x_usb_power_supply_resources, 613 }, 614 }; 615 616 static const struct mfd_cell axp221_cells[] = { 617 { 618 .name = "axp221-pek", 619 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 620 .resources = axp22x_pek_resources, 621 }, { 622 .name = "axp20x-regulator", 623 }, { 624 .name = "axp22x-adc", 625 .of_compatible = "x-powers,axp221-adc", 626 }, { 627 .name = "axp20x-ac-power-supply", 628 .of_compatible = "x-powers,axp221-ac-power-supply", 629 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 630 .resources = axp20x_ac_power_supply_resources, 631 }, { 632 .name = "axp20x-battery-power-supply", 633 .of_compatible = "x-powers,axp221-battery-power-supply", 634 }, { 635 .name = "axp20x-usb-power-supply", 636 .of_compatible = "x-powers,axp221-usb-power-supply", 637 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 638 .resources = axp22x_usb_power_supply_resources, 639 }, 640 }; 641 642 static const struct mfd_cell axp223_cells[] = { 643 { 644 .name = "axp221-pek", 645 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 646 .resources = axp22x_pek_resources, 647 }, { 648 .name = "axp22x-adc", 649 .of_compatible = "x-powers,axp221-adc", 650 }, { 651 .name = "axp20x-battery-power-supply", 652 .of_compatible = "x-powers,axp221-battery-power-supply", 653 }, { 654 .name = "axp20x-regulator", 655 }, { 656 .name = "axp20x-ac-power-supply", 657 .of_compatible = "x-powers,axp221-ac-power-supply", 658 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 659 .resources = axp20x_ac_power_supply_resources, 660 }, { 661 .name = "axp20x-usb-power-supply", 662 .of_compatible = "x-powers,axp223-usb-power-supply", 663 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 664 .resources = axp22x_usb_power_supply_resources, 665 }, 666 }; 667 668 static const struct mfd_cell axp152_cells[] = { 669 { 670 .name = "axp20x-pek", 671 .num_resources = ARRAY_SIZE(axp152_pek_resources), 672 .resources = axp152_pek_resources, 673 }, 674 }; 675 676 static const struct resource axp288_adc_resources[] = { 677 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 678 }; 679 680 static const struct resource axp288_extcon_resources[] = { 681 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 682 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 683 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 684 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 685 }; 686 687 static const struct resource axp288_charger_resources[] = { 688 DEFINE_RES_IRQ(AXP288_IRQ_OV), 689 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 690 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 691 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 692 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 693 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 694 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 695 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 696 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 697 }; 698 699 static const struct mfd_cell axp288_cells[] = { 700 { 701 .name = "axp288_adc", 702 .num_resources = ARRAY_SIZE(axp288_adc_resources), 703 .resources = axp288_adc_resources, 704 }, { 705 .name = "axp288_extcon", 706 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 707 .resources = axp288_extcon_resources, 708 }, { 709 .name = "axp288_charger", 710 .num_resources = ARRAY_SIZE(axp288_charger_resources), 711 .resources = axp288_charger_resources, 712 }, { 713 .name = "axp288_fuel_gauge", 714 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 715 .resources = axp288_fuel_gauge_resources, 716 }, { 717 .name = "axp221-pek", 718 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 719 .resources = axp288_power_button_resources, 720 }, { 721 .name = "axp288_pmic_acpi", 722 }, 723 }; 724 725 static const struct mfd_cell axp803_cells[] = { 726 { 727 .name = "axp221-pek", 728 .num_resources = ARRAY_SIZE(axp803_pek_resources), 729 .resources = axp803_pek_resources, 730 }, { 731 .name = "axp20x-gpio", 732 .of_compatible = "x-powers,axp813-gpio", 733 }, { 734 .name = "axp813-adc", 735 .of_compatible = "x-powers,axp813-adc", 736 }, { 737 .name = "axp20x-battery-power-supply", 738 .of_compatible = "x-powers,axp813-battery-power-supply", 739 }, { 740 .name = "axp20x-ac-power-supply", 741 .of_compatible = "x-powers,axp813-ac-power-supply", 742 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 743 .resources = axp20x_ac_power_supply_resources, 744 }, 745 { .name = "axp20x-regulator" }, 746 }; 747 748 static const struct mfd_cell axp806_self_working_cells[] = { 749 { 750 .name = "axp221-pek", 751 .num_resources = ARRAY_SIZE(axp806_pek_resources), 752 .resources = axp806_pek_resources, 753 }, 754 { .name = "axp20x-regulator" }, 755 }; 756 757 static const struct mfd_cell axp806_cells[] = { 758 { 759 .id = 2, 760 .name = "axp20x-regulator", 761 }, 762 }; 763 764 static const struct mfd_cell axp809_cells[] = { 765 { 766 .name = "axp221-pek", 767 .num_resources = ARRAY_SIZE(axp809_pek_resources), 768 .resources = axp809_pek_resources, 769 }, { 770 .id = 1, 771 .name = "axp20x-regulator", 772 }, 773 }; 774 775 static const struct mfd_cell axp813_cells[] = { 776 { 777 .name = "axp221-pek", 778 .num_resources = ARRAY_SIZE(axp803_pek_resources), 779 .resources = axp803_pek_resources, 780 }, { 781 .name = "axp20x-regulator", 782 }, { 783 .name = "axp20x-gpio", 784 .of_compatible = "x-powers,axp813-gpio", 785 }, { 786 .name = "axp813-adc", 787 .of_compatible = "x-powers,axp813-adc", 788 }, { 789 .name = "axp20x-battery-power-supply", 790 .of_compatible = "x-powers,axp813-battery-power-supply", 791 }, { 792 .name = "axp20x-ac-power-supply", 793 .of_compatible = "x-powers,axp813-ac-power-supply", 794 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 795 .resources = axp20x_ac_power_supply_resources, 796 }, 797 }; 798 799 static struct axp20x_dev *axp20x_pm_power_off; 800 static void axp20x_power_off(void) 801 { 802 if (axp20x_pm_power_off->variant == AXP288_ID) 803 return; 804 805 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, 806 AXP20X_OFF); 807 808 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 809 msleep(500); 810 } 811 812 int axp20x_match_device(struct axp20x_dev *axp20x) 813 { 814 struct device *dev = axp20x->dev; 815 const struct acpi_device_id *acpi_id; 816 const struct of_device_id *of_id; 817 818 if (dev->of_node) { 819 of_id = of_match_device(dev->driver->of_match_table, dev); 820 if (!of_id) { 821 dev_err(dev, "Unable to match OF ID\n"); 822 return -ENODEV; 823 } 824 axp20x->variant = (long)of_id->data; 825 } else { 826 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 827 if (!acpi_id || !acpi_id->driver_data) { 828 dev_err(dev, "Unable to match ACPI ID and data\n"); 829 return -ENODEV; 830 } 831 axp20x->variant = (long)acpi_id->driver_data; 832 } 833 834 switch (axp20x->variant) { 835 case AXP152_ID: 836 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 837 axp20x->cells = axp152_cells; 838 axp20x->regmap_cfg = &axp152_regmap_config; 839 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 840 break; 841 case AXP202_ID: 842 case AXP209_ID: 843 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 844 axp20x->cells = axp20x_cells; 845 axp20x->regmap_cfg = &axp20x_regmap_config; 846 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 847 break; 848 case AXP221_ID: 849 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 850 axp20x->cells = axp221_cells; 851 axp20x->regmap_cfg = &axp22x_regmap_config; 852 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 853 break; 854 case AXP223_ID: 855 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 856 axp20x->cells = axp223_cells; 857 axp20x->regmap_cfg = &axp22x_regmap_config; 858 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 859 break; 860 case AXP288_ID: 861 axp20x->cells = axp288_cells; 862 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 863 axp20x->regmap_cfg = &axp288_regmap_config; 864 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 865 axp20x->irq_flags = IRQF_TRIGGER_LOW; 866 break; 867 case AXP803_ID: 868 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 869 axp20x->cells = axp803_cells; 870 axp20x->regmap_cfg = &axp288_regmap_config; 871 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 872 break; 873 case AXP806_ID: 874 if (of_property_read_bool(axp20x->dev->of_node, 875 "x-powers,self-working-mode")) { 876 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 877 axp20x->cells = axp806_self_working_cells; 878 } else { 879 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 880 axp20x->cells = axp806_cells; 881 } 882 axp20x->regmap_cfg = &axp806_regmap_config; 883 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 884 break; 885 case AXP809_ID: 886 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 887 axp20x->cells = axp809_cells; 888 axp20x->regmap_cfg = &axp22x_regmap_config; 889 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 890 break; 891 case AXP813_ID: 892 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 893 axp20x->cells = axp813_cells; 894 axp20x->regmap_cfg = &axp288_regmap_config; 895 /* 896 * The IRQ table given in the datasheet is incorrect. 897 * In IRQ enable/status registers 1, there are separate 898 * IRQs for ACIN and VBUS, instead of bits [7:5] being 899 * the same as bits [4:2]. So it shares the same IRQs 900 * as the AXP803, rather than the AXP288. 901 */ 902 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 903 break; 904 default: 905 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 906 return -EINVAL; 907 } 908 dev_info(dev, "AXP20x variant %s found\n", 909 axp20x_model_names[axp20x->variant]); 910 911 return 0; 912 } 913 EXPORT_SYMBOL(axp20x_match_device); 914 915 int axp20x_device_probe(struct axp20x_dev *axp20x) 916 { 917 int ret; 918 919 /* 920 * The AXP806 supports either master/standalone or slave mode. 921 * Slave mode allows sharing the serial bus, even with multiple 922 * AXP806 which all have the same hardware address. 923 * 924 * This is done with extra "serial interface address extension", 925 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 926 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 927 * 1 bit customizable at the factory, and 1 bit depending on the 928 * state of an external pin. The latter is writable. The device 929 * will only respond to operations to its other registers when 930 * the these device addressing bits (in the upper 4 bits of the 931 * registers) match. 932 * 933 * By default we support an AXP806 chained to an AXP809 in slave 934 * mode. Boards which use an AXP806 in master mode can set the 935 * property "x-powers,master-mode" to override the default. 936 */ 937 if (axp20x->variant == AXP806_ID) { 938 if (of_property_read_bool(axp20x->dev->of_node, 939 "x-powers,master-mode") || 940 of_property_read_bool(axp20x->dev->of_node, 941 "x-powers,self-working-mode")) 942 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 943 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 944 else 945 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 946 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 947 } 948 949 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 950 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 951 -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc); 952 if (ret) { 953 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); 954 return ret; 955 } 956 957 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 958 axp20x->nr_cells, NULL, 0, NULL); 959 960 if (ret) { 961 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 962 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 963 return ret; 964 } 965 966 if (!pm_power_off) { 967 axp20x_pm_power_off = axp20x; 968 pm_power_off = axp20x_power_off; 969 } 970 971 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 972 973 return 0; 974 } 975 EXPORT_SYMBOL(axp20x_device_probe); 976 977 int axp20x_device_remove(struct axp20x_dev *axp20x) 978 { 979 if (axp20x == axp20x_pm_power_off) { 980 axp20x_pm_power_off = NULL; 981 pm_power_off = NULL; 982 } 983 984 mfd_remove_devices(axp20x->dev); 985 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 986 987 return 0; 988 } 989 EXPORT_SYMBOL(axp20x_device_remove); 990 991 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 992 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 993 MODULE_LICENSE("GPL"); 994