xref: /openbmc/linux/drivers/mfd/axp20x.c (revision 1e726951)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * MFD core driver for the X-Powers' Power Management ICs
4  *
5  * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
6  * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
7  * as well as configurable GPIOs.
8  *
9  * This file contains the interface independent core functions.
10  *
11  * Copyright (C) 2014 Carlo Caione
12  *
13  * Author: Carlo Caione <carlo@caione.org>
14  */
15 
16 #include <linux/acpi.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/axp20x.h>
23 #include <linux/mfd/core.h>
24 #include <linux/module.h>
25 #include <linux/of_device.h>
26 #include <linux/reboot.h>
27 #include <linux/regmap.h>
28 #include <linux/regulator/consumer.h>
29 
30 #define AXP20X_OFF	BIT(7)
31 
32 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE	0
33 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE	BIT(4)
34 
35 static const char * const axp20x_model_names[] = {
36 	"AXP152",
37 	"AXP202",
38 	"AXP209",
39 	"AXP221",
40 	"AXP223",
41 	"AXP288",
42 	"AXP803",
43 	"AXP806",
44 	"AXP809",
45 	"AXP813",
46 	"AXP15060",
47 };
48 
49 static const struct regmap_range axp152_writeable_ranges[] = {
50 	regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
51 	regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
52 };
53 
54 static const struct regmap_range axp152_volatile_ranges[] = {
55 	regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
56 	regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
57 	regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
58 };
59 
60 static const struct regmap_access_table axp152_writeable_table = {
61 	.yes_ranges	= axp152_writeable_ranges,
62 	.n_yes_ranges	= ARRAY_SIZE(axp152_writeable_ranges),
63 };
64 
65 static const struct regmap_access_table axp152_volatile_table = {
66 	.yes_ranges	= axp152_volatile_ranges,
67 	.n_yes_ranges	= ARRAY_SIZE(axp152_volatile_ranges),
68 };
69 
70 static const struct regmap_range axp20x_writeable_ranges[] = {
71 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
72 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
73 	regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
74 	regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
75 };
76 
77 static const struct regmap_range axp20x_volatile_ranges[] = {
78 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
79 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
80 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
81 	regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
82 	regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
83 	regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
84 };
85 
86 static const struct regmap_access_table axp20x_writeable_table = {
87 	.yes_ranges	= axp20x_writeable_ranges,
88 	.n_yes_ranges	= ARRAY_SIZE(axp20x_writeable_ranges),
89 };
90 
91 static const struct regmap_access_table axp20x_volatile_table = {
92 	.yes_ranges	= axp20x_volatile_ranges,
93 	.n_yes_ranges	= ARRAY_SIZE(axp20x_volatile_ranges),
94 };
95 
96 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
97 static const struct regmap_range axp22x_writeable_ranges[] = {
98 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
99 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
100 	regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
101 };
102 
103 static const struct regmap_range axp22x_volatile_ranges[] = {
104 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
105 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
106 	regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
107 	regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
108 	regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
109 };
110 
111 static const struct regmap_access_table axp22x_writeable_table = {
112 	.yes_ranges	= axp22x_writeable_ranges,
113 	.n_yes_ranges	= ARRAY_SIZE(axp22x_writeable_ranges),
114 };
115 
116 static const struct regmap_access_table axp22x_volatile_table = {
117 	.yes_ranges	= axp22x_volatile_ranges,
118 	.n_yes_ranges	= ARRAY_SIZE(axp22x_volatile_ranges),
119 };
120 
121 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
122 static const struct regmap_range axp288_writeable_ranges[] = {
123 	regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
124 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
125 	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
126 };
127 
128 static const struct regmap_range axp288_volatile_ranges[] = {
129 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
130 	regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
131 	regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
132 	regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
133 	regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
134 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
135 	regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
136 	regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
137 	regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
138 	regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
139 };
140 
141 static const struct regmap_access_table axp288_writeable_table = {
142 	.yes_ranges	= axp288_writeable_ranges,
143 	.n_yes_ranges	= ARRAY_SIZE(axp288_writeable_ranges),
144 };
145 
146 static const struct regmap_access_table axp288_volatile_table = {
147 	.yes_ranges	= axp288_volatile_ranges,
148 	.n_yes_ranges	= ARRAY_SIZE(axp288_volatile_ranges),
149 };
150 
151 static const struct regmap_range axp806_writeable_ranges[] = {
152 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
153 	regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
154 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
155 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
156 	regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
157 };
158 
159 static const struct regmap_range axp806_volatile_ranges[] = {
160 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
161 };
162 
163 static const struct regmap_access_table axp806_writeable_table = {
164 	.yes_ranges	= axp806_writeable_ranges,
165 	.n_yes_ranges	= ARRAY_SIZE(axp806_writeable_ranges),
166 };
167 
168 static const struct regmap_access_table axp806_volatile_table = {
169 	.yes_ranges	= axp806_volatile_ranges,
170 	.n_yes_ranges	= ARRAY_SIZE(axp806_volatile_ranges),
171 };
172 
173 static const struct regmap_range axp15060_writeable_ranges[] = {
174 	regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
175 	regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
176 	regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
177 	regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
178 	regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
179 	regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
180 };
181 
182 static const struct regmap_range axp15060_volatile_ranges[] = {
183 	regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
184 	regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
185 	regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
186 };
187 
188 static const struct regmap_access_table axp15060_writeable_table = {
189 	.yes_ranges	= axp15060_writeable_ranges,
190 	.n_yes_ranges	= ARRAY_SIZE(axp15060_writeable_ranges),
191 };
192 
193 static const struct regmap_access_table axp15060_volatile_table = {
194 	.yes_ranges	= axp15060_volatile_ranges,
195 	.n_yes_ranges	= ARRAY_SIZE(axp15060_volatile_ranges),
196 };
197 
198 static const struct resource axp152_pek_resources[] = {
199 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
200 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
201 };
202 
203 static const struct resource axp20x_ac_power_supply_resources[] = {
204 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
205 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
206 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
207 };
208 
209 static const struct resource axp20x_pek_resources[] = {
210 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
211 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
212 };
213 
214 static const struct resource axp20x_usb_power_supply_resources[] = {
215 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
216 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
217 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
218 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
219 };
220 
221 static const struct resource axp22x_usb_power_supply_resources[] = {
222 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
223 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
224 };
225 
226 /* AXP803 and AXP813/AXP818 share the same interrupts */
227 static const struct resource axp803_usb_power_supply_resources[] = {
228 	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
229 	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
230 };
231 
232 static const struct resource axp22x_pek_resources[] = {
233 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
234 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
235 };
236 
237 static const struct resource axp288_power_button_resources[] = {
238 	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
239 	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
240 };
241 
242 static const struct resource axp288_fuel_gauge_resources[] = {
243 	DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
244 	DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
245 	DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
246 	DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
247 	DEFINE_RES_IRQ(AXP288_IRQ_WL2),
248 	DEFINE_RES_IRQ(AXP288_IRQ_WL1),
249 };
250 
251 static const struct resource axp803_pek_resources[] = {
252 	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
253 	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
254 };
255 
256 static const struct resource axp806_pek_resources[] = {
257 	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
258 	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
259 };
260 
261 static const struct resource axp809_pek_resources[] = {
262 	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
263 	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
264 };
265 
266 static const struct resource axp15060_pek_resources[] = {
267 	DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
268 	DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
269 };
270 
271 static const struct regmap_config axp152_regmap_config = {
272 	.reg_bits	= 8,
273 	.val_bits	= 8,
274 	.wr_table	= &axp152_writeable_table,
275 	.volatile_table	= &axp152_volatile_table,
276 	.max_register	= AXP152_PWM1_DUTY_CYCLE,
277 	.cache_type	= REGCACHE_RBTREE,
278 };
279 
280 static const struct regmap_config axp20x_regmap_config = {
281 	.reg_bits	= 8,
282 	.val_bits	= 8,
283 	.wr_table	= &axp20x_writeable_table,
284 	.volatile_table	= &axp20x_volatile_table,
285 	.max_register	= AXP20X_OCV(AXP20X_OCV_MAX),
286 	.cache_type	= REGCACHE_RBTREE,
287 };
288 
289 static const struct regmap_config axp22x_regmap_config = {
290 	.reg_bits	= 8,
291 	.val_bits	= 8,
292 	.wr_table	= &axp22x_writeable_table,
293 	.volatile_table	= &axp22x_volatile_table,
294 	.max_register	= AXP22X_BATLOW_THRES1,
295 	.cache_type	= REGCACHE_RBTREE,
296 };
297 
298 static const struct regmap_config axp288_regmap_config = {
299 	.reg_bits	= 8,
300 	.val_bits	= 8,
301 	.wr_table	= &axp288_writeable_table,
302 	.volatile_table	= &axp288_volatile_table,
303 	.max_register	= AXP288_FG_TUNE5,
304 	.cache_type	= REGCACHE_RBTREE,
305 };
306 
307 static const struct regmap_config axp806_regmap_config = {
308 	.reg_bits	= 8,
309 	.val_bits	= 8,
310 	.wr_table	= &axp806_writeable_table,
311 	.volatile_table	= &axp806_volatile_table,
312 	.max_register	= AXP806_REG_ADDR_EXT,
313 	.cache_type	= REGCACHE_RBTREE,
314 };
315 
316 static const struct regmap_config axp15060_regmap_config = {
317 	.reg_bits	= 8,
318 	.val_bits	= 8,
319 	.wr_table	= &axp15060_writeable_table,
320 	.volatile_table	= &axp15060_volatile_table,
321 	.max_register	= AXP15060_IRQ2_STATE,
322 	.cache_type	= REGCACHE_RBTREE,
323 };
324 
325 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)			\
326 	[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
327 
328 static const struct regmap_irq axp152_regmap_irqs[] = {
329 	INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT,		0, 6),
330 	INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL,		0, 5),
331 	INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT,	0, 3),
332 	INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL,	0, 2),
333 	INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW,		1, 5),
334 	INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW,		1, 4),
335 	INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW,		1, 3),
336 	INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW,		1, 2),
337 	INIT_REGMAP_IRQ(AXP152, PEK_SHORT,		1, 1),
338 	INIT_REGMAP_IRQ(AXP152, PEK_LONG,		1, 0),
339 	INIT_REGMAP_IRQ(AXP152, TIMER,			2, 7),
340 	INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE,		2, 6),
341 	INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE,		2, 5),
342 	INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT,		2, 3),
343 	INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT,		2, 2),
344 	INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT,		2, 1),
345 	INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT,		2, 0),
346 };
347 
348 static const struct regmap_irq axp20x_regmap_irqs[] = {
349 	INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V,		0, 7),
350 	INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN,		0, 6),
351 	INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL,	        0, 5),
352 	INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V,		0, 4),
353 	INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN,		0, 3),
354 	INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL,	        0, 2),
355 	INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW,		0, 1),
356 	INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN,		1, 7),
357 	INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL,	        1, 6),
358 	INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE,	1, 5),
359 	INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE,	1, 4),
360 	INIT_REGMAP_IRQ(AXP20X, CHARG,		        1, 3),
361 	INIT_REGMAP_IRQ(AXP20X, CHARG_DONE,		1, 2),
362 	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH,	        1, 1),
363 	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW,	        1, 0),
364 	INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH,	        2, 7),
365 	INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW,		2, 6),
366 	INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG,	        2, 5),
367 	INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG,	        2, 4),
368 	INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG,	        2, 3),
369 	INIT_REGMAP_IRQ(AXP20X, PEK_SHORT,		2, 1),
370 	INIT_REGMAP_IRQ(AXP20X, PEK_LONG,		2, 0),
371 	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON,		3, 7),
372 	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF,	        3, 6),
373 	INIT_REGMAP_IRQ(AXP20X, VBUS_VALID,		3, 5),
374 	INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID,	        3, 4),
375 	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID,	3, 3),
376 	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END,	        3, 2),
377 	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1,	        3, 1),
378 	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2,	        3, 0),
379 	INIT_REGMAP_IRQ(AXP20X, TIMER,		        4, 7),
380 	INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE,	        4, 6),
381 	INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE,	        4, 5),
382 	INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT,		4, 3),
383 	INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT,		4, 2),
384 	INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT,		4, 1),
385 	INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT,		4, 0),
386 };
387 
388 static const struct regmap_irq axp22x_regmap_irqs[] = {
389 	INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V,		0, 7),
390 	INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN,		0, 6),
391 	INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL,	        0, 5),
392 	INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V,		0, 4),
393 	INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN,		0, 3),
394 	INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL,	        0, 2),
395 	INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW,		0, 1),
396 	INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN,		1, 7),
397 	INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL,	        1, 6),
398 	INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE,	1, 5),
399 	INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE,	1, 4),
400 	INIT_REGMAP_IRQ(AXP22X, CHARG,		        1, 3),
401 	INIT_REGMAP_IRQ(AXP22X, CHARG_DONE,		1, 2),
402 	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH,	        1, 1),
403 	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW,	        1, 0),
404 	INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH,	        2, 7),
405 	INIT_REGMAP_IRQ(AXP22X, PEK_SHORT,		2, 1),
406 	INIT_REGMAP_IRQ(AXP22X, PEK_LONG,		2, 0),
407 	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1,	        3, 1),
408 	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2,	        3, 0),
409 	INIT_REGMAP_IRQ(AXP22X, TIMER,		        4, 7),
410 	INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE,	        4, 6),
411 	INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE,	        4, 5),
412 	INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT,		4, 1),
413 	INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT,		4, 0),
414 };
415 
416 /* some IRQs are compatible with axp20x models */
417 static const struct regmap_irq axp288_regmap_irqs[] = {
418 	INIT_REGMAP_IRQ(AXP288, VBUS_FALL,              0, 2),
419 	INIT_REGMAP_IRQ(AXP288, VBUS_RISE,              0, 3),
420 	INIT_REGMAP_IRQ(AXP288, OV,                     0, 4),
421 	INIT_REGMAP_IRQ(AXP288, FALLING_ALT,            0, 5),
422 	INIT_REGMAP_IRQ(AXP288, RISING_ALT,             0, 6),
423 	INIT_REGMAP_IRQ(AXP288, OV_ALT,                 0, 7),
424 
425 	INIT_REGMAP_IRQ(AXP288, DONE,                   1, 2),
426 	INIT_REGMAP_IRQ(AXP288, CHARGING,               1, 3),
427 	INIT_REGMAP_IRQ(AXP288, SAFE_QUIT,              1, 4),
428 	INIT_REGMAP_IRQ(AXP288, SAFE_ENTER,             1, 5),
429 	INIT_REGMAP_IRQ(AXP288, ABSENT,                 1, 6),
430 	INIT_REGMAP_IRQ(AXP288, APPEND,                 1, 7),
431 
432 	INIT_REGMAP_IRQ(AXP288, QWBTU,                  2, 0),
433 	INIT_REGMAP_IRQ(AXP288, WBTU,                   2, 1),
434 	INIT_REGMAP_IRQ(AXP288, QWBTO,                  2, 2),
435 	INIT_REGMAP_IRQ(AXP288, WBTO,                   2, 3),
436 	INIT_REGMAP_IRQ(AXP288, QCBTU,                  2, 4),
437 	INIT_REGMAP_IRQ(AXP288, CBTU,                   2, 5),
438 	INIT_REGMAP_IRQ(AXP288, QCBTO,                  2, 6),
439 	INIT_REGMAP_IRQ(AXP288, CBTO,                   2, 7),
440 
441 	INIT_REGMAP_IRQ(AXP288, WL2,                    3, 0),
442 	INIT_REGMAP_IRQ(AXP288, WL1,                    3, 1),
443 	INIT_REGMAP_IRQ(AXP288, GPADC,                  3, 2),
444 	INIT_REGMAP_IRQ(AXP288, OT,                     3, 7),
445 
446 	INIT_REGMAP_IRQ(AXP288, GPIO0,                  4, 0),
447 	INIT_REGMAP_IRQ(AXP288, GPIO1,                  4, 1),
448 	INIT_REGMAP_IRQ(AXP288, POKO,                   4, 2),
449 	INIT_REGMAP_IRQ(AXP288, POKL,                   4, 3),
450 	INIT_REGMAP_IRQ(AXP288, POKS,                   4, 4),
451 	INIT_REGMAP_IRQ(AXP288, POKN,                   4, 5),
452 	INIT_REGMAP_IRQ(AXP288, POKP,                   4, 6),
453 	INIT_REGMAP_IRQ(AXP288, TIMER,                  4, 7),
454 
455 	INIT_REGMAP_IRQ(AXP288, MV_CHNG,                5, 0),
456 	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
457 };
458 
459 static const struct regmap_irq axp803_regmap_irqs[] = {
460 	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
461 	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
462 	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
463 	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
464 	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
465 	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
466 	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
467 	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
468 	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
469 	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
470 	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
471 	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
472 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
473 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
474 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
475 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
476 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
477 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
478 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
479 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
480 	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
481 	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
482 	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
483 	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
484 	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
485 	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
486 	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
487 	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
488 	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
489 	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
490 	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
491 	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
492 	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
493 	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
494 };
495 
496 static const struct regmap_irq axp806_regmap_irqs[] = {
497 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1,	0, 0),
498 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2,	0, 1),
499 	INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW,		0, 3),
500 	INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW,		0, 4),
501 	INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW,		0, 5),
502 	INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW,		0, 6),
503 	INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW,		0, 7),
504 	INIT_REGMAP_IRQ(AXP806, POK_LONG,		1, 0),
505 	INIT_REGMAP_IRQ(AXP806, POK_SHORT,		1, 1),
506 	INIT_REGMAP_IRQ(AXP806, WAKEUP,			1, 4),
507 	INIT_REGMAP_IRQ(AXP806, POK_FALL,		1, 5),
508 	INIT_REGMAP_IRQ(AXP806, POK_RISE,		1, 6),
509 };
510 
511 static const struct regmap_irq axp809_regmap_irqs[] = {
512 	INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V,		0, 7),
513 	INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN,		0, 6),
514 	INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL,	        0, 5),
515 	INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V,		0, 4),
516 	INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN,		0, 3),
517 	INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL,	        0, 2),
518 	INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW,		0, 1),
519 	INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN,		1, 7),
520 	INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL,	        1, 6),
521 	INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE,	1, 5),
522 	INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE,	1, 4),
523 	INIT_REGMAP_IRQ(AXP809, CHARG,		        1, 3),
524 	INIT_REGMAP_IRQ(AXP809, CHARG_DONE,		1, 2),
525 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH,	2, 7),
526 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END,	2, 6),
527 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW,	2, 5),
528 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END,	2, 4),
529 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH,	2, 3),
530 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END,	2, 2),
531 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW,	2, 1),
532 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END,	2, 0),
533 	INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH,	        3, 7),
534 	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1,	        3, 1),
535 	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2,	        3, 0),
536 	INIT_REGMAP_IRQ(AXP809, TIMER,		        4, 7),
537 	INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE,	        4, 6),
538 	INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE,	        4, 5),
539 	INIT_REGMAP_IRQ(AXP809, PEK_SHORT,		4, 4),
540 	INIT_REGMAP_IRQ(AXP809, PEK_LONG,		4, 3),
541 	INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF,		4, 2),
542 	INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT,		4, 1),
543 	INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT,		4, 0),
544 };
545 
546 static const struct regmap_irq axp15060_regmap_irqs[] = {
547 	INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1,	0, 0),
548 	INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2,	0, 1),
549 	INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW,		0, 2),
550 	INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW,		0, 3),
551 	INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW,		0, 4),
552 	INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW,		0, 5),
553 	INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW,		0, 6),
554 	INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW,		0, 7),
555 	INIT_REGMAP_IRQ(AXP15060, PEK_LONG,			1, 0),
556 	INIT_REGMAP_IRQ(AXP15060, PEK_SHORT,			1, 1),
557 	INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT,		1, 2),
558 	INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE,			1, 3),
559 	INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE,			1, 4),
560 	INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT,		1, 5),
561 };
562 
563 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
564 	.name			= "axp152_irq_chip",
565 	.status_base		= AXP152_IRQ1_STATE,
566 	.ack_base		= AXP152_IRQ1_STATE,
567 	.unmask_base		= AXP152_IRQ1_EN,
568 	.init_ack_masked	= true,
569 	.irqs			= axp152_regmap_irqs,
570 	.num_irqs		= ARRAY_SIZE(axp152_regmap_irqs),
571 	.num_regs		= 3,
572 };
573 
574 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
575 	.name			= "axp20x_irq_chip",
576 	.status_base		= AXP20X_IRQ1_STATE,
577 	.ack_base		= AXP20X_IRQ1_STATE,
578 	.unmask_base		= AXP20X_IRQ1_EN,
579 	.init_ack_masked	= true,
580 	.irqs			= axp20x_regmap_irqs,
581 	.num_irqs		= ARRAY_SIZE(axp20x_regmap_irqs),
582 	.num_regs		= 5,
583 
584 };
585 
586 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
587 	.name			= "axp22x_irq_chip",
588 	.status_base		= AXP20X_IRQ1_STATE,
589 	.ack_base		= AXP20X_IRQ1_STATE,
590 	.unmask_base		= AXP20X_IRQ1_EN,
591 	.init_ack_masked	= true,
592 	.irqs			= axp22x_regmap_irqs,
593 	.num_irqs		= ARRAY_SIZE(axp22x_regmap_irqs),
594 	.num_regs		= 5,
595 };
596 
597 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
598 	.name			= "axp288_irq_chip",
599 	.status_base		= AXP20X_IRQ1_STATE,
600 	.ack_base		= AXP20X_IRQ1_STATE,
601 	.unmask_base		= AXP20X_IRQ1_EN,
602 	.init_ack_masked	= true,
603 	.irqs			= axp288_regmap_irqs,
604 	.num_irqs		= ARRAY_SIZE(axp288_regmap_irqs),
605 	.num_regs		= 6,
606 
607 };
608 
609 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
610 	.name			= "axp803",
611 	.status_base		= AXP20X_IRQ1_STATE,
612 	.ack_base		= AXP20X_IRQ1_STATE,
613 	.unmask_base		= AXP20X_IRQ1_EN,
614 	.init_ack_masked	= true,
615 	.irqs			= axp803_regmap_irqs,
616 	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
617 	.num_regs		= 6,
618 };
619 
620 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
621 	.name			= "axp806",
622 	.status_base		= AXP20X_IRQ1_STATE,
623 	.ack_base		= AXP20X_IRQ1_STATE,
624 	.unmask_base		= AXP20X_IRQ1_EN,
625 	.init_ack_masked	= true,
626 	.irqs			= axp806_regmap_irqs,
627 	.num_irqs		= ARRAY_SIZE(axp806_regmap_irqs),
628 	.num_regs		= 2,
629 };
630 
631 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
632 	.name			= "axp809",
633 	.status_base		= AXP20X_IRQ1_STATE,
634 	.ack_base		= AXP20X_IRQ1_STATE,
635 	.unmask_base		= AXP20X_IRQ1_EN,
636 	.init_ack_masked	= true,
637 	.irqs			= axp809_regmap_irqs,
638 	.num_irqs		= ARRAY_SIZE(axp809_regmap_irqs),
639 	.num_regs		= 5,
640 };
641 
642 static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
643 	.name			= "axp15060",
644 	.status_base		= AXP15060_IRQ1_STATE,
645 	.ack_base		= AXP15060_IRQ1_STATE,
646 	.unmask_base		= AXP15060_IRQ1_EN,
647 	.init_ack_masked	= true,
648 	.irqs			= axp15060_regmap_irqs,
649 	.num_irqs		= ARRAY_SIZE(axp15060_regmap_irqs),
650 	.num_regs		= 2,
651 };
652 
653 static const struct mfd_cell axp20x_cells[] = {
654 	{
655 		.name		= "axp20x-gpio",
656 		.of_compatible	= "x-powers,axp209-gpio",
657 	}, {
658 		.name		= "axp20x-pek",
659 		.num_resources	= ARRAY_SIZE(axp20x_pek_resources),
660 		.resources	= axp20x_pek_resources,
661 	}, {
662 		.name		= "axp20x-regulator",
663 	}, {
664 		.name		= "axp20x-adc",
665 		.of_compatible	= "x-powers,axp209-adc",
666 	}, {
667 		.name		= "axp20x-battery-power-supply",
668 		.of_compatible	= "x-powers,axp209-battery-power-supply",
669 	}, {
670 		.name		= "axp20x-ac-power-supply",
671 		.of_compatible	= "x-powers,axp202-ac-power-supply",
672 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
673 		.resources	= axp20x_ac_power_supply_resources,
674 	}, {
675 		.name		= "axp20x-usb-power-supply",
676 		.of_compatible	= "x-powers,axp202-usb-power-supply",
677 		.num_resources	= ARRAY_SIZE(axp20x_usb_power_supply_resources),
678 		.resources	= axp20x_usb_power_supply_resources,
679 	},
680 };
681 
682 static const struct mfd_cell axp221_cells[] = {
683 	{
684 		.name		= "axp20x-gpio",
685 		.of_compatible	= "x-powers,axp221-gpio",
686 	}, {
687 		.name		= "axp221-pek",
688 		.num_resources	= ARRAY_SIZE(axp22x_pek_resources),
689 		.resources	= axp22x_pek_resources,
690 	}, {
691 		.name		= "axp20x-regulator",
692 	}, {
693 		.name		= "axp22x-adc",
694 		.of_compatible	= "x-powers,axp221-adc",
695 	}, {
696 		.name		= "axp20x-ac-power-supply",
697 		.of_compatible	= "x-powers,axp221-ac-power-supply",
698 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
699 		.resources	= axp20x_ac_power_supply_resources,
700 	}, {
701 		.name		= "axp20x-battery-power-supply",
702 		.of_compatible	= "x-powers,axp221-battery-power-supply",
703 	}, {
704 		.name		= "axp20x-usb-power-supply",
705 		.of_compatible	= "x-powers,axp221-usb-power-supply",
706 		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
707 		.resources	= axp22x_usb_power_supply_resources,
708 	},
709 };
710 
711 static const struct mfd_cell axp223_cells[] = {
712 	{
713 		.name		= "axp20x-gpio",
714 		.of_compatible	= "x-powers,axp221-gpio",
715 	}, {
716 		.name		= "axp221-pek",
717 		.num_resources	= ARRAY_SIZE(axp22x_pek_resources),
718 		.resources	= axp22x_pek_resources,
719 	}, {
720 		.name		= "axp22x-adc",
721 		.of_compatible	= "x-powers,axp221-adc",
722 	}, {
723 		.name		= "axp20x-battery-power-supply",
724 		.of_compatible	= "x-powers,axp221-battery-power-supply",
725 	}, {
726 		.name		= "axp20x-regulator",
727 	}, {
728 		.name		= "axp20x-ac-power-supply",
729 		.of_compatible	= "x-powers,axp221-ac-power-supply",
730 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
731 		.resources	= axp20x_ac_power_supply_resources,
732 	}, {
733 		.name		= "axp20x-usb-power-supply",
734 		.of_compatible	= "x-powers,axp223-usb-power-supply",
735 		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
736 		.resources	= axp22x_usb_power_supply_resources,
737 	},
738 };
739 
740 static const struct mfd_cell axp152_cells[] = {
741 	{
742 		.name		= "axp20x-pek",
743 		.num_resources	= ARRAY_SIZE(axp152_pek_resources),
744 		.resources	= axp152_pek_resources,
745 	},
746 };
747 
748 static const struct resource axp288_adc_resources[] = {
749 	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
750 };
751 
752 static const struct resource axp288_extcon_resources[] = {
753 	DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
754 	DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
755 	DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
756 	DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
757 };
758 
759 static const struct resource axp288_charger_resources[] = {
760 	DEFINE_RES_IRQ(AXP288_IRQ_OV),
761 	DEFINE_RES_IRQ(AXP288_IRQ_DONE),
762 	DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
763 	DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
764 	DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
765 	DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
766 	DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
767 	DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
768 	DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
769 };
770 
771 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
772 
773 static const struct property_entry axp288_fuel_gauge_properties[] = {
774 	PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
775 	{ }
776 };
777 
778 static const struct software_node axp288_fuel_gauge_sw_node = {
779 	.name = "axp288_fuel_gauge",
780 	.properties = axp288_fuel_gauge_properties,
781 };
782 
783 static const struct mfd_cell axp288_cells[] = {
784 	{
785 		.name		= "axp288_adc",
786 		.num_resources	= ARRAY_SIZE(axp288_adc_resources),
787 		.resources	= axp288_adc_resources,
788 	}, {
789 		.name		= "axp288_extcon",
790 		.num_resources	= ARRAY_SIZE(axp288_extcon_resources),
791 		.resources	= axp288_extcon_resources,
792 	}, {
793 		.name		= "axp288_charger",
794 		.num_resources	= ARRAY_SIZE(axp288_charger_resources),
795 		.resources	= axp288_charger_resources,
796 	}, {
797 		.name		= "axp288_fuel_gauge",
798 		.num_resources	= ARRAY_SIZE(axp288_fuel_gauge_resources),
799 		.resources	= axp288_fuel_gauge_resources,
800 		.swnode		= &axp288_fuel_gauge_sw_node,
801 	}, {
802 		.name		= "axp221-pek",
803 		.num_resources	= ARRAY_SIZE(axp288_power_button_resources),
804 		.resources	= axp288_power_button_resources,
805 	}, {
806 		.name		= "axp288_pmic_acpi",
807 	},
808 };
809 
810 static const struct mfd_cell axp803_cells[] = {
811 	{
812 		.name		= "axp221-pek",
813 		.num_resources	= ARRAY_SIZE(axp803_pek_resources),
814 		.resources	= axp803_pek_resources,
815 	}, {
816 		.name		= "axp20x-gpio",
817 		.of_compatible	= "x-powers,axp813-gpio",
818 	}, {
819 		.name		= "axp813-adc",
820 		.of_compatible	= "x-powers,axp813-adc",
821 	}, {
822 		.name		= "axp20x-battery-power-supply",
823 		.of_compatible	= "x-powers,axp813-battery-power-supply",
824 	}, {
825 		.name		= "axp20x-ac-power-supply",
826 		.of_compatible	= "x-powers,axp813-ac-power-supply",
827 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
828 		.resources	= axp20x_ac_power_supply_resources,
829 	}, {
830 		.name		= "axp20x-usb-power-supply",
831 		.num_resources	= ARRAY_SIZE(axp803_usb_power_supply_resources),
832 		.resources	= axp803_usb_power_supply_resources,
833 		.of_compatible	= "x-powers,axp813-usb-power-supply",
834 	},
835 	{	.name		= "axp20x-regulator" },
836 };
837 
838 static const struct mfd_cell axp806_self_working_cells[] = {
839 	{
840 		.name		= "axp221-pek",
841 		.num_resources	= ARRAY_SIZE(axp806_pek_resources),
842 		.resources	= axp806_pek_resources,
843 	},
844 	{	.name		= "axp20x-regulator" },
845 };
846 
847 static const struct mfd_cell axp806_cells[] = {
848 	{
849 		.id		= 2,
850 		.name		= "axp20x-regulator",
851 	},
852 };
853 
854 static const struct mfd_cell axp809_cells[] = {
855 	{
856 		.name		= "axp20x-gpio",
857 		.of_compatible	= "x-powers,axp221-gpio",
858 	}, {
859 		.name		= "axp221-pek",
860 		.num_resources	= ARRAY_SIZE(axp809_pek_resources),
861 		.resources	= axp809_pek_resources,
862 	}, {
863 		.id		= 1,
864 		.name		= "axp20x-regulator",
865 	},
866 };
867 
868 static const struct mfd_cell axp813_cells[] = {
869 	{
870 		.name		= "axp221-pek",
871 		.num_resources	= ARRAY_SIZE(axp803_pek_resources),
872 		.resources	= axp803_pek_resources,
873 	}, {
874 		.name		= "axp20x-regulator",
875 	}, {
876 		.name		= "axp20x-gpio",
877 		.of_compatible	= "x-powers,axp813-gpio",
878 	}, {
879 		.name		= "axp813-adc",
880 		.of_compatible	= "x-powers,axp813-adc",
881 	}, {
882 		.name		= "axp20x-battery-power-supply",
883 		.of_compatible	= "x-powers,axp813-battery-power-supply",
884 	}, {
885 		.name		= "axp20x-ac-power-supply",
886 		.of_compatible	= "x-powers,axp813-ac-power-supply",
887 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
888 		.resources	= axp20x_ac_power_supply_resources,
889 	}, {
890 		.name		= "axp20x-usb-power-supply",
891 		.num_resources	= ARRAY_SIZE(axp803_usb_power_supply_resources),
892 		.resources	= axp803_usb_power_supply_resources,
893 		.of_compatible	= "x-powers,axp813-usb-power-supply",
894 	},
895 };
896 
897 static const struct mfd_cell axp15060_cells[] = {
898 	{
899 		.name		= "axp221-pek",
900 		.num_resources	= ARRAY_SIZE(axp15060_pek_resources),
901 		.resources	= axp15060_pek_resources,
902 	}, {
903 		.name		= "axp20x-regulator",
904 	},
905 };
906 
907 /* For boards that don't have IRQ line connected to SOC. */
908 static const struct mfd_cell axp_regulator_only_cells[] = {
909 	{
910 		.name		= "axp20x-regulator",
911 	},
912 };
913 
914 static int axp20x_power_off(struct sys_off_data *data)
915 {
916 	struct axp20x_dev *axp20x = data->cb_data;
917 
918 	regmap_write(axp20x->regmap, AXP20X_OFF_CTRL, AXP20X_OFF);
919 
920 	/* Give capacitors etc. time to drain to avoid kernel panic msg. */
921 	mdelay(500);
922 
923 	return NOTIFY_DONE;
924 }
925 
926 int axp20x_match_device(struct axp20x_dev *axp20x)
927 {
928 	struct device *dev = axp20x->dev;
929 	const struct acpi_device_id *acpi_id;
930 	const struct of_device_id *of_id;
931 
932 	if (dev->of_node) {
933 		of_id = of_match_device(dev->driver->of_match_table, dev);
934 		if (!of_id) {
935 			dev_err(dev, "Unable to match OF ID\n");
936 			return -ENODEV;
937 		}
938 		axp20x->variant = (long)of_id->data;
939 	} else {
940 		acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
941 		if (!acpi_id || !acpi_id->driver_data) {
942 			dev_err(dev, "Unable to match ACPI ID and data\n");
943 			return -ENODEV;
944 		}
945 		axp20x->variant = (long)acpi_id->driver_data;
946 	}
947 
948 	switch (axp20x->variant) {
949 	case AXP152_ID:
950 		axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
951 		axp20x->cells = axp152_cells;
952 		axp20x->regmap_cfg = &axp152_regmap_config;
953 		axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
954 		break;
955 	case AXP202_ID:
956 	case AXP209_ID:
957 		axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
958 		axp20x->cells = axp20x_cells;
959 		axp20x->regmap_cfg = &axp20x_regmap_config;
960 		axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
961 		break;
962 	case AXP221_ID:
963 		axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
964 		axp20x->cells = axp221_cells;
965 		axp20x->regmap_cfg = &axp22x_regmap_config;
966 		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
967 		break;
968 	case AXP223_ID:
969 		axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
970 		axp20x->cells = axp223_cells;
971 		axp20x->regmap_cfg = &axp22x_regmap_config;
972 		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
973 		break;
974 	case AXP288_ID:
975 		axp20x->cells = axp288_cells;
976 		axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
977 		axp20x->regmap_cfg = &axp288_regmap_config;
978 		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
979 		axp20x->irq_flags = IRQF_TRIGGER_LOW;
980 		break;
981 	case AXP803_ID:
982 		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
983 		axp20x->cells = axp803_cells;
984 		axp20x->regmap_cfg = &axp288_regmap_config;
985 		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
986 		break;
987 	case AXP806_ID:
988 		/*
989 		 * Don't register the power key part if in slave mode or
990 		 * if there is no interrupt line.
991 		 */
992 		if (of_property_read_bool(axp20x->dev->of_node,
993 					  "x-powers,self-working-mode") &&
994 		    axp20x->irq > 0) {
995 			axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
996 			axp20x->cells = axp806_self_working_cells;
997 		} else {
998 			axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
999 			axp20x->cells = axp806_cells;
1000 		}
1001 		axp20x->regmap_cfg = &axp806_regmap_config;
1002 		axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
1003 		break;
1004 	case AXP809_ID:
1005 		axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
1006 		axp20x->cells = axp809_cells;
1007 		axp20x->regmap_cfg = &axp22x_regmap_config;
1008 		axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
1009 		break;
1010 	case AXP813_ID:
1011 		axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
1012 		axp20x->cells = axp813_cells;
1013 		axp20x->regmap_cfg = &axp288_regmap_config;
1014 		/*
1015 		 * The IRQ table given in the datasheet is incorrect.
1016 		 * In IRQ enable/status registers 1, there are separate
1017 		 * IRQs for ACIN and VBUS, instead of bits [7:5] being
1018 		 * the same as bits [4:2]. So it shares the same IRQs
1019 		 * as the AXP803, rather than the AXP288.
1020 		 */
1021 		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1022 		break;
1023 	case AXP15060_ID:
1024 		/*
1025 		 * Don't register the power key part if there is no interrupt
1026 		 * line.
1027 		 *
1028 		 * Since most use cases of AXP PMICs are Allwinner SOCs, board
1029 		 * designers follow Allwinner's reference design and connects
1030 		 * IRQ line to SOC, there's no need for those variants to deal
1031 		 * with cases that IRQ isn't connected. However, AXP15660 is
1032 		 * used by some other vendors' SOCs that didn't connect IRQ
1033 		 * line, we need to deal with this case.
1034 		 */
1035 		if (axp20x->irq > 0) {
1036 			axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
1037 			axp20x->cells = axp15060_cells;
1038 		} else {
1039 			axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
1040 			axp20x->cells = axp_regulator_only_cells;
1041 		}
1042 		axp20x->regmap_cfg = &axp15060_regmap_config;
1043 		axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
1044 		break;
1045 	default:
1046 		dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
1047 		return -EINVAL;
1048 	}
1049 	dev_info(dev, "AXP20x variant %s found\n",
1050 		 axp20x_model_names[axp20x->variant]);
1051 
1052 	return 0;
1053 }
1054 EXPORT_SYMBOL(axp20x_match_device);
1055 
1056 int axp20x_device_probe(struct axp20x_dev *axp20x)
1057 {
1058 	int ret;
1059 
1060 	/*
1061 	 * The AXP806 supports either master/standalone or slave mode.
1062 	 * Slave mode allows sharing the serial bus, even with multiple
1063 	 * AXP806 which all have the same hardware address.
1064 	 *
1065 	 * This is done with extra "serial interface address extension",
1066 	 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1067 	 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1068 	 * 1 bit customizable at the factory, and 1 bit depending on the
1069 	 * state of an external pin. The latter is writable. The device
1070 	 * will only respond to operations to its other registers when
1071 	 * the these device addressing bits (in the upper 4 bits of the
1072 	 * registers) match.
1073 	 *
1074 	 * By default we support an AXP806 chained to an AXP809 in slave
1075 	 * mode. Boards which use an AXP806 in master mode can set the
1076 	 * property "x-powers,master-mode" to override the default.
1077 	 */
1078 	if (axp20x->variant == AXP806_ID) {
1079 		if (of_property_read_bool(axp20x->dev->of_node,
1080 					  "x-powers,master-mode") ||
1081 		    of_property_read_bool(axp20x->dev->of_node,
1082 					  "x-powers,self-working-mode"))
1083 			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1084 				     AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1085 		else
1086 			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1087 				     AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1088 	}
1089 
1090 	/* Only if there is an interrupt line connected towards the CPU. */
1091 	if (axp20x->irq > 0) {
1092 		ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
1093 				IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
1094 				-1, axp20x->regmap_irq_chip,
1095 				&axp20x->regmap_irqc);
1096 		if (ret) {
1097 			dev_err(axp20x->dev, "failed to add irq chip: %d\n",
1098 				ret);
1099 			return ret;
1100 		}
1101 	}
1102 
1103 	ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
1104 			      axp20x->nr_cells, NULL, 0, NULL);
1105 
1106 	if (ret) {
1107 		dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
1108 		regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1109 		return ret;
1110 	}
1111 
1112 	if (axp20x->variant != AXP288_ID)
1113 		devm_register_sys_off_handler(axp20x->dev,
1114 					      SYS_OFF_MODE_POWER_OFF,
1115 					      SYS_OFF_PRIO_DEFAULT,
1116 					      axp20x_power_off, axp20x);
1117 
1118 	dev_info(axp20x->dev, "AXP20X driver loaded\n");
1119 
1120 	return 0;
1121 }
1122 EXPORT_SYMBOL(axp20x_device_probe);
1123 
1124 void axp20x_device_remove(struct axp20x_dev *axp20x)
1125 {
1126 	mfd_remove_devices(axp20x->dev);
1127 	regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1128 }
1129 EXPORT_SYMBOL(axp20x_device_remove);
1130 
1131 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1132 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1133 MODULE_LICENSE("GPL");
1134