xref: /openbmc/linux/drivers/mfd/axp20x.c (revision 034c3c95)
1cfb61a41SCarlo Caione /*
24fd41151SChen-Yu Tsai  * MFD core driver for the X-Powers' Power Management ICs
3cfb61a41SCarlo Caione  *
4af7e9069SJacob Pan  * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5af7e9069SJacob Pan  * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6af7e9069SJacob Pan  * as well as configurable GPIOs.
7cfb61a41SCarlo Caione  *
84fd41151SChen-Yu Tsai  * This file contains the interface independent core functions.
94fd41151SChen-Yu Tsai  *
10e740235dSChen-Yu Tsai  * Copyright (C) 2014 Carlo Caione
11e740235dSChen-Yu Tsai  *
12cfb61a41SCarlo Caione  * Author: Carlo Caione <carlo@caione.org>
13cfb61a41SCarlo Caione  *
14cfb61a41SCarlo Caione  * This program is free software; you can redistribute it and/or modify
15cfb61a41SCarlo Caione  * it under the terms of the GNU General Public License version 2 as
16cfb61a41SCarlo Caione  * published by the Free Software Foundation.
17cfb61a41SCarlo Caione  */
18cfb61a41SCarlo Caione 
19cfb61a41SCarlo Caione #include <linux/err.h>
20179dc63dSHans de Goede #include <linux/delay.h>
21cfb61a41SCarlo Caione #include <linux/interrupt.h>
22cfb61a41SCarlo Caione #include <linux/kernel.h>
23cfb61a41SCarlo Caione #include <linux/module.h>
24cfb61a41SCarlo Caione #include <linux/pm_runtime.h>
25cfb61a41SCarlo Caione #include <linux/regmap.h>
26cfb61a41SCarlo Caione #include <linux/regulator/consumer.h>
27cfb61a41SCarlo Caione #include <linux/mfd/axp20x.h>
28cfb61a41SCarlo Caione #include <linux/mfd/core.h>
29cfb61a41SCarlo Caione #include <linux/of_device.h>
30af7e9069SJacob Pan #include <linux/acpi.h>
31cfb61a41SCarlo Caione 
32cfb61a41SCarlo Caione #define AXP20X_OFF	0x80
33cfb61a41SCarlo Caione 
34c0369698SRask Ingemann Lambertsen #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE	0
35696f0b3fSChen-Yu Tsai #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE	BIT(4)
36696f0b3fSChen-Yu Tsai 
37c31e858bSKrzysztof Kozlowski static const char * const axp20x_model_names[] = {
38d8d79f8fSMichal Suchanek 	"AXP152",
39af7e9069SJacob Pan 	"AXP202",
40af7e9069SJacob Pan 	"AXP209",
41f05be589SBoris BREZILLON 	"AXP221",
4202071f0fSChen-Yu Tsai 	"AXP223",
43af7e9069SJacob Pan 	"AXP288",
441578353eSIcenowy Zheng 	"AXP803",
458824ee85SChen-Yu Tsai 	"AXP806",
4620147f0dSChen-Yu Tsai 	"AXP809",
477303733aSChen-Yu Tsai 	"AXP813",
48af7e9069SJacob Pan };
49af7e9069SJacob Pan 
50d8d79f8fSMichal Suchanek static const struct regmap_range axp152_writeable_ranges[] = {
51d8d79f8fSMichal Suchanek 	regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
52d8d79f8fSMichal Suchanek 	regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
53d8d79f8fSMichal Suchanek };
54d8d79f8fSMichal Suchanek 
55d8d79f8fSMichal Suchanek static const struct regmap_range axp152_volatile_ranges[] = {
56d8d79f8fSMichal Suchanek 	regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
57d8d79f8fSMichal Suchanek 	regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
58d8d79f8fSMichal Suchanek 	regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
59d8d79f8fSMichal Suchanek };
60d8d79f8fSMichal Suchanek 
61d8d79f8fSMichal Suchanek static const struct regmap_access_table axp152_writeable_table = {
62d8d79f8fSMichal Suchanek 	.yes_ranges	= axp152_writeable_ranges,
63d8d79f8fSMichal Suchanek 	.n_yes_ranges	= ARRAY_SIZE(axp152_writeable_ranges),
64d8d79f8fSMichal Suchanek };
65d8d79f8fSMichal Suchanek 
66d8d79f8fSMichal Suchanek static const struct regmap_access_table axp152_volatile_table = {
67d8d79f8fSMichal Suchanek 	.yes_ranges	= axp152_volatile_ranges,
68d8d79f8fSMichal Suchanek 	.n_yes_ranges	= ARRAY_SIZE(axp152_volatile_ranges),
69d8d79f8fSMichal Suchanek };
70d8d79f8fSMichal Suchanek 
71cfb61a41SCarlo Caione static const struct regmap_range axp20x_writeable_ranges[] = {
72cfb61a41SCarlo Caione 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
7397602370SQuentin Schulz 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
74cfb61a41SCarlo Caione 	regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
75553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
76cfb61a41SCarlo Caione };
77cfb61a41SCarlo Caione 
78cfb61a41SCarlo Caione static const struct regmap_range axp20x_volatile_ranges[] = {
79553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
80553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
81cfb61a41SCarlo Caione 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
82553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
83553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
84553ed4b5SBruno Prémont 	regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
85cfb61a41SCarlo Caione };
86cfb61a41SCarlo Caione 
87cfb61a41SCarlo Caione static const struct regmap_access_table axp20x_writeable_table = {
88cfb61a41SCarlo Caione 	.yes_ranges	= axp20x_writeable_ranges,
89cfb61a41SCarlo Caione 	.n_yes_ranges	= ARRAY_SIZE(axp20x_writeable_ranges),
90cfb61a41SCarlo Caione };
91cfb61a41SCarlo Caione 
92cfb61a41SCarlo Caione static const struct regmap_access_table axp20x_volatile_table = {
93cfb61a41SCarlo Caione 	.yes_ranges	= axp20x_volatile_ranges,
94cfb61a41SCarlo Caione 	.n_yes_ranges	= ARRAY_SIZE(axp20x_volatile_ranges),
95cfb61a41SCarlo Caione };
96cfb61a41SCarlo Caione 
9720147f0dSChen-Yu Tsai /* AXP22x ranges are shared with the AXP809, as they cover the same range */
98f05be589SBoris BREZILLON static const struct regmap_range axp22x_writeable_ranges[] = {
99f05be589SBoris BREZILLON 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
10097602370SQuentin Schulz 	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
101f05be589SBoris BREZILLON 	regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
102f05be589SBoris BREZILLON };
103f05be589SBoris BREZILLON 
104f05be589SBoris BREZILLON static const struct regmap_range axp22x_volatile_ranges[] = {
10515093250SHans de Goede 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
106f05be589SBoris BREZILLON 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
10715093250SHans de Goede 	regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
108ed7311f0SQuentin Schulz 	regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
10915093250SHans de Goede 	regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
110f05be589SBoris BREZILLON };
111f05be589SBoris BREZILLON 
112f05be589SBoris BREZILLON static const struct regmap_access_table axp22x_writeable_table = {
113f05be589SBoris BREZILLON 	.yes_ranges	= axp22x_writeable_ranges,
114f05be589SBoris BREZILLON 	.n_yes_ranges	= ARRAY_SIZE(axp22x_writeable_ranges),
115f05be589SBoris BREZILLON };
116f05be589SBoris BREZILLON 
117f05be589SBoris BREZILLON static const struct regmap_access_table axp22x_volatile_table = {
118f05be589SBoris BREZILLON 	.yes_ranges	= axp22x_volatile_ranges,
119f05be589SBoris BREZILLON 	.n_yes_ranges	= ARRAY_SIZE(axp22x_volatile_ranges),
120f05be589SBoris BREZILLON };
121f05be589SBoris BREZILLON 
1221578353eSIcenowy Zheng /* AXP288 ranges are shared with the AXP803, as they cover the same range */
123af7e9069SJacob Pan static const struct regmap_range axp288_writeable_ranges[] = {
124af7e9069SJacob Pan 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
125af7e9069SJacob Pan 	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
126af7e9069SJacob Pan };
127af7e9069SJacob Pan 
128af7e9069SJacob Pan static const struct regmap_range axp288_volatile_ranges[] = {
129cd532166SHans de Goede 	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
130cd532166SHans de Goede 	regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
131cd532166SHans de Goede 	regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT),
1320c384fc8SHans de Goede 	regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
133af7e9069SJacob Pan 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
134cd532166SHans de Goede 	regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
135cd532166SHans de Goede 	regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
136cd532166SHans de Goede 	regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
137cd532166SHans de Goede 	regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
138af7e9069SJacob Pan };
139af7e9069SJacob Pan 
140af7e9069SJacob Pan static const struct regmap_access_table axp288_writeable_table = {
141af7e9069SJacob Pan 	.yes_ranges	= axp288_writeable_ranges,
142af7e9069SJacob Pan 	.n_yes_ranges	= ARRAY_SIZE(axp288_writeable_ranges),
143af7e9069SJacob Pan };
144af7e9069SJacob Pan 
145af7e9069SJacob Pan static const struct regmap_access_table axp288_volatile_table = {
146af7e9069SJacob Pan 	.yes_ranges	= axp288_volatile_ranges,
147af7e9069SJacob Pan 	.n_yes_ranges	= ARRAY_SIZE(axp288_volatile_ranges),
148af7e9069SJacob Pan };
149af7e9069SJacob Pan 
1508824ee85SChen-Yu Tsai static const struct regmap_range axp806_writeable_ranges[] = {
1518824ee85SChen-Yu Tsai 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
1528824ee85SChen-Yu Tsai 	regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
1538824ee85SChen-Yu Tsai 	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
1548824ee85SChen-Yu Tsai 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
15534d9030bSChen-Yu Tsai 	regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
1568824ee85SChen-Yu Tsai };
1578824ee85SChen-Yu Tsai 
1588824ee85SChen-Yu Tsai static const struct regmap_range axp806_volatile_ranges[] = {
1598824ee85SChen-Yu Tsai 	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
1608824ee85SChen-Yu Tsai };
1618824ee85SChen-Yu Tsai 
1628824ee85SChen-Yu Tsai static const struct regmap_access_table axp806_writeable_table = {
1638824ee85SChen-Yu Tsai 	.yes_ranges	= axp806_writeable_ranges,
1648824ee85SChen-Yu Tsai 	.n_yes_ranges	= ARRAY_SIZE(axp806_writeable_ranges),
1658824ee85SChen-Yu Tsai };
1668824ee85SChen-Yu Tsai 
1678824ee85SChen-Yu Tsai static const struct regmap_access_table axp806_volatile_table = {
1688824ee85SChen-Yu Tsai 	.yes_ranges	= axp806_volatile_ranges,
1698824ee85SChen-Yu Tsai 	.n_yes_ranges	= ARRAY_SIZE(axp806_volatile_ranges),
1708824ee85SChen-Yu Tsai };
1718824ee85SChen-Yu Tsai 
172d8d79f8fSMichal Suchanek static struct resource axp152_pek_resources[] = {
173d8d79f8fSMichal Suchanek 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
174d8d79f8fSMichal Suchanek 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
175d8d79f8fSMichal Suchanek };
176d8d79f8fSMichal Suchanek 
177cd7cf27bSMichael Haas static struct resource axp20x_ac_power_supply_resources[] = {
178cd7cf27bSMichael Haas 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
179cd7cf27bSMichael Haas 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
180cd7cf27bSMichael Haas 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
181cd7cf27bSMichael Haas };
182cd7cf27bSMichael Haas 
183cfb61a41SCarlo Caione static struct resource axp20x_pek_resources[] = {
184cfb61a41SCarlo Caione 	{
185cfb61a41SCarlo Caione 		.name	= "PEK_DBR",
186cfb61a41SCarlo Caione 		.start	= AXP20X_IRQ_PEK_RIS_EDGE,
187cfb61a41SCarlo Caione 		.end	= AXP20X_IRQ_PEK_RIS_EDGE,
188cfb61a41SCarlo Caione 		.flags	= IORESOURCE_IRQ,
189cfb61a41SCarlo Caione 	}, {
190cfb61a41SCarlo Caione 		.name	= "PEK_DBF",
191cfb61a41SCarlo Caione 		.start	= AXP20X_IRQ_PEK_FAL_EDGE,
192cfb61a41SCarlo Caione 		.end	= AXP20X_IRQ_PEK_FAL_EDGE,
193cfb61a41SCarlo Caione 		.flags	= IORESOURCE_IRQ,
194cfb61a41SCarlo Caione 	},
195cfb61a41SCarlo Caione };
196cfb61a41SCarlo Caione 
1978de4efdaSHans de Goede static struct resource axp20x_usb_power_supply_resources[] = {
1988de4efdaSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
1998de4efdaSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
2008de4efdaSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
2018de4efdaSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
2028de4efdaSHans de Goede };
2038de4efdaSHans de Goede 
204ecd98cceSHans de Goede static struct resource axp22x_usb_power_supply_resources[] = {
205ecd98cceSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
206ecd98cceSHans de Goede 	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
207ecd98cceSHans de Goede };
208ecd98cceSHans de Goede 
209f05be589SBoris BREZILLON static struct resource axp22x_pek_resources[] = {
210f05be589SBoris BREZILLON 	{
211f05be589SBoris BREZILLON 		.name   = "PEK_DBR",
212f05be589SBoris BREZILLON 		.start  = AXP22X_IRQ_PEK_RIS_EDGE,
213f05be589SBoris BREZILLON 		.end    = AXP22X_IRQ_PEK_RIS_EDGE,
214f05be589SBoris BREZILLON 		.flags  = IORESOURCE_IRQ,
215f05be589SBoris BREZILLON 	}, {
216f05be589SBoris BREZILLON 		.name   = "PEK_DBF",
217f05be589SBoris BREZILLON 		.start  = AXP22X_IRQ_PEK_FAL_EDGE,
218f05be589SBoris BREZILLON 		.end    = AXP22X_IRQ_PEK_FAL_EDGE,
219f05be589SBoris BREZILLON 		.flags  = IORESOURCE_IRQ,
220f05be589SBoris BREZILLON 	},
221f05be589SBoris BREZILLON };
222f05be589SBoris BREZILLON 
223e56e5ad6SBorun Fu static struct resource axp288_power_button_resources[] = {
224e56e5ad6SBorun Fu 	{
225e56e5ad6SBorun Fu 		.name	= "PEK_DBR",
2261af468ebSHans de Goede 		.start	= AXP288_IRQ_POKP,
2271af468ebSHans de Goede 		.end	= AXP288_IRQ_POKP,
228e56e5ad6SBorun Fu 		.flags	= IORESOURCE_IRQ,
229e56e5ad6SBorun Fu 	},
230e56e5ad6SBorun Fu 	{
231e56e5ad6SBorun Fu 		.name	= "PEK_DBF",
2321af468ebSHans de Goede 		.start	= AXP288_IRQ_POKN,
2331af468ebSHans de Goede 		.end	= AXP288_IRQ_POKN,
234e56e5ad6SBorun Fu 		.flags	= IORESOURCE_IRQ,
235e56e5ad6SBorun Fu 	},
236e56e5ad6SBorun Fu };
237e56e5ad6SBorun Fu 
238d6387874STodd Brandt static struct resource axp288_fuel_gauge_resources[] = {
239af7e9069SJacob Pan 	{
240af7e9069SJacob Pan 		.start = AXP288_IRQ_QWBTU,
241af7e9069SJacob Pan 		.end   = AXP288_IRQ_QWBTU,
242af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
243af7e9069SJacob Pan 	},
244af7e9069SJacob Pan 	{
245af7e9069SJacob Pan 		.start = AXP288_IRQ_WBTU,
246af7e9069SJacob Pan 		.end   = AXP288_IRQ_WBTU,
247af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
248af7e9069SJacob Pan 	},
249af7e9069SJacob Pan 	{
250af7e9069SJacob Pan 		.start = AXP288_IRQ_QWBTO,
251af7e9069SJacob Pan 		.end   = AXP288_IRQ_QWBTO,
252af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
253af7e9069SJacob Pan 	},
254af7e9069SJacob Pan 	{
255af7e9069SJacob Pan 		.start = AXP288_IRQ_WBTO,
256af7e9069SJacob Pan 		.end   = AXP288_IRQ_WBTO,
257af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
258af7e9069SJacob Pan 	},
259af7e9069SJacob Pan 	{
260af7e9069SJacob Pan 		.start = AXP288_IRQ_WL2,
261af7e9069SJacob Pan 		.end   = AXP288_IRQ_WL2,
262af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
263af7e9069SJacob Pan 	},
264af7e9069SJacob Pan 	{
265af7e9069SJacob Pan 		.start = AXP288_IRQ_WL1,
266af7e9069SJacob Pan 		.end   = AXP288_IRQ_WL1,
267af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
268af7e9069SJacob Pan 	},
269af7e9069SJacob Pan };
270af7e9069SJacob Pan 
2711578353eSIcenowy Zheng static struct resource axp803_pek_resources[] = {
2721578353eSIcenowy Zheng 	{
2731578353eSIcenowy Zheng 		.name   = "PEK_DBR",
2741578353eSIcenowy Zheng 		.start  = AXP803_IRQ_PEK_RIS_EDGE,
2751578353eSIcenowy Zheng 		.end    = AXP803_IRQ_PEK_RIS_EDGE,
2761578353eSIcenowy Zheng 		.flags  = IORESOURCE_IRQ,
2771578353eSIcenowy Zheng 	}, {
2781578353eSIcenowy Zheng 		.name   = "PEK_DBF",
2791578353eSIcenowy Zheng 		.start  = AXP803_IRQ_PEK_FAL_EDGE,
2801578353eSIcenowy Zheng 		.end    = AXP803_IRQ_PEK_FAL_EDGE,
2811578353eSIcenowy Zheng 		.flags  = IORESOURCE_IRQ,
2821578353eSIcenowy Zheng 	},
2831578353eSIcenowy Zheng };
2841578353eSIcenowy Zheng 
28520147f0dSChen-Yu Tsai static struct resource axp809_pek_resources[] = {
28620147f0dSChen-Yu Tsai 	{
28720147f0dSChen-Yu Tsai 		.name   = "PEK_DBR",
28820147f0dSChen-Yu Tsai 		.start  = AXP809_IRQ_PEK_RIS_EDGE,
28920147f0dSChen-Yu Tsai 		.end    = AXP809_IRQ_PEK_RIS_EDGE,
29020147f0dSChen-Yu Tsai 		.flags  = IORESOURCE_IRQ,
29120147f0dSChen-Yu Tsai 	}, {
29220147f0dSChen-Yu Tsai 		.name   = "PEK_DBF",
29320147f0dSChen-Yu Tsai 		.start  = AXP809_IRQ_PEK_FAL_EDGE,
29420147f0dSChen-Yu Tsai 		.end    = AXP809_IRQ_PEK_FAL_EDGE,
29520147f0dSChen-Yu Tsai 		.flags  = IORESOURCE_IRQ,
29620147f0dSChen-Yu Tsai 	},
29720147f0dSChen-Yu Tsai };
29820147f0dSChen-Yu Tsai 
299d8d79f8fSMichal Suchanek static const struct regmap_config axp152_regmap_config = {
300d8d79f8fSMichal Suchanek 	.reg_bits	= 8,
301d8d79f8fSMichal Suchanek 	.val_bits	= 8,
302d8d79f8fSMichal Suchanek 	.wr_table	= &axp152_writeable_table,
303d8d79f8fSMichal Suchanek 	.volatile_table	= &axp152_volatile_table,
304d8d79f8fSMichal Suchanek 	.max_register	= AXP152_PWM1_DUTY_CYCLE,
305d8d79f8fSMichal Suchanek 	.cache_type	= REGCACHE_RBTREE,
306d8d79f8fSMichal Suchanek };
307d8d79f8fSMichal Suchanek 
308cfb61a41SCarlo Caione static const struct regmap_config axp20x_regmap_config = {
309cfb61a41SCarlo Caione 	.reg_bits	= 8,
310cfb61a41SCarlo Caione 	.val_bits	= 8,
311cfb61a41SCarlo Caione 	.wr_table	= &axp20x_writeable_table,
312cfb61a41SCarlo Caione 	.volatile_table	= &axp20x_volatile_table,
313553ed4b5SBruno Prémont 	.max_register	= AXP20X_OCV(AXP20X_OCV_MAX),
314cfb61a41SCarlo Caione 	.cache_type	= REGCACHE_RBTREE,
315cfb61a41SCarlo Caione };
316cfb61a41SCarlo Caione 
317f05be589SBoris BREZILLON static const struct regmap_config axp22x_regmap_config = {
318f05be589SBoris BREZILLON 	.reg_bits	= 8,
319f05be589SBoris BREZILLON 	.val_bits	= 8,
320f05be589SBoris BREZILLON 	.wr_table	= &axp22x_writeable_table,
321f05be589SBoris BREZILLON 	.volatile_table	= &axp22x_volatile_table,
322f05be589SBoris BREZILLON 	.max_register	= AXP22X_BATLOW_THRES1,
323f05be589SBoris BREZILLON 	.cache_type	= REGCACHE_RBTREE,
324f05be589SBoris BREZILLON };
325f05be589SBoris BREZILLON 
326af7e9069SJacob Pan static const struct regmap_config axp288_regmap_config = {
327af7e9069SJacob Pan 	.reg_bits	= 8,
328af7e9069SJacob Pan 	.val_bits	= 8,
329af7e9069SJacob Pan 	.wr_table	= &axp288_writeable_table,
330af7e9069SJacob Pan 	.volatile_table	= &axp288_volatile_table,
331af7e9069SJacob Pan 	.max_register	= AXP288_FG_TUNE5,
332af7e9069SJacob Pan 	.cache_type	= REGCACHE_RBTREE,
333af7e9069SJacob Pan };
334af7e9069SJacob Pan 
3358824ee85SChen-Yu Tsai static const struct regmap_config axp806_regmap_config = {
3368824ee85SChen-Yu Tsai 	.reg_bits	= 8,
3378824ee85SChen-Yu Tsai 	.val_bits	= 8,
3388824ee85SChen-Yu Tsai 	.wr_table	= &axp806_writeable_table,
3398824ee85SChen-Yu Tsai 	.volatile_table	= &axp806_volatile_table,
34034d9030bSChen-Yu Tsai 	.max_register	= AXP806_REG_ADDR_EXT,
3418824ee85SChen-Yu Tsai 	.cache_type	= REGCACHE_RBTREE,
3428824ee85SChen-Yu Tsai };
3438824ee85SChen-Yu Tsai 
344af7e9069SJacob Pan #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)			\
345af7e9069SJacob Pan 	[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
346cfb61a41SCarlo Caione 
347d8d79f8fSMichal Suchanek static const struct regmap_irq axp152_regmap_irqs[] = {
348d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT,		0, 6),
349d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL,		0, 5),
350d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT,	0, 3),
351d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL,	0, 2),
352d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW,		1, 5),
353d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW,		1, 4),
354d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW,		1, 3),
355d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW,		1, 2),
356d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, PEK_SHORT,		1, 1),
357d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, PEK_LONG,		1, 0),
358d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, TIMER,			2, 7),
359d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE,		2, 6),
360d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE,		2, 5),
361d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT,		2, 3),
362d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT,		2, 2),
363d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT,		2, 1),
364d8d79f8fSMichal Suchanek 	INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT,		2, 0),
365d8d79f8fSMichal Suchanek };
366d8d79f8fSMichal Suchanek 
367cfb61a41SCarlo Caione static const struct regmap_irq axp20x_regmap_irqs[] = {
368af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V,		0, 7),
369af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN,		0, 6),
370af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL,	        0, 5),
371af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V,		0, 4),
372af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN,		0, 3),
373af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL,	        0, 2),
374af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW,		0, 1),
375af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN,		1, 7),
376af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL,	        1, 6),
377af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE,	1, 5),
378af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE,	1, 4),
379af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, CHARG,		        1, 3),
380af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, CHARG_DONE,		1, 2),
381af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH,	        1, 1),
382af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW,	        1, 0),
383af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH,	        2, 7),
384af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW,		2, 6),
385af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG,	        2, 5),
386af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG,	        2, 4),
387af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG,	        2, 3),
388af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, PEK_SHORT,		2, 1),
389af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, PEK_LONG,		2, 0),
390af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON,		3, 7),
391af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF,	        3, 6),
392af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_VALID,		3, 5),
393af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID,	        3, 4),
394af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID,	3, 3),
395af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END,	        3, 2),
396af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1,	        3, 1),
397af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2,	        3, 0),
398af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, TIMER,		        4, 7),
399af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE,	        4, 6),
400af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE,	        4, 5),
401af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT,		4, 3),
402af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT,		4, 2),
403af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT,		4, 1),
404af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT,		4, 0),
405af7e9069SJacob Pan };
406af7e9069SJacob Pan 
407f05be589SBoris BREZILLON static const struct regmap_irq axp22x_regmap_irqs[] = {
408f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V,		0, 7),
409f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN,		0, 6),
410f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL,	        0, 5),
411f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V,		0, 4),
412f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN,		0, 3),
413f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL,	        0, 2),
414f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW,		0, 1),
415f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN,		1, 7),
416f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL,	        1, 6),
417f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE,	1, 5),
418f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE,	1, 4),
419f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, CHARG,		        1, 3),
420f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, CHARG_DONE,		1, 2),
421f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH,	        1, 1),
422f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW,	        1, 0),
423f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH,	        2, 7),
424f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, PEK_SHORT,		2, 1),
425f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, PEK_LONG,		2, 0),
426f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1,	        3, 1),
427f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2,	        3, 0),
428f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, TIMER,		        4, 7),
429f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE,	        4, 6),
430f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE,	        4, 5),
431f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT,		4, 1),
432f05be589SBoris BREZILLON 	INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT,		4, 0),
433f05be589SBoris BREZILLON };
434f05be589SBoris BREZILLON 
435af7e9069SJacob Pan /* some IRQs are compatible with axp20x models */
436af7e9069SJacob Pan static const struct regmap_irq axp288_regmap_irqs[] = {
437ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, VBUS_FALL,              0, 2),
438ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, VBUS_RISE,              0, 3),
439ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, OV,                     0, 4),
4408b44e678SHans de Goede 	INIT_REGMAP_IRQ(AXP288, FALLING_ALT,            0, 5),
4418b44e678SHans de Goede 	INIT_REGMAP_IRQ(AXP288, RISING_ALT,             0, 6),
4428b44e678SHans de Goede 	INIT_REGMAP_IRQ(AXP288, OV_ALT,                 0, 7),
443af7e9069SJacob Pan 
444ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, DONE,                   1, 2),
445ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, CHARGING,               1, 3),
446af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, SAFE_QUIT,              1, 4),
447af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, SAFE_ENTER,             1, 5),
448ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, ABSENT,                 1, 6),
449ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, APPEND,                 1, 7),
450af7e9069SJacob Pan 
451af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, QWBTU,                  2, 0),
452af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, WBTU,                   2, 1),
453af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, QWBTO,                  2, 2),
454ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, WBTO,                   2, 3),
455af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, QCBTU,                  2, 4),
456af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, CBTU,                   2, 5),
457af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, QCBTO,                  2, 6),
458af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, CBTO,                   2, 7),
459af7e9069SJacob Pan 
460af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, WL2,                    3, 0),
461af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, WL1,                    3, 1),
462af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, GPADC,                  3, 2),
463af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, OT,                     3, 7),
464af7e9069SJacob Pan 
465af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, GPIO0,                  4, 0),
466af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, GPIO1,                  4, 1),
467af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, POKO,                   4, 2),
468af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, POKL,                   4, 3),
469af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, POKS,                   4, 4),
470af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, POKN,                   4, 5),
471af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, POKP,                   4, 6),
472ff3bbc5cSJacob Pan 	INIT_REGMAP_IRQ(AXP288, TIMER,                  4, 7),
473af7e9069SJacob Pan 
474af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, MV_CHNG,                5, 0),
475af7e9069SJacob Pan 	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
476cfb61a41SCarlo Caione };
477cfb61a41SCarlo Caione 
4781578353eSIcenowy Zheng static const struct regmap_irq axp803_regmap_irqs[] = {
4791578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
4801578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
4811578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
4821578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
4831578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
4841578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
4851578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
4861578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
4871578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
4881578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
4891578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
4901578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
4911578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
4921578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
4931578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
4941578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
4951578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
4961578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
4971578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
4981578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
4991578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
5001578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
5011578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
5021578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
5031578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
5041578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
5051578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
5061578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
5071578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
5081578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
5091578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
5101578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
5111578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
5121578353eSIcenowy Zheng 	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
5131578353eSIcenowy Zheng };
5141578353eSIcenowy Zheng 
5158824ee85SChen-Yu Tsai static const struct regmap_irq axp806_regmap_irqs[] = {
5168824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1,	0, 0),
5178824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2,	0, 1),
5188824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW,		0, 3),
5198824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW,		0, 4),
5208824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW,		0, 5),
5218824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW,		0, 6),
5228824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW,		0, 7),
5238824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, PWROK_LONG,		1, 0),
5248824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, PWROK_SHORT,		1, 1),
5258824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, WAKEUP,			1, 4),
5268824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, PWROK_FALL,		1, 5),
5278824ee85SChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP806, PWROK_RISE,		1, 6),
5288824ee85SChen-Yu Tsai };
5298824ee85SChen-Yu Tsai 
53020147f0dSChen-Yu Tsai static const struct regmap_irq axp809_regmap_irqs[] = {
53120147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V,		0, 7),
53220147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN,		0, 6),
53320147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL,	        0, 5),
53420147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V,		0, 4),
53520147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN,		0, 3),
53620147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL,	        0, 2),
53720147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW,		0, 1),
53820147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN,		1, 7),
53920147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL,	        1, 6),
54020147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE,	1, 5),
54120147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE,	1, 4),
54220147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, CHARG,		        1, 3),
54320147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, CHARG_DONE,		1, 2),
54420147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH,	2, 7),
54520147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END,	2, 6),
54620147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW,	2, 5),
54720147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END,	2, 4),
54820147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH,	2, 3),
54920147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END,	2, 2),
55020147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW,	2, 1),
55120147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END,	2, 0),
55220147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH,	        3, 7),
55320147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1,	        3, 1),
55420147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2,	        3, 0),
55520147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, TIMER,		        4, 7),
55620147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE,	        4, 6),
55720147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE,	        4, 5),
55820147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, PEK_SHORT,		4, 4),
55920147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, PEK_LONG,		4, 3),
56020147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF,		4, 2),
56120147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT,		4, 1),
56220147f0dSChen-Yu Tsai 	INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT,		4, 0),
56320147f0dSChen-Yu Tsai };
56420147f0dSChen-Yu Tsai 
565d8d79f8fSMichal Suchanek static const struct regmap_irq_chip axp152_regmap_irq_chip = {
566d8d79f8fSMichal Suchanek 	.name			= "axp152_irq_chip",
567d8d79f8fSMichal Suchanek 	.status_base		= AXP152_IRQ1_STATE,
568d8d79f8fSMichal Suchanek 	.ack_base		= AXP152_IRQ1_STATE,
569d8d79f8fSMichal Suchanek 	.mask_base		= AXP152_IRQ1_EN,
570d8d79f8fSMichal Suchanek 	.mask_invert		= true,
571d8d79f8fSMichal Suchanek 	.init_ack_masked	= true,
572d8d79f8fSMichal Suchanek 	.irqs			= axp152_regmap_irqs,
573d8d79f8fSMichal Suchanek 	.num_irqs		= ARRAY_SIZE(axp152_regmap_irqs),
574d8d79f8fSMichal Suchanek 	.num_regs		= 3,
575d8d79f8fSMichal Suchanek };
576d8d79f8fSMichal Suchanek 
577cfb61a41SCarlo Caione static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
578cfb61a41SCarlo Caione 	.name			= "axp20x_irq_chip",
579cfb61a41SCarlo Caione 	.status_base		= AXP20X_IRQ1_STATE,
580cfb61a41SCarlo Caione 	.ack_base		= AXP20X_IRQ1_STATE,
581cfb61a41SCarlo Caione 	.mask_base		= AXP20X_IRQ1_EN,
582cfb61a41SCarlo Caione 	.mask_invert		= true,
583cfb61a41SCarlo Caione 	.init_ack_masked	= true,
584af7e9069SJacob Pan 	.irqs			= axp20x_regmap_irqs,
585af7e9069SJacob Pan 	.num_irqs		= ARRAY_SIZE(axp20x_regmap_irqs),
586af7e9069SJacob Pan 	.num_regs		= 5,
587af7e9069SJacob Pan 
588af7e9069SJacob Pan };
589af7e9069SJacob Pan 
590f05be589SBoris BREZILLON static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
591f05be589SBoris BREZILLON 	.name			= "axp22x_irq_chip",
592f05be589SBoris BREZILLON 	.status_base		= AXP20X_IRQ1_STATE,
593f05be589SBoris BREZILLON 	.ack_base		= AXP20X_IRQ1_STATE,
594f05be589SBoris BREZILLON 	.mask_base		= AXP20X_IRQ1_EN,
595f05be589SBoris BREZILLON 	.mask_invert		= true,
596f05be589SBoris BREZILLON 	.init_ack_masked	= true,
597f05be589SBoris BREZILLON 	.irqs			= axp22x_regmap_irqs,
598f05be589SBoris BREZILLON 	.num_irqs		= ARRAY_SIZE(axp22x_regmap_irqs),
599f05be589SBoris BREZILLON 	.num_regs		= 5,
600f05be589SBoris BREZILLON };
601f05be589SBoris BREZILLON 
602af7e9069SJacob Pan static const struct regmap_irq_chip axp288_regmap_irq_chip = {
603af7e9069SJacob Pan 	.name			= "axp288_irq_chip",
604af7e9069SJacob Pan 	.status_base		= AXP20X_IRQ1_STATE,
605af7e9069SJacob Pan 	.ack_base		= AXP20X_IRQ1_STATE,
606af7e9069SJacob Pan 	.mask_base		= AXP20X_IRQ1_EN,
607af7e9069SJacob Pan 	.mask_invert		= true,
608af7e9069SJacob Pan 	.init_ack_masked	= true,
609af7e9069SJacob Pan 	.irqs			= axp288_regmap_irqs,
610af7e9069SJacob Pan 	.num_irqs		= ARRAY_SIZE(axp288_regmap_irqs),
611af7e9069SJacob Pan 	.num_regs		= 6,
612af7e9069SJacob Pan 
613cfb61a41SCarlo Caione };
614cfb61a41SCarlo Caione 
6151578353eSIcenowy Zheng static const struct regmap_irq_chip axp803_regmap_irq_chip = {
6161578353eSIcenowy Zheng 	.name			= "axp803",
6171578353eSIcenowy Zheng 	.status_base		= AXP20X_IRQ1_STATE,
6181578353eSIcenowy Zheng 	.ack_base		= AXP20X_IRQ1_STATE,
6191578353eSIcenowy Zheng 	.mask_base		= AXP20X_IRQ1_EN,
6201578353eSIcenowy Zheng 	.mask_invert		= true,
6211578353eSIcenowy Zheng 	.init_ack_masked	= true,
6221578353eSIcenowy Zheng 	.irqs			= axp803_regmap_irqs,
6231578353eSIcenowy Zheng 	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
6241578353eSIcenowy Zheng 	.num_regs		= 6,
6251578353eSIcenowy Zheng };
6261578353eSIcenowy Zheng 
6278824ee85SChen-Yu Tsai static const struct regmap_irq_chip axp806_regmap_irq_chip = {
6288824ee85SChen-Yu Tsai 	.name			= "axp806",
6298824ee85SChen-Yu Tsai 	.status_base		= AXP20X_IRQ1_STATE,
6308824ee85SChen-Yu Tsai 	.ack_base		= AXP20X_IRQ1_STATE,
6318824ee85SChen-Yu Tsai 	.mask_base		= AXP20X_IRQ1_EN,
6328824ee85SChen-Yu Tsai 	.mask_invert		= true,
6338824ee85SChen-Yu Tsai 	.init_ack_masked	= true,
6348824ee85SChen-Yu Tsai 	.irqs			= axp806_regmap_irqs,
6358824ee85SChen-Yu Tsai 	.num_irqs		= ARRAY_SIZE(axp806_regmap_irqs),
6368824ee85SChen-Yu Tsai 	.num_regs		= 2,
6378824ee85SChen-Yu Tsai };
6388824ee85SChen-Yu Tsai 
63920147f0dSChen-Yu Tsai static const struct regmap_irq_chip axp809_regmap_irq_chip = {
64020147f0dSChen-Yu Tsai 	.name			= "axp809",
64120147f0dSChen-Yu Tsai 	.status_base		= AXP20X_IRQ1_STATE,
64220147f0dSChen-Yu Tsai 	.ack_base		= AXP20X_IRQ1_STATE,
64320147f0dSChen-Yu Tsai 	.mask_base		= AXP20X_IRQ1_EN,
64420147f0dSChen-Yu Tsai 	.mask_invert		= true,
64520147f0dSChen-Yu Tsai 	.init_ack_masked	= true,
64620147f0dSChen-Yu Tsai 	.irqs			= axp809_regmap_irqs,
64720147f0dSChen-Yu Tsai 	.num_irqs		= ARRAY_SIZE(axp809_regmap_irqs),
64820147f0dSChen-Yu Tsai 	.num_regs		= 5,
64920147f0dSChen-Yu Tsai };
65020147f0dSChen-Yu Tsai 
651cfb61a41SCarlo Caione static struct mfd_cell axp20x_cells[] = {
652cfb61a41SCarlo Caione 	{
653b419c16bSMaxime Ripard 		.name		= "axp20x-gpio",
654b419c16bSMaxime Ripard 		.of_compatible	= "x-powers,axp209-gpio",
655b419c16bSMaxime Ripard 	}, {
656cfb61a41SCarlo Caione 		.name		= "axp20x-pek",
657cfb61a41SCarlo Caione 		.num_resources	= ARRAY_SIZE(axp20x_pek_resources),
658cfb61a41SCarlo Caione 		.resources	= axp20x_pek_resources,
659cfb61a41SCarlo Caione 	}, {
660cfb61a41SCarlo Caione 		.name		= "axp20x-regulator",
6618de4efdaSHans de Goede 	}, {
6624d5e5c34SQuentin Schulz 		.name		= "axp20x-adc",
663034c3c95SQuentin Schulz 		.of_compatible	= "x-powers,axp209-adc",
6644d5e5c34SQuentin Schulz 	}, {
665b4aeceb6SQuentin Schulz 		.name		= "axp20x-battery-power-supply",
666b4aeceb6SQuentin Schulz 		.of_compatible	= "x-powers,axp209-battery-power-supply",
667b4aeceb6SQuentin Schulz 	}, {
668cd7cf27bSMichael Haas 		.name		= "axp20x-ac-power-supply",
669cd7cf27bSMichael Haas 		.of_compatible	= "x-powers,axp202-ac-power-supply",
670cd7cf27bSMichael Haas 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
671cd7cf27bSMichael Haas 		.resources	= axp20x_ac_power_supply_resources,
672cd7cf27bSMichael Haas 	}, {
6738de4efdaSHans de Goede 		.name		= "axp20x-usb-power-supply",
6748de4efdaSHans de Goede 		.of_compatible	= "x-powers,axp202-usb-power-supply",
6758de4efdaSHans de Goede 		.num_resources	= ARRAY_SIZE(axp20x_usb_power_supply_resources),
6768de4efdaSHans de Goede 		.resources	= axp20x_usb_power_supply_resources,
677cfb61a41SCarlo Caione 	},
678cfb61a41SCarlo Caione };
679cfb61a41SCarlo Caione 
6804c650561SQuentin Schulz static struct mfd_cell axp221_cells[] = {
681f05be589SBoris BREZILLON 	{
682f4463633SQuentin Schulz 		.name		= "axp221-pek",
683f05be589SBoris BREZILLON 		.num_resources	= ARRAY_SIZE(axp22x_pek_resources),
684f05be589SBoris BREZILLON 		.resources	= axp22x_pek_resources,
6856d4fa89dSChen-Yu Tsai 	}, {
6866d4fa89dSChen-Yu Tsai 		.name		= "axp20x-regulator",
687ecd98cceSHans de Goede 	}, {
688034c3c95SQuentin Schulz 		.name		= "axp22x-adc",
689034c3c95SQuentin Schulz 		.of_compatible	= "x-powers,axp221-adc",
6904d5e5c34SQuentin Schulz 	}, {
69195c4f531SQuentin Schulz 		.name		= "axp20x-ac-power-supply",
69295c4f531SQuentin Schulz 		.of_compatible	= "x-powers,axp221-ac-power-supply",
69395c4f531SQuentin Schulz 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
69495c4f531SQuentin Schulz 		.resources	= axp20x_ac_power_supply_resources,
69595c4f531SQuentin Schulz 	}, {
696b4aeceb6SQuentin Schulz 		.name		= "axp20x-battery-power-supply",
697b4aeceb6SQuentin Schulz 		.of_compatible	= "x-powers,axp221-battery-power-supply",
698b4aeceb6SQuentin Schulz 	}, {
699ecd98cceSHans de Goede 		.name		= "axp20x-usb-power-supply",
700ecd98cceSHans de Goede 		.of_compatible	= "x-powers,axp221-usb-power-supply",
701ecd98cceSHans de Goede 		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
702ecd98cceSHans de Goede 		.resources	= axp22x_usb_power_supply_resources,
703f05be589SBoris BREZILLON 	},
704f05be589SBoris BREZILLON };
705f05be589SBoris BREZILLON 
7064c650561SQuentin Schulz static struct mfd_cell axp223_cells[] = {
7074c650561SQuentin Schulz 	{
708f4463633SQuentin Schulz 		.name			= "axp221-pek",
7094c650561SQuentin Schulz 		.num_resources		= ARRAY_SIZE(axp22x_pek_resources),
7104c650561SQuentin Schulz 		.resources		= axp22x_pek_resources,
7114c650561SQuentin Schulz 	}, {
7124d5e5c34SQuentin Schulz 		.name		= "axp22x-adc",
713034c3c95SQuentin Schulz 		.of_compatible	= "x-powers,axp221-adc",
7144d5e5c34SQuentin Schulz 	}, {
715b4aeceb6SQuentin Schulz 		.name		= "axp20x-battery-power-supply",
716b4aeceb6SQuentin Schulz 		.of_compatible	= "x-powers,axp221-battery-power-supply",
717b4aeceb6SQuentin Schulz 	}, {
7184c650561SQuentin Schulz 		.name			= "axp20x-regulator",
7194c650561SQuentin Schulz 	}, {
72095c4f531SQuentin Schulz 		.name		= "axp20x-ac-power-supply",
72195c4f531SQuentin Schulz 		.of_compatible	= "x-powers,axp221-ac-power-supply",
72295c4f531SQuentin Schulz 		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
72395c4f531SQuentin Schulz 		.resources	= axp20x_ac_power_supply_resources,
72495c4f531SQuentin Schulz 	}, {
7254c650561SQuentin Schulz 		.name		= "axp20x-usb-power-supply",
7264c650561SQuentin Schulz 		.of_compatible	= "x-powers,axp223-usb-power-supply",
7274c650561SQuentin Schulz 		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
7284c650561SQuentin Schulz 		.resources	= axp22x_usb_power_supply_resources,
7294c650561SQuentin Schulz 	},
7304c650561SQuentin Schulz };
7314c650561SQuentin Schulz 
732d8d79f8fSMichal Suchanek static struct mfd_cell axp152_cells[] = {
733d8d79f8fSMichal Suchanek 	{
734d8d79f8fSMichal Suchanek 		.name			= "axp20x-pek",
735d8d79f8fSMichal Suchanek 		.num_resources		= ARRAY_SIZE(axp152_pek_resources),
736d8d79f8fSMichal Suchanek 		.resources		= axp152_pek_resources,
737d8d79f8fSMichal Suchanek 	},
738d8d79f8fSMichal Suchanek };
739d8d79f8fSMichal Suchanek 
740af7e9069SJacob Pan static struct resource axp288_adc_resources[] = {
741af7e9069SJacob Pan 	{
742af7e9069SJacob Pan 		.name  = "GPADC",
743af7e9069SJacob Pan 		.start = AXP288_IRQ_GPADC,
744af7e9069SJacob Pan 		.end   = AXP288_IRQ_GPADC,
745af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
746af7e9069SJacob Pan 	},
747af7e9069SJacob Pan };
748af7e9069SJacob Pan 
749bdb01f78SRamakrishna Pallala static struct resource axp288_extcon_resources[] = {
750bdb01f78SRamakrishna Pallala 	{
751bdb01f78SRamakrishna Pallala 		.start = AXP288_IRQ_VBUS_FALL,
752bdb01f78SRamakrishna Pallala 		.end   = AXP288_IRQ_VBUS_FALL,
753bdb01f78SRamakrishna Pallala 		.flags = IORESOURCE_IRQ,
754bdb01f78SRamakrishna Pallala 	},
755bdb01f78SRamakrishna Pallala 	{
756bdb01f78SRamakrishna Pallala 		.start = AXP288_IRQ_VBUS_RISE,
757bdb01f78SRamakrishna Pallala 		.end   = AXP288_IRQ_VBUS_RISE,
758bdb01f78SRamakrishna Pallala 		.flags = IORESOURCE_IRQ,
759bdb01f78SRamakrishna Pallala 	},
760bdb01f78SRamakrishna Pallala 	{
761bdb01f78SRamakrishna Pallala 		.start = AXP288_IRQ_MV_CHNG,
762bdb01f78SRamakrishna Pallala 		.end   = AXP288_IRQ_MV_CHNG,
763bdb01f78SRamakrishna Pallala 		.flags = IORESOURCE_IRQ,
764bdb01f78SRamakrishna Pallala 	},
765bdb01f78SRamakrishna Pallala 	{
766bdb01f78SRamakrishna Pallala 		.start = AXP288_IRQ_BC_USB_CHNG,
767bdb01f78SRamakrishna Pallala 		.end   = AXP288_IRQ_BC_USB_CHNG,
768bdb01f78SRamakrishna Pallala 		.flags = IORESOURCE_IRQ,
769bdb01f78SRamakrishna Pallala 	},
770bdb01f78SRamakrishna Pallala };
771bdb01f78SRamakrishna Pallala 
772af7e9069SJacob Pan static struct resource axp288_charger_resources[] = {
773af7e9069SJacob Pan 	{
774af7e9069SJacob Pan 		.start = AXP288_IRQ_OV,
775af7e9069SJacob Pan 		.end   = AXP288_IRQ_OV,
776af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
777af7e9069SJacob Pan 	},
778af7e9069SJacob Pan 	{
779af7e9069SJacob Pan 		.start = AXP288_IRQ_DONE,
780af7e9069SJacob Pan 		.end   = AXP288_IRQ_DONE,
781af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
782af7e9069SJacob Pan 	},
783af7e9069SJacob Pan 	{
784af7e9069SJacob Pan 		.start = AXP288_IRQ_CHARGING,
785af7e9069SJacob Pan 		.end   = AXP288_IRQ_CHARGING,
786af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
787af7e9069SJacob Pan 	},
788af7e9069SJacob Pan 	{
789af7e9069SJacob Pan 		.start = AXP288_IRQ_SAFE_QUIT,
790af7e9069SJacob Pan 		.end   = AXP288_IRQ_SAFE_QUIT,
791af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
792af7e9069SJacob Pan 	},
793af7e9069SJacob Pan 	{
794af7e9069SJacob Pan 		.start = AXP288_IRQ_SAFE_ENTER,
795af7e9069SJacob Pan 		.end   = AXP288_IRQ_SAFE_ENTER,
796af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
797af7e9069SJacob Pan 	},
798af7e9069SJacob Pan 	{
799af7e9069SJacob Pan 		.start = AXP288_IRQ_QCBTU,
800af7e9069SJacob Pan 		.end   = AXP288_IRQ_QCBTU,
801af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
802af7e9069SJacob Pan 	},
803af7e9069SJacob Pan 	{
804af7e9069SJacob Pan 		.start = AXP288_IRQ_CBTU,
805af7e9069SJacob Pan 		.end   = AXP288_IRQ_CBTU,
806af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
807af7e9069SJacob Pan 	},
808af7e9069SJacob Pan 	{
809af7e9069SJacob Pan 		.start = AXP288_IRQ_QCBTO,
810af7e9069SJacob Pan 		.end   = AXP288_IRQ_QCBTO,
811af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
812af7e9069SJacob Pan 	},
813af7e9069SJacob Pan 	{
814af7e9069SJacob Pan 		.start = AXP288_IRQ_CBTO,
815af7e9069SJacob Pan 		.end   = AXP288_IRQ_CBTO,
816af7e9069SJacob Pan 		.flags = IORESOURCE_IRQ,
817af7e9069SJacob Pan 	},
818af7e9069SJacob Pan };
819af7e9069SJacob Pan 
820af7e9069SJacob Pan static struct mfd_cell axp288_cells[] = {
821af7e9069SJacob Pan 	{
822af7e9069SJacob Pan 		.name = "axp288_adc",
823af7e9069SJacob Pan 		.num_resources = ARRAY_SIZE(axp288_adc_resources),
824af7e9069SJacob Pan 		.resources = axp288_adc_resources,
825af7e9069SJacob Pan 	},
826af7e9069SJacob Pan 	{
827bdb01f78SRamakrishna Pallala 		.name = "axp288_extcon",
828bdb01f78SRamakrishna Pallala 		.num_resources = ARRAY_SIZE(axp288_extcon_resources),
829bdb01f78SRamakrishna Pallala 		.resources = axp288_extcon_resources,
830bdb01f78SRamakrishna Pallala 	},
831bdb01f78SRamakrishna Pallala 	{
832af7e9069SJacob Pan 		.name = "axp288_charger",
833af7e9069SJacob Pan 		.num_resources = ARRAY_SIZE(axp288_charger_resources),
834af7e9069SJacob Pan 		.resources = axp288_charger_resources,
835af7e9069SJacob Pan 	},
836af7e9069SJacob Pan 	{
837d6387874STodd Brandt 		.name = "axp288_fuel_gauge",
838d6387874STodd Brandt 		.num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
839d6387874STodd Brandt 		.resources = axp288_fuel_gauge_resources,
840af7e9069SJacob Pan 	},
841d8139f63SAaron Lu 	{
842f4463633SQuentin Schulz 		.name = "axp221-pek",
843e56e5ad6SBorun Fu 		.num_resources = ARRAY_SIZE(axp288_power_button_resources),
844e56e5ad6SBorun Fu 		.resources = axp288_power_button_resources,
845e56e5ad6SBorun Fu 	},
846e56e5ad6SBorun Fu 	{
847d8139f63SAaron Lu 		.name = "axp288_pmic_acpi",
848d8139f63SAaron Lu 	},
849af7e9069SJacob Pan };
850af7e9069SJacob Pan 
8511578353eSIcenowy Zheng static struct mfd_cell axp803_cells[] = {
8521578353eSIcenowy Zheng 	{
853f4463633SQuentin Schulz 		.name			= "axp221-pek",
8541578353eSIcenowy Zheng 		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
8551578353eSIcenowy Zheng 		.resources		= axp803_pek_resources,
8569b79ff10SIcenowy Zheng 	},
8579b79ff10SIcenowy Zheng 	{	.name			= "axp20x-regulator" },
8581578353eSIcenowy Zheng };
8591578353eSIcenowy Zheng 
8608824ee85SChen-Yu Tsai static struct mfd_cell axp806_cells[] = {
8618824ee85SChen-Yu Tsai 	{
8628824ee85SChen-Yu Tsai 		.id			= 2,
8638824ee85SChen-Yu Tsai 		.name			= "axp20x-regulator",
8648824ee85SChen-Yu Tsai 	},
8658824ee85SChen-Yu Tsai };
8668824ee85SChen-Yu Tsai 
86720147f0dSChen-Yu Tsai static struct mfd_cell axp809_cells[] = {
86820147f0dSChen-Yu Tsai 	{
869f4463633SQuentin Schulz 		.name			= "axp221-pek",
87020147f0dSChen-Yu Tsai 		.num_resources		= ARRAY_SIZE(axp809_pek_resources),
87120147f0dSChen-Yu Tsai 		.resources		= axp809_pek_resources,
87220147f0dSChen-Yu Tsai 	}, {
8738824ee85SChen-Yu Tsai 		.id			= 1,
87420147f0dSChen-Yu Tsai 		.name			= "axp20x-regulator",
87520147f0dSChen-Yu Tsai 	},
87620147f0dSChen-Yu Tsai };
87720147f0dSChen-Yu Tsai 
8787303733aSChen-Yu Tsai static struct mfd_cell axp813_cells[] = {
8797303733aSChen-Yu Tsai 	{
880f4463633SQuentin Schulz 		.name			= "axp221-pek",
8817303733aSChen-Yu Tsai 		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
8827303733aSChen-Yu Tsai 		.resources		= axp803_pek_resources,
8839a43206bSChen-Yu Tsai 	}, {
8849a43206bSChen-Yu Tsai 		.name			= "axp20x-regulator",
8852bb3253cSQuentin Schulz 	}, {
8862bb3253cSQuentin Schulz 		.name			= "axp20x-gpio",
8872bb3253cSQuentin Schulz 		.of_compatible		= "x-powers,axp813-gpio",
8887303733aSChen-Yu Tsai 	}
8897303733aSChen-Yu Tsai };
8907303733aSChen-Yu Tsai 
891cfb61a41SCarlo Caione static struct axp20x_dev *axp20x_pm_power_off;
892cfb61a41SCarlo Caione static void axp20x_power_off(void)
893cfb61a41SCarlo Caione {
894af7e9069SJacob Pan 	if (axp20x_pm_power_off->variant == AXP288_ID)
895af7e9069SJacob Pan 		return;
896af7e9069SJacob Pan 
897cfb61a41SCarlo Caione 	regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
898cfb61a41SCarlo Caione 		     AXP20X_OFF);
899179dc63dSHans de Goede 
900179dc63dSHans de Goede 	/* Give capacitors etc. time to drain to avoid kernel panic msg. */
901179dc63dSHans de Goede 	msleep(500);
902cfb61a41SCarlo Caione }
903cfb61a41SCarlo Caione 
9044fd41151SChen-Yu Tsai int axp20x_match_device(struct axp20x_dev *axp20x)
905af7e9069SJacob Pan {
906e47a3cf7SChen-Yu Tsai 	struct device *dev = axp20x->dev;
907af7e9069SJacob Pan 	const struct acpi_device_id *acpi_id;
908af7e9069SJacob Pan 	const struct of_device_id *of_id;
909af7e9069SJacob Pan 
910af7e9069SJacob Pan 	if (dev->of_node) {
911af7acc3dSChen-Yu Tsai 		of_id = of_match_device(dev->driver->of_match_table, dev);
912af7e9069SJacob Pan 		if (!of_id) {
913af7e9069SJacob Pan 			dev_err(dev, "Unable to match OF ID\n");
914af7e9069SJacob Pan 			return -ENODEV;
915af7e9069SJacob Pan 		}
916af7e9069SJacob Pan 		axp20x->variant = (long)of_id->data;
917af7e9069SJacob Pan 	} else {
918af7e9069SJacob Pan 		acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
919af7e9069SJacob Pan 		if (!acpi_id || !acpi_id->driver_data) {
920af7e9069SJacob Pan 			dev_err(dev, "Unable to match ACPI ID and data\n");
921af7e9069SJacob Pan 			return -ENODEV;
922af7e9069SJacob Pan 		}
923af7e9069SJacob Pan 		axp20x->variant = (long)acpi_id->driver_data;
924af7e9069SJacob Pan 	}
925af7e9069SJacob Pan 
926af7e9069SJacob Pan 	switch (axp20x->variant) {
927d8d79f8fSMichal Suchanek 	case AXP152_ID:
928d8d79f8fSMichal Suchanek 		axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
929d8d79f8fSMichal Suchanek 		axp20x->cells = axp152_cells;
930d8d79f8fSMichal Suchanek 		axp20x->regmap_cfg = &axp152_regmap_config;
931d8d79f8fSMichal Suchanek 		axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
932d8d79f8fSMichal Suchanek 		break;
933af7e9069SJacob Pan 	case AXP202_ID:
934af7e9069SJacob Pan 	case AXP209_ID:
935af7e9069SJacob Pan 		axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
936af7e9069SJacob Pan 		axp20x->cells = axp20x_cells;
937af7e9069SJacob Pan 		axp20x->regmap_cfg = &axp20x_regmap_config;
938af7e9069SJacob Pan 		axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
939af7e9069SJacob Pan 		break;
940f05be589SBoris BREZILLON 	case AXP221_ID:
9414c650561SQuentin Schulz 		axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
9424c650561SQuentin Schulz 		axp20x->cells = axp221_cells;
9434c650561SQuentin Schulz 		axp20x->regmap_cfg = &axp22x_regmap_config;
9444c650561SQuentin Schulz 		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
9454c650561SQuentin Schulz 		break;
94602071f0fSChen-Yu Tsai 	case AXP223_ID:
9474c650561SQuentin Schulz 		axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
9484c650561SQuentin Schulz 		axp20x->cells = axp223_cells;
949f05be589SBoris BREZILLON 		axp20x->regmap_cfg = &axp22x_regmap_config;
950f05be589SBoris BREZILLON 		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
951f05be589SBoris BREZILLON 		break;
952af7e9069SJacob Pan 	case AXP288_ID:
953af7e9069SJacob Pan 		axp20x->cells = axp288_cells;
954af7e9069SJacob Pan 		axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
955af7e9069SJacob Pan 		axp20x->regmap_cfg = &axp288_regmap_config;
956af7e9069SJacob Pan 		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
9570a5454c9SHans de Goede 		axp20x->irq_flags = IRQF_TRIGGER_LOW;
958af7e9069SJacob Pan 		break;
9591578353eSIcenowy Zheng 	case AXP803_ID:
9601578353eSIcenowy Zheng 		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
9611578353eSIcenowy Zheng 		axp20x->cells = axp803_cells;
9621578353eSIcenowy Zheng 		axp20x->regmap_cfg = &axp288_regmap_config;
9631578353eSIcenowy Zheng 		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
9641578353eSIcenowy Zheng 		break;
9658824ee85SChen-Yu Tsai 	case AXP806_ID:
9668824ee85SChen-Yu Tsai 		axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
9678824ee85SChen-Yu Tsai 		axp20x->cells = axp806_cells;
9688824ee85SChen-Yu Tsai 		axp20x->regmap_cfg = &axp806_regmap_config;
9698824ee85SChen-Yu Tsai 		axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
9708824ee85SChen-Yu Tsai 		break;
97120147f0dSChen-Yu Tsai 	case AXP809_ID:
97220147f0dSChen-Yu Tsai 		axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
97320147f0dSChen-Yu Tsai 		axp20x->cells = axp809_cells;
97420147f0dSChen-Yu Tsai 		axp20x->regmap_cfg = &axp22x_regmap_config;
97520147f0dSChen-Yu Tsai 		axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
97620147f0dSChen-Yu Tsai 		break;
9777303733aSChen-Yu Tsai 	case AXP813_ID:
9787303733aSChen-Yu Tsai 		axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
9797303733aSChen-Yu Tsai 		axp20x->cells = axp813_cells;
9807303733aSChen-Yu Tsai 		axp20x->regmap_cfg = &axp288_regmap_config;
9817303733aSChen-Yu Tsai 		/*
9827303733aSChen-Yu Tsai 		 * The IRQ table given in the datasheet is incorrect.
9837303733aSChen-Yu Tsai 		 * In IRQ enable/status registers 1, there are separate
9847303733aSChen-Yu Tsai 		 * IRQs for ACIN and VBUS, instead of bits [7:5] being
9857303733aSChen-Yu Tsai 		 * the same as bits [4:2]. So it shares the same IRQs
9867303733aSChen-Yu Tsai 		 * as the AXP803, rather than the AXP288.
9877303733aSChen-Yu Tsai 		 */
9887303733aSChen-Yu Tsai 		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
9897303733aSChen-Yu Tsai 		break;
990af7e9069SJacob Pan 	default:
991af7e9069SJacob Pan 		dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
992af7e9069SJacob Pan 		return -EINVAL;
993af7e9069SJacob Pan 	}
994af7e9069SJacob Pan 	dev_info(dev, "AXP20x variant %s found\n",
995af7e9069SJacob Pan 		 axp20x_model_names[axp20x->variant]);
996af7e9069SJacob Pan 
997af7e9069SJacob Pan 	return 0;
998af7e9069SJacob Pan }
9994fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_match_device);
1000af7e9069SJacob Pan 
10014fd41151SChen-Yu Tsai int axp20x_device_probe(struct axp20x_dev *axp20x)
1002cfb61a41SCarlo Caione {
1003cfb61a41SCarlo Caione 	int ret;
1004cfb61a41SCarlo Caione 
1005696f0b3fSChen-Yu Tsai 	/*
1006696f0b3fSChen-Yu Tsai 	 * The AXP806 supports either master/standalone or slave mode.
1007696f0b3fSChen-Yu Tsai 	 * Slave mode allows sharing the serial bus, even with multiple
1008696f0b3fSChen-Yu Tsai 	 * AXP806 which all have the same hardware address.
1009696f0b3fSChen-Yu Tsai 	 *
1010696f0b3fSChen-Yu Tsai 	 * This is done with extra "serial interface address extension",
1011696f0b3fSChen-Yu Tsai 	 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1012696f0b3fSChen-Yu Tsai 	 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1013696f0b3fSChen-Yu Tsai 	 * 1 bit customizable at the factory, and 1 bit depending on the
1014696f0b3fSChen-Yu Tsai 	 * state of an external pin. The latter is writable. The device
1015696f0b3fSChen-Yu Tsai 	 * will only respond to operations to its other registers when
1016696f0b3fSChen-Yu Tsai 	 * the these device addressing bits (in the upper 4 bits of the
1017696f0b3fSChen-Yu Tsai 	 * registers) match.
1018696f0b3fSChen-Yu Tsai 	 *
1019c0369698SRask Ingemann Lambertsen 	 * By default we support an AXP806 chained to an AXP809 in slave
1020c0369698SRask Ingemann Lambertsen 	 * mode. Boards which use an AXP806 in master mode can set the
1021c0369698SRask Ingemann Lambertsen 	 * property "x-powers,master-mode" to override the default.
1022696f0b3fSChen-Yu Tsai 	 */
1023c0369698SRask Ingemann Lambertsen 	if (axp20x->variant == AXP806_ID) {
1024c0369698SRask Ingemann Lambertsen 		if (of_property_read_bool(axp20x->dev->of_node,
1025c0369698SRask Ingemann Lambertsen 					  "x-powers,master-mode"))
1026c0369698SRask Ingemann Lambertsen 			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1027c0369698SRask Ingemann Lambertsen 				     AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1028c0369698SRask Ingemann Lambertsen 		else
1029696f0b3fSChen-Yu Tsai 			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1030696f0b3fSChen-Yu Tsai 				     AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1031c0369698SRask Ingemann Lambertsen 	}
1032696f0b3fSChen-Yu Tsai 
10334fd41151SChen-Yu Tsai 	ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
10340a5454c9SHans de Goede 			  IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
10350a5454c9SHans de Goede 			   -1, axp20x->regmap_irq_chip, &axp20x->regmap_irqc);
1036cfb61a41SCarlo Caione 	if (ret) {
10374fd41151SChen-Yu Tsai 		dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
1038cfb61a41SCarlo Caione 		return ret;
1039cfb61a41SCarlo Caione 	}
1040cfb61a41SCarlo Caione 
1041af7e9069SJacob Pan 	ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
1042af7e9069SJacob Pan 			      axp20x->nr_cells, NULL, 0, NULL);
1043cfb61a41SCarlo Caione 
1044cfb61a41SCarlo Caione 	if (ret) {
10454fd41151SChen-Yu Tsai 		dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
10464fd41151SChen-Yu Tsai 		regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1047cfb61a41SCarlo Caione 		return ret;
1048cfb61a41SCarlo Caione 	}
1049cfb61a41SCarlo Caione 
1050cfb61a41SCarlo Caione 	if (!pm_power_off) {
1051cfb61a41SCarlo Caione 		axp20x_pm_power_off = axp20x;
1052cfb61a41SCarlo Caione 		pm_power_off = axp20x_power_off;
1053cfb61a41SCarlo Caione 	}
1054cfb61a41SCarlo Caione 
10554fd41151SChen-Yu Tsai 	dev_info(axp20x->dev, "AXP20X driver loaded\n");
1056cfb61a41SCarlo Caione 
1057cfb61a41SCarlo Caione 	return 0;
1058cfb61a41SCarlo Caione }
10594fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_device_probe);
1060cfb61a41SCarlo Caione 
10614fd41151SChen-Yu Tsai int axp20x_device_remove(struct axp20x_dev *axp20x)
1062cfb61a41SCarlo Caione {
1063cfb61a41SCarlo Caione 	if (axp20x == axp20x_pm_power_off) {
1064cfb61a41SCarlo Caione 		axp20x_pm_power_off = NULL;
1065cfb61a41SCarlo Caione 		pm_power_off = NULL;
1066cfb61a41SCarlo Caione 	}
1067cfb61a41SCarlo Caione 
1068cfb61a41SCarlo Caione 	mfd_remove_devices(axp20x->dev);
10694fd41151SChen-Yu Tsai 	regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1070cfb61a41SCarlo Caione 
1071cfb61a41SCarlo Caione 	return 0;
1072cfb61a41SCarlo Caione }
10734fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_device_remove);
1074cfb61a41SCarlo Caione 
1075cfb61a41SCarlo Caione MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1076cfb61a41SCarlo Caione MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1077cfb61a41SCarlo Caione MODULE_LICENSE("GPL");
1078