1 /* 2 * Atmel SMC (Static Memory Controller) helper functions. 3 * 4 * Copyright (C) 2017 Atmel 5 * Copyright (C) 2017 Free Electrons 6 * 7 * Author: Boris Brezillon <boris.brezillon@free-electrons.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/mfd/syscon/atmel-smc.h> 15 16 /** 17 * atmel_smc_cs_conf_init - initialize a SMC CS conf 18 * @conf: the SMC CS conf to initialize 19 * 20 * Set all fields to 0 so that one can start defining a new config. 21 */ 22 void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf) 23 { 24 memset(conf, 0, sizeof(*conf)); 25 } 26 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_init); 27 28 /** 29 * atmel_smc_cs_encode_ncycles - encode a number of MCK clk cycles in the 30 * format expected by the SMC engine 31 * @ncycles: number of MCK clk cycles 32 * @msbpos: position of the MSB part of the timing field 33 * @msbwidth: width of the MSB part of the timing field 34 * @msbfactor: factor applied to the MSB 35 * @encodedval: param used to store the encoding result 36 * 37 * This function encodes the @ncycles value as described in the datasheet 38 * (section "SMC Setup/Pulse/Cycle/Timings Register"). This is a generic 39 * helper which called with different parameter depending on the encoding 40 * scheme. 41 * 42 * If the @ncycles value is too big to be encoded, -ERANGE is returned and 43 * the encodedval is contains the maximum val. Otherwise, 0 is returned. 44 */ 45 static int atmel_smc_cs_encode_ncycles(unsigned int ncycles, 46 unsigned int msbpos, 47 unsigned int msbwidth, 48 unsigned int msbfactor, 49 unsigned int *encodedval) 50 { 51 unsigned int lsbmask = GENMASK(msbpos - 1, 0); 52 unsigned int msbmask = GENMASK(msbwidth - 1, 0); 53 unsigned int msb, lsb; 54 int ret = 0; 55 56 msb = ncycles / msbfactor; 57 lsb = ncycles % msbfactor; 58 59 if (lsb > lsbmask) { 60 lsb = 0; 61 msb++; 62 } 63 64 /* 65 * Let's just put the maximum we can if the requested setting does 66 * not fit in the register field. 67 * We still return -ERANGE in case the caller cares. 68 */ 69 if (msb > msbmask) { 70 msb = msbmask; 71 lsb = lsbmask; 72 ret = -ERANGE; 73 } 74 75 *encodedval = (msb << msbpos) | lsb; 76 77 return ret; 78 } 79 80 /** 81 * atmel_smc_cs_conf_set_timing - set the SMC CS conf Txx parameter to a 82 * specific value 83 * @conf: SMC CS conf descriptor 84 * @shift: the position of the Txx field in the TIMINGS register 85 * @ncycles: value (expressed in MCK clk cycles) to assign to this Txx 86 * parameter 87 * 88 * This function encodes the @ncycles value as described in the datasheet 89 * (section "SMC Timings Register"), and then stores the result in the 90 * @conf->timings field at @shift position. 91 * 92 * Returns -EINVAL if shift is invalid, -ERANGE if ncycles does not fit in 93 * the field, and 0 otherwise. 94 */ 95 int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, 96 unsigned int shift, unsigned int ncycles) 97 { 98 unsigned int val; 99 int ret; 100 101 if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT && 102 shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT && 103 shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT && 104 shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT && 105 shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT) 106 return -EINVAL; 107 108 /* 109 * The formula described in atmel datasheets (section "HSMC Timings 110 * Register"): 111 * 112 * ncycles = (Txx[3] * 64) + Txx[2:0] 113 */ 114 ret = atmel_smc_cs_encode_ncycles(ncycles, 3, 1, 64, &val); 115 conf->timings &= ~GENMASK(shift + 3, shift); 116 conf->timings |= val << shift; 117 118 return ret; 119 } 120 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_timing); 121 122 /** 123 * atmel_smc_cs_conf_set_setup - set the SMC CS conf xx_SETUP parameter to a 124 * specific value 125 * @conf: SMC CS conf descriptor 126 * @shift: the position of the xx_SETUP field in the SETUP register 127 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_SETUP 128 * parameter 129 * 130 * This function encodes the @ncycles value as described in the datasheet 131 * (section "SMC Setup Register"), and then stores the result in the 132 * @conf->setup field at @shift position. 133 * 134 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in 135 * the field, and 0 otherwise. 136 */ 137 int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, 138 unsigned int shift, unsigned int ncycles) 139 { 140 unsigned int val; 141 int ret; 142 143 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && 144 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) 145 return -EINVAL; 146 147 /* 148 * The formula described in atmel datasheets (section "SMC Setup 149 * Register"): 150 * 151 * ncycles = (128 * xx_SETUP[5]) + xx_SETUP[4:0] 152 */ 153 ret = atmel_smc_cs_encode_ncycles(ncycles, 5, 1, 128, &val); 154 conf->setup &= ~GENMASK(shift + 7, shift); 155 conf->setup |= val << shift; 156 157 return ret; 158 } 159 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_setup); 160 161 /** 162 * atmel_smc_cs_conf_set_pulse - set the SMC CS conf xx_PULSE parameter to a 163 * specific value 164 * @conf: SMC CS conf descriptor 165 * @shift: the position of the xx_PULSE field in the PULSE register 166 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_PULSE 167 * parameter 168 * 169 * This function encodes the @ncycles value as described in the datasheet 170 * (section "SMC Pulse Register"), and then stores the result in the 171 * @conf->setup field at @shift position. 172 * 173 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in 174 * the field, and 0 otherwise. 175 */ 176 int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, 177 unsigned int shift, unsigned int ncycles) 178 { 179 unsigned int val; 180 int ret; 181 182 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT && 183 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT) 184 return -EINVAL; 185 186 /* 187 * The formula described in atmel datasheets (section "SMC Pulse 188 * Register"): 189 * 190 * ncycles = (256 * xx_PULSE[6]) + xx_PULSE[5:0] 191 */ 192 ret = atmel_smc_cs_encode_ncycles(ncycles, 6, 1, 256, &val); 193 conf->pulse &= ~GENMASK(shift + 7, shift); 194 conf->pulse |= val << shift; 195 196 return ret; 197 } 198 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_pulse); 199 200 /** 201 * atmel_smc_cs_conf_set_cycle - set the SMC CS conf xx_CYCLE parameter to a 202 * specific value 203 * @conf: SMC CS conf descriptor 204 * @shift: the position of the xx_CYCLE field in the CYCLE register 205 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_CYCLE 206 * parameter 207 * 208 * This function encodes the @ncycles value as described in the datasheet 209 * (section "SMC Cycle Register"), and then stores the result in the 210 * @conf->setup field at @shift position. 211 * 212 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in 213 * the field, and 0 otherwise. 214 */ 215 int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, 216 unsigned int shift, unsigned int ncycles) 217 { 218 unsigned int val; 219 int ret; 220 221 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT) 222 return -EINVAL; 223 224 /* 225 * The formula described in atmel datasheets (section "SMC Cycle 226 * Register"): 227 * 228 * ncycles = (xx_CYCLE[8:7] * 256) + xx_CYCLE[6:0] 229 */ 230 ret = atmel_smc_cs_encode_ncycles(ncycles, 7, 2, 256, &val); 231 conf->cycle &= ~GENMASK(shift + 15, shift); 232 conf->cycle |= val << shift; 233 234 return ret; 235 } 236 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_cycle); 237 238 /** 239 * atmel_smc_cs_conf_apply - apply an SMC CS conf 240 * @regmap: the SMC regmap 241 * @cs: the CS id 242 * @conf the SMC CS conf to apply 243 * 244 * Applies an SMC CS configuration. 245 * Only valid on at91sam9/avr32 SoCs. 246 */ 247 void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs, 248 const struct atmel_smc_cs_conf *conf) 249 { 250 regmap_write(regmap, ATMEL_SMC_SETUP(cs), conf->setup); 251 regmap_write(regmap, ATMEL_SMC_PULSE(cs), conf->pulse); 252 regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle); 253 regmap_write(regmap, ATMEL_SMC_MODE(cs), conf->mode); 254 } 255 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_apply); 256 257 /** 258 * atmel_hsmc_cs_conf_apply - apply an SMC CS conf 259 * @regmap: the HSMC regmap 260 * @cs: the CS id 261 * @layout: the layout of registers 262 * @conf the SMC CS conf to apply 263 * 264 * Applies an SMC CS configuration. 265 * Only valid on post-sama5 SoCs. 266 */ 267 void atmel_hsmc_cs_conf_apply(struct regmap *regmap, 268 const struct atmel_hsmc_reg_layout *layout, 269 int cs, const struct atmel_smc_cs_conf *conf) 270 { 271 regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup); 272 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); 273 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); 274 regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings); 275 regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode); 276 } 277 EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_apply); 278 279 /** 280 * atmel_smc_cs_conf_get - retrieve the current SMC CS conf 281 * @regmap: the SMC regmap 282 * @cs: the CS id 283 * @conf: the SMC CS conf object to store the current conf 284 * 285 * Retrieve the SMC CS configuration. 286 * Only valid on at91sam9/avr32 SoCs. 287 */ 288 void atmel_smc_cs_conf_get(struct regmap *regmap, int cs, 289 struct atmel_smc_cs_conf *conf) 290 { 291 regmap_read(regmap, ATMEL_SMC_SETUP(cs), &conf->setup); 292 regmap_read(regmap, ATMEL_SMC_PULSE(cs), &conf->pulse); 293 regmap_read(regmap, ATMEL_SMC_CYCLE(cs), &conf->cycle); 294 regmap_read(regmap, ATMEL_SMC_MODE(cs), &conf->mode); 295 } 296 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_get); 297 298 /** 299 * atmel_hsmc_cs_conf_get - retrieve the current SMC CS conf 300 * @regmap: the HSMC regmap 301 * @cs: the CS id 302 * @layout: the layout of registers 303 * @conf: the SMC CS conf object to store the current conf 304 * 305 * Retrieve the SMC CS configuration. 306 * Only valid on post-sama5 SoCs. 307 */ 308 void atmel_hsmc_cs_conf_get(struct regmap *regmap, 309 const struct atmel_hsmc_reg_layout *layout, 310 int cs, struct atmel_smc_cs_conf *conf) 311 { 312 regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup); 313 regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse); 314 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle); 315 regmap_read(regmap, ATMEL_HSMC_TIMINGS(layout, cs), &conf->timings); 316 regmap_read(regmap, ATMEL_HSMC_MODE(layout, cs), &conf->mode); 317 } 318 EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_get); 319 320 static const struct atmel_hsmc_reg_layout sama5d3_reg_layout = { 321 .timing_regs_offset = 0x600, 322 }; 323 324 static const struct atmel_hsmc_reg_layout sama5d2_reg_layout = { 325 .timing_regs_offset = 0x700, 326 }; 327 328 static const struct of_device_id atmel_smc_ids[] = { 329 { .compatible = "atmel,at91sam9260-smc", .data = NULL }, 330 { .compatible = "atmel,sama5d3-smc", .data = &sama5d3_reg_layout }, 331 { .compatible = "atmel,sama5d2-smc", .data = &sama5d2_reg_layout }, 332 { /* sentinel */ }, 333 }; 334 335 /** 336 * atmel_hsmc_get_reg_layout - retrieve the layout of HSMC registers 337 * @np: the HSMC regmap 338 * 339 * Retrieve the layout of HSMC registers. 340 * 341 * Returns NULL in case of SMC, a struct atmel_hsmc_reg_layout pointer 342 * in HSMC case, otherwise ERR_PTR(-EINVAL). 343 */ 344 const struct atmel_hsmc_reg_layout * 345 atmel_hsmc_get_reg_layout(struct device_node *np) 346 { 347 const struct of_device_id *match; 348 349 match = of_match_node(atmel_smc_ids, np); 350 351 return match ? match->data : ERR_PTR(-EINVAL); 352 } 353 EXPORT_SYMBOL_GPL(atmel_hsmc_get_reg_layout); 354