1 /* 2 * Arizona core driver 3 * 4 * Copyright 2012 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/err.h> 16 #include <linux/gpio.h> 17 #include <linux/interrupt.h> 18 #include <linux/mfd/core.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 #include <linux/of_gpio.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/regmap.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/regulator/machine.h> 27 #include <linux/slab.h> 28 #include <linux/platform_device.h> 29 30 #include <linux/mfd/arizona/core.h> 31 #include <linux/mfd/arizona/registers.h> 32 33 #include "arizona.h" 34 35 static const char * const wm5102_core_supplies[] = { 36 "AVDD", 37 "DBVDD1", 38 }; 39 40 int arizona_clk32k_enable(struct arizona *arizona) 41 { 42 int ret = 0; 43 44 mutex_lock(&arizona->clk_lock); 45 46 arizona->clk32k_ref++; 47 48 if (arizona->clk32k_ref == 1) { 49 switch (arizona->pdata.clk32k_src) { 50 case ARIZONA_32KZ_MCLK1: 51 ret = pm_runtime_get_sync(arizona->dev); 52 if (ret != 0) 53 goto err_ref; 54 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); 55 if (ret != 0) 56 goto err_pm; 57 break; 58 case ARIZONA_32KZ_MCLK2: 59 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); 60 if (ret != 0) 61 goto err_ref; 62 break; 63 } 64 65 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 66 ARIZONA_CLK_32K_ENA, 67 ARIZONA_CLK_32K_ENA); 68 } 69 70 err_pm: 71 pm_runtime_put_sync(arizona->dev); 72 err_ref: 73 if (ret != 0) 74 arizona->clk32k_ref--; 75 76 mutex_unlock(&arizona->clk_lock); 77 78 return ret; 79 } 80 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 81 82 int arizona_clk32k_disable(struct arizona *arizona) 83 { 84 mutex_lock(&arizona->clk_lock); 85 86 BUG_ON(arizona->clk32k_ref <= 0); 87 88 arizona->clk32k_ref--; 89 90 if (arizona->clk32k_ref == 0) { 91 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 92 ARIZONA_CLK_32K_ENA, 0); 93 94 switch (arizona->pdata.clk32k_src) { 95 case ARIZONA_32KZ_MCLK1: 96 pm_runtime_put_sync(arizona->dev); 97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); 98 break; 99 case ARIZONA_32KZ_MCLK2: 100 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); 101 break; 102 } 103 } 104 105 mutex_unlock(&arizona->clk_lock); 106 107 return 0; 108 } 109 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 110 111 static irqreturn_t arizona_clkgen_err(int irq, void *data) 112 { 113 struct arizona *arizona = data; 114 115 dev_err(arizona->dev, "CLKGEN error\n"); 116 117 return IRQ_HANDLED; 118 } 119 120 static irqreturn_t arizona_underclocked(int irq, void *data) 121 { 122 struct arizona *arizona = data; 123 unsigned int val; 124 int ret; 125 126 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 127 &val); 128 if (ret != 0) { 129 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 130 ret); 131 return IRQ_NONE; 132 } 133 134 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 135 dev_err(arizona->dev, "AIF3 underclocked\n"); 136 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 137 dev_err(arizona->dev, "AIF2 underclocked\n"); 138 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 139 dev_err(arizona->dev, "AIF1 underclocked\n"); 140 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) 141 dev_err(arizona->dev, "ISRC3 underclocked\n"); 142 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 143 dev_err(arizona->dev, "ISRC2 underclocked\n"); 144 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 145 dev_err(arizona->dev, "ISRC1 underclocked\n"); 146 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 147 dev_err(arizona->dev, "FX underclocked\n"); 148 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 149 dev_err(arizona->dev, "ASRC underclocked\n"); 150 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 151 dev_err(arizona->dev, "DAC underclocked\n"); 152 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 153 dev_err(arizona->dev, "ADC underclocked\n"); 154 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 155 dev_err(arizona->dev, "Mixer dropped sample\n"); 156 157 return IRQ_HANDLED; 158 } 159 160 static irqreturn_t arizona_overclocked(int irq, void *data) 161 { 162 struct arizona *arizona = data; 163 unsigned int val[3]; 164 int ret; 165 166 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 167 &val[0], 3); 168 if (ret != 0) { 169 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 170 ret); 171 return IRQ_NONE; 172 } 173 174 switch (arizona->type) { 175 case WM8998: 176 case WM1814: 177 /* Some bits are shifted on WM8998, 178 * rearrange to match the standard bit layout 179 */ 180 val[0] = ((val[0] & 0x60e0) >> 1) | 181 ((val[0] & 0x1e00) >> 2) | 182 (val[0] & 0x000f); 183 break; 184 default: 185 break; 186 } 187 188 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 189 dev_err(arizona->dev, "PWM overclocked\n"); 190 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 191 dev_err(arizona->dev, "FX core overclocked\n"); 192 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 193 dev_err(arizona->dev, "DAC SYS overclocked\n"); 194 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 195 dev_err(arizona->dev, "DAC WARP overclocked\n"); 196 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 197 dev_err(arizona->dev, "ADC overclocked\n"); 198 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 199 dev_err(arizona->dev, "Mixer overclocked\n"); 200 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 201 dev_err(arizona->dev, "AIF3 overclocked\n"); 202 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 203 dev_err(arizona->dev, "AIF2 overclocked\n"); 204 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 205 dev_err(arizona->dev, "AIF1 overclocked\n"); 206 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 207 dev_err(arizona->dev, "Pad control overclocked\n"); 208 209 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 210 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 211 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 212 dev_err(arizona->dev, "Slimbus async overclocked\n"); 213 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 214 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 215 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 216 dev_err(arizona->dev, "ASRC async system overclocked\n"); 217 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 218 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 219 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 220 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 221 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 222 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 223 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 224 dev_err(arizona->dev, "DSP1 overclocked\n"); 225 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) 226 dev_err(arizona->dev, "ISRC3 overclocked\n"); 227 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 228 dev_err(arizona->dev, "ISRC2 overclocked\n"); 229 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 230 dev_err(arizona->dev, "ISRC1 overclocked\n"); 231 232 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) 233 dev_err(arizona->dev, "SPDIF overclocked\n"); 234 235 return IRQ_HANDLED; 236 } 237 238 #define ARIZONA_REG_POLL_DELAY_US 7500 239 240 static int arizona_poll_reg(struct arizona *arizona, 241 int timeout_ms, unsigned int reg, 242 unsigned int mask, unsigned int target) 243 { 244 unsigned int val = 0; 245 int ret; 246 247 ret = regmap_read_poll_timeout(arizona->regmap, 248 ARIZONA_INTERRUPT_RAW_STATUS_5, val, 249 ((val & mask) == target), 250 ARIZONA_REG_POLL_DELAY_US, 251 timeout_ms * 1000); 252 if (ret) 253 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", 254 reg, val); 255 256 return ret; 257 } 258 259 static int arizona_wait_for_boot(struct arizona *arizona) 260 { 261 int ret; 262 263 /* 264 * We can't use an interrupt as we need to runtime resume to do so, 265 * we won't race with the interrupt handler as it'll be blocked on 266 * runtime resume. 267 */ 268 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, 269 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 270 271 if (!ret) 272 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 273 ARIZONA_BOOT_DONE_STS); 274 275 pm_runtime_mark_last_busy(arizona->dev); 276 277 return ret; 278 } 279 280 static inline void arizona_enable_reset(struct arizona *arizona) 281 { 282 if (arizona->pdata.reset) 283 gpio_set_value_cansleep(arizona->pdata.reset, 0); 284 } 285 286 static void arizona_disable_reset(struct arizona *arizona) 287 { 288 if (arizona->pdata.reset) { 289 switch (arizona->type) { 290 case WM5110: 291 case WM8280: 292 /* Meet requirements for minimum reset duration */ 293 usleep_range(5000, 10000); 294 break; 295 default: 296 break; 297 } 298 299 gpio_set_value_cansleep(arizona->pdata.reset, 1); 300 usleep_range(1000, 5000); 301 } 302 } 303 304 struct arizona_sysclk_state { 305 unsigned int fll; 306 unsigned int sysclk; 307 }; 308 309 static int arizona_enable_freerun_sysclk(struct arizona *arizona, 310 struct arizona_sysclk_state *state) 311 { 312 int ret, err; 313 314 /* Cache existing FLL and SYSCLK settings */ 315 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); 316 if (ret) { 317 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 318 ret); 319 return ret; 320 } 321 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 322 &state->sysclk); 323 if (ret) { 324 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 325 ret); 326 return ret; 327 } 328 329 /* Start up SYSCLK using the FLL in free running mode */ 330 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 331 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 332 if (ret) { 333 dev_err(arizona->dev, 334 "Failed to start FLL in freerunning mode: %d\n", 335 ret); 336 return ret; 337 } 338 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, 339 ARIZONA_FLL1_CLOCK_OK_STS, 340 ARIZONA_FLL1_CLOCK_OK_STS); 341 if (ret) 342 goto err_fll; 343 344 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 345 if (ret) { 346 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 347 goto err_fll; 348 } 349 350 return 0; 351 352 err_fll: 353 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 354 if (err) 355 dev_err(arizona->dev, 356 "Failed to re-apply old FLL settings: %d\n", err); 357 358 return ret; 359 } 360 361 static int arizona_disable_freerun_sysclk(struct arizona *arizona, 362 struct arizona_sysclk_state *state) 363 { 364 int ret; 365 366 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 367 state->sysclk); 368 if (ret) { 369 dev_err(arizona->dev, 370 "Failed to re-apply old SYSCLK settings: %d\n", ret); 371 return ret; 372 } 373 374 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 375 if (ret) { 376 dev_err(arizona->dev, 377 "Failed to re-apply old FLL settings: %d\n", ret); 378 return ret; 379 } 380 381 return 0; 382 } 383 384 static int wm5102_apply_hardware_patch(struct arizona *arizona) 385 { 386 struct arizona_sysclk_state state; 387 int err, ret; 388 389 ret = arizona_enable_freerun_sysclk(arizona, &state); 390 if (ret) 391 return ret; 392 393 /* Start the write sequencer and wait for it to finish */ 394 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 395 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 396 if (ret) { 397 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 398 ret); 399 goto err; 400 } 401 402 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, 403 ARIZONA_WSEQ_BUSY, 0); 404 if (ret) 405 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 406 ARIZONA_WSEQ_ABORT); 407 408 err: 409 err = arizona_disable_freerun_sysclk(arizona, &state); 410 411 return ret ?: err; 412 } 413 414 /* 415 * Register patch to some of the CODECs internal write sequences 416 * to ensure a clean exit from the low power sleep state. 417 */ 418 static const struct reg_sequence wm5110_sleep_patch[] = { 419 { 0x337A, 0xC100 }, 420 { 0x337B, 0x0041 }, 421 { 0x3300, 0xA210 }, 422 { 0x3301, 0x050C }, 423 }; 424 425 static int wm5110_apply_sleep_patch(struct arizona *arizona) 426 { 427 struct arizona_sysclk_state state; 428 int err, ret; 429 430 ret = arizona_enable_freerun_sysclk(arizona, &state); 431 if (ret) 432 return ret; 433 434 ret = regmap_multi_reg_write_bypassed(arizona->regmap, 435 wm5110_sleep_patch, 436 ARRAY_SIZE(wm5110_sleep_patch)); 437 438 err = arizona_disable_freerun_sysclk(arizona, &state); 439 440 return ret ?: err; 441 } 442 443 static int wm5102_clear_write_sequencer(struct arizona *arizona) 444 { 445 int ret; 446 447 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, 448 0x0); 449 if (ret) { 450 dev_err(arizona->dev, 451 "Failed to clear write sequencer state: %d\n", ret); 452 return ret; 453 } 454 455 arizona_enable_reset(arizona); 456 regulator_disable(arizona->dcvdd); 457 458 msleep(20); 459 460 ret = regulator_enable(arizona->dcvdd); 461 if (ret) { 462 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); 463 return ret; 464 } 465 arizona_disable_reset(arizona); 466 467 return 0; 468 } 469 470 #ifdef CONFIG_PM 471 static int arizona_isolate_dcvdd(struct arizona *arizona) 472 { 473 int ret; 474 475 ret = regmap_update_bits(arizona->regmap, 476 ARIZONA_ISOLATION_CONTROL, 477 ARIZONA_ISOLATE_DCVDD1, 478 ARIZONA_ISOLATE_DCVDD1); 479 if (ret != 0) 480 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); 481 482 return ret; 483 } 484 485 static int arizona_connect_dcvdd(struct arizona *arizona) 486 { 487 int ret; 488 489 ret = regmap_update_bits(arizona->regmap, 490 ARIZONA_ISOLATION_CONTROL, 491 ARIZONA_ISOLATE_DCVDD1, 0); 492 if (ret != 0) 493 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); 494 495 return ret; 496 } 497 498 static int arizona_is_jack_det_active(struct arizona *arizona) 499 { 500 unsigned int val; 501 int ret; 502 503 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); 504 if (ret) { 505 dev_err(arizona->dev, 506 "Failed to check jack det status: %d\n", ret); 507 return ret; 508 } else if (val & ARIZONA_JD1_ENA) { 509 return 1; 510 } else { 511 return 0; 512 } 513 } 514 515 static int arizona_runtime_resume(struct device *dev) 516 { 517 struct arizona *arizona = dev_get_drvdata(dev); 518 int ret; 519 520 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 521 522 if (arizona->has_fully_powered_off) { 523 dev_dbg(arizona->dev, "Re-enabling core supplies\n"); 524 525 ret = regulator_bulk_enable(arizona->num_core_supplies, 526 arizona->core_supplies); 527 if (ret) { 528 dev_err(dev, "Failed to enable core supplies: %d\n", 529 ret); 530 return ret; 531 } 532 } 533 534 ret = regulator_enable(arizona->dcvdd); 535 if (ret != 0) { 536 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 537 if (arizona->has_fully_powered_off) 538 regulator_bulk_disable(arizona->num_core_supplies, 539 arizona->core_supplies); 540 return ret; 541 } 542 543 if (arizona->has_fully_powered_off) { 544 arizona_disable_reset(arizona); 545 enable_irq(arizona->irq); 546 arizona->has_fully_powered_off = false; 547 } 548 549 regcache_cache_only(arizona->regmap, false); 550 551 switch (arizona->type) { 552 case WM5102: 553 if (arizona->external_dcvdd) { 554 ret = arizona_connect_dcvdd(arizona); 555 if (ret != 0) 556 goto err; 557 } 558 559 ret = wm5102_patch(arizona); 560 if (ret != 0) { 561 dev_err(arizona->dev, "Failed to apply patch: %d\n", 562 ret); 563 goto err; 564 } 565 566 ret = wm5102_apply_hardware_patch(arizona); 567 if (ret) { 568 dev_err(arizona->dev, 569 "Failed to apply hardware patch: %d\n", 570 ret); 571 goto err; 572 } 573 break; 574 case WM5110: 575 case WM8280: 576 ret = arizona_wait_for_boot(arizona); 577 if (ret) 578 goto err; 579 580 if (arizona->external_dcvdd) { 581 ret = arizona_connect_dcvdd(arizona); 582 if (ret != 0) 583 goto err; 584 } else { 585 /* 586 * As this is only called for the internal regulator 587 * (where we know voltage ranges available) it is ok 588 * to request an exact range. 589 */ 590 ret = regulator_set_voltage(arizona->dcvdd, 591 1200000, 1200000); 592 if (ret < 0) { 593 dev_err(arizona->dev, 594 "Failed to set resume voltage: %d\n", 595 ret); 596 goto err; 597 } 598 } 599 600 ret = wm5110_apply_sleep_patch(arizona); 601 if (ret) { 602 dev_err(arizona->dev, 603 "Failed to re-apply sleep patch: %d\n", 604 ret); 605 goto err; 606 } 607 break; 608 case WM1831: 609 case CS47L24: 610 ret = arizona_wait_for_boot(arizona); 611 if (ret != 0) 612 goto err; 613 break; 614 default: 615 ret = arizona_wait_for_boot(arizona); 616 if (ret != 0) 617 goto err; 618 619 if (arizona->external_dcvdd) { 620 ret = arizona_connect_dcvdd(arizona); 621 if (ret != 0) 622 goto err; 623 } 624 break; 625 } 626 627 ret = regcache_sync(arizona->regmap); 628 if (ret != 0) { 629 dev_err(arizona->dev, "Failed to restore register cache\n"); 630 goto err; 631 } 632 633 return 0; 634 635 err: 636 regcache_cache_only(arizona->regmap, true); 637 regulator_disable(arizona->dcvdd); 638 return ret; 639 } 640 641 static int arizona_runtime_suspend(struct device *dev) 642 { 643 struct arizona *arizona = dev_get_drvdata(dev); 644 int jd_active = 0; 645 int ret; 646 647 dev_dbg(arizona->dev, "Entering AoD mode\n"); 648 649 switch (arizona->type) { 650 case WM5110: 651 case WM8280: 652 jd_active = arizona_is_jack_det_active(arizona); 653 if (jd_active < 0) 654 return jd_active; 655 656 if (arizona->external_dcvdd) { 657 ret = arizona_isolate_dcvdd(arizona); 658 if (ret != 0) 659 return ret; 660 } else { 661 /* 662 * As this is only called for the internal regulator 663 * (where we know voltage ranges available) it is ok 664 * to request an exact range. 665 */ 666 ret = regulator_set_voltage(arizona->dcvdd, 667 1175000, 1175000); 668 if (ret < 0) { 669 dev_err(arizona->dev, 670 "Failed to set suspend voltage: %d\n", 671 ret); 672 return ret; 673 } 674 } 675 break; 676 case WM5102: 677 jd_active = arizona_is_jack_det_active(arizona); 678 if (jd_active < 0) 679 return jd_active; 680 681 if (arizona->external_dcvdd) { 682 ret = arizona_isolate_dcvdd(arizona); 683 if (ret != 0) 684 return ret; 685 } 686 687 if (!jd_active) { 688 ret = regmap_write(arizona->regmap, 689 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); 690 if (ret) { 691 dev_err(arizona->dev, 692 "Failed to clear write sequencer: %d\n", 693 ret); 694 return ret; 695 } 696 } 697 break; 698 case WM1831: 699 case CS47L24: 700 break; 701 default: 702 jd_active = arizona_is_jack_det_active(arizona); 703 if (jd_active < 0) 704 return jd_active; 705 706 if (arizona->external_dcvdd) { 707 ret = arizona_isolate_dcvdd(arizona); 708 if (ret != 0) 709 return ret; 710 } 711 break; 712 } 713 714 regcache_cache_only(arizona->regmap, true); 715 regcache_mark_dirty(arizona->regmap); 716 regulator_disable(arizona->dcvdd); 717 718 /* Allow us to completely power down if no jack detection */ 719 if (!jd_active) { 720 dev_dbg(arizona->dev, "Fully powering off\n"); 721 722 arizona->has_fully_powered_off = true; 723 724 disable_irq_nosync(arizona->irq); 725 arizona_enable_reset(arizona); 726 regulator_bulk_disable(arizona->num_core_supplies, 727 arizona->core_supplies); 728 } 729 730 return 0; 731 } 732 #endif 733 734 #ifdef CONFIG_PM_SLEEP 735 static int arizona_suspend(struct device *dev) 736 { 737 struct arizona *arizona = dev_get_drvdata(dev); 738 739 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 740 disable_irq(arizona->irq); 741 742 return 0; 743 } 744 745 static int arizona_suspend_noirq(struct device *dev) 746 { 747 struct arizona *arizona = dev_get_drvdata(dev); 748 749 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 750 enable_irq(arizona->irq); 751 752 return 0; 753 } 754 755 static int arizona_resume_noirq(struct device *dev) 756 { 757 struct arizona *arizona = dev_get_drvdata(dev); 758 759 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 760 disable_irq(arizona->irq); 761 762 return 0; 763 } 764 765 static int arizona_resume(struct device *dev) 766 { 767 struct arizona *arizona = dev_get_drvdata(dev); 768 769 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); 770 enable_irq(arizona->irq); 771 772 return 0; 773 } 774 #endif 775 776 const struct dev_pm_ops arizona_pm_ops = { 777 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 778 arizona_runtime_resume, 779 NULL) 780 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 781 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, 782 arizona_resume_noirq) 783 }; 784 EXPORT_SYMBOL_GPL(arizona_pm_ops); 785 786 #ifdef CONFIG_OF 787 unsigned long arizona_of_get_type(struct device *dev) 788 { 789 const struct of_device_id *id = of_match_device(arizona_of_match, dev); 790 791 if (id) 792 return (unsigned long)id->data; 793 else 794 return 0; 795 } 796 EXPORT_SYMBOL_GPL(arizona_of_get_type); 797 798 static int arizona_of_get_core_pdata(struct arizona *arizona) 799 { 800 struct arizona_pdata *pdata = &arizona->pdata; 801 struct property *prop; 802 const __be32 *cur; 803 u32 val; 804 u32 pdm_val[ARIZONA_MAX_PDM_SPK]; 805 int ret, i; 806 int count = 0; 807 808 pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0); 809 if (pdata->reset == -EPROBE_DEFER) { 810 return pdata->reset; 811 } else if (pdata->reset < 0) { 812 dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n", 813 pdata->reset); 814 815 pdata->reset = 0; 816 } 817 818 ret = of_property_read_u32_array(arizona->dev->of_node, 819 "wlf,gpio-defaults", 820 pdata->gpio_defaults, 821 ARRAY_SIZE(pdata->gpio_defaults)); 822 if (ret >= 0) { 823 /* 824 * All values are literal except out of range values 825 * which are chip default, translate into platform 826 * data which uses 0 as chip default and out of range 827 * as zero. 828 */ 829 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { 830 if (pdata->gpio_defaults[i] > 0xffff) 831 pdata->gpio_defaults[i] = 0; 832 else if (pdata->gpio_defaults[i] == 0) 833 pdata->gpio_defaults[i] = 0x10000; 834 } 835 } else { 836 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 837 ret); 838 } 839 840 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, 841 cur, val) { 842 if (count == ARRAY_SIZE(pdata->inmode)) 843 break; 844 845 pdata->inmode[count] = val; 846 count++; 847 } 848 849 count = 0; 850 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, 851 cur, val) { 852 if (count == ARRAY_SIZE(pdata->dmic_ref)) 853 break; 854 855 pdata->dmic_ref[count] = val; 856 count++; 857 } 858 859 count = 0; 860 of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop, 861 cur, val) { 862 if (count == ARRAY_SIZE(pdata->out_mono)) 863 break; 864 865 pdata->out_mono[count] = !!val; 866 count++; 867 } 868 869 count = 0; 870 of_property_for_each_u32(arizona->dev->of_node, 871 "wlf,max-channels-clocked", 872 prop, cur, val) { 873 if (count == ARRAY_SIZE(pdata->max_channels_clocked)) 874 break; 875 876 pdata->max_channels_clocked[count] = val; 877 count++; 878 } 879 880 ret = of_property_read_u32_array(arizona->dev->of_node, 881 "wlf,spk-fmt", 882 pdm_val, 883 ARRAY_SIZE(pdm_val)); 884 885 if (ret >= 0) 886 for (count = 0; count < ARRAY_SIZE(pdata->spk_fmt); ++count) 887 pdata->spk_fmt[count] = pdm_val[count]; 888 889 ret = of_property_read_u32_array(arizona->dev->of_node, 890 "wlf,spk-mute", 891 pdm_val, 892 ARRAY_SIZE(pdm_val)); 893 894 if (ret >= 0) 895 for (count = 0; count < ARRAY_SIZE(pdata->spk_mute); ++count) 896 pdata->spk_mute[count] = pdm_val[count]; 897 898 return 0; 899 } 900 901 const struct of_device_id arizona_of_match[] = { 902 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 903 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 904 { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, 905 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 906 { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, 907 { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, 908 { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, 909 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, 910 {}, 911 }; 912 EXPORT_SYMBOL_GPL(arizona_of_match); 913 #else 914 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 915 { 916 return 0; 917 } 918 #endif 919 920 static const struct mfd_cell early_devs[] = { 921 { .name = "arizona-ldo1" }, 922 }; 923 924 static const char * const wm5102_supplies[] = { 925 "MICVDD", 926 "DBVDD2", 927 "DBVDD3", 928 "CPVDD", 929 "SPKVDDL", 930 "SPKVDDR", 931 }; 932 933 static const struct mfd_cell wm5102_devs[] = { 934 { .name = "arizona-micsupp" }, 935 { .name = "arizona-gpio" }, 936 { 937 .name = "arizona-extcon", 938 .parent_supplies = wm5102_supplies, 939 .num_parent_supplies = 1, /* We only need MICVDD */ 940 }, 941 { .name = "arizona-haptics" }, 942 { .name = "arizona-pwm" }, 943 { 944 .name = "wm5102-codec", 945 .parent_supplies = wm5102_supplies, 946 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 947 }, 948 }; 949 950 static const struct mfd_cell wm5110_devs[] = { 951 { .name = "arizona-micsupp" }, 952 { .name = "arizona-gpio" }, 953 { 954 .name = "arizona-extcon", 955 .parent_supplies = wm5102_supplies, 956 .num_parent_supplies = 1, /* We only need MICVDD */ 957 }, 958 { .name = "arizona-haptics" }, 959 { .name = "arizona-pwm" }, 960 { 961 .name = "wm5110-codec", 962 .parent_supplies = wm5102_supplies, 963 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 964 }, 965 }; 966 967 static const char * const cs47l24_supplies[] = { 968 "MICVDD", 969 "CPVDD", 970 "SPKVDD", 971 }; 972 973 static const struct mfd_cell cs47l24_devs[] = { 974 { .name = "arizona-gpio" }, 975 { .name = "arizona-haptics" }, 976 { .name = "arizona-pwm" }, 977 { 978 .name = "cs47l24-codec", 979 .parent_supplies = cs47l24_supplies, 980 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), 981 }, 982 }; 983 984 static const char * const wm8997_supplies[] = { 985 "MICVDD", 986 "DBVDD2", 987 "CPVDD", 988 "SPKVDD", 989 }; 990 991 static const struct mfd_cell wm8997_devs[] = { 992 { .name = "arizona-micsupp" }, 993 { .name = "arizona-gpio" }, 994 { 995 .name = "arizona-extcon", 996 .parent_supplies = wm8997_supplies, 997 .num_parent_supplies = 1, /* We only need MICVDD */ 998 }, 999 { .name = "arizona-haptics" }, 1000 { .name = "arizona-pwm" }, 1001 { 1002 .name = "wm8997-codec", 1003 .parent_supplies = wm8997_supplies, 1004 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 1005 }, 1006 }; 1007 1008 static const struct mfd_cell wm8998_devs[] = { 1009 { .name = "arizona-micsupp" }, 1010 { .name = "arizona-gpio" }, 1011 { 1012 .name = "arizona-extcon", 1013 .parent_supplies = wm5102_supplies, 1014 .num_parent_supplies = 1, /* We only need MICVDD */ 1015 }, 1016 { .name = "arizona-haptics" }, 1017 { .name = "arizona-pwm" }, 1018 { 1019 .name = "wm8998-codec", 1020 .parent_supplies = wm5102_supplies, 1021 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 1022 }, 1023 }; 1024 1025 int arizona_dev_init(struct arizona *arizona) 1026 { 1027 const char * const mclk_name[] = { "mclk1", "mclk2" }; 1028 struct device *dev = arizona->dev; 1029 const char *type_name = NULL; 1030 unsigned int reg, val, mask; 1031 int (*apply_patch)(struct arizona *) = NULL; 1032 const struct mfd_cell *subdevs = NULL; 1033 int n_subdevs, ret, i; 1034 1035 dev_set_drvdata(arizona->dev, arizona); 1036 mutex_init(&arizona->clk_lock); 1037 1038 if (dev_get_platdata(arizona->dev)) { 1039 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 1040 sizeof(arizona->pdata)); 1041 } else { 1042 ret = arizona_of_get_core_pdata(arizona); 1043 if (ret < 0) 1044 return ret; 1045 } 1046 1047 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); 1048 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { 1049 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); 1050 if (IS_ERR(arizona->mclk[i])) { 1051 dev_info(arizona->dev, "Failed to get %s: %ld\n", 1052 mclk_name[i], PTR_ERR(arizona->mclk[i])); 1053 arizona->mclk[i] = NULL; 1054 } 1055 } 1056 1057 regcache_cache_only(arizona->regmap, true); 1058 1059 switch (arizona->type) { 1060 case WM5102: 1061 case WM5110: 1062 case WM8280: 1063 case WM8997: 1064 case WM8998: 1065 case WM1814: 1066 case WM1831: 1067 case CS47L24: 1068 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 1069 arizona->core_supplies[i].supply 1070 = wm5102_core_supplies[i]; 1071 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 1072 break; 1073 default: 1074 dev_err(arizona->dev, "Unknown device type %d\n", 1075 arizona->type); 1076 return -ENODEV; 1077 } 1078 1079 /* Mark DCVDD as external, LDO1 driver will clear if internal */ 1080 arizona->external_dcvdd = true; 1081 1082 switch (arizona->type) { 1083 case WM1831: 1084 case CS47L24: 1085 break; /* No LDO1 regulator */ 1086 default: 1087 ret = mfd_add_devices(arizona->dev, -1, early_devs, 1088 ARRAY_SIZE(early_devs), NULL, 0, NULL); 1089 if (ret != 0) { 1090 dev_err(dev, "Failed to add early children: %d\n", ret); 1091 return ret; 1092 } 1093 break; 1094 } 1095 1096 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 1097 arizona->core_supplies); 1098 if (ret != 0) { 1099 dev_err(dev, "Failed to request core supplies: %d\n", 1100 ret); 1101 goto err_early; 1102 } 1103 1104 /** 1105 * Don't use devres here because the only device we have to get 1106 * against is the MFD device and DCVDD will likely be supplied by 1107 * one of its children. Meaning that the regulator will be 1108 * destroyed by the time devres calls regulator put. 1109 */ 1110 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); 1111 if (IS_ERR(arizona->dcvdd)) { 1112 ret = PTR_ERR(arizona->dcvdd); 1113 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 1114 goto err_early; 1115 } 1116 1117 if (arizona->pdata.reset) { 1118 /* Start out with /RESET low to put the chip into reset */ 1119 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, 1120 GPIOF_DIR_OUT | GPIOF_INIT_LOW, 1121 "arizona /RESET"); 1122 if (ret != 0) { 1123 dev_err(dev, "Failed to request /RESET: %d\n", ret); 1124 goto err_dcvdd; 1125 } 1126 } 1127 1128 ret = regulator_bulk_enable(arizona->num_core_supplies, 1129 arizona->core_supplies); 1130 if (ret != 0) { 1131 dev_err(dev, "Failed to enable core supplies: %d\n", 1132 ret); 1133 goto err_dcvdd; 1134 } 1135 1136 ret = regulator_enable(arizona->dcvdd); 1137 if (ret != 0) { 1138 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 1139 goto err_enable; 1140 } 1141 1142 arizona_disable_reset(arizona); 1143 1144 regcache_cache_only(arizona->regmap, false); 1145 1146 /* Verify that this is a chip we know about */ 1147 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1148 if (ret != 0) { 1149 dev_err(dev, "Failed to read ID register: %d\n", ret); 1150 goto err_reset; 1151 } 1152 1153 switch (reg) { 1154 case 0x5102: 1155 case 0x5110: 1156 case 0x6349: 1157 case 0x6363: 1158 case 0x8997: 1159 break; 1160 default: 1161 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 1162 ret = -ENODEV; 1163 goto err_reset; 1164 } 1165 1166 /* If we have a /RESET GPIO we'll already be reset */ 1167 if (!arizona->pdata.reset) { 1168 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 1169 if (ret != 0) { 1170 dev_err(dev, "Failed to reset device: %d\n", ret); 1171 goto err_reset; 1172 } 1173 1174 usleep_range(1000, 5000); 1175 } 1176 1177 /* Ensure device startup is complete */ 1178 switch (arizona->type) { 1179 case WM5102: 1180 ret = regmap_read(arizona->regmap, 1181 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); 1182 if (ret) { 1183 dev_err(dev, 1184 "Failed to check write sequencer state: %d\n", 1185 ret); 1186 } else if (val & 0x01) { 1187 ret = wm5102_clear_write_sequencer(arizona); 1188 if (ret) 1189 return ret; 1190 } 1191 break; 1192 default: 1193 break; 1194 } 1195 1196 ret = arizona_wait_for_boot(arizona); 1197 if (ret) { 1198 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); 1199 goto err_reset; 1200 } 1201 1202 /* Read the device ID information & do device specific stuff */ 1203 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1204 if (ret != 0) { 1205 dev_err(dev, "Failed to read ID register: %d\n", ret); 1206 goto err_reset; 1207 } 1208 1209 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 1210 &arizona->rev); 1211 if (ret != 0) { 1212 dev_err(dev, "Failed to read revision register: %d\n", ret); 1213 goto err_reset; 1214 } 1215 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 1216 1217 switch (reg) { 1218 case 0x5102: 1219 if (IS_ENABLED(CONFIG_MFD_WM5102)) { 1220 type_name = "WM5102"; 1221 if (arizona->type != WM5102) { 1222 dev_warn(arizona->dev, 1223 "WM5102 registered as %d\n", 1224 arizona->type); 1225 arizona->type = WM5102; 1226 } 1227 1228 apply_patch = wm5102_patch; 1229 arizona->rev &= 0x7; 1230 subdevs = wm5102_devs; 1231 n_subdevs = ARRAY_SIZE(wm5102_devs); 1232 } 1233 break; 1234 case 0x5110: 1235 if (IS_ENABLED(CONFIG_MFD_WM5110)) { 1236 switch (arizona->type) { 1237 case WM5110: 1238 type_name = "WM5110"; 1239 break; 1240 case WM8280: 1241 type_name = "WM8280"; 1242 break; 1243 default: 1244 type_name = "WM5110"; 1245 dev_warn(arizona->dev, 1246 "WM5110 registered as %d\n", 1247 arizona->type); 1248 arizona->type = WM5110; 1249 break; 1250 } 1251 1252 apply_patch = wm5110_patch; 1253 subdevs = wm5110_devs; 1254 n_subdevs = ARRAY_SIZE(wm5110_devs); 1255 } 1256 break; 1257 case 0x6363: 1258 if (IS_ENABLED(CONFIG_MFD_CS47L24)) { 1259 switch (arizona->type) { 1260 case CS47L24: 1261 type_name = "CS47L24"; 1262 break; 1263 1264 case WM1831: 1265 type_name = "WM1831"; 1266 break; 1267 1268 default: 1269 dev_warn(arizona->dev, 1270 "CS47L24 registered as %d\n", 1271 arizona->type); 1272 arizona->type = CS47L24; 1273 break; 1274 } 1275 1276 apply_patch = cs47l24_patch; 1277 subdevs = cs47l24_devs; 1278 n_subdevs = ARRAY_SIZE(cs47l24_devs); 1279 } 1280 break; 1281 case 0x8997: 1282 if (IS_ENABLED(CONFIG_MFD_WM8997)) { 1283 type_name = "WM8997"; 1284 if (arizona->type != WM8997) { 1285 dev_warn(arizona->dev, 1286 "WM8997 registered as %d\n", 1287 arizona->type); 1288 arizona->type = WM8997; 1289 } 1290 1291 apply_patch = wm8997_patch; 1292 subdevs = wm8997_devs; 1293 n_subdevs = ARRAY_SIZE(wm8997_devs); 1294 } 1295 break; 1296 case 0x6349: 1297 if (IS_ENABLED(CONFIG_MFD_WM8998)) { 1298 switch (arizona->type) { 1299 case WM8998: 1300 type_name = "WM8998"; 1301 break; 1302 1303 case WM1814: 1304 type_name = "WM1814"; 1305 break; 1306 1307 default: 1308 type_name = "WM8998"; 1309 dev_warn(arizona->dev, 1310 "WM8998 registered as %d\n", 1311 arizona->type); 1312 arizona->type = WM8998; 1313 } 1314 1315 apply_patch = wm8998_patch; 1316 subdevs = wm8998_devs; 1317 n_subdevs = ARRAY_SIZE(wm8998_devs); 1318 } 1319 break; 1320 default: 1321 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 1322 ret = -ENODEV; 1323 goto err_reset; 1324 } 1325 1326 if (!subdevs) { 1327 dev_err(arizona->dev, 1328 "No kernel support for device ID %x\n", reg); 1329 ret = -ENODEV; 1330 goto err_reset; 1331 } 1332 1333 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 1334 1335 if (apply_patch) { 1336 ret = apply_patch(arizona); 1337 if (ret != 0) { 1338 dev_err(arizona->dev, "Failed to apply patch: %d\n", 1339 ret); 1340 goto err_reset; 1341 } 1342 1343 switch (arizona->type) { 1344 case WM5102: 1345 ret = wm5102_apply_hardware_patch(arizona); 1346 if (ret) { 1347 dev_err(arizona->dev, 1348 "Failed to apply hardware patch: %d\n", 1349 ret); 1350 goto err_reset; 1351 } 1352 break; 1353 case WM5110: 1354 case WM8280: 1355 ret = wm5110_apply_sleep_patch(arizona); 1356 if (ret) { 1357 dev_err(arizona->dev, 1358 "Failed to apply sleep patch: %d\n", 1359 ret); 1360 goto err_reset; 1361 } 1362 break; 1363 default: 1364 break; 1365 } 1366 } 1367 1368 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 1369 if (!arizona->pdata.gpio_defaults[i]) 1370 continue; 1371 1372 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 1373 arizona->pdata.gpio_defaults[i]); 1374 } 1375 1376 /* Chip default */ 1377 if (!arizona->pdata.clk32k_src) 1378 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 1379 1380 switch (arizona->pdata.clk32k_src) { 1381 case ARIZONA_32KZ_MCLK1: 1382 case ARIZONA_32KZ_MCLK2: 1383 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1384 ARIZONA_CLK_32K_SRC_MASK, 1385 arizona->pdata.clk32k_src - 1); 1386 arizona_clk32k_enable(arizona); 1387 break; 1388 case ARIZONA_32KZ_NONE: 1389 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1390 ARIZONA_CLK_32K_SRC_MASK, 2); 1391 break; 1392 default: 1393 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 1394 arizona->pdata.clk32k_src); 1395 ret = -EINVAL; 1396 goto err_reset; 1397 } 1398 1399 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 1400 if (!arizona->pdata.micbias[i].mV && 1401 !arizona->pdata.micbias[i].bypass) 1402 continue; 1403 1404 /* Apply default for bypass mode */ 1405 if (!arizona->pdata.micbias[i].mV) 1406 arizona->pdata.micbias[i].mV = 2800; 1407 1408 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 1409 1410 val <<= ARIZONA_MICB1_LVL_SHIFT; 1411 1412 if (arizona->pdata.micbias[i].ext_cap) 1413 val |= ARIZONA_MICB1_EXT_CAP; 1414 1415 if (arizona->pdata.micbias[i].discharge) 1416 val |= ARIZONA_MICB1_DISCH; 1417 1418 if (arizona->pdata.micbias[i].soft_start) 1419 val |= ARIZONA_MICB1_RATE; 1420 1421 if (arizona->pdata.micbias[i].bypass) 1422 val |= ARIZONA_MICB1_BYPASS; 1423 1424 regmap_update_bits(arizona->regmap, 1425 ARIZONA_MIC_BIAS_CTRL_1 + i, 1426 ARIZONA_MICB1_LVL_MASK | 1427 ARIZONA_MICB1_EXT_CAP | 1428 ARIZONA_MICB1_DISCH | 1429 ARIZONA_MICB1_BYPASS | 1430 ARIZONA_MICB1_RATE, val); 1431 } 1432 1433 for (i = 0; i < ARIZONA_MAX_INPUT; i++) { 1434 /* Default for both is 0 so noop with defaults */ 1435 val = arizona->pdata.dmic_ref[i] 1436 << ARIZONA_IN1_DMIC_SUP_SHIFT; 1437 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) 1438 val |= 1 << ARIZONA_IN1_MODE_SHIFT; 1439 1440 switch (arizona->type) { 1441 case WM8998: 1442 case WM1814: 1443 regmap_update_bits(arizona->regmap, 1444 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), 1445 ARIZONA_IN1L_SRC_SE_MASK, 1446 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1447 << ARIZONA_IN1L_SRC_SE_SHIFT); 1448 1449 regmap_update_bits(arizona->regmap, 1450 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), 1451 ARIZONA_IN1R_SRC_SE_MASK, 1452 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1453 << ARIZONA_IN1R_SRC_SE_SHIFT); 1454 1455 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1456 ARIZONA_IN1_MODE_MASK; 1457 break; 1458 default: 1459 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1460 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; 1461 1462 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1463 ARIZONA_IN1_MODE_MASK | 1464 ARIZONA_IN1_SINGLE_ENDED_MASK; 1465 break; 1466 } 1467 1468 regmap_update_bits(arizona->regmap, 1469 ARIZONA_IN1L_CONTROL + (i * 8), 1470 mask, val); 1471 } 1472 1473 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { 1474 /* Default is 0 so noop with defaults */ 1475 if (arizona->pdata.out_mono[i]) 1476 val = ARIZONA_OUT1_MONO; 1477 else 1478 val = 0; 1479 1480 regmap_update_bits(arizona->regmap, 1481 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), 1482 ARIZONA_OUT1_MONO, val); 1483 } 1484 1485 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { 1486 if (arizona->pdata.spk_mute[i]) 1487 regmap_update_bits(arizona->regmap, 1488 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), 1489 ARIZONA_SPK1_MUTE_ENDIAN_MASK | 1490 ARIZONA_SPK1_MUTE_SEQ1_MASK, 1491 arizona->pdata.spk_mute[i]); 1492 1493 if (arizona->pdata.spk_fmt[i]) 1494 regmap_update_bits(arizona->regmap, 1495 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), 1496 ARIZONA_SPK1_FMT_MASK, 1497 arizona->pdata.spk_fmt[i]); 1498 } 1499 1500 pm_runtime_set_active(arizona->dev); 1501 pm_runtime_enable(arizona->dev); 1502 1503 /* Set up for interrupts */ 1504 ret = arizona_irq_init(arizona); 1505 if (ret != 0) 1506 goto err_pm; 1507 1508 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 1509 pm_runtime_use_autosuspend(arizona->dev); 1510 1511 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 1512 arizona_clkgen_err, arizona); 1513 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 1514 arizona_overclocked, arizona); 1515 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 1516 arizona_underclocked, arizona); 1517 1518 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, 1519 subdevs, n_subdevs, NULL, 0, NULL); 1520 1521 if (ret) { 1522 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 1523 goto err_irq; 1524 } 1525 1526 return 0; 1527 1528 err_irq: 1529 arizona_irq_exit(arizona); 1530 err_pm: 1531 pm_runtime_disable(arizona->dev); 1532 err_reset: 1533 arizona_enable_reset(arizona); 1534 regulator_disable(arizona->dcvdd); 1535 err_enable: 1536 regulator_bulk_disable(arizona->num_core_supplies, 1537 arizona->core_supplies); 1538 err_dcvdd: 1539 regulator_put(arizona->dcvdd); 1540 err_early: 1541 mfd_remove_devices(dev); 1542 return ret; 1543 } 1544 EXPORT_SYMBOL_GPL(arizona_dev_init); 1545 1546 int arizona_dev_exit(struct arizona *arizona) 1547 { 1548 disable_irq(arizona->irq); 1549 pm_runtime_disable(arizona->dev); 1550 1551 regulator_disable(arizona->dcvdd); 1552 regulator_put(arizona->dcvdd); 1553 1554 mfd_remove_devices(arizona->dev); 1555 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1556 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1557 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1558 arizona_irq_exit(arizona); 1559 arizona_enable_reset(arizona); 1560 1561 regulator_bulk_disable(arizona->num_core_supplies, 1562 arizona->core_supplies); 1563 return 0; 1564 } 1565 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1566