1 /* 2 * Arizona core driver 3 * 4 * Copyright 2012 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/gpio.h> 16 #include <linux/interrupt.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_device.h> 21 #include <linux/of_gpio.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 #include <linux/regulator/consumer.h> 25 #include <linux/regulator/machine.h> 26 #include <linux/slab.h> 27 28 #include <linux/mfd/arizona/core.h> 29 #include <linux/mfd/arizona/registers.h> 30 31 #include "arizona.h" 32 33 static const char *wm5102_core_supplies[] = { 34 "AVDD", 35 "DBVDD1", 36 }; 37 38 int arizona_clk32k_enable(struct arizona *arizona) 39 { 40 int ret = 0; 41 42 mutex_lock(&arizona->clk_lock); 43 44 arizona->clk32k_ref++; 45 46 if (arizona->clk32k_ref == 1) { 47 switch (arizona->pdata.clk32k_src) { 48 case ARIZONA_32KZ_MCLK1: 49 ret = pm_runtime_get_sync(arizona->dev); 50 if (ret != 0) 51 goto out; 52 break; 53 } 54 55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 56 ARIZONA_CLK_32K_ENA, 57 ARIZONA_CLK_32K_ENA); 58 } 59 60 out: 61 if (ret != 0) 62 arizona->clk32k_ref--; 63 64 mutex_unlock(&arizona->clk_lock); 65 66 return ret; 67 } 68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 69 70 int arizona_clk32k_disable(struct arizona *arizona) 71 { 72 int ret = 0; 73 74 mutex_lock(&arizona->clk_lock); 75 76 BUG_ON(arizona->clk32k_ref <= 0); 77 78 arizona->clk32k_ref--; 79 80 if (arizona->clk32k_ref == 0) { 81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 82 ARIZONA_CLK_32K_ENA, 0); 83 84 switch (arizona->pdata.clk32k_src) { 85 case ARIZONA_32KZ_MCLK1: 86 pm_runtime_put_sync(arizona->dev); 87 break; 88 } 89 } 90 91 mutex_unlock(&arizona->clk_lock); 92 93 return ret; 94 } 95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 96 97 static irqreturn_t arizona_clkgen_err(int irq, void *data) 98 { 99 struct arizona *arizona = data; 100 101 dev_err(arizona->dev, "CLKGEN error\n"); 102 103 return IRQ_HANDLED; 104 } 105 106 static irqreturn_t arizona_underclocked(int irq, void *data) 107 { 108 struct arizona *arizona = data; 109 unsigned int val; 110 int ret; 111 112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 113 &val); 114 if (ret != 0) { 115 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 116 ret); 117 return IRQ_NONE; 118 } 119 120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 121 dev_err(arizona->dev, "AIF3 underclocked\n"); 122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 123 dev_err(arizona->dev, "AIF2 underclocked\n"); 124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 125 dev_err(arizona->dev, "AIF1 underclocked\n"); 126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 127 dev_err(arizona->dev, "ISRC2 underclocked\n"); 128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 129 dev_err(arizona->dev, "ISRC1 underclocked\n"); 130 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 131 dev_err(arizona->dev, "FX underclocked\n"); 132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 133 dev_err(arizona->dev, "ASRC underclocked\n"); 134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 135 dev_err(arizona->dev, "DAC underclocked\n"); 136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 137 dev_err(arizona->dev, "ADC underclocked\n"); 138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 139 dev_err(arizona->dev, "Mixer dropped sample\n"); 140 141 return IRQ_HANDLED; 142 } 143 144 static irqreturn_t arizona_overclocked(int irq, void *data) 145 { 146 struct arizona *arizona = data; 147 unsigned int val[2]; 148 int ret; 149 150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 151 &val[0], 2); 152 if (ret != 0) { 153 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 154 ret); 155 return IRQ_NONE; 156 } 157 158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 159 dev_err(arizona->dev, "PWM overclocked\n"); 160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 161 dev_err(arizona->dev, "FX core overclocked\n"); 162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 163 dev_err(arizona->dev, "DAC SYS overclocked\n"); 164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 165 dev_err(arizona->dev, "DAC WARP overclocked\n"); 166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 167 dev_err(arizona->dev, "ADC overclocked\n"); 168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 169 dev_err(arizona->dev, "Mixer overclocked\n"); 170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 171 dev_err(arizona->dev, "AIF3 overclocked\n"); 172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 173 dev_err(arizona->dev, "AIF2 overclocked\n"); 174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 175 dev_err(arizona->dev, "AIF1 overclocked\n"); 176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 177 dev_err(arizona->dev, "Pad control overclocked\n"); 178 179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 182 dev_err(arizona->dev, "Slimbus async overclocked\n"); 183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 184 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 186 dev_err(arizona->dev, "ASRC async system overclocked\n"); 187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 188 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 190 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 194 dev_err(arizona->dev, "DSP1 overclocked\n"); 195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 196 dev_err(arizona->dev, "ISRC2 overclocked\n"); 197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 198 dev_err(arizona->dev, "ISRC1 overclocked\n"); 199 200 return IRQ_HANDLED; 201 } 202 203 static int arizona_poll_reg(struct arizona *arizona, 204 int timeout, unsigned int reg, 205 unsigned int mask, unsigned int target) 206 { 207 unsigned int val = 0; 208 int ret, i; 209 210 for (i = 0; i < timeout; i++) { 211 ret = regmap_read(arizona->regmap, reg, &val); 212 if (ret != 0) { 213 dev_err(arizona->dev, "Failed to read reg %u: %d\n", 214 reg, ret); 215 continue; 216 } 217 218 if ((val & mask) == target) 219 return 0; 220 221 msleep(1); 222 } 223 224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); 225 return -ETIMEDOUT; 226 } 227 228 static int arizona_wait_for_boot(struct arizona *arizona) 229 { 230 int ret; 231 232 /* 233 * We can't use an interrupt as we need to runtime resume to do so, 234 * we won't race with the interrupt handler as it'll be blocked on 235 * runtime resume. 236 */ 237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, 238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 239 240 if (!ret) 241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 242 ARIZONA_BOOT_DONE_STS); 243 244 pm_runtime_mark_last_busy(arizona->dev); 245 246 return ret; 247 } 248 249 static int arizona_apply_hardware_patch(struct arizona* arizona) 250 { 251 unsigned int fll, sysclk; 252 int ret, err; 253 254 /* Cache existing FLL and SYSCLK settings */ 255 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); 256 if (ret != 0) { 257 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 258 ret); 259 return ret; 260 } 261 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); 262 if (ret != 0) { 263 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 264 ret); 265 return ret; 266 } 267 268 /* Start up SYSCLK using the FLL in free running mode */ 269 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 270 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 271 if (ret != 0) { 272 dev_err(arizona->dev, 273 "Failed to start FLL in freerunning mode: %d\n", 274 ret); 275 return ret; 276 } 277 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, 278 ARIZONA_FLL1_CLOCK_OK_STS, 279 ARIZONA_FLL1_CLOCK_OK_STS); 280 if (ret != 0) { 281 ret = -ETIMEDOUT; 282 goto err_fll; 283 } 284 285 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 286 if (ret != 0) { 287 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 288 goto err_fll; 289 } 290 291 /* Start the write sequencer and wait for it to finish */ 292 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 293 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 294 if (ret != 0) { 295 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 296 ret); 297 goto err_sysclk; 298 } 299 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, 300 ARIZONA_WSEQ_BUSY, 0); 301 if (ret != 0) { 302 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 303 ARIZONA_WSEQ_ABORT); 304 ret = -ETIMEDOUT; 305 } 306 307 err_sysclk: 308 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); 309 if (err != 0) { 310 dev_err(arizona->dev, 311 "Failed to re-apply old SYSCLK settings: %d\n", 312 err); 313 } 314 315 err_fll: 316 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); 317 if (err != 0) { 318 dev_err(arizona->dev, 319 "Failed to re-apply old FLL settings: %d\n", 320 err); 321 } 322 323 if (ret != 0) 324 return ret; 325 else 326 return err; 327 } 328 329 #ifdef CONFIG_PM_RUNTIME 330 static int arizona_runtime_resume(struct device *dev) 331 { 332 struct arizona *arizona = dev_get_drvdata(dev); 333 int ret; 334 335 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 336 337 ret = regulator_enable(arizona->dcvdd); 338 if (ret != 0) { 339 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 340 return ret; 341 } 342 343 regcache_cache_only(arizona->regmap, false); 344 345 switch (arizona->type) { 346 case WM5102: 347 if (arizona->external_dcvdd) { 348 ret = regmap_update_bits(arizona->regmap, 349 ARIZONA_ISOLATION_CONTROL, 350 ARIZONA_ISOLATE_DCVDD1, 0); 351 if (ret != 0) { 352 dev_err(arizona->dev, 353 "Failed to connect DCVDD: %d\n", ret); 354 goto err; 355 } 356 } 357 358 ret = wm5102_patch(arizona); 359 if (ret != 0) { 360 dev_err(arizona->dev, "Failed to apply patch: %d\n", 361 ret); 362 goto err; 363 } 364 365 ret = arizona_apply_hardware_patch(arizona); 366 if (ret != 0) { 367 dev_err(arizona->dev, 368 "Failed to apply hardware patch: %d\n", 369 ret); 370 goto err; 371 } 372 break; 373 default: 374 ret = arizona_wait_for_boot(arizona); 375 if (ret != 0) { 376 goto err; 377 } 378 379 if (arizona->external_dcvdd) { 380 ret = regmap_update_bits(arizona->regmap, 381 ARIZONA_ISOLATION_CONTROL, 382 ARIZONA_ISOLATE_DCVDD1, 0); 383 if (ret != 0) { 384 dev_err(arizona->dev, 385 "Failed to connect DCVDD: %d\n", ret); 386 goto err; 387 } 388 } 389 break; 390 } 391 392 switch (arizona->type) { 393 case WM5102: 394 ret = wm5102_patch(arizona); 395 if (ret != 0) { 396 dev_err(arizona->dev, "Failed to apply patch: %d\n", 397 ret); 398 goto err; 399 } 400 default: 401 break; 402 } 403 404 ret = regcache_sync(arizona->regmap); 405 if (ret != 0) { 406 dev_err(arizona->dev, "Failed to restore register cache\n"); 407 goto err; 408 } 409 410 return 0; 411 412 err: 413 regcache_cache_only(arizona->regmap, true); 414 regulator_disable(arizona->dcvdd); 415 return ret; 416 } 417 418 static int arizona_runtime_suspend(struct device *dev) 419 { 420 struct arizona *arizona = dev_get_drvdata(dev); 421 int ret; 422 423 dev_dbg(arizona->dev, "Entering AoD mode\n"); 424 425 if (arizona->external_dcvdd) { 426 ret = regmap_update_bits(arizona->regmap, 427 ARIZONA_ISOLATION_CONTROL, 428 ARIZONA_ISOLATE_DCVDD1, 429 ARIZONA_ISOLATE_DCVDD1); 430 if (ret != 0) { 431 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", 432 ret); 433 return ret; 434 } 435 } 436 437 regcache_cache_only(arizona->regmap, true); 438 regcache_mark_dirty(arizona->regmap); 439 regulator_disable(arizona->dcvdd); 440 441 return 0; 442 } 443 #endif 444 445 #ifdef CONFIG_PM_SLEEP 446 static int arizona_suspend(struct device *dev) 447 { 448 struct arizona *arizona = dev_get_drvdata(dev); 449 450 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 451 disable_irq(arizona->irq); 452 453 return 0; 454 } 455 456 static int arizona_suspend_late(struct device *dev) 457 { 458 struct arizona *arizona = dev_get_drvdata(dev); 459 460 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 461 enable_irq(arizona->irq); 462 463 return 0; 464 } 465 466 static int arizona_resume_noirq(struct device *dev) 467 { 468 struct arizona *arizona = dev_get_drvdata(dev); 469 470 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 471 disable_irq(arizona->irq); 472 473 return 0; 474 } 475 476 static int arizona_resume(struct device *dev) 477 { 478 struct arizona *arizona = dev_get_drvdata(dev); 479 480 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); 481 enable_irq(arizona->irq); 482 483 return 0; 484 } 485 #endif 486 487 const struct dev_pm_ops arizona_pm_ops = { 488 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 489 arizona_runtime_resume, 490 NULL) 491 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 492 #ifdef CONFIG_PM_SLEEP 493 .suspend_late = arizona_suspend_late, 494 .resume_noirq = arizona_resume_noirq, 495 #endif 496 }; 497 EXPORT_SYMBOL_GPL(arizona_pm_ops); 498 499 #ifdef CONFIG_OF 500 int arizona_of_get_type(struct device *dev) 501 { 502 const struct of_device_id *id = of_match_device(arizona_of_match, dev); 503 504 if (id) 505 return (int)id->data; 506 else 507 return 0; 508 } 509 EXPORT_SYMBOL_GPL(arizona_of_get_type); 510 511 static int arizona_of_get_core_pdata(struct arizona *arizona) 512 { 513 int ret, i; 514 515 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node, 516 "wlf,reset", 0); 517 if (arizona->pdata.reset < 0) 518 arizona->pdata.reset = 0; 519 520 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node, 521 "wlf,ldoena", 0); 522 if (arizona->pdata.ldoena < 0) 523 arizona->pdata.ldoena = 0; 524 525 ret = of_property_read_u32_array(arizona->dev->of_node, 526 "wlf,gpio-defaults", 527 arizona->pdata.gpio_defaults, 528 ARRAY_SIZE(arizona->pdata.gpio_defaults)); 529 if (ret >= 0) { 530 /* 531 * All values are literal except out of range values 532 * which are chip default, translate into platform 533 * data which uses 0 as chip default and out of range 534 * as zero. 535 */ 536 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 537 if (arizona->pdata.gpio_defaults[i] > 0xffff) 538 arizona->pdata.gpio_defaults[i] = 0; 539 else if (arizona->pdata.gpio_defaults[i] == 0) 540 arizona->pdata.gpio_defaults[i] = 0x10000; 541 } 542 } else { 543 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 544 ret); 545 } 546 547 return 0; 548 } 549 550 const struct of_device_id arizona_of_match[] = { 551 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 552 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 553 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 554 {}, 555 }; 556 EXPORT_SYMBOL_GPL(arizona_of_match); 557 #else 558 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 559 { 560 return 0; 561 } 562 #endif 563 564 static const struct mfd_cell early_devs[] = { 565 { .name = "arizona-ldo1" }, 566 }; 567 568 static const char *wm5102_supplies[] = { 569 "DBVDD2", 570 "DBVDD3", 571 "CPVDD", 572 "SPKVDDL", 573 "SPKVDDR", 574 }; 575 576 static const struct mfd_cell wm5102_devs[] = { 577 { .name = "arizona-micsupp" }, 578 { .name = "arizona-extcon" }, 579 { .name = "arizona-gpio" }, 580 { .name = "arizona-haptics" }, 581 { .name = "arizona-pwm" }, 582 { 583 .name = "wm5102-codec", 584 .parent_supplies = wm5102_supplies, 585 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 586 }, 587 }; 588 589 static const struct mfd_cell wm5110_devs[] = { 590 { .name = "arizona-micsupp" }, 591 { .name = "arizona-extcon" }, 592 { .name = "arizona-gpio" }, 593 { .name = "arizona-haptics" }, 594 { .name = "arizona-pwm" }, 595 { 596 .name = "wm5110-codec", 597 .parent_supplies = wm5102_supplies, 598 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 599 }, 600 }; 601 602 static const char *wm8997_supplies[] = { 603 "DBVDD2", 604 "CPVDD", 605 "SPKVDD", 606 }; 607 608 static const struct mfd_cell wm8997_devs[] = { 609 { .name = "arizona-micsupp" }, 610 { .name = "arizona-extcon" }, 611 { .name = "arizona-gpio" }, 612 { .name = "arizona-haptics" }, 613 { .name = "arizona-pwm" }, 614 { 615 .name = "wm8997-codec", 616 .parent_supplies = wm8997_supplies, 617 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 618 }, 619 }; 620 621 int arizona_dev_init(struct arizona *arizona) 622 { 623 struct device *dev = arizona->dev; 624 const char *type_name; 625 unsigned int reg, val; 626 int (*apply_patch)(struct arizona *) = NULL; 627 int ret, i; 628 629 dev_set_drvdata(arizona->dev, arizona); 630 mutex_init(&arizona->clk_lock); 631 632 if (dev_get_platdata(arizona->dev)) 633 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 634 sizeof(arizona->pdata)); 635 else 636 arizona_of_get_core_pdata(arizona); 637 638 regcache_cache_only(arizona->regmap, true); 639 640 switch (arizona->type) { 641 case WM5102: 642 case WM5110: 643 case WM8997: 644 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 645 arizona->core_supplies[i].supply 646 = wm5102_core_supplies[i]; 647 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 648 break; 649 default: 650 dev_err(arizona->dev, "Unknown device type %d\n", 651 arizona->type); 652 return -EINVAL; 653 } 654 655 ret = mfd_add_devices(arizona->dev, -1, early_devs, 656 ARRAY_SIZE(early_devs), NULL, 0, NULL); 657 if (ret != 0) { 658 dev_err(dev, "Failed to add early children: %d\n", ret); 659 return ret; 660 } 661 662 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 663 arizona->core_supplies); 664 if (ret != 0) { 665 dev_err(dev, "Failed to request core supplies: %d\n", 666 ret); 667 goto err_early; 668 } 669 670 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); 671 if (IS_ERR(arizona->dcvdd)) { 672 ret = PTR_ERR(arizona->dcvdd); 673 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 674 goto err_early; 675 } 676 677 if (arizona->pdata.reset) { 678 /* Start out with /RESET low to put the chip into reset */ 679 ret = gpio_request_one(arizona->pdata.reset, 680 GPIOF_DIR_OUT | GPIOF_INIT_LOW, 681 "arizona /RESET"); 682 if (ret != 0) { 683 dev_err(dev, "Failed to request /RESET: %d\n", ret); 684 goto err_early; 685 } 686 } 687 688 ret = regulator_bulk_enable(arizona->num_core_supplies, 689 arizona->core_supplies); 690 if (ret != 0) { 691 dev_err(dev, "Failed to enable core supplies: %d\n", 692 ret); 693 goto err_early; 694 } 695 696 ret = regulator_enable(arizona->dcvdd); 697 if (ret != 0) { 698 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 699 goto err_enable; 700 } 701 702 if (arizona->pdata.reset) { 703 gpio_set_value_cansleep(arizona->pdata.reset, 1); 704 msleep(1); 705 } 706 707 regcache_cache_only(arizona->regmap, false); 708 709 /* Verify that this is a chip we know about */ 710 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 711 if (ret != 0) { 712 dev_err(dev, "Failed to read ID register: %d\n", ret); 713 goto err_reset; 714 } 715 716 switch (reg) { 717 case 0x5102: 718 case 0x5110: 719 case 0x8997: 720 break; 721 default: 722 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 723 goto err_reset; 724 } 725 726 /* If we have a /RESET GPIO we'll already be reset */ 727 if (!arizona->pdata.reset) { 728 regcache_mark_dirty(arizona->regmap); 729 730 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 731 if (ret != 0) { 732 dev_err(dev, "Failed to reset device: %d\n", ret); 733 goto err_reset; 734 } 735 736 msleep(1); 737 738 ret = regcache_sync(arizona->regmap); 739 if (ret != 0) { 740 dev_err(dev, "Failed to sync device: %d\n", ret); 741 goto err_reset; 742 } 743 } 744 745 /* Ensure device startup is complete */ 746 switch (arizona->type) { 747 case WM5102: 748 ret = regmap_read(arizona->regmap, 0x19, &val); 749 if (ret != 0) 750 dev_err(dev, 751 "Failed to check write sequencer state: %d\n", 752 ret); 753 else if (val & 0x01) 754 break; 755 /* Fall through */ 756 default: 757 ret = arizona_wait_for_boot(arizona); 758 if (ret != 0) { 759 dev_err(arizona->dev, 760 "Device failed initial boot: %d\n", ret); 761 goto err_reset; 762 } 763 break; 764 } 765 766 /* Read the device ID information & do device specific stuff */ 767 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 768 if (ret != 0) { 769 dev_err(dev, "Failed to read ID register: %d\n", ret); 770 goto err_reset; 771 } 772 773 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 774 &arizona->rev); 775 if (ret != 0) { 776 dev_err(dev, "Failed to read revision register: %d\n", ret); 777 goto err_reset; 778 } 779 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 780 781 switch (reg) { 782 #ifdef CONFIG_MFD_WM5102 783 case 0x5102: 784 type_name = "WM5102"; 785 if (arizona->type != WM5102) { 786 dev_err(arizona->dev, "WM5102 registered as %d\n", 787 arizona->type); 788 arizona->type = WM5102; 789 } 790 apply_patch = wm5102_patch; 791 arizona->rev &= 0x7; 792 break; 793 #endif 794 #ifdef CONFIG_MFD_WM5110 795 case 0x5110: 796 type_name = "WM5110"; 797 if (arizona->type != WM5110) { 798 dev_err(arizona->dev, "WM5110 registered as %d\n", 799 arizona->type); 800 arizona->type = WM5110; 801 } 802 apply_patch = wm5110_patch; 803 break; 804 #endif 805 #ifdef CONFIG_MFD_WM8997 806 case 0x8997: 807 type_name = "WM8997"; 808 if (arizona->type != WM8997) { 809 dev_err(arizona->dev, "WM8997 registered as %d\n", 810 arizona->type); 811 arizona->type = WM8997; 812 } 813 apply_patch = wm8997_patch; 814 break; 815 #endif 816 default: 817 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 818 goto err_reset; 819 } 820 821 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 822 823 if (apply_patch) { 824 ret = apply_patch(arizona); 825 if (ret != 0) { 826 dev_err(arizona->dev, "Failed to apply patch: %d\n", 827 ret); 828 goto err_reset; 829 } 830 831 switch (arizona->type) { 832 case WM5102: 833 ret = arizona_apply_hardware_patch(arizona); 834 if (ret != 0) { 835 dev_err(arizona->dev, 836 "Failed to apply hardware patch: %d\n", 837 ret); 838 goto err_reset; 839 } 840 break; 841 default: 842 break; 843 } 844 } 845 846 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 847 if (!arizona->pdata.gpio_defaults[i]) 848 continue; 849 850 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 851 arizona->pdata.gpio_defaults[i]); 852 } 853 854 /* 855 * LDO1 can only be used to supply DCVDD so if it has no 856 * consumers then DCVDD is supplied externally. 857 */ 858 if (arizona->pdata.ldo1 && 859 arizona->pdata.ldo1->num_consumer_supplies == 0) 860 arizona->external_dcvdd = true; 861 862 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 863 pm_runtime_use_autosuspend(arizona->dev); 864 pm_runtime_enable(arizona->dev); 865 866 /* Chip default */ 867 if (!arizona->pdata.clk32k_src) 868 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 869 870 switch (arizona->pdata.clk32k_src) { 871 case ARIZONA_32KZ_MCLK1: 872 case ARIZONA_32KZ_MCLK2: 873 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 874 ARIZONA_CLK_32K_SRC_MASK, 875 arizona->pdata.clk32k_src - 1); 876 arizona_clk32k_enable(arizona); 877 break; 878 case ARIZONA_32KZ_NONE: 879 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 880 ARIZONA_CLK_32K_SRC_MASK, 2); 881 break; 882 default: 883 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 884 arizona->pdata.clk32k_src); 885 ret = -EINVAL; 886 goto err_reset; 887 } 888 889 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 890 if (!arizona->pdata.micbias[i].mV && 891 !arizona->pdata.micbias[i].bypass) 892 continue; 893 894 /* Apply default for bypass mode */ 895 if (!arizona->pdata.micbias[i].mV) 896 arizona->pdata.micbias[i].mV = 2800; 897 898 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 899 900 val <<= ARIZONA_MICB1_LVL_SHIFT; 901 902 if (arizona->pdata.micbias[i].ext_cap) 903 val |= ARIZONA_MICB1_EXT_CAP; 904 905 if (arizona->pdata.micbias[i].discharge) 906 val |= ARIZONA_MICB1_DISCH; 907 908 if (arizona->pdata.micbias[i].soft_start) 909 val |= ARIZONA_MICB1_RATE; 910 911 if (arizona->pdata.micbias[i].bypass) 912 val |= ARIZONA_MICB1_BYPASS; 913 914 regmap_update_bits(arizona->regmap, 915 ARIZONA_MIC_BIAS_CTRL_1 + i, 916 ARIZONA_MICB1_LVL_MASK | 917 ARIZONA_MICB1_DISCH | 918 ARIZONA_MICB1_BYPASS | 919 ARIZONA_MICB1_RATE, val); 920 } 921 922 for (i = 0; i < ARIZONA_MAX_INPUT; i++) { 923 /* Default for both is 0 so noop with defaults */ 924 val = arizona->pdata.dmic_ref[i] 925 << ARIZONA_IN1_DMIC_SUP_SHIFT; 926 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; 927 928 regmap_update_bits(arizona->regmap, 929 ARIZONA_IN1L_CONTROL + (i * 8), 930 ARIZONA_IN1_DMIC_SUP_MASK | 931 ARIZONA_IN1_MODE_MASK, val); 932 } 933 934 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { 935 /* Default is 0 so noop with defaults */ 936 if (arizona->pdata.out_mono[i]) 937 val = ARIZONA_OUT1_MONO; 938 else 939 val = 0; 940 941 regmap_update_bits(arizona->regmap, 942 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), 943 ARIZONA_OUT1_MONO, val); 944 } 945 946 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { 947 if (arizona->pdata.spk_mute[i]) 948 regmap_update_bits(arizona->regmap, 949 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), 950 ARIZONA_SPK1_MUTE_ENDIAN_MASK | 951 ARIZONA_SPK1_MUTE_SEQ1_MASK, 952 arizona->pdata.spk_mute[i]); 953 954 if (arizona->pdata.spk_fmt[i]) 955 regmap_update_bits(arizona->regmap, 956 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), 957 ARIZONA_SPK1_FMT_MASK, 958 arizona->pdata.spk_fmt[i]); 959 } 960 961 /* Set up for interrupts */ 962 ret = arizona_irq_init(arizona); 963 if (ret != 0) 964 goto err_reset; 965 966 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 967 arizona_clkgen_err, arizona); 968 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 969 arizona_overclocked, arizona); 970 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 971 arizona_underclocked, arizona); 972 973 switch (arizona->type) { 974 case WM5102: 975 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, 976 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); 977 break; 978 case WM5110: 979 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, 980 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); 981 break; 982 case WM8997: 983 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, 984 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); 985 break; 986 } 987 988 if (ret != 0) { 989 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 990 goto err_irq; 991 } 992 993 #ifdef CONFIG_PM_RUNTIME 994 regulator_disable(arizona->dcvdd); 995 #endif 996 997 return 0; 998 999 err_irq: 1000 arizona_irq_exit(arizona); 1001 err_reset: 1002 if (arizona->pdata.reset) { 1003 gpio_set_value_cansleep(arizona->pdata.reset, 0); 1004 gpio_free(arizona->pdata.reset); 1005 } 1006 regulator_disable(arizona->dcvdd); 1007 err_enable: 1008 regulator_bulk_disable(arizona->num_core_supplies, 1009 arizona->core_supplies); 1010 err_early: 1011 mfd_remove_devices(dev); 1012 return ret; 1013 } 1014 EXPORT_SYMBOL_GPL(arizona_dev_init); 1015 1016 int arizona_dev_exit(struct arizona *arizona) 1017 { 1018 mfd_remove_devices(arizona->dev); 1019 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1020 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1021 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1022 pm_runtime_disable(arizona->dev); 1023 arizona_irq_exit(arizona); 1024 if (arizona->pdata.reset) 1025 gpio_set_value_cansleep(arizona->pdata.reset, 0); 1026 regulator_disable(arizona->dcvdd); 1027 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), 1028 arizona->core_supplies); 1029 return 0; 1030 } 1031 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1032