1 /* 2 * Arizona core driver 3 * 4 * Copyright 2012 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/err.h> 16 #include <linux/gpio.h> 17 #include <linux/interrupt.h> 18 #include <linux/mfd/core.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 #include <linux/of_gpio.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/regmap.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/regulator/machine.h> 27 #include <linux/slab.h> 28 #include <linux/platform_device.h> 29 30 #include <linux/mfd/arizona/core.h> 31 #include <linux/mfd/arizona/registers.h> 32 33 #include "arizona.h" 34 35 static const char * const wm5102_core_supplies[] = { 36 "AVDD", 37 "DBVDD1", 38 }; 39 40 int arizona_clk32k_enable(struct arizona *arizona) 41 { 42 int ret = 0; 43 44 mutex_lock(&arizona->clk_lock); 45 46 arizona->clk32k_ref++; 47 48 if (arizona->clk32k_ref == 1) { 49 switch (arizona->pdata.clk32k_src) { 50 case ARIZONA_32KZ_MCLK1: 51 ret = pm_runtime_get_sync(arizona->dev); 52 if (ret != 0) 53 goto err_ref; 54 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); 55 if (ret != 0) 56 goto err_pm; 57 break; 58 case ARIZONA_32KZ_MCLK2: 59 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); 60 if (ret != 0) 61 goto err_ref; 62 break; 63 } 64 65 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 66 ARIZONA_CLK_32K_ENA, 67 ARIZONA_CLK_32K_ENA); 68 } 69 70 err_pm: 71 pm_runtime_put_sync(arizona->dev); 72 err_ref: 73 if (ret != 0) 74 arizona->clk32k_ref--; 75 76 mutex_unlock(&arizona->clk_lock); 77 78 return ret; 79 } 80 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 81 82 int arizona_clk32k_disable(struct arizona *arizona) 83 { 84 mutex_lock(&arizona->clk_lock); 85 86 BUG_ON(arizona->clk32k_ref <= 0); 87 88 arizona->clk32k_ref--; 89 90 if (arizona->clk32k_ref == 0) { 91 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 92 ARIZONA_CLK_32K_ENA, 0); 93 94 switch (arizona->pdata.clk32k_src) { 95 case ARIZONA_32KZ_MCLK1: 96 pm_runtime_put_sync(arizona->dev); 97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); 98 break; 99 case ARIZONA_32KZ_MCLK2: 100 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); 101 break; 102 } 103 } 104 105 mutex_unlock(&arizona->clk_lock); 106 107 return 0; 108 } 109 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 110 111 static irqreturn_t arizona_clkgen_err(int irq, void *data) 112 { 113 struct arizona *arizona = data; 114 115 dev_err(arizona->dev, "CLKGEN error\n"); 116 117 return IRQ_HANDLED; 118 } 119 120 static irqreturn_t arizona_underclocked(int irq, void *data) 121 { 122 struct arizona *arizona = data; 123 unsigned int val; 124 int ret; 125 126 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 127 &val); 128 if (ret != 0) { 129 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 130 ret); 131 return IRQ_NONE; 132 } 133 134 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 135 dev_err(arizona->dev, "AIF3 underclocked\n"); 136 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 137 dev_err(arizona->dev, "AIF2 underclocked\n"); 138 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 139 dev_err(arizona->dev, "AIF1 underclocked\n"); 140 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) 141 dev_err(arizona->dev, "ISRC3 underclocked\n"); 142 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 143 dev_err(arizona->dev, "ISRC2 underclocked\n"); 144 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 145 dev_err(arizona->dev, "ISRC1 underclocked\n"); 146 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 147 dev_err(arizona->dev, "FX underclocked\n"); 148 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 149 dev_err(arizona->dev, "ASRC underclocked\n"); 150 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 151 dev_err(arizona->dev, "DAC underclocked\n"); 152 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 153 dev_err(arizona->dev, "ADC underclocked\n"); 154 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 155 dev_err(arizona->dev, "Mixer dropped sample\n"); 156 157 return IRQ_HANDLED; 158 } 159 160 static irqreturn_t arizona_overclocked(int irq, void *data) 161 { 162 struct arizona *arizona = data; 163 unsigned int val[3]; 164 int ret; 165 166 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 167 &val[0], 3); 168 if (ret != 0) { 169 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 170 ret); 171 return IRQ_NONE; 172 } 173 174 switch (arizona->type) { 175 case WM8998: 176 case WM1814: 177 /* Some bits are shifted on WM8998, 178 * rearrange to match the standard bit layout 179 */ 180 val[0] = ((val[0] & 0x60e0) >> 1) | 181 ((val[0] & 0x1e00) >> 2) | 182 (val[0] & 0x000f); 183 break; 184 default: 185 break; 186 } 187 188 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 189 dev_err(arizona->dev, "PWM overclocked\n"); 190 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 191 dev_err(arizona->dev, "FX core overclocked\n"); 192 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 193 dev_err(arizona->dev, "DAC SYS overclocked\n"); 194 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 195 dev_err(arizona->dev, "DAC WARP overclocked\n"); 196 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 197 dev_err(arizona->dev, "ADC overclocked\n"); 198 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 199 dev_err(arizona->dev, "Mixer overclocked\n"); 200 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 201 dev_err(arizona->dev, "AIF3 overclocked\n"); 202 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 203 dev_err(arizona->dev, "AIF2 overclocked\n"); 204 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 205 dev_err(arizona->dev, "AIF1 overclocked\n"); 206 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 207 dev_err(arizona->dev, "Pad control overclocked\n"); 208 209 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 210 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 211 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 212 dev_err(arizona->dev, "Slimbus async overclocked\n"); 213 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 214 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 215 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 216 dev_err(arizona->dev, "ASRC async system overclocked\n"); 217 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 218 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 219 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 220 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 221 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 222 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 223 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 224 dev_err(arizona->dev, "DSP1 overclocked\n"); 225 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) 226 dev_err(arizona->dev, "ISRC3 overclocked\n"); 227 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 228 dev_err(arizona->dev, "ISRC2 overclocked\n"); 229 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 230 dev_err(arizona->dev, "ISRC1 overclocked\n"); 231 232 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) 233 dev_err(arizona->dev, "SPDIF overclocked\n"); 234 235 return IRQ_HANDLED; 236 } 237 238 static int arizona_poll_reg(struct arizona *arizona, 239 int timeout, unsigned int reg, 240 unsigned int mask, unsigned int target) 241 { 242 unsigned int val = 0; 243 int ret, i; 244 245 for (i = 0; i < timeout; i++) { 246 ret = regmap_read(arizona->regmap, reg, &val); 247 if (ret != 0) { 248 dev_err(arizona->dev, "Failed to read reg %u: %d\n", 249 reg, ret); 250 continue; 251 } 252 253 if ((val & mask) == target) 254 return 0; 255 256 usleep_range(1000, 5000); 257 } 258 259 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); 260 return -ETIMEDOUT; 261 } 262 263 static int arizona_wait_for_boot(struct arizona *arizona) 264 { 265 int ret; 266 267 /* 268 * We can't use an interrupt as we need to runtime resume to do so, 269 * we won't race with the interrupt handler as it'll be blocked on 270 * runtime resume. 271 */ 272 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, 273 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 274 275 if (!ret) 276 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 277 ARIZONA_BOOT_DONE_STS); 278 279 pm_runtime_mark_last_busy(arizona->dev); 280 281 return ret; 282 } 283 284 static inline void arizona_enable_reset(struct arizona *arizona) 285 { 286 if (arizona->pdata.reset) 287 gpio_set_value_cansleep(arizona->pdata.reset, 0); 288 } 289 290 static void arizona_disable_reset(struct arizona *arizona) 291 { 292 if (arizona->pdata.reset) { 293 switch (arizona->type) { 294 case WM5110: 295 case WM8280: 296 /* Meet requirements for minimum reset duration */ 297 usleep_range(5000, 10000); 298 break; 299 default: 300 break; 301 } 302 303 gpio_set_value_cansleep(arizona->pdata.reset, 1); 304 usleep_range(1000, 5000); 305 } 306 } 307 308 struct arizona_sysclk_state { 309 unsigned int fll; 310 unsigned int sysclk; 311 }; 312 313 static int arizona_enable_freerun_sysclk(struct arizona *arizona, 314 struct arizona_sysclk_state *state) 315 { 316 int ret, err; 317 318 /* Cache existing FLL and SYSCLK settings */ 319 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); 320 if (ret) { 321 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 322 ret); 323 return ret; 324 } 325 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 326 &state->sysclk); 327 if (ret) { 328 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 329 ret); 330 return ret; 331 } 332 333 /* Start up SYSCLK using the FLL in free running mode */ 334 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 335 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 336 if (ret) { 337 dev_err(arizona->dev, 338 "Failed to start FLL in freerunning mode: %d\n", 339 ret); 340 return ret; 341 } 342 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, 343 ARIZONA_FLL1_CLOCK_OK_STS, 344 ARIZONA_FLL1_CLOCK_OK_STS); 345 if (ret) { 346 ret = -ETIMEDOUT; 347 goto err_fll; 348 } 349 350 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 351 if (ret) { 352 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 353 goto err_fll; 354 } 355 356 return 0; 357 358 err_fll: 359 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 360 if (err) 361 dev_err(arizona->dev, 362 "Failed to re-apply old FLL settings: %d\n", err); 363 364 return ret; 365 } 366 367 static int arizona_disable_freerun_sysclk(struct arizona *arizona, 368 struct arizona_sysclk_state *state) 369 { 370 int ret; 371 372 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 373 state->sysclk); 374 if (ret) { 375 dev_err(arizona->dev, 376 "Failed to re-apply old SYSCLK settings: %d\n", ret); 377 return ret; 378 } 379 380 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 381 if (ret) { 382 dev_err(arizona->dev, 383 "Failed to re-apply old FLL settings: %d\n", ret); 384 return ret; 385 } 386 387 return 0; 388 } 389 390 static int wm5102_apply_hardware_patch(struct arizona *arizona) 391 { 392 struct arizona_sysclk_state state; 393 int err, ret; 394 395 ret = arizona_enable_freerun_sysclk(arizona, &state); 396 if (ret) 397 return ret; 398 399 /* Start the write sequencer and wait for it to finish */ 400 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 401 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 402 if (ret) { 403 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 404 ret); 405 goto err; 406 } 407 408 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, 409 ARIZONA_WSEQ_BUSY, 0); 410 if (ret) { 411 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 412 ARIZONA_WSEQ_ABORT); 413 ret = -ETIMEDOUT; 414 } 415 416 err: 417 err = arizona_disable_freerun_sysclk(arizona, &state); 418 419 return ret ?: err; 420 } 421 422 /* 423 * Register patch to some of the CODECs internal write sequences 424 * to ensure a clean exit from the low power sleep state. 425 */ 426 static const struct reg_sequence wm5110_sleep_patch[] = { 427 { 0x337A, 0xC100 }, 428 { 0x337B, 0x0041 }, 429 { 0x3300, 0xA210 }, 430 { 0x3301, 0x050C }, 431 }; 432 433 static int wm5110_apply_sleep_patch(struct arizona *arizona) 434 { 435 struct arizona_sysclk_state state; 436 int err, ret; 437 438 ret = arizona_enable_freerun_sysclk(arizona, &state); 439 if (ret) 440 return ret; 441 442 ret = regmap_multi_reg_write_bypassed(arizona->regmap, 443 wm5110_sleep_patch, 444 ARRAY_SIZE(wm5110_sleep_patch)); 445 446 err = arizona_disable_freerun_sysclk(arizona, &state); 447 448 return ret ?: err; 449 } 450 451 static int wm5102_clear_write_sequencer(struct arizona *arizona) 452 { 453 int ret; 454 455 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, 456 0x0); 457 if (ret) { 458 dev_err(arizona->dev, 459 "Failed to clear write sequencer state: %d\n", ret); 460 return ret; 461 } 462 463 arizona_enable_reset(arizona); 464 regulator_disable(arizona->dcvdd); 465 466 msleep(20); 467 468 ret = regulator_enable(arizona->dcvdd); 469 if (ret) { 470 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); 471 return ret; 472 } 473 arizona_disable_reset(arizona); 474 475 return 0; 476 } 477 478 #ifdef CONFIG_PM 479 static int arizona_isolate_dcvdd(struct arizona *arizona) 480 { 481 int ret; 482 483 ret = regmap_update_bits(arizona->regmap, 484 ARIZONA_ISOLATION_CONTROL, 485 ARIZONA_ISOLATE_DCVDD1, 486 ARIZONA_ISOLATE_DCVDD1); 487 if (ret != 0) 488 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); 489 490 return ret; 491 } 492 493 static int arizona_connect_dcvdd(struct arizona *arizona) 494 { 495 int ret; 496 497 ret = regmap_update_bits(arizona->regmap, 498 ARIZONA_ISOLATION_CONTROL, 499 ARIZONA_ISOLATE_DCVDD1, 0); 500 if (ret != 0) 501 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); 502 503 return ret; 504 } 505 506 static int arizona_is_jack_det_active(struct arizona *arizona) 507 { 508 unsigned int val; 509 int ret; 510 511 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); 512 if (ret) { 513 dev_err(arizona->dev, 514 "Failed to check jack det status: %d\n", ret); 515 return ret; 516 } else if (val & ARIZONA_JD1_ENA) { 517 return 1; 518 } else { 519 return 0; 520 } 521 } 522 523 static int arizona_runtime_resume(struct device *dev) 524 { 525 struct arizona *arizona = dev_get_drvdata(dev); 526 int ret; 527 528 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 529 530 if (arizona->has_fully_powered_off) { 531 dev_dbg(arizona->dev, "Re-enabling core supplies\n"); 532 533 ret = regulator_bulk_enable(arizona->num_core_supplies, 534 arizona->core_supplies); 535 if (ret) { 536 dev_err(dev, "Failed to enable core supplies: %d\n", 537 ret); 538 return ret; 539 } 540 } 541 542 ret = regulator_enable(arizona->dcvdd); 543 if (ret != 0) { 544 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 545 if (arizona->has_fully_powered_off) 546 regulator_bulk_disable(arizona->num_core_supplies, 547 arizona->core_supplies); 548 return ret; 549 } 550 551 if (arizona->has_fully_powered_off) { 552 arizona_disable_reset(arizona); 553 enable_irq(arizona->irq); 554 arizona->has_fully_powered_off = false; 555 } 556 557 regcache_cache_only(arizona->regmap, false); 558 559 switch (arizona->type) { 560 case WM5102: 561 if (arizona->external_dcvdd) { 562 ret = arizona_connect_dcvdd(arizona); 563 if (ret != 0) 564 goto err; 565 } 566 567 ret = wm5102_patch(arizona); 568 if (ret != 0) { 569 dev_err(arizona->dev, "Failed to apply patch: %d\n", 570 ret); 571 goto err; 572 } 573 574 ret = wm5102_apply_hardware_patch(arizona); 575 if (ret) { 576 dev_err(arizona->dev, 577 "Failed to apply hardware patch: %d\n", 578 ret); 579 goto err; 580 } 581 break; 582 case WM5110: 583 case WM8280: 584 ret = arizona_wait_for_boot(arizona); 585 if (ret) 586 goto err; 587 588 if (arizona->external_dcvdd) { 589 ret = arizona_connect_dcvdd(arizona); 590 if (ret != 0) 591 goto err; 592 } else { 593 /* 594 * As this is only called for the internal regulator 595 * (where we know voltage ranges available) it is ok 596 * to request an exact range. 597 */ 598 ret = regulator_set_voltage(arizona->dcvdd, 599 1200000, 1200000); 600 if (ret < 0) { 601 dev_err(arizona->dev, 602 "Failed to set resume voltage: %d\n", 603 ret); 604 goto err; 605 } 606 } 607 608 ret = wm5110_apply_sleep_patch(arizona); 609 if (ret) { 610 dev_err(arizona->dev, 611 "Failed to re-apply sleep patch: %d\n", 612 ret); 613 goto err; 614 } 615 break; 616 case WM1831: 617 case CS47L24: 618 ret = arizona_wait_for_boot(arizona); 619 if (ret != 0) 620 goto err; 621 break; 622 default: 623 ret = arizona_wait_for_boot(arizona); 624 if (ret != 0) 625 goto err; 626 627 if (arizona->external_dcvdd) { 628 ret = arizona_connect_dcvdd(arizona); 629 if (ret != 0) 630 goto err; 631 } 632 break; 633 } 634 635 ret = regcache_sync(arizona->regmap); 636 if (ret != 0) { 637 dev_err(arizona->dev, "Failed to restore register cache\n"); 638 goto err; 639 } 640 641 return 0; 642 643 err: 644 regcache_cache_only(arizona->regmap, true); 645 regulator_disable(arizona->dcvdd); 646 return ret; 647 } 648 649 static int arizona_runtime_suspend(struct device *dev) 650 { 651 struct arizona *arizona = dev_get_drvdata(dev); 652 int jd_active = 0; 653 int ret; 654 655 dev_dbg(arizona->dev, "Entering AoD mode\n"); 656 657 switch (arizona->type) { 658 case WM5110: 659 case WM8280: 660 jd_active = arizona_is_jack_det_active(arizona); 661 if (jd_active < 0) 662 return jd_active; 663 664 if (arizona->external_dcvdd) { 665 ret = arizona_isolate_dcvdd(arizona); 666 if (ret != 0) 667 return ret; 668 } else { 669 /* 670 * As this is only called for the internal regulator 671 * (where we know voltage ranges available) it is ok 672 * to request an exact range. 673 */ 674 ret = regulator_set_voltage(arizona->dcvdd, 675 1175000, 1175000); 676 if (ret < 0) { 677 dev_err(arizona->dev, 678 "Failed to set suspend voltage: %d\n", 679 ret); 680 return ret; 681 } 682 } 683 break; 684 case WM5102: 685 jd_active = arizona_is_jack_det_active(arizona); 686 if (jd_active < 0) 687 return jd_active; 688 689 if (arizona->external_dcvdd) { 690 ret = arizona_isolate_dcvdd(arizona); 691 if (ret != 0) 692 return ret; 693 } 694 695 if (!jd_active) { 696 ret = regmap_write(arizona->regmap, 697 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); 698 if (ret) { 699 dev_err(arizona->dev, 700 "Failed to clear write sequencer: %d\n", 701 ret); 702 return ret; 703 } 704 } 705 break; 706 case WM1831: 707 case CS47L24: 708 break; 709 default: 710 jd_active = arizona_is_jack_det_active(arizona); 711 if (jd_active < 0) 712 return jd_active; 713 714 if (arizona->external_dcvdd) { 715 ret = arizona_isolate_dcvdd(arizona); 716 if (ret != 0) 717 return ret; 718 } 719 break; 720 } 721 722 regcache_cache_only(arizona->regmap, true); 723 regcache_mark_dirty(arizona->regmap); 724 regulator_disable(arizona->dcvdd); 725 726 /* Allow us to completely power down if no jack detection */ 727 if (!jd_active) { 728 dev_dbg(arizona->dev, "Fully powering off\n"); 729 730 arizona->has_fully_powered_off = true; 731 732 disable_irq_nosync(arizona->irq); 733 arizona_enable_reset(arizona); 734 regulator_bulk_disable(arizona->num_core_supplies, 735 arizona->core_supplies); 736 } 737 738 return 0; 739 } 740 #endif 741 742 #ifdef CONFIG_PM_SLEEP 743 static int arizona_suspend(struct device *dev) 744 { 745 struct arizona *arizona = dev_get_drvdata(dev); 746 747 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 748 disable_irq(arizona->irq); 749 750 return 0; 751 } 752 753 static int arizona_suspend_noirq(struct device *dev) 754 { 755 struct arizona *arizona = dev_get_drvdata(dev); 756 757 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 758 enable_irq(arizona->irq); 759 760 return 0; 761 } 762 763 static int arizona_resume_noirq(struct device *dev) 764 { 765 struct arizona *arizona = dev_get_drvdata(dev); 766 767 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 768 disable_irq(arizona->irq); 769 770 return 0; 771 } 772 773 static int arizona_resume(struct device *dev) 774 { 775 struct arizona *arizona = dev_get_drvdata(dev); 776 777 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); 778 enable_irq(arizona->irq); 779 780 return 0; 781 } 782 #endif 783 784 const struct dev_pm_ops arizona_pm_ops = { 785 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 786 arizona_runtime_resume, 787 NULL) 788 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 789 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, 790 arizona_resume_noirq) 791 }; 792 EXPORT_SYMBOL_GPL(arizona_pm_ops); 793 794 #ifdef CONFIG_OF 795 unsigned long arizona_of_get_type(struct device *dev) 796 { 797 const struct of_device_id *id = of_match_device(arizona_of_match, dev); 798 799 if (id) 800 return (unsigned long)id->data; 801 else 802 return 0; 803 } 804 EXPORT_SYMBOL_GPL(arizona_of_get_type); 805 806 static int arizona_of_get_core_pdata(struct arizona *arizona) 807 { 808 struct arizona_pdata *pdata = &arizona->pdata; 809 struct property *prop; 810 const __be32 *cur; 811 u32 val; 812 u32 pdm_val[ARIZONA_MAX_PDM_SPK]; 813 int ret, i; 814 int count = 0; 815 816 pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0); 817 if (pdata->reset == -EPROBE_DEFER) { 818 return pdata->reset; 819 } else if (pdata->reset < 0) { 820 dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n", 821 pdata->reset); 822 823 pdata->reset = 0; 824 } 825 826 ret = of_property_read_u32_array(arizona->dev->of_node, 827 "wlf,gpio-defaults", 828 pdata->gpio_defaults, 829 ARRAY_SIZE(pdata->gpio_defaults)); 830 if (ret >= 0) { 831 /* 832 * All values are literal except out of range values 833 * which are chip default, translate into platform 834 * data which uses 0 as chip default and out of range 835 * as zero. 836 */ 837 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { 838 if (pdata->gpio_defaults[i] > 0xffff) 839 pdata->gpio_defaults[i] = 0; 840 else if (pdata->gpio_defaults[i] == 0) 841 pdata->gpio_defaults[i] = 0x10000; 842 } 843 } else { 844 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 845 ret); 846 } 847 848 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, 849 cur, val) { 850 if (count == ARRAY_SIZE(pdata->inmode)) 851 break; 852 853 pdata->inmode[count] = val; 854 count++; 855 } 856 857 count = 0; 858 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, 859 cur, val) { 860 if (count == ARRAY_SIZE(pdata->dmic_ref)) 861 break; 862 863 pdata->dmic_ref[count] = val; 864 count++; 865 } 866 867 count = 0; 868 of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop, 869 cur, val) { 870 if (count == ARRAY_SIZE(pdata->out_mono)) 871 break; 872 873 pdata->out_mono[count] = !!val; 874 count++; 875 } 876 877 count = 0; 878 of_property_for_each_u32(arizona->dev->of_node, 879 "wlf,max-channels-clocked", 880 prop, cur, val) { 881 if (count == ARRAY_SIZE(pdata->max_channels_clocked)) 882 break; 883 884 pdata->max_channels_clocked[count] = val; 885 count++; 886 } 887 888 ret = of_property_read_u32_array(arizona->dev->of_node, 889 "wlf,spk-fmt", 890 pdm_val, 891 ARRAY_SIZE(pdm_val)); 892 893 if (ret >= 0) 894 for (count = 0; count < ARRAY_SIZE(pdata->spk_fmt); ++count) 895 pdata->spk_fmt[count] = pdm_val[count]; 896 897 ret = of_property_read_u32_array(arizona->dev->of_node, 898 "wlf,spk-mute", 899 pdm_val, 900 ARRAY_SIZE(pdm_val)); 901 902 if (ret >= 0) 903 for (count = 0; count < ARRAY_SIZE(pdata->spk_mute); ++count) 904 pdata->spk_mute[count] = pdm_val[count]; 905 906 return 0; 907 } 908 909 const struct of_device_id arizona_of_match[] = { 910 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 911 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 912 { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, 913 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 914 { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, 915 { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, 916 { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, 917 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, 918 {}, 919 }; 920 EXPORT_SYMBOL_GPL(arizona_of_match); 921 #else 922 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 923 { 924 return 0; 925 } 926 #endif 927 928 static const struct mfd_cell early_devs[] = { 929 { .name = "arizona-ldo1" }, 930 }; 931 932 static const char * const wm5102_supplies[] = { 933 "MICVDD", 934 "DBVDD2", 935 "DBVDD3", 936 "CPVDD", 937 "SPKVDDL", 938 "SPKVDDR", 939 }; 940 941 static const struct mfd_cell wm5102_devs[] = { 942 { .name = "arizona-micsupp" }, 943 { .name = "arizona-gpio" }, 944 { 945 .name = "arizona-extcon", 946 .parent_supplies = wm5102_supplies, 947 .num_parent_supplies = 1, /* We only need MICVDD */ 948 }, 949 { .name = "arizona-haptics" }, 950 { .name = "arizona-pwm" }, 951 { 952 .name = "wm5102-codec", 953 .parent_supplies = wm5102_supplies, 954 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 955 }, 956 }; 957 958 static const struct mfd_cell wm5110_devs[] = { 959 { .name = "arizona-micsupp" }, 960 { .name = "arizona-gpio" }, 961 { 962 .name = "arizona-extcon", 963 .parent_supplies = wm5102_supplies, 964 .num_parent_supplies = 1, /* We only need MICVDD */ 965 }, 966 { .name = "arizona-haptics" }, 967 { .name = "arizona-pwm" }, 968 { 969 .name = "wm5110-codec", 970 .parent_supplies = wm5102_supplies, 971 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 972 }, 973 }; 974 975 static const char * const cs47l24_supplies[] = { 976 "MICVDD", 977 "CPVDD", 978 "SPKVDD", 979 }; 980 981 static const struct mfd_cell cs47l24_devs[] = { 982 { .name = "arizona-gpio" }, 983 { .name = "arizona-haptics" }, 984 { .name = "arizona-pwm" }, 985 { 986 .name = "cs47l24-codec", 987 .parent_supplies = cs47l24_supplies, 988 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), 989 }, 990 }; 991 992 static const char * const wm8997_supplies[] = { 993 "MICVDD", 994 "DBVDD2", 995 "CPVDD", 996 "SPKVDD", 997 }; 998 999 static const struct mfd_cell wm8997_devs[] = { 1000 { .name = "arizona-micsupp" }, 1001 { .name = "arizona-gpio" }, 1002 { 1003 .name = "arizona-extcon", 1004 .parent_supplies = wm8997_supplies, 1005 .num_parent_supplies = 1, /* We only need MICVDD */ 1006 }, 1007 { .name = "arizona-haptics" }, 1008 { .name = "arizona-pwm" }, 1009 { 1010 .name = "wm8997-codec", 1011 .parent_supplies = wm8997_supplies, 1012 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 1013 }, 1014 }; 1015 1016 static const struct mfd_cell wm8998_devs[] = { 1017 { .name = "arizona-micsupp" }, 1018 { .name = "arizona-gpio" }, 1019 { 1020 .name = "arizona-extcon", 1021 .parent_supplies = wm5102_supplies, 1022 .num_parent_supplies = 1, /* We only need MICVDD */ 1023 }, 1024 { .name = "arizona-haptics" }, 1025 { .name = "arizona-pwm" }, 1026 { 1027 .name = "wm8998-codec", 1028 .parent_supplies = wm5102_supplies, 1029 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 1030 }, 1031 }; 1032 1033 int arizona_dev_init(struct arizona *arizona) 1034 { 1035 const char * const mclk_name[] = { "mclk1", "mclk2" }; 1036 struct device *dev = arizona->dev; 1037 const char *type_name = NULL; 1038 unsigned int reg, val, mask; 1039 int (*apply_patch)(struct arizona *) = NULL; 1040 const struct mfd_cell *subdevs = NULL; 1041 int n_subdevs, ret, i; 1042 1043 dev_set_drvdata(arizona->dev, arizona); 1044 mutex_init(&arizona->clk_lock); 1045 1046 if (dev_get_platdata(arizona->dev)) { 1047 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 1048 sizeof(arizona->pdata)); 1049 } else { 1050 ret = arizona_of_get_core_pdata(arizona); 1051 if (ret < 0) 1052 return ret; 1053 } 1054 1055 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); 1056 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { 1057 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); 1058 if (IS_ERR(arizona->mclk[i])) { 1059 dev_info(arizona->dev, "Failed to get %s: %ld\n", 1060 mclk_name[i], PTR_ERR(arizona->mclk[i])); 1061 arizona->mclk[i] = NULL; 1062 } 1063 } 1064 1065 regcache_cache_only(arizona->regmap, true); 1066 1067 switch (arizona->type) { 1068 case WM5102: 1069 case WM5110: 1070 case WM8280: 1071 case WM8997: 1072 case WM8998: 1073 case WM1814: 1074 case WM1831: 1075 case CS47L24: 1076 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 1077 arizona->core_supplies[i].supply 1078 = wm5102_core_supplies[i]; 1079 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 1080 break; 1081 default: 1082 dev_err(arizona->dev, "Unknown device type %d\n", 1083 arizona->type); 1084 return -ENODEV; 1085 } 1086 1087 /* Mark DCVDD as external, LDO1 driver will clear if internal */ 1088 arizona->external_dcvdd = true; 1089 1090 switch (arizona->type) { 1091 case WM1831: 1092 case CS47L24: 1093 break; /* No LDO1 regulator */ 1094 default: 1095 ret = mfd_add_devices(arizona->dev, -1, early_devs, 1096 ARRAY_SIZE(early_devs), NULL, 0, NULL); 1097 if (ret != 0) { 1098 dev_err(dev, "Failed to add early children: %d\n", ret); 1099 return ret; 1100 } 1101 break; 1102 } 1103 1104 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 1105 arizona->core_supplies); 1106 if (ret != 0) { 1107 dev_err(dev, "Failed to request core supplies: %d\n", 1108 ret); 1109 goto err_early; 1110 } 1111 1112 /** 1113 * Don't use devres here because the only device we have to get 1114 * against is the MFD device and DCVDD will likely be supplied by 1115 * one of its children. Meaning that the regulator will be 1116 * destroyed by the time devres calls regulator put. 1117 */ 1118 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); 1119 if (IS_ERR(arizona->dcvdd)) { 1120 ret = PTR_ERR(arizona->dcvdd); 1121 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 1122 goto err_early; 1123 } 1124 1125 if (arizona->pdata.reset) { 1126 /* Start out with /RESET low to put the chip into reset */ 1127 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, 1128 GPIOF_DIR_OUT | GPIOF_INIT_LOW, 1129 "arizona /RESET"); 1130 if (ret != 0) { 1131 dev_err(dev, "Failed to request /RESET: %d\n", ret); 1132 goto err_dcvdd; 1133 } 1134 } 1135 1136 ret = regulator_bulk_enable(arizona->num_core_supplies, 1137 arizona->core_supplies); 1138 if (ret != 0) { 1139 dev_err(dev, "Failed to enable core supplies: %d\n", 1140 ret); 1141 goto err_dcvdd; 1142 } 1143 1144 ret = regulator_enable(arizona->dcvdd); 1145 if (ret != 0) { 1146 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 1147 goto err_enable; 1148 } 1149 1150 arizona_disable_reset(arizona); 1151 1152 regcache_cache_only(arizona->regmap, false); 1153 1154 /* Verify that this is a chip we know about */ 1155 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1156 if (ret != 0) { 1157 dev_err(dev, "Failed to read ID register: %d\n", ret); 1158 goto err_reset; 1159 } 1160 1161 switch (reg) { 1162 case 0x5102: 1163 case 0x5110: 1164 case 0x6349: 1165 case 0x6363: 1166 case 0x8997: 1167 break; 1168 default: 1169 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 1170 ret = -ENODEV; 1171 goto err_reset; 1172 } 1173 1174 /* If we have a /RESET GPIO we'll already be reset */ 1175 if (!arizona->pdata.reset) { 1176 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 1177 if (ret != 0) { 1178 dev_err(dev, "Failed to reset device: %d\n", ret); 1179 goto err_reset; 1180 } 1181 1182 usleep_range(1000, 5000); 1183 } 1184 1185 /* Ensure device startup is complete */ 1186 switch (arizona->type) { 1187 case WM5102: 1188 ret = regmap_read(arizona->regmap, 1189 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); 1190 if (ret) { 1191 dev_err(dev, 1192 "Failed to check write sequencer state: %d\n", 1193 ret); 1194 } else if (val & 0x01) { 1195 ret = wm5102_clear_write_sequencer(arizona); 1196 if (ret) 1197 return ret; 1198 } 1199 break; 1200 default: 1201 break; 1202 } 1203 1204 ret = arizona_wait_for_boot(arizona); 1205 if (ret) { 1206 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); 1207 goto err_reset; 1208 } 1209 1210 /* Read the device ID information & do device specific stuff */ 1211 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1212 if (ret != 0) { 1213 dev_err(dev, "Failed to read ID register: %d\n", ret); 1214 goto err_reset; 1215 } 1216 1217 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 1218 &arizona->rev); 1219 if (ret != 0) { 1220 dev_err(dev, "Failed to read revision register: %d\n", ret); 1221 goto err_reset; 1222 } 1223 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 1224 1225 switch (reg) { 1226 case 0x5102: 1227 if (IS_ENABLED(CONFIG_MFD_WM5102)) { 1228 type_name = "WM5102"; 1229 if (arizona->type != WM5102) { 1230 dev_warn(arizona->dev, 1231 "WM5102 registered as %d\n", 1232 arizona->type); 1233 arizona->type = WM5102; 1234 } 1235 1236 apply_patch = wm5102_patch; 1237 arizona->rev &= 0x7; 1238 subdevs = wm5102_devs; 1239 n_subdevs = ARRAY_SIZE(wm5102_devs); 1240 } 1241 break; 1242 case 0x5110: 1243 if (IS_ENABLED(CONFIG_MFD_WM5110)) { 1244 switch (arizona->type) { 1245 case WM5110: 1246 type_name = "WM5110"; 1247 break; 1248 case WM8280: 1249 type_name = "WM8280"; 1250 break; 1251 default: 1252 type_name = "WM5110"; 1253 dev_warn(arizona->dev, 1254 "WM5110 registered as %d\n", 1255 arizona->type); 1256 arizona->type = WM5110; 1257 break; 1258 } 1259 1260 apply_patch = wm5110_patch; 1261 subdevs = wm5110_devs; 1262 n_subdevs = ARRAY_SIZE(wm5110_devs); 1263 } 1264 break; 1265 case 0x6363: 1266 if (IS_ENABLED(CONFIG_MFD_CS47L24)) { 1267 switch (arizona->type) { 1268 case CS47L24: 1269 type_name = "CS47L24"; 1270 break; 1271 1272 case WM1831: 1273 type_name = "WM1831"; 1274 break; 1275 1276 default: 1277 dev_warn(arizona->dev, 1278 "CS47L24 registered as %d\n", 1279 arizona->type); 1280 arizona->type = CS47L24; 1281 break; 1282 } 1283 1284 apply_patch = cs47l24_patch; 1285 subdevs = cs47l24_devs; 1286 n_subdevs = ARRAY_SIZE(cs47l24_devs); 1287 } 1288 break; 1289 case 0x8997: 1290 if (IS_ENABLED(CONFIG_MFD_WM8997)) { 1291 type_name = "WM8997"; 1292 if (arizona->type != WM8997) { 1293 dev_warn(arizona->dev, 1294 "WM8997 registered as %d\n", 1295 arizona->type); 1296 arizona->type = WM8997; 1297 } 1298 1299 apply_patch = wm8997_patch; 1300 subdevs = wm8997_devs; 1301 n_subdevs = ARRAY_SIZE(wm8997_devs); 1302 } 1303 break; 1304 case 0x6349: 1305 if (IS_ENABLED(CONFIG_MFD_WM8998)) { 1306 switch (arizona->type) { 1307 case WM8998: 1308 type_name = "WM8998"; 1309 break; 1310 1311 case WM1814: 1312 type_name = "WM1814"; 1313 break; 1314 1315 default: 1316 type_name = "WM8998"; 1317 dev_warn(arizona->dev, 1318 "WM8998 registered as %d\n", 1319 arizona->type); 1320 arizona->type = WM8998; 1321 } 1322 1323 apply_patch = wm8998_patch; 1324 subdevs = wm8998_devs; 1325 n_subdevs = ARRAY_SIZE(wm8998_devs); 1326 } 1327 break; 1328 default: 1329 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 1330 ret = -ENODEV; 1331 goto err_reset; 1332 } 1333 1334 if (!subdevs) { 1335 dev_err(arizona->dev, 1336 "No kernel support for device ID %x\n", reg); 1337 ret = -ENODEV; 1338 goto err_reset; 1339 } 1340 1341 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 1342 1343 if (apply_patch) { 1344 ret = apply_patch(arizona); 1345 if (ret != 0) { 1346 dev_err(arizona->dev, "Failed to apply patch: %d\n", 1347 ret); 1348 goto err_reset; 1349 } 1350 1351 switch (arizona->type) { 1352 case WM5102: 1353 ret = wm5102_apply_hardware_patch(arizona); 1354 if (ret) { 1355 dev_err(arizona->dev, 1356 "Failed to apply hardware patch: %d\n", 1357 ret); 1358 goto err_reset; 1359 } 1360 break; 1361 case WM5110: 1362 case WM8280: 1363 ret = wm5110_apply_sleep_patch(arizona); 1364 if (ret) { 1365 dev_err(arizona->dev, 1366 "Failed to apply sleep patch: %d\n", 1367 ret); 1368 goto err_reset; 1369 } 1370 break; 1371 default: 1372 break; 1373 } 1374 } 1375 1376 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 1377 if (!arizona->pdata.gpio_defaults[i]) 1378 continue; 1379 1380 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 1381 arizona->pdata.gpio_defaults[i]); 1382 } 1383 1384 /* Chip default */ 1385 if (!arizona->pdata.clk32k_src) 1386 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 1387 1388 switch (arizona->pdata.clk32k_src) { 1389 case ARIZONA_32KZ_MCLK1: 1390 case ARIZONA_32KZ_MCLK2: 1391 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1392 ARIZONA_CLK_32K_SRC_MASK, 1393 arizona->pdata.clk32k_src - 1); 1394 arizona_clk32k_enable(arizona); 1395 break; 1396 case ARIZONA_32KZ_NONE: 1397 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1398 ARIZONA_CLK_32K_SRC_MASK, 2); 1399 break; 1400 default: 1401 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 1402 arizona->pdata.clk32k_src); 1403 ret = -EINVAL; 1404 goto err_reset; 1405 } 1406 1407 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 1408 if (!arizona->pdata.micbias[i].mV && 1409 !arizona->pdata.micbias[i].bypass) 1410 continue; 1411 1412 /* Apply default for bypass mode */ 1413 if (!arizona->pdata.micbias[i].mV) 1414 arizona->pdata.micbias[i].mV = 2800; 1415 1416 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 1417 1418 val <<= ARIZONA_MICB1_LVL_SHIFT; 1419 1420 if (arizona->pdata.micbias[i].ext_cap) 1421 val |= ARIZONA_MICB1_EXT_CAP; 1422 1423 if (arizona->pdata.micbias[i].discharge) 1424 val |= ARIZONA_MICB1_DISCH; 1425 1426 if (arizona->pdata.micbias[i].soft_start) 1427 val |= ARIZONA_MICB1_RATE; 1428 1429 if (arizona->pdata.micbias[i].bypass) 1430 val |= ARIZONA_MICB1_BYPASS; 1431 1432 regmap_update_bits(arizona->regmap, 1433 ARIZONA_MIC_BIAS_CTRL_1 + i, 1434 ARIZONA_MICB1_LVL_MASK | 1435 ARIZONA_MICB1_EXT_CAP | 1436 ARIZONA_MICB1_DISCH | 1437 ARIZONA_MICB1_BYPASS | 1438 ARIZONA_MICB1_RATE, val); 1439 } 1440 1441 for (i = 0; i < ARIZONA_MAX_INPUT; i++) { 1442 /* Default for both is 0 so noop with defaults */ 1443 val = arizona->pdata.dmic_ref[i] 1444 << ARIZONA_IN1_DMIC_SUP_SHIFT; 1445 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) 1446 val |= 1 << ARIZONA_IN1_MODE_SHIFT; 1447 1448 switch (arizona->type) { 1449 case WM8998: 1450 case WM1814: 1451 regmap_update_bits(arizona->regmap, 1452 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), 1453 ARIZONA_IN1L_SRC_SE_MASK, 1454 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1455 << ARIZONA_IN1L_SRC_SE_SHIFT); 1456 1457 regmap_update_bits(arizona->regmap, 1458 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), 1459 ARIZONA_IN1R_SRC_SE_MASK, 1460 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1461 << ARIZONA_IN1R_SRC_SE_SHIFT); 1462 1463 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1464 ARIZONA_IN1_MODE_MASK; 1465 break; 1466 default: 1467 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1468 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; 1469 1470 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1471 ARIZONA_IN1_MODE_MASK | 1472 ARIZONA_IN1_SINGLE_ENDED_MASK; 1473 break; 1474 } 1475 1476 regmap_update_bits(arizona->regmap, 1477 ARIZONA_IN1L_CONTROL + (i * 8), 1478 mask, val); 1479 } 1480 1481 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { 1482 /* Default is 0 so noop with defaults */ 1483 if (arizona->pdata.out_mono[i]) 1484 val = ARIZONA_OUT1_MONO; 1485 else 1486 val = 0; 1487 1488 regmap_update_bits(arizona->regmap, 1489 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), 1490 ARIZONA_OUT1_MONO, val); 1491 } 1492 1493 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { 1494 if (arizona->pdata.spk_mute[i]) 1495 regmap_update_bits(arizona->regmap, 1496 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), 1497 ARIZONA_SPK1_MUTE_ENDIAN_MASK | 1498 ARIZONA_SPK1_MUTE_SEQ1_MASK, 1499 arizona->pdata.spk_mute[i]); 1500 1501 if (arizona->pdata.spk_fmt[i]) 1502 regmap_update_bits(arizona->regmap, 1503 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), 1504 ARIZONA_SPK1_FMT_MASK, 1505 arizona->pdata.spk_fmt[i]); 1506 } 1507 1508 pm_runtime_set_active(arizona->dev); 1509 pm_runtime_enable(arizona->dev); 1510 1511 /* Set up for interrupts */ 1512 ret = arizona_irq_init(arizona); 1513 if (ret != 0) 1514 goto err_pm; 1515 1516 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 1517 pm_runtime_use_autosuspend(arizona->dev); 1518 1519 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 1520 arizona_clkgen_err, arizona); 1521 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 1522 arizona_overclocked, arizona); 1523 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 1524 arizona_underclocked, arizona); 1525 1526 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, 1527 subdevs, n_subdevs, NULL, 0, NULL); 1528 1529 if (ret) { 1530 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 1531 goto err_irq; 1532 } 1533 1534 return 0; 1535 1536 err_irq: 1537 arizona_irq_exit(arizona); 1538 err_pm: 1539 pm_runtime_disable(arizona->dev); 1540 err_reset: 1541 arizona_enable_reset(arizona); 1542 regulator_disable(arizona->dcvdd); 1543 err_enable: 1544 regulator_bulk_disable(arizona->num_core_supplies, 1545 arizona->core_supplies); 1546 err_dcvdd: 1547 regulator_put(arizona->dcvdd); 1548 err_early: 1549 mfd_remove_devices(dev); 1550 return ret; 1551 } 1552 EXPORT_SYMBOL_GPL(arizona_dev_init); 1553 1554 int arizona_dev_exit(struct arizona *arizona) 1555 { 1556 pm_runtime_disable(arizona->dev); 1557 1558 regulator_disable(arizona->dcvdd); 1559 regulator_put(arizona->dcvdd); 1560 1561 mfd_remove_devices(arizona->dev); 1562 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1563 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1564 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1565 arizona_irq_exit(arizona); 1566 arizona_enable_reset(arizona); 1567 1568 regulator_bulk_disable(arizona->num_core_supplies, 1569 arizona->core_supplies); 1570 return 0; 1571 } 1572 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1573