1 /* 2 * Arizona core driver 3 * 4 * Copyright 2012 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/gpio.h> 16 #include <linux/interrupt.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_device.h> 21 #include <linux/of_gpio.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 #include <linux/regulator/consumer.h> 25 #include <linux/regulator/machine.h> 26 #include <linux/slab.h> 27 28 #include <linux/mfd/arizona/core.h> 29 #include <linux/mfd/arizona/registers.h> 30 31 #include "arizona.h" 32 33 static const char *wm5102_core_supplies[] = { 34 "AVDD", 35 "DBVDD1", 36 }; 37 38 int arizona_clk32k_enable(struct arizona *arizona) 39 { 40 int ret = 0; 41 42 mutex_lock(&arizona->clk_lock); 43 44 arizona->clk32k_ref++; 45 46 if (arizona->clk32k_ref == 1) { 47 switch (arizona->pdata.clk32k_src) { 48 case ARIZONA_32KZ_MCLK1: 49 ret = pm_runtime_get_sync(arizona->dev); 50 if (ret != 0) 51 goto out; 52 break; 53 } 54 55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 56 ARIZONA_CLK_32K_ENA, 57 ARIZONA_CLK_32K_ENA); 58 } 59 60 out: 61 if (ret != 0) 62 arizona->clk32k_ref--; 63 64 mutex_unlock(&arizona->clk_lock); 65 66 return ret; 67 } 68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 69 70 int arizona_clk32k_disable(struct arizona *arizona) 71 { 72 int ret = 0; 73 74 mutex_lock(&arizona->clk_lock); 75 76 BUG_ON(arizona->clk32k_ref <= 0); 77 78 arizona->clk32k_ref--; 79 80 if (arizona->clk32k_ref == 0) { 81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 82 ARIZONA_CLK_32K_ENA, 0); 83 84 switch (arizona->pdata.clk32k_src) { 85 case ARIZONA_32KZ_MCLK1: 86 pm_runtime_put_sync(arizona->dev); 87 break; 88 } 89 } 90 91 mutex_unlock(&arizona->clk_lock); 92 93 return ret; 94 } 95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 96 97 static irqreturn_t arizona_clkgen_err(int irq, void *data) 98 { 99 struct arizona *arizona = data; 100 101 dev_err(arizona->dev, "CLKGEN error\n"); 102 103 return IRQ_HANDLED; 104 } 105 106 static irqreturn_t arizona_underclocked(int irq, void *data) 107 { 108 struct arizona *arizona = data; 109 unsigned int val; 110 int ret; 111 112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 113 &val); 114 if (ret != 0) { 115 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 116 ret); 117 return IRQ_NONE; 118 } 119 120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 121 dev_err(arizona->dev, "AIF3 underclocked\n"); 122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 123 dev_err(arizona->dev, "AIF2 underclocked\n"); 124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 125 dev_err(arizona->dev, "AIF1 underclocked\n"); 126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 127 dev_err(arizona->dev, "ISRC2 underclocked\n"); 128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 129 dev_err(arizona->dev, "ISRC1 underclocked\n"); 130 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 131 dev_err(arizona->dev, "FX underclocked\n"); 132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 133 dev_err(arizona->dev, "ASRC underclocked\n"); 134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 135 dev_err(arizona->dev, "DAC underclocked\n"); 136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 137 dev_err(arizona->dev, "ADC underclocked\n"); 138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 139 dev_err(arizona->dev, "Mixer dropped sample\n"); 140 141 return IRQ_HANDLED; 142 } 143 144 static irqreturn_t arizona_overclocked(int irq, void *data) 145 { 146 struct arizona *arizona = data; 147 unsigned int val[2]; 148 int ret; 149 150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 151 &val[0], 2); 152 if (ret != 0) { 153 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 154 ret); 155 return IRQ_NONE; 156 } 157 158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 159 dev_err(arizona->dev, "PWM overclocked\n"); 160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 161 dev_err(arizona->dev, "FX core overclocked\n"); 162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 163 dev_err(arizona->dev, "DAC SYS overclocked\n"); 164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 165 dev_err(arizona->dev, "DAC WARP overclocked\n"); 166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 167 dev_err(arizona->dev, "ADC overclocked\n"); 168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 169 dev_err(arizona->dev, "Mixer overclocked\n"); 170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 171 dev_err(arizona->dev, "AIF3 overclocked\n"); 172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 173 dev_err(arizona->dev, "AIF2 overclocked\n"); 174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 175 dev_err(arizona->dev, "AIF1 overclocked\n"); 176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 177 dev_err(arizona->dev, "Pad control overclocked\n"); 178 179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 182 dev_err(arizona->dev, "Slimbus async overclocked\n"); 183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 184 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 186 dev_err(arizona->dev, "ASRC async system overclocked\n"); 187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 188 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 190 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 194 dev_err(arizona->dev, "DSP1 overclocked\n"); 195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 196 dev_err(arizona->dev, "ISRC2 overclocked\n"); 197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 198 dev_err(arizona->dev, "ISRC1 overclocked\n"); 199 200 return IRQ_HANDLED; 201 } 202 203 static int arizona_poll_reg(struct arizona *arizona, 204 int timeout, unsigned int reg, 205 unsigned int mask, unsigned int target) 206 { 207 unsigned int val = 0; 208 int ret, i; 209 210 for (i = 0; i < timeout; i++) { 211 ret = regmap_read(arizona->regmap, reg, &val); 212 if (ret != 0) { 213 dev_err(arizona->dev, "Failed to read reg %u: %d\n", 214 reg, ret); 215 continue; 216 } 217 218 if ((val & mask) == target) 219 return 0; 220 221 msleep(1); 222 } 223 224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); 225 return -ETIMEDOUT; 226 } 227 228 static int arizona_wait_for_boot(struct arizona *arizona) 229 { 230 int ret; 231 232 /* 233 * We can't use an interrupt as we need to runtime resume to do so, 234 * we won't race with the interrupt handler as it'll be blocked on 235 * runtime resume. 236 */ 237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, 238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 239 240 if (!ret) 241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 242 ARIZONA_BOOT_DONE_STS); 243 244 pm_runtime_mark_last_busy(arizona->dev); 245 246 return ret; 247 } 248 249 static int arizona_apply_hardware_patch(struct arizona* arizona) 250 { 251 unsigned int fll, sysclk; 252 int ret, err; 253 254 regcache_cache_bypass(arizona->regmap, true); 255 256 /* Cache existing FLL and SYSCLK settings */ 257 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); 258 if (ret != 0) { 259 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 260 ret); 261 return ret; 262 } 263 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); 264 if (ret != 0) { 265 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 266 ret); 267 return ret; 268 } 269 270 /* Start up SYSCLK using the FLL in free running mode */ 271 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 272 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 273 if (ret != 0) { 274 dev_err(arizona->dev, 275 "Failed to start FLL in freerunning mode: %d\n", 276 ret); 277 return ret; 278 } 279 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, 280 ARIZONA_FLL1_CLOCK_OK_STS, 281 ARIZONA_FLL1_CLOCK_OK_STS); 282 if (ret != 0) { 283 ret = -ETIMEDOUT; 284 goto err_fll; 285 } 286 287 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 288 if (ret != 0) { 289 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 290 goto err_fll; 291 } 292 293 /* Start the write sequencer and wait for it to finish */ 294 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 295 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 296 if (ret != 0) { 297 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 298 ret); 299 goto err_sysclk; 300 } 301 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, 302 ARIZONA_WSEQ_BUSY, 0); 303 if (ret != 0) { 304 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 305 ARIZONA_WSEQ_ABORT); 306 ret = -ETIMEDOUT; 307 } 308 309 err_sysclk: 310 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); 311 if (err != 0) { 312 dev_err(arizona->dev, 313 "Failed to re-apply old SYSCLK settings: %d\n", 314 err); 315 } 316 317 err_fll: 318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); 319 if (err != 0) { 320 dev_err(arizona->dev, 321 "Failed to re-apply old FLL settings: %d\n", 322 err); 323 } 324 325 regcache_cache_bypass(arizona->regmap, false); 326 327 if (ret != 0) 328 return ret; 329 else 330 return err; 331 } 332 333 #ifdef CONFIG_PM_RUNTIME 334 static int arizona_runtime_resume(struct device *dev) 335 { 336 struct arizona *arizona = dev_get_drvdata(dev); 337 int ret; 338 339 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 340 341 ret = regulator_enable(arizona->dcvdd); 342 if (ret != 0) { 343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 344 return ret; 345 } 346 347 regcache_cache_only(arizona->regmap, false); 348 349 switch (arizona->type) { 350 case WM5102: 351 if (arizona->external_dcvdd) { 352 ret = regmap_update_bits(arizona->regmap, 353 ARIZONA_ISOLATION_CONTROL, 354 ARIZONA_ISOLATE_DCVDD1, 0); 355 if (ret != 0) { 356 dev_err(arizona->dev, 357 "Failed to connect DCVDD: %d\n", ret); 358 goto err; 359 } 360 } 361 362 ret = wm5102_patch(arizona); 363 if (ret != 0) { 364 dev_err(arizona->dev, "Failed to apply patch: %d\n", 365 ret); 366 goto err; 367 } 368 369 ret = arizona_apply_hardware_patch(arizona); 370 if (ret != 0) { 371 dev_err(arizona->dev, 372 "Failed to apply hardware patch: %d\n", 373 ret); 374 goto err; 375 } 376 break; 377 default: 378 ret = arizona_wait_for_boot(arizona); 379 if (ret != 0) { 380 goto err; 381 } 382 383 if (arizona->external_dcvdd) { 384 ret = regmap_update_bits(arizona->regmap, 385 ARIZONA_ISOLATION_CONTROL, 386 ARIZONA_ISOLATE_DCVDD1, 0); 387 if (ret != 0) { 388 dev_err(arizona->dev, 389 "Failed to connect DCVDD: %d\n", ret); 390 goto err; 391 } 392 } 393 break; 394 } 395 396 switch (arizona->type) { 397 case WM5102: 398 ret = wm5102_patch(arizona); 399 if (ret != 0) { 400 dev_err(arizona->dev, "Failed to apply patch: %d\n", 401 ret); 402 goto err; 403 } 404 default: 405 break; 406 } 407 408 ret = regcache_sync(arizona->regmap); 409 if (ret != 0) { 410 dev_err(arizona->dev, "Failed to restore register cache\n"); 411 goto err; 412 } 413 414 return 0; 415 416 err: 417 regcache_cache_only(arizona->regmap, true); 418 regulator_disable(arizona->dcvdd); 419 return ret; 420 } 421 422 static int arizona_runtime_suspend(struct device *dev) 423 { 424 struct arizona *arizona = dev_get_drvdata(dev); 425 int ret; 426 427 dev_dbg(arizona->dev, "Entering AoD mode\n"); 428 429 if (arizona->external_dcvdd) { 430 ret = regmap_update_bits(arizona->regmap, 431 ARIZONA_ISOLATION_CONTROL, 432 ARIZONA_ISOLATE_DCVDD1, 433 ARIZONA_ISOLATE_DCVDD1); 434 if (ret != 0) { 435 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", 436 ret); 437 return ret; 438 } 439 } 440 441 regulator_disable(arizona->dcvdd); 442 regcache_cache_only(arizona->regmap, true); 443 regcache_mark_dirty(arizona->regmap); 444 445 return 0; 446 } 447 #endif 448 449 #ifdef CONFIG_PM_SLEEP 450 static int arizona_suspend(struct device *dev) 451 { 452 struct arizona *arizona = dev_get_drvdata(dev); 453 454 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 455 disable_irq(arizona->irq); 456 457 return 0; 458 } 459 460 static int arizona_suspend_late(struct device *dev) 461 { 462 struct arizona *arizona = dev_get_drvdata(dev); 463 464 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 465 enable_irq(arizona->irq); 466 467 return 0; 468 } 469 470 static int arizona_resume_noirq(struct device *dev) 471 { 472 struct arizona *arizona = dev_get_drvdata(dev); 473 474 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 475 disable_irq(arizona->irq); 476 477 return 0; 478 } 479 480 static int arizona_resume(struct device *dev) 481 { 482 struct arizona *arizona = dev_get_drvdata(dev); 483 484 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); 485 enable_irq(arizona->irq); 486 487 return 0; 488 } 489 #endif 490 491 const struct dev_pm_ops arizona_pm_ops = { 492 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 493 arizona_runtime_resume, 494 NULL) 495 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 496 #ifdef CONFIG_PM_SLEEP 497 .suspend_late = arizona_suspend_late, 498 .resume_noirq = arizona_resume_noirq, 499 #endif 500 }; 501 EXPORT_SYMBOL_GPL(arizona_pm_ops); 502 503 #ifdef CONFIG_OF 504 int arizona_of_get_type(struct device *dev) 505 { 506 const struct of_device_id *id = of_match_device(arizona_of_match, dev); 507 508 if (id) 509 return (int)id->data; 510 else 511 return 0; 512 } 513 EXPORT_SYMBOL_GPL(arizona_of_get_type); 514 515 static int arizona_of_get_core_pdata(struct arizona *arizona) 516 { 517 int ret, i; 518 519 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node, 520 "wlf,reset", 0); 521 if (arizona->pdata.reset < 0) 522 arizona->pdata.reset = 0; 523 524 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node, 525 "wlf,ldoena", 0); 526 if (arizona->pdata.ldoena < 0) 527 arizona->pdata.ldoena = 0; 528 529 ret = of_property_read_u32_array(arizona->dev->of_node, 530 "wlf,gpio-defaults", 531 arizona->pdata.gpio_defaults, 532 ARRAY_SIZE(arizona->pdata.gpio_defaults)); 533 if (ret >= 0) { 534 /* 535 * All values are literal except out of range values 536 * which are chip default, translate into platform 537 * data which uses 0 as chip default and out of range 538 * as zero. 539 */ 540 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 541 if (arizona->pdata.gpio_defaults[i] > 0xffff) 542 arizona->pdata.gpio_defaults[i] = 0; 543 if (arizona->pdata.gpio_defaults[i] == 0) 544 arizona->pdata.gpio_defaults[i] = 0x10000; 545 } 546 } else { 547 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 548 ret); 549 } 550 551 return 0; 552 } 553 554 const struct of_device_id arizona_of_match[] = { 555 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 556 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 557 {}, 558 }; 559 EXPORT_SYMBOL_GPL(arizona_of_match); 560 #else 561 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 562 { 563 return 0; 564 } 565 #endif 566 567 static struct mfd_cell early_devs[] = { 568 { .name = "arizona-ldo1" }, 569 }; 570 571 static struct mfd_cell wm5102_devs[] = { 572 { .name = "arizona-micsupp" }, 573 { .name = "arizona-extcon" }, 574 { .name = "arizona-gpio" }, 575 { .name = "arizona-haptics" }, 576 { .name = "arizona-pwm" }, 577 { .name = "wm5102-codec" }, 578 }; 579 580 static struct mfd_cell wm5110_devs[] = { 581 { .name = "arizona-micsupp" }, 582 { .name = "arizona-extcon" }, 583 { .name = "arizona-gpio" }, 584 { .name = "arizona-haptics" }, 585 { .name = "arizona-pwm" }, 586 { .name = "wm5110-codec" }, 587 }; 588 589 int arizona_dev_init(struct arizona *arizona) 590 { 591 struct device *dev = arizona->dev; 592 const char *type_name; 593 unsigned int reg, val; 594 int (*apply_patch)(struct arizona *) = NULL; 595 int ret, i; 596 597 dev_set_drvdata(arizona->dev, arizona); 598 mutex_init(&arizona->clk_lock); 599 600 arizona_of_get_core_pdata(arizona); 601 602 if (dev_get_platdata(arizona->dev)) 603 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 604 sizeof(arizona->pdata)); 605 606 regcache_cache_only(arizona->regmap, true); 607 608 switch (arizona->type) { 609 case WM5102: 610 case WM5110: 611 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 612 arizona->core_supplies[i].supply 613 = wm5102_core_supplies[i]; 614 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 615 break; 616 default: 617 dev_err(arizona->dev, "Unknown device type %d\n", 618 arizona->type); 619 return -EINVAL; 620 } 621 622 ret = mfd_add_devices(arizona->dev, -1, early_devs, 623 ARRAY_SIZE(early_devs), NULL, 0, NULL); 624 if (ret != 0) { 625 dev_err(dev, "Failed to add early children: %d\n", ret); 626 return ret; 627 } 628 629 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 630 arizona->core_supplies); 631 if (ret != 0) { 632 dev_err(dev, "Failed to request core supplies: %d\n", 633 ret); 634 goto err_early; 635 } 636 637 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); 638 if (IS_ERR(arizona->dcvdd)) { 639 ret = PTR_ERR(arizona->dcvdd); 640 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 641 goto err_early; 642 } 643 644 if (arizona->pdata.reset) { 645 /* Start out with /RESET low to put the chip into reset */ 646 ret = gpio_request_one(arizona->pdata.reset, 647 GPIOF_DIR_OUT | GPIOF_INIT_LOW, 648 "arizona /RESET"); 649 if (ret != 0) { 650 dev_err(dev, "Failed to request /RESET: %d\n", ret); 651 goto err_early; 652 } 653 } 654 655 ret = regulator_bulk_enable(arizona->num_core_supplies, 656 arizona->core_supplies); 657 if (ret != 0) { 658 dev_err(dev, "Failed to enable core supplies: %d\n", 659 ret); 660 goto err_early; 661 } 662 663 ret = regulator_enable(arizona->dcvdd); 664 if (ret != 0) { 665 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 666 goto err_enable; 667 } 668 669 if (arizona->pdata.reset) { 670 gpio_set_value_cansleep(arizona->pdata.reset, 1); 671 msleep(1); 672 } 673 674 regcache_cache_only(arizona->regmap, false); 675 676 /* Verify that this is a chip we know about */ 677 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 678 if (ret != 0) { 679 dev_err(dev, "Failed to read ID register: %d\n", ret); 680 goto err_reset; 681 } 682 683 switch (reg) { 684 case 0x5102: 685 case 0x5110: 686 break; 687 default: 688 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 689 goto err_reset; 690 } 691 692 /* If we have a /RESET GPIO we'll already be reset */ 693 if (!arizona->pdata.reset) { 694 regcache_mark_dirty(arizona->regmap); 695 696 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 697 if (ret != 0) { 698 dev_err(dev, "Failed to reset device: %d\n", ret); 699 goto err_reset; 700 } 701 702 msleep(1); 703 704 ret = regcache_sync(arizona->regmap); 705 if (ret != 0) { 706 dev_err(dev, "Failed to sync device: %d\n", ret); 707 goto err_reset; 708 } 709 } 710 711 /* Ensure device startup is complete */ 712 switch (arizona->type) { 713 case WM5102: 714 ret = regmap_read(arizona->regmap, 0x19, &val); 715 if (ret != 0) 716 dev_err(dev, 717 "Failed to check write sequencer state: %d\n", 718 ret); 719 else if (val & 0x01) 720 break; 721 /* Fall through */ 722 default: 723 ret = arizona_wait_for_boot(arizona); 724 if (ret != 0) { 725 dev_err(arizona->dev, 726 "Device failed initial boot: %d\n", ret); 727 goto err_reset; 728 } 729 break; 730 } 731 732 /* Read the device ID information & do device specific stuff */ 733 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 734 if (ret != 0) { 735 dev_err(dev, "Failed to read ID register: %d\n", ret); 736 goto err_reset; 737 } 738 739 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 740 &arizona->rev); 741 if (ret != 0) { 742 dev_err(dev, "Failed to read revision register: %d\n", ret); 743 goto err_reset; 744 } 745 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 746 747 switch (reg) { 748 #ifdef CONFIG_MFD_WM5102 749 case 0x5102: 750 type_name = "WM5102"; 751 if (arizona->type != WM5102) { 752 dev_err(arizona->dev, "WM5102 registered as %d\n", 753 arizona->type); 754 arizona->type = WM5102; 755 } 756 apply_patch = wm5102_patch; 757 arizona->rev &= 0x7; 758 break; 759 #endif 760 #ifdef CONFIG_MFD_WM5110 761 case 0x5110: 762 type_name = "WM5110"; 763 if (arizona->type != WM5110) { 764 dev_err(arizona->dev, "WM5110 registered as %d\n", 765 arizona->type); 766 arizona->type = WM5110; 767 } 768 apply_patch = wm5110_patch; 769 break; 770 #endif 771 default: 772 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 773 goto err_reset; 774 } 775 776 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 777 778 if (apply_patch) { 779 ret = apply_patch(arizona); 780 if (ret != 0) { 781 dev_err(arizona->dev, "Failed to apply patch: %d\n", 782 ret); 783 goto err_reset; 784 } 785 786 switch (arizona->type) { 787 case WM5102: 788 ret = arizona_apply_hardware_patch(arizona); 789 if (ret != 0) { 790 dev_err(arizona->dev, 791 "Failed to apply hardware patch: %d\n", 792 ret); 793 goto err_reset; 794 } 795 break; 796 default: 797 break; 798 } 799 } 800 801 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 802 if (!arizona->pdata.gpio_defaults[i]) 803 continue; 804 805 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 806 arizona->pdata.gpio_defaults[i]); 807 } 808 809 /* 810 * LDO1 can only be used to supply DCVDD so if it has no 811 * consumers then DCVDD is supplied externally. 812 */ 813 if (arizona->pdata.ldo1 && 814 arizona->pdata.ldo1->num_consumer_supplies == 0) 815 arizona->external_dcvdd = true; 816 817 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 818 pm_runtime_use_autosuspend(arizona->dev); 819 pm_runtime_enable(arizona->dev); 820 821 /* Chip default */ 822 if (!arizona->pdata.clk32k_src) 823 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 824 825 switch (arizona->pdata.clk32k_src) { 826 case ARIZONA_32KZ_MCLK1: 827 case ARIZONA_32KZ_MCLK2: 828 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 829 ARIZONA_CLK_32K_SRC_MASK, 830 arizona->pdata.clk32k_src - 1); 831 arizona_clk32k_enable(arizona); 832 break; 833 case ARIZONA_32KZ_NONE: 834 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 835 ARIZONA_CLK_32K_SRC_MASK, 2); 836 break; 837 default: 838 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 839 arizona->pdata.clk32k_src); 840 ret = -EINVAL; 841 goto err_reset; 842 } 843 844 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 845 if (!arizona->pdata.micbias[i].mV && 846 !arizona->pdata.micbias[i].bypass) 847 continue; 848 849 /* Apply default for bypass mode */ 850 if (!arizona->pdata.micbias[i].mV) 851 arizona->pdata.micbias[i].mV = 2800; 852 853 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 854 855 val <<= ARIZONA_MICB1_LVL_SHIFT; 856 857 if (arizona->pdata.micbias[i].ext_cap) 858 val |= ARIZONA_MICB1_EXT_CAP; 859 860 if (arizona->pdata.micbias[i].discharge) 861 val |= ARIZONA_MICB1_DISCH; 862 863 if (arizona->pdata.micbias[i].soft_start) 864 val |= ARIZONA_MICB1_RATE; 865 866 if (arizona->pdata.micbias[i].bypass) 867 val |= ARIZONA_MICB1_BYPASS; 868 869 regmap_update_bits(arizona->regmap, 870 ARIZONA_MIC_BIAS_CTRL_1 + i, 871 ARIZONA_MICB1_LVL_MASK | 872 ARIZONA_MICB1_DISCH | 873 ARIZONA_MICB1_BYPASS | 874 ARIZONA_MICB1_RATE, val); 875 } 876 877 for (i = 0; i < ARIZONA_MAX_INPUT; i++) { 878 /* Default for both is 0 so noop with defaults */ 879 val = arizona->pdata.dmic_ref[i] 880 << ARIZONA_IN1_DMIC_SUP_SHIFT; 881 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; 882 883 regmap_update_bits(arizona->regmap, 884 ARIZONA_IN1L_CONTROL + (i * 8), 885 ARIZONA_IN1_DMIC_SUP_MASK | 886 ARIZONA_IN1_MODE_MASK, val); 887 } 888 889 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { 890 /* Default is 0 so noop with defaults */ 891 if (arizona->pdata.out_mono[i]) 892 val = ARIZONA_OUT1_MONO; 893 else 894 val = 0; 895 896 regmap_update_bits(arizona->regmap, 897 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), 898 ARIZONA_OUT1_MONO, val); 899 } 900 901 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { 902 if (arizona->pdata.spk_mute[i]) 903 regmap_update_bits(arizona->regmap, 904 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), 905 ARIZONA_SPK1_MUTE_ENDIAN_MASK | 906 ARIZONA_SPK1_MUTE_SEQ1_MASK, 907 arizona->pdata.spk_mute[i]); 908 909 if (arizona->pdata.spk_fmt[i]) 910 regmap_update_bits(arizona->regmap, 911 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), 912 ARIZONA_SPK1_FMT_MASK, 913 arizona->pdata.spk_fmt[i]); 914 } 915 916 /* Set up for interrupts */ 917 ret = arizona_irq_init(arizona); 918 if (ret != 0) 919 goto err_reset; 920 921 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 922 arizona_clkgen_err, arizona); 923 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 924 arizona_overclocked, arizona); 925 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 926 arizona_underclocked, arizona); 927 928 switch (arizona->type) { 929 case WM5102: 930 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, 931 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); 932 break; 933 case WM5110: 934 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, 935 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); 936 break; 937 } 938 939 if (ret != 0) { 940 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 941 goto err_irq; 942 } 943 944 #ifdef CONFIG_PM_RUNTIME 945 regulator_disable(arizona->dcvdd); 946 #endif 947 948 return 0; 949 950 err_irq: 951 arizona_irq_exit(arizona); 952 err_reset: 953 if (arizona->pdata.reset) { 954 gpio_set_value_cansleep(arizona->pdata.reset, 0); 955 gpio_free(arizona->pdata.reset); 956 } 957 regulator_disable(arizona->dcvdd); 958 err_enable: 959 regulator_bulk_disable(arizona->num_core_supplies, 960 arizona->core_supplies); 961 err_early: 962 mfd_remove_devices(dev); 963 return ret; 964 } 965 EXPORT_SYMBOL_GPL(arizona_dev_init); 966 967 int arizona_dev_exit(struct arizona *arizona) 968 { 969 mfd_remove_devices(arizona->dev); 970 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 971 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 972 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 973 pm_runtime_disable(arizona->dev); 974 arizona_irq_exit(arizona); 975 if (arizona->pdata.reset) 976 gpio_set_value_cansleep(arizona->pdata.reset, 0); 977 regulator_disable(arizona->dcvdd); 978 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), 979 arizona->core_supplies); 980 return 0; 981 } 982 EXPORT_SYMBOL_GPL(arizona_dev_exit); 983