xref: /openbmc/linux/drivers/mfd/arizona-core.c (revision 6aa7de05)
1 /*
2  * Arizona core driver
3  *
4  * Copyright 2012 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/err.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/mfd/core.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/regmap.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/slab.h>
28 #include <linux/platform_device.h>
29 
30 #include <linux/mfd/arizona/core.h>
31 #include <linux/mfd/arizona/registers.h>
32 
33 #include "arizona.h"
34 
35 static const char * const wm5102_core_supplies[] = {
36 	"AVDD",
37 	"DBVDD1",
38 };
39 
40 int arizona_clk32k_enable(struct arizona *arizona)
41 {
42 	int ret = 0;
43 
44 	mutex_lock(&arizona->clk_lock);
45 
46 	arizona->clk32k_ref++;
47 
48 	if (arizona->clk32k_ref == 1) {
49 		switch (arizona->pdata.clk32k_src) {
50 		case ARIZONA_32KZ_MCLK1:
51 			ret = pm_runtime_get_sync(arizona->dev);
52 			if (ret != 0)
53 				goto err_ref;
54 			ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
55 			if (ret != 0)
56 				goto err_pm;
57 			break;
58 		case ARIZONA_32KZ_MCLK2:
59 			ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
60 			if (ret != 0)
61 				goto err_ref;
62 			break;
63 		}
64 
65 		ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
66 					 ARIZONA_CLK_32K_ENA,
67 					 ARIZONA_CLK_32K_ENA);
68 	}
69 
70 err_pm:
71 	pm_runtime_put_sync(arizona->dev);
72 err_ref:
73 	if (ret != 0)
74 		arizona->clk32k_ref--;
75 
76 	mutex_unlock(&arizona->clk_lock);
77 
78 	return ret;
79 }
80 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
81 
82 int arizona_clk32k_disable(struct arizona *arizona)
83 {
84 	mutex_lock(&arizona->clk_lock);
85 
86 	BUG_ON(arizona->clk32k_ref <= 0);
87 
88 	arizona->clk32k_ref--;
89 
90 	if (arizona->clk32k_ref == 0) {
91 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
92 				   ARIZONA_CLK_32K_ENA, 0);
93 
94 		switch (arizona->pdata.clk32k_src) {
95 		case ARIZONA_32KZ_MCLK1:
96 			pm_runtime_put_sync(arizona->dev);
97 			clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
98 			break;
99 		case ARIZONA_32KZ_MCLK2:
100 			clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
101 			break;
102 		}
103 	}
104 
105 	mutex_unlock(&arizona->clk_lock);
106 
107 	return 0;
108 }
109 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
110 
111 static irqreturn_t arizona_clkgen_err(int irq, void *data)
112 {
113 	struct arizona *arizona = data;
114 
115 	dev_err(arizona->dev, "CLKGEN error\n");
116 
117 	return IRQ_HANDLED;
118 }
119 
120 static irqreturn_t arizona_underclocked(int irq, void *data)
121 {
122 	struct arizona *arizona = data;
123 	unsigned int val;
124 	int ret;
125 
126 	ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
127 			  &val);
128 	if (ret != 0) {
129 		dev_err(arizona->dev, "Failed to read underclock status: %d\n",
130 			ret);
131 		return IRQ_NONE;
132 	}
133 
134 	if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
135 		dev_err(arizona->dev, "AIF3 underclocked\n");
136 	if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
137 		dev_err(arizona->dev, "AIF2 underclocked\n");
138 	if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
139 		dev_err(arizona->dev, "AIF1 underclocked\n");
140 	if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
141 		dev_err(arizona->dev, "ISRC3 underclocked\n");
142 	if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
143 		dev_err(arizona->dev, "ISRC2 underclocked\n");
144 	if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
145 		dev_err(arizona->dev, "ISRC1 underclocked\n");
146 	if (val & ARIZONA_FX_UNDERCLOCKED_STS)
147 		dev_err(arizona->dev, "FX underclocked\n");
148 	if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
149 		dev_err(arizona->dev, "ASRC underclocked\n");
150 	if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
151 		dev_err(arizona->dev, "DAC underclocked\n");
152 	if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
153 		dev_err(arizona->dev, "ADC underclocked\n");
154 	if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
155 		dev_err(arizona->dev, "Mixer dropped sample\n");
156 
157 	return IRQ_HANDLED;
158 }
159 
160 static irqreturn_t arizona_overclocked(int irq, void *data)
161 {
162 	struct arizona *arizona = data;
163 	unsigned int val[3];
164 	int ret;
165 
166 	ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
167 			       &val[0], 3);
168 	if (ret != 0) {
169 		dev_err(arizona->dev, "Failed to read overclock status: %d\n",
170 			ret);
171 		return IRQ_NONE;
172 	}
173 
174 	switch (arizona->type) {
175 	case WM8998:
176 	case WM1814:
177 		/* Some bits are shifted on WM8998,
178 		 * rearrange to match the standard bit layout
179 		 */
180 		val[0] = ((val[0] & 0x60e0) >> 1) |
181 			 ((val[0] & 0x1e00) >> 2) |
182 			 (val[0] & 0x000f);
183 		break;
184 	default:
185 		break;
186 	}
187 
188 	if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
189 		dev_err(arizona->dev, "PWM overclocked\n");
190 	if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
191 		dev_err(arizona->dev, "FX core overclocked\n");
192 	if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
193 		dev_err(arizona->dev, "DAC SYS overclocked\n");
194 	if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
195 		dev_err(arizona->dev, "DAC WARP overclocked\n");
196 	if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
197 		dev_err(arizona->dev, "ADC overclocked\n");
198 	if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
199 		dev_err(arizona->dev, "Mixer overclocked\n");
200 	if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
201 		dev_err(arizona->dev, "AIF3 overclocked\n");
202 	if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
203 		dev_err(arizona->dev, "AIF2 overclocked\n");
204 	if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
205 		dev_err(arizona->dev, "AIF1 overclocked\n");
206 	if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
207 		dev_err(arizona->dev, "Pad control overclocked\n");
208 
209 	if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
210 		dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
211 	if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
212 		dev_err(arizona->dev, "Slimbus async overclocked\n");
213 	if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
214 		dev_err(arizona->dev, "Slimbus sync overclocked\n");
215 	if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
216 		dev_err(arizona->dev, "ASRC async system overclocked\n");
217 	if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
218 		dev_err(arizona->dev, "ASRC async WARP overclocked\n");
219 	if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
220 		dev_err(arizona->dev, "ASRC sync system overclocked\n");
221 	if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
222 		dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
223 	if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
224 		dev_err(arizona->dev, "DSP1 overclocked\n");
225 	if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
226 		dev_err(arizona->dev, "ISRC3 overclocked\n");
227 	if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
228 		dev_err(arizona->dev, "ISRC2 overclocked\n");
229 	if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
230 		dev_err(arizona->dev, "ISRC1 overclocked\n");
231 
232 	if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
233 		dev_err(arizona->dev, "SPDIF overclocked\n");
234 
235 	return IRQ_HANDLED;
236 }
237 
238 #define ARIZONA_REG_POLL_DELAY_US 7500
239 
240 static int arizona_poll_reg(struct arizona *arizona,
241 			    int timeout_ms, unsigned int reg,
242 			    unsigned int mask, unsigned int target)
243 {
244 	unsigned int val = 0;
245 	int ret;
246 
247 	ret = regmap_read_poll_timeout(arizona->regmap,
248 				       reg, val, ((val & mask) == target),
249 				       ARIZONA_REG_POLL_DELAY_US,
250 				       timeout_ms * 1000);
251 	if (ret)
252 		dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n",
253 			reg, val);
254 
255 	return ret;
256 }
257 
258 static int arizona_wait_for_boot(struct arizona *arizona)
259 {
260 	int ret;
261 
262 	/*
263 	 * We can't use an interrupt as we need to runtime resume to do so,
264 	 * we won't race with the interrupt handler as it'll be blocked on
265 	 * runtime resume.
266 	 */
267 	ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
268 			       ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
269 
270 	if (!ret)
271 		regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
272 			     ARIZONA_BOOT_DONE_STS);
273 
274 	pm_runtime_mark_last_busy(arizona->dev);
275 
276 	return ret;
277 }
278 
279 static inline void arizona_enable_reset(struct arizona *arizona)
280 {
281 	if (arizona->pdata.reset)
282 		gpio_set_value_cansleep(arizona->pdata.reset, 0);
283 }
284 
285 static void arizona_disable_reset(struct arizona *arizona)
286 {
287 	if (arizona->pdata.reset) {
288 		switch (arizona->type) {
289 		case WM5110:
290 		case WM8280:
291 			/* Meet requirements for minimum reset duration */
292 			usleep_range(5000, 10000);
293 			break;
294 		default:
295 			break;
296 		}
297 
298 		gpio_set_value_cansleep(arizona->pdata.reset, 1);
299 		usleep_range(1000, 5000);
300 	}
301 }
302 
303 struct arizona_sysclk_state {
304 	unsigned int fll;
305 	unsigned int sysclk;
306 };
307 
308 static int arizona_enable_freerun_sysclk(struct arizona *arizona,
309 					 struct arizona_sysclk_state *state)
310 {
311 	int ret, err;
312 
313 	/* Cache existing FLL and SYSCLK settings */
314 	ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
315 	if (ret) {
316 		dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
317 			ret);
318 		return ret;
319 	}
320 	ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
321 			  &state->sysclk);
322 	if (ret) {
323 		dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
324 			ret);
325 		return ret;
326 	}
327 
328 	/* Start up SYSCLK using the FLL in free running mode */
329 	ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
330 			ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
331 	if (ret) {
332 		dev_err(arizona->dev,
333 			"Failed to start FLL in freerunning mode: %d\n",
334 			ret);
335 		return ret;
336 	}
337 	ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
338 			       ARIZONA_FLL1_CLOCK_OK_STS,
339 			       ARIZONA_FLL1_CLOCK_OK_STS);
340 	if (ret)
341 		goto err_fll;
342 
343 	ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
344 	if (ret) {
345 		dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
346 		goto err_fll;
347 	}
348 
349 	return 0;
350 
351 err_fll:
352 	err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
353 	if (err)
354 		dev_err(arizona->dev,
355 			"Failed to re-apply old FLL settings: %d\n", err);
356 
357 	return ret;
358 }
359 
360 static int arizona_disable_freerun_sysclk(struct arizona *arizona,
361 					  struct arizona_sysclk_state *state)
362 {
363 	int ret;
364 
365 	ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
366 			   state->sysclk);
367 	if (ret) {
368 		dev_err(arizona->dev,
369 			"Failed to re-apply old SYSCLK settings: %d\n", ret);
370 		return ret;
371 	}
372 
373 	ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
374 	if (ret) {
375 		dev_err(arizona->dev,
376 			"Failed to re-apply old FLL settings: %d\n", ret);
377 		return ret;
378 	}
379 
380 	return 0;
381 }
382 
383 static int wm5102_apply_hardware_patch(struct arizona *arizona)
384 {
385 	struct arizona_sysclk_state state;
386 	int err, ret;
387 
388 	ret = arizona_enable_freerun_sysclk(arizona, &state);
389 	if (ret)
390 		return ret;
391 
392 	/* Start the write sequencer and wait for it to finish */
393 	ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
394 			   ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
395 	if (ret) {
396 		dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
397 			ret);
398 		goto err;
399 	}
400 
401 	ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
402 			       ARIZONA_WSEQ_BUSY, 0);
403 	if (ret)
404 		regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
405 			     ARIZONA_WSEQ_ABORT);
406 
407 err:
408 	err = arizona_disable_freerun_sysclk(arizona, &state);
409 
410 	return ret ?: err;
411 }
412 
413 /*
414  * Register patch to some of the CODECs internal write sequences
415  * to ensure a clean exit from the low power sleep state.
416  */
417 static const struct reg_sequence wm5110_sleep_patch[] = {
418 	{ 0x337A, 0xC100 },
419 	{ 0x337B, 0x0041 },
420 	{ 0x3300, 0xA210 },
421 	{ 0x3301, 0x050C },
422 };
423 
424 static int wm5110_apply_sleep_patch(struct arizona *arizona)
425 {
426 	struct arizona_sysclk_state state;
427 	int err, ret;
428 
429 	ret = arizona_enable_freerun_sysclk(arizona, &state);
430 	if (ret)
431 		return ret;
432 
433 	ret = regmap_multi_reg_write_bypassed(arizona->regmap,
434 					      wm5110_sleep_patch,
435 					      ARRAY_SIZE(wm5110_sleep_patch));
436 
437 	err = arizona_disable_freerun_sysclk(arizona, &state);
438 
439 	return ret ?: err;
440 }
441 
442 static int wm5102_clear_write_sequencer(struct arizona *arizona)
443 {
444 	int ret;
445 
446 	ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
447 			   0x0);
448 	if (ret) {
449 		dev_err(arizona->dev,
450 			"Failed to clear write sequencer state: %d\n", ret);
451 		return ret;
452 	}
453 
454 	arizona_enable_reset(arizona);
455 	regulator_disable(arizona->dcvdd);
456 
457 	msleep(20);
458 
459 	ret = regulator_enable(arizona->dcvdd);
460 	if (ret) {
461 		dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
462 		return ret;
463 	}
464 	arizona_disable_reset(arizona);
465 
466 	return 0;
467 }
468 
469 #ifdef CONFIG_PM
470 static int arizona_isolate_dcvdd(struct arizona *arizona)
471 {
472 	int ret;
473 
474 	ret = regmap_update_bits(arizona->regmap,
475 				 ARIZONA_ISOLATION_CONTROL,
476 				 ARIZONA_ISOLATE_DCVDD1,
477 				 ARIZONA_ISOLATE_DCVDD1);
478 	if (ret != 0)
479 		dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
480 
481 	return ret;
482 }
483 
484 static int arizona_connect_dcvdd(struct arizona *arizona)
485 {
486 	int ret;
487 
488 	ret = regmap_update_bits(arizona->regmap,
489 				 ARIZONA_ISOLATION_CONTROL,
490 				 ARIZONA_ISOLATE_DCVDD1, 0);
491 	if (ret != 0)
492 		dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
493 
494 	return ret;
495 }
496 
497 static int arizona_is_jack_det_active(struct arizona *arizona)
498 {
499 	unsigned int val;
500 	int ret;
501 
502 	ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
503 	if (ret) {
504 		dev_err(arizona->dev,
505 			"Failed to check jack det status: %d\n", ret);
506 		return ret;
507 	} else if (val & ARIZONA_JD1_ENA) {
508 		return 1;
509 	} else {
510 		return 0;
511 	}
512 }
513 
514 static int arizona_runtime_resume(struct device *dev)
515 {
516 	struct arizona *arizona = dev_get_drvdata(dev);
517 	int ret;
518 
519 	dev_dbg(arizona->dev, "Leaving AoD mode\n");
520 
521 	if (arizona->has_fully_powered_off) {
522 		dev_dbg(arizona->dev, "Re-enabling core supplies\n");
523 
524 		ret = regulator_bulk_enable(arizona->num_core_supplies,
525 					    arizona->core_supplies);
526 		if (ret) {
527 			dev_err(dev, "Failed to enable core supplies: %d\n",
528 				ret);
529 			return ret;
530 		}
531 	}
532 
533 	ret = regulator_enable(arizona->dcvdd);
534 	if (ret != 0) {
535 		dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
536 		if (arizona->has_fully_powered_off)
537 			regulator_bulk_disable(arizona->num_core_supplies,
538 					       arizona->core_supplies);
539 		return ret;
540 	}
541 
542 	if (arizona->has_fully_powered_off) {
543 		arizona_disable_reset(arizona);
544 		enable_irq(arizona->irq);
545 		arizona->has_fully_powered_off = false;
546 	}
547 
548 	regcache_cache_only(arizona->regmap, false);
549 
550 	switch (arizona->type) {
551 	case WM5102:
552 		if (arizona->external_dcvdd) {
553 			ret = arizona_connect_dcvdd(arizona);
554 			if (ret != 0)
555 				goto err;
556 		}
557 
558 		ret = wm5102_patch(arizona);
559 		if (ret != 0) {
560 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
561 				ret);
562 			goto err;
563 		}
564 
565 		ret = wm5102_apply_hardware_patch(arizona);
566 		if (ret) {
567 			dev_err(arizona->dev,
568 				"Failed to apply hardware patch: %d\n",
569 				ret);
570 			goto err;
571 		}
572 		break;
573 	case WM5110:
574 	case WM8280:
575 		ret = arizona_wait_for_boot(arizona);
576 		if (ret)
577 			goto err;
578 
579 		if (arizona->external_dcvdd) {
580 			ret = arizona_connect_dcvdd(arizona);
581 			if (ret != 0)
582 				goto err;
583 		} else {
584 			/*
585 			 * As this is only called for the internal regulator
586 			 * (where we know voltage ranges available) it is ok
587 			 * to request an exact range.
588 			 */
589 			ret = regulator_set_voltage(arizona->dcvdd,
590 						    1200000, 1200000);
591 			if (ret < 0) {
592 				dev_err(arizona->dev,
593 					"Failed to set resume voltage: %d\n",
594 					ret);
595 				goto err;
596 			}
597 		}
598 
599 		ret = wm5110_apply_sleep_patch(arizona);
600 		if (ret) {
601 			dev_err(arizona->dev,
602 				"Failed to re-apply sleep patch: %d\n",
603 				ret);
604 			goto err;
605 		}
606 		break;
607 	case WM1831:
608 	case CS47L24:
609 		ret = arizona_wait_for_boot(arizona);
610 		if (ret != 0)
611 			goto err;
612 		break;
613 	default:
614 		ret = arizona_wait_for_boot(arizona);
615 		if (ret != 0)
616 			goto err;
617 
618 		if (arizona->external_dcvdd) {
619 			ret = arizona_connect_dcvdd(arizona);
620 			if (ret != 0)
621 				goto err;
622 		}
623 		break;
624 	}
625 
626 	ret = regcache_sync(arizona->regmap);
627 	if (ret != 0) {
628 		dev_err(arizona->dev, "Failed to restore register cache\n");
629 		goto err;
630 	}
631 
632 	return 0;
633 
634 err:
635 	regcache_cache_only(arizona->regmap, true);
636 	regulator_disable(arizona->dcvdd);
637 	return ret;
638 }
639 
640 static int arizona_runtime_suspend(struct device *dev)
641 {
642 	struct arizona *arizona = dev_get_drvdata(dev);
643 	int jd_active = 0;
644 	int ret;
645 
646 	dev_dbg(arizona->dev, "Entering AoD mode\n");
647 
648 	switch (arizona->type) {
649 	case WM5110:
650 	case WM8280:
651 		jd_active = arizona_is_jack_det_active(arizona);
652 		if (jd_active < 0)
653 			return jd_active;
654 
655 		if (arizona->external_dcvdd) {
656 			ret = arizona_isolate_dcvdd(arizona);
657 			if (ret != 0)
658 				return ret;
659 		} else {
660 			/*
661 			 * As this is only called for the internal regulator
662 			 * (where we know voltage ranges available) it is ok
663 			 * to request an exact range.
664 			 */
665 			ret = regulator_set_voltage(arizona->dcvdd,
666 						    1175000, 1175000);
667 			if (ret < 0) {
668 				dev_err(arizona->dev,
669 					"Failed to set suspend voltage: %d\n",
670 					ret);
671 				return ret;
672 			}
673 		}
674 		break;
675 	case WM5102:
676 		jd_active = arizona_is_jack_det_active(arizona);
677 		if (jd_active < 0)
678 			return jd_active;
679 
680 		if (arizona->external_dcvdd) {
681 			ret = arizona_isolate_dcvdd(arizona);
682 			if (ret != 0)
683 				return ret;
684 		}
685 
686 		if (!jd_active) {
687 			ret = regmap_write(arizona->regmap,
688 					   ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
689 			if (ret) {
690 				dev_err(arizona->dev,
691 					"Failed to clear write sequencer: %d\n",
692 					ret);
693 				return ret;
694 			}
695 		}
696 		break;
697 	case WM1831:
698 	case CS47L24:
699 		break;
700 	default:
701 		jd_active = arizona_is_jack_det_active(arizona);
702 		if (jd_active < 0)
703 			return jd_active;
704 
705 		if (arizona->external_dcvdd) {
706 			ret = arizona_isolate_dcvdd(arizona);
707 			if (ret != 0)
708 				return ret;
709 		}
710 		break;
711 	}
712 
713 	regcache_cache_only(arizona->regmap, true);
714 	regcache_mark_dirty(arizona->regmap);
715 	regulator_disable(arizona->dcvdd);
716 
717 	/* Allow us to completely power down if no jack detection */
718 	if (!jd_active) {
719 		dev_dbg(arizona->dev, "Fully powering off\n");
720 
721 		arizona->has_fully_powered_off = true;
722 
723 		disable_irq_nosync(arizona->irq);
724 		arizona_enable_reset(arizona);
725 		regulator_bulk_disable(arizona->num_core_supplies,
726 				       arizona->core_supplies);
727 	}
728 
729 	return 0;
730 }
731 #endif
732 
733 #ifdef CONFIG_PM_SLEEP
734 static int arizona_suspend(struct device *dev)
735 {
736 	struct arizona *arizona = dev_get_drvdata(dev);
737 
738 	dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
739 	disable_irq(arizona->irq);
740 
741 	return 0;
742 }
743 
744 static int arizona_suspend_noirq(struct device *dev)
745 {
746 	struct arizona *arizona = dev_get_drvdata(dev);
747 
748 	dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
749 	enable_irq(arizona->irq);
750 
751 	return 0;
752 }
753 
754 static int arizona_resume_noirq(struct device *dev)
755 {
756 	struct arizona *arizona = dev_get_drvdata(dev);
757 
758 	dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
759 	disable_irq(arizona->irq);
760 
761 	return 0;
762 }
763 
764 static int arizona_resume(struct device *dev)
765 {
766 	struct arizona *arizona = dev_get_drvdata(dev);
767 
768 	dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
769 	enable_irq(arizona->irq);
770 
771 	return 0;
772 }
773 #endif
774 
775 const struct dev_pm_ops arizona_pm_ops = {
776 	SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
777 			   arizona_runtime_resume,
778 			   NULL)
779 	SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
780 	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
781 				      arizona_resume_noirq)
782 };
783 EXPORT_SYMBOL_GPL(arizona_pm_ops);
784 
785 #ifdef CONFIG_OF
786 unsigned long arizona_of_get_type(struct device *dev)
787 {
788 	const struct of_device_id *id = of_match_device(arizona_of_match, dev);
789 
790 	if (id)
791 		return (unsigned long)id->data;
792 	else
793 		return 0;
794 }
795 EXPORT_SYMBOL_GPL(arizona_of_get_type);
796 
797 static int arizona_of_get_core_pdata(struct arizona *arizona)
798 {
799 	struct arizona_pdata *pdata = &arizona->pdata;
800 	struct property *prop;
801 	const __be32 *cur;
802 	u32 val;
803 	u32 pdm_val[ARIZONA_MAX_PDM_SPK];
804 	int ret, i;
805 	int count = 0;
806 
807 	pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0);
808 	if (pdata->reset == -EPROBE_DEFER) {
809 		return pdata->reset;
810 	} else if (pdata->reset < 0) {
811 		dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n",
812 			pdata->reset);
813 
814 		pdata->reset = 0;
815 	}
816 
817 	ret = of_property_read_u32_array(arizona->dev->of_node,
818 					 "wlf,gpio-defaults",
819 					 pdata->gpio_defaults,
820 					 ARRAY_SIZE(pdata->gpio_defaults));
821 	if (ret >= 0) {
822 		/*
823 		 * All values are literal except out of range values
824 		 * which are chip default, translate into platform
825 		 * data which uses 0 as chip default and out of range
826 		 * as zero.
827 		 */
828 		for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
829 			if (pdata->gpio_defaults[i] > 0xffff)
830 				pdata->gpio_defaults[i] = 0;
831 			else if (pdata->gpio_defaults[i] == 0)
832 				pdata->gpio_defaults[i] = 0x10000;
833 		}
834 	} else {
835 		dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
836 			ret);
837 	}
838 
839 	of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
840 				 cur, val) {
841 		if (count == ARRAY_SIZE(pdata->inmode))
842 			break;
843 
844 		pdata->inmode[count] = val;
845 		count++;
846 	}
847 
848 	count = 0;
849 	of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
850 				 cur, val) {
851 		if (count == ARRAY_SIZE(pdata->dmic_ref))
852 			break;
853 
854 		pdata->dmic_ref[count] = val;
855 		count++;
856 	}
857 
858 	count = 0;
859 	of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop,
860 				 cur, val) {
861 		if (count == ARRAY_SIZE(pdata->out_mono))
862 			break;
863 
864 		pdata->out_mono[count] = !!val;
865 		count++;
866 	}
867 
868 	count = 0;
869 	of_property_for_each_u32(arizona->dev->of_node,
870 				 "wlf,max-channels-clocked",
871 				 prop, cur, val) {
872 		if (count == ARRAY_SIZE(pdata->max_channels_clocked))
873 			break;
874 
875 		pdata->max_channels_clocked[count] = val;
876 		count++;
877 	}
878 
879 	ret = of_property_read_u32_array(arizona->dev->of_node,
880 					 "wlf,spk-fmt",
881 					 pdm_val,
882 					 ARRAY_SIZE(pdm_val));
883 
884 	if (ret >= 0)
885 		for (count = 0; count < ARRAY_SIZE(pdata->spk_fmt); ++count)
886 			pdata->spk_fmt[count] = pdm_val[count];
887 
888 	ret = of_property_read_u32_array(arizona->dev->of_node,
889 					 "wlf,spk-mute",
890 					 pdm_val,
891 					 ARRAY_SIZE(pdm_val));
892 
893 	if (ret >= 0)
894 		for (count = 0; count < ARRAY_SIZE(pdata->spk_mute); ++count)
895 			pdata->spk_mute[count] = pdm_val[count];
896 
897 	return 0;
898 }
899 
900 const struct of_device_id arizona_of_match[] = {
901 	{ .compatible = "wlf,wm5102", .data = (void *)WM5102 },
902 	{ .compatible = "wlf,wm5110", .data = (void *)WM5110 },
903 	{ .compatible = "wlf,wm8280", .data = (void *)WM8280 },
904 	{ .compatible = "wlf,wm8997", .data = (void *)WM8997 },
905 	{ .compatible = "wlf,wm8998", .data = (void *)WM8998 },
906 	{ .compatible = "wlf,wm1814", .data = (void *)WM1814 },
907 	{ .compatible = "wlf,wm1831", .data = (void *)WM1831 },
908 	{ .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
909 	{},
910 };
911 EXPORT_SYMBOL_GPL(arizona_of_match);
912 #else
913 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
914 {
915 	return 0;
916 }
917 #endif
918 
919 static const struct mfd_cell early_devs[] = {
920 	{ .name = "arizona-ldo1" },
921 };
922 
923 static const char * const wm5102_supplies[] = {
924 	"MICVDD",
925 	"DBVDD2",
926 	"DBVDD3",
927 	"CPVDD",
928 	"SPKVDDL",
929 	"SPKVDDR",
930 };
931 
932 static const struct mfd_cell wm5102_devs[] = {
933 	{ .name = "arizona-micsupp" },
934 	{ .name = "arizona-gpio" },
935 	{
936 		.name = "arizona-extcon",
937 		.parent_supplies = wm5102_supplies,
938 		.num_parent_supplies = 1, /* We only need MICVDD */
939 	},
940 	{ .name = "arizona-haptics" },
941 	{ .name = "arizona-pwm" },
942 	{
943 		.name = "wm5102-codec",
944 		.parent_supplies = wm5102_supplies,
945 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
946 	},
947 };
948 
949 static const struct mfd_cell wm5110_devs[] = {
950 	{ .name = "arizona-micsupp" },
951 	{ .name = "arizona-gpio" },
952 	{
953 		.name = "arizona-extcon",
954 		.parent_supplies = wm5102_supplies,
955 		.num_parent_supplies = 1, /* We only need MICVDD */
956 	},
957 	{ .name = "arizona-haptics" },
958 	{ .name = "arizona-pwm" },
959 	{
960 		.name = "wm5110-codec",
961 		.parent_supplies = wm5102_supplies,
962 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
963 	},
964 };
965 
966 static const char * const cs47l24_supplies[] = {
967 	"MICVDD",
968 	"CPVDD",
969 	"SPKVDD",
970 };
971 
972 static const struct mfd_cell cs47l24_devs[] = {
973 	{ .name = "arizona-gpio" },
974 	{ .name = "arizona-haptics" },
975 	{ .name = "arizona-pwm" },
976 	{
977 		.name = "cs47l24-codec",
978 		.parent_supplies = cs47l24_supplies,
979 		.num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
980 	},
981 };
982 
983 static const char * const wm8997_supplies[] = {
984 	"MICVDD",
985 	"DBVDD2",
986 	"CPVDD",
987 	"SPKVDD",
988 };
989 
990 static const struct mfd_cell wm8997_devs[] = {
991 	{ .name = "arizona-micsupp" },
992 	{ .name = "arizona-gpio" },
993 	{
994 		.name = "arizona-extcon",
995 		.parent_supplies = wm8997_supplies,
996 		.num_parent_supplies = 1, /* We only need MICVDD */
997 	},
998 	{ .name = "arizona-haptics" },
999 	{ .name = "arizona-pwm" },
1000 	{
1001 		.name = "wm8997-codec",
1002 		.parent_supplies = wm8997_supplies,
1003 		.num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
1004 	},
1005 };
1006 
1007 static const struct mfd_cell wm8998_devs[] = {
1008 	{ .name = "arizona-micsupp" },
1009 	{ .name = "arizona-gpio" },
1010 	{
1011 		.name = "arizona-extcon",
1012 		.parent_supplies = wm5102_supplies,
1013 		.num_parent_supplies = 1, /* We only need MICVDD */
1014 	},
1015 	{ .name = "arizona-haptics" },
1016 	{ .name = "arizona-pwm" },
1017 	{
1018 		.name = "wm8998-codec",
1019 		.parent_supplies = wm5102_supplies,
1020 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
1021 	},
1022 };
1023 
1024 int arizona_dev_init(struct arizona *arizona)
1025 {
1026 	const char * const mclk_name[] = { "mclk1", "mclk2" };
1027 	struct device *dev = arizona->dev;
1028 	const char *type_name = NULL;
1029 	unsigned int reg, val, mask;
1030 	int (*apply_patch)(struct arizona *) = NULL;
1031 	const struct mfd_cell *subdevs = NULL;
1032 	int n_subdevs, ret, i;
1033 
1034 	dev_set_drvdata(arizona->dev, arizona);
1035 	mutex_init(&arizona->clk_lock);
1036 
1037 	if (dev_get_platdata(arizona->dev)) {
1038 		memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
1039 		       sizeof(arizona->pdata));
1040 	} else {
1041 		ret = arizona_of_get_core_pdata(arizona);
1042 		if (ret < 0)
1043 			return ret;
1044 	}
1045 
1046 	BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
1047 	for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
1048 		arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
1049 		if (IS_ERR(arizona->mclk[i])) {
1050 			dev_info(arizona->dev, "Failed to get %s: %ld\n",
1051 				 mclk_name[i], PTR_ERR(arizona->mclk[i]));
1052 			arizona->mclk[i] = NULL;
1053 		}
1054 	}
1055 
1056 	regcache_cache_only(arizona->regmap, true);
1057 
1058 	switch (arizona->type) {
1059 	case WM5102:
1060 	case WM5110:
1061 	case WM8280:
1062 	case WM8997:
1063 	case WM8998:
1064 	case WM1814:
1065 	case WM1831:
1066 	case CS47L24:
1067 		for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
1068 			arizona->core_supplies[i].supply
1069 				= wm5102_core_supplies[i];
1070 		arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
1071 		break;
1072 	default:
1073 		dev_err(arizona->dev, "Unknown device type %d\n",
1074 			arizona->type);
1075 		return -ENODEV;
1076 	}
1077 
1078 	/* Mark DCVDD as external, LDO1 driver will clear if internal */
1079 	arizona->external_dcvdd = true;
1080 
1081 	switch (arizona->type) {
1082 	case WM1831:
1083 	case CS47L24:
1084 		break; /* No LDO1 regulator */
1085 	default:
1086 		ret = mfd_add_devices(arizona->dev, -1, early_devs,
1087 				      ARRAY_SIZE(early_devs), NULL, 0, NULL);
1088 		if (ret != 0) {
1089 			dev_err(dev, "Failed to add early children: %d\n", ret);
1090 			return ret;
1091 		}
1092 		break;
1093 	}
1094 
1095 	ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1096 				      arizona->core_supplies);
1097 	if (ret != 0) {
1098 		dev_err(dev, "Failed to request core supplies: %d\n",
1099 			ret);
1100 		goto err_early;
1101 	}
1102 
1103 	/**
1104 	 * Don't use devres here because the only device we have to get
1105 	 * against is the MFD device and DCVDD will likely be supplied by
1106 	 * one of its children. Meaning that the regulator will be
1107 	 * destroyed by the time devres calls regulator put.
1108 	 */
1109 	arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
1110 	if (IS_ERR(arizona->dcvdd)) {
1111 		ret = PTR_ERR(arizona->dcvdd);
1112 		dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1113 		goto err_early;
1114 	}
1115 
1116 	if (arizona->pdata.reset) {
1117 		/* Start out with /RESET low to put the chip into reset */
1118 		ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
1119 					    GPIOF_DIR_OUT | GPIOF_INIT_LOW,
1120 					    "arizona /RESET");
1121 		if (ret != 0) {
1122 			dev_err(dev, "Failed to request /RESET: %d\n", ret);
1123 			goto err_dcvdd;
1124 		}
1125 	}
1126 
1127 	ret = regulator_bulk_enable(arizona->num_core_supplies,
1128 				    arizona->core_supplies);
1129 	if (ret != 0) {
1130 		dev_err(dev, "Failed to enable core supplies: %d\n",
1131 			ret);
1132 		goto err_dcvdd;
1133 	}
1134 
1135 	ret = regulator_enable(arizona->dcvdd);
1136 	if (ret != 0) {
1137 		dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1138 		goto err_enable;
1139 	}
1140 
1141 	arizona_disable_reset(arizona);
1142 
1143 	regcache_cache_only(arizona->regmap, false);
1144 
1145 	/* Verify that this is a chip we know about */
1146 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1147 	if (ret != 0) {
1148 		dev_err(dev, "Failed to read ID register: %d\n", ret);
1149 		goto err_reset;
1150 	}
1151 
1152 	switch (reg) {
1153 	case 0x5102:
1154 	case 0x5110:
1155 	case 0x6349:
1156 	case 0x6363:
1157 	case 0x8997:
1158 		break;
1159 	default:
1160 		dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1161 		ret = -ENODEV;
1162 		goto err_reset;
1163 	}
1164 
1165 	/* If we have a /RESET GPIO we'll already be reset */
1166 	if (!arizona->pdata.reset) {
1167 		ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1168 		if (ret != 0) {
1169 			dev_err(dev, "Failed to reset device: %d\n", ret);
1170 			goto err_reset;
1171 		}
1172 
1173 		usleep_range(1000, 5000);
1174 	}
1175 
1176 	/* Ensure device startup is complete */
1177 	switch (arizona->type) {
1178 	case WM5102:
1179 		ret = regmap_read(arizona->regmap,
1180 				  ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1181 		if (ret) {
1182 			dev_err(dev,
1183 				"Failed to check write sequencer state: %d\n",
1184 				ret);
1185 		} else if (val & 0x01) {
1186 			ret = wm5102_clear_write_sequencer(arizona);
1187 			if (ret)
1188 				return ret;
1189 		}
1190 		break;
1191 	default:
1192 		break;
1193 	}
1194 
1195 	ret = arizona_wait_for_boot(arizona);
1196 	if (ret) {
1197 		dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1198 		goto err_reset;
1199 	}
1200 
1201 	/* Read the device ID information & do device specific stuff */
1202 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1203 	if (ret != 0) {
1204 		dev_err(dev, "Failed to read ID register: %d\n", ret);
1205 		goto err_reset;
1206 	}
1207 
1208 	ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1209 			  &arizona->rev);
1210 	if (ret != 0) {
1211 		dev_err(dev, "Failed to read revision register: %d\n", ret);
1212 		goto err_reset;
1213 	}
1214 	arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1215 
1216 	switch (reg) {
1217 	case 0x5102:
1218 		if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1219 			type_name = "WM5102";
1220 			if (arizona->type != WM5102) {
1221 				dev_warn(arizona->dev,
1222 					 "WM5102 registered as %d\n",
1223 					 arizona->type);
1224 				arizona->type = WM5102;
1225 			}
1226 
1227 			apply_patch = wm5102_patch;
1228 			arizona->rev &= 0x7;
1229 			subdevs = wm5102_devs;
1230 			n_subdevs = ARRAY_SIZE(wm5102_devs);
1231 		}
1232 		break;
1233 	case 0x5110:
1234 		if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1235 			switch (arizona->type) {
1236 			case WM5110:
1237 				type_name = "WM5110";
1238 				break;
1239 			case WM8280:
1240 				type_name = "WM8280";
1241 				break;
1242 			default:
1243 				type_name = "WM5110";
1244 				dev_warn(arizona->dev,
1245 					 "WM5110 registered as %d\n",
1246 					 arizona->type);
1247 				arizona->type = WM5110;
1248 				break;
1249 			}
1250 
1251 			apply_patch = wm5110_patch;
1252 			subdevs = wm5110_devs;
1253 			n_subdevs = ARRAY_SIZE(wm5110_devs);
1254 		}
1255 		break;
1256 	case 0x6363:
1257 		if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
1258 			switch (arizona->type) {
1259 			case CS47L24:
1260 				type_name = "CS47L24";
1261 				break;
1262 
1263 			case WM1831:
1264 				type_name = "WM1831";
1265 				break;
1266 
1267 			default:
1268 				dev_warn(arizona->dev,
1269 					 "CS47L24 registered as %d\n",
1270 					 arizona->type);
1271 				arizona->type = CS47L24;
1272 				break;
1273 			}
1274 
1275 			apply_patch = cs47l24_patch;
1276 			subdevs = cs47l24_devs;
1277 			n_subdevs = ARRAY_SIZE(cs47l24_devs);
1278 		}
1279 		break;
1280 	case 0x8997:
1281 		if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1282 			type_name = "WM8997";
1283 			if (arizona->type != WM8997) {
1284 				dev_warn(arizona->dev,
1285 					 "WM8997 registered as %d\n",
1286 					 arizona->type);
1287 				arizona->type = WM8997;
1288 			}
1289 
1290 			apply_patch = wm8997_patch;
1291 			subdevs = wm8997_devs;
1292 			n_subdevs = ARRAY_SIZE(wm8997_devs);
1293 		}
1294 		break;
1295 	case 0x6349:
1296 		if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1297 			switch (arizona->type) {
1298 			case WM8998:
1299 				type_name = "WM8998";
1300 				break;
1301 
1302 			case WM1814:
1303 				type_name = "WM1814";
1304 				break;
1305 
1306 			default:
1307 				type_name = "WM8998";
1308 				dev_warn(arizona->dev,
1309 					 "WM8998 registered as %d\n",
1310 					 arizona->type);
1311 				arizona->type = WM8998;
1312 			}
1313 
1314 			apply_patch = wm8998_patch;
1315 			subdevs = wm8998_devs;
1316 			n_subdevs = ARRAY_SIZE(wm8998_devs);
1317 		}
1318 		break;
1319 	default:
1320 		dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1321 		ret = -ENODEV;
1322 		goto err_reset;
1323 	}
1324 
1325 	if (!subdevs) {
1326 		dev_err(arizona->dev,
1327 			"No kernel support for device ID %x\n", reg);
1328 		ret = -ENODEV;
1329 		goto err_reset;
1330 	}
1331 
1332 	dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1333 
1334 	if (apply_patch) {
1335 		ret = apply_patch(arizona);
1336 		if (ret != 0) {
1337 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
1338 				ret);
1339 			goto err_reset;
1340 		}
1341 
1342 		switch (arizona->type) {
1343 		case WM5102:
1344 			ret = wm5102_apply_hardware_patch(arizona);
1345 			if (ret) {
1346 				dev_err(arizona->dev,
1347 					"Failed to apply hardware patch: %d\n",
1348 					ret);
1349 				goto err_reset;
1350 			}
1351 			break;
1352 		case WM5110:
1353 		case WM8280:
1354 			ret = wm5110_apply_sleep_patch(arizona);
1355 			if (ret) {
1356 				dev_err(arizona->dev,
1357 					"Failed to apply sleep patch: %d\n",
1358 					ret);
1359 				goto err_reset;
1360 			}
1361 			break;
1362 		default:
1363 			break;
1364 		}
1365 	}
1366 
1367 	for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1368 		if (!arizona->pdata.gpio_defaults[i])
1369 			continue;
1370 
1371 		regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1372 			     arizona->pdata.gpio_defaults[i]);
1373 	}
1374 
1375 	/* Chip default */
1376 	if (!arizona->pdata.clk32k_src)
1377 		arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1378 
1379 	switch (arizona->pdata.clk32k_src) {
1380 	case ARIZONA_32KZ_MCLK1:
1381 	case ARIZONA_32KZ_MCLK2:
1382 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1383 				   ARIZONA_CLK_32K_SRC_MASK,
1384 				   arizona->pdata.clk32k_src - 1);
1385 		arizona_clk32k_enable(arizona);
1386 		break;
1387 	case ARIZONA_32KZ_NONE:
1388 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1389 				   ARIZONA_CLK_32K_SRC_MASK, 2);
1390 		break;
1391 	default:
1392 		dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1393 			arizona->pdata.clk32k_src);
1394 		ret = -EINVAL;
1395 		goto err_reset;
1396 	}
1397 
1398 	for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1399 		if (!arizona->pdata.micbias[i].mV &&
1400 		    !arizona->pdata.micbias[i].bypass)
1401 			continue;
1402 
1403 		/* Apply default for bypass mode */
1404 		if (!arizona->pdata.micbias[i].mV)
1405 			arizona->pdata.micbias[i].mV = 2800;
1406 
1407 		val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1408 
1409 		val <<= ARIZONA_MICB1_LVL_SHIFT;
1410 
1411 		if (arizona->pdata.micbias[i].ext_cap)
1412 			val |= ARIZONA_MICB1_EXT_CAP;
1413 
1414 		if (arizona->pdata.micbias[i].discharge)
1415 			val |= ARIZONA_MICB1_DISCH;
1416 
1417 		if (arizona->pdata.micbias[i].soft_start)
1418 			val |= ARIZONA_MICB1_RATE;
1419 
1420 		if (arizona->pdata.micbias[i].bypass)
1421 			val |= ARIZONA_MICB1_BYPASS;
1422 
1423 		regmap_update_bits(arizona->regmap,
1424 				   ARIZONA_MIC_BIAS_CTRL_1 + i,
1425 				   ARIZONA_MICB1_LVL_MASK |
1426 				   ARIZONA_MICB1_EXT_CAP |
1427 				   ARIZONA_MICB1_DISCH |
1428 				   ARIZONA_MICB1_BYPASS |
1429 				   ARIZONA_MICB1_RATE, val);
1430 	}
1431 
1432 	for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1433 		/* Default for both is 0 so noop with defaults */
1434 		val = arizona->pdata.dmic_ref[i]
1435 			<< ARIZONA_IN1_DMIC_SUP_SHIFT;
1436 		if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1437 			val |= 1 << ARIZONA_IN1_MODE_SHIFT;
1438 
1439 		switch (arizona->type) {
1440 		case WM8998:
1441 		case WM1814:
1442 			regmap_update_bits(arizona->regmap,
1443 				ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1444 				ARIZONA_IN1L_SRC_SE_MASK,
1445 				(arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1446 					<< ARIZONA_IN1L_SRC_SE_SHIFT);
1447 
1448 			regmap_update_bits(arizona->regmap,
1449 				ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1450 				ARIZONA_IN1R_SRC_SE_MASK,
1451 				(arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1452 					<< ARIZONA_IN1R_SRC_SE_SHIFT);
1453 
1454 			mask = ARIZONA_IN1_DMIC_SUP_MASK |
1455 				ARIZONA_IN1_MODE_MASK;
1456 			break;
1457 		default:
1458 			if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1459 				val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1460 
1461 			mask = ARIZONA_IN1_DMIC_SUP_MASK |
1462 				ARIZONA_IN1_MODE_MASK |
1463 				ARIZONA_IN1_SINGLE_ENDED_MASK;
1464 			break;
1465 		}
1466 
1467 		regmap_update_bits(arizona->regmap,
1468 				   ARIZONA_IN1L_CONTROL + (i * 8),
1469 				   mask, val);
1470 	}
1471 
1472 	for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1473 		/* Default is 0 so noop with defaults */
1474 		if (arizona->pdata.out_mono[i])
1475 			val = ARIZONA_OUT1_MONO;
1476 		else
1477 			val = 0;
1478 
1479 		regmap_update_bits(arizona->regmap,
1480 				   ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1481 				   ARIZONA_OUT1_MONO, val);
1482 	}
1483 
1484 	for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1485 		if (arizona->pdata.spk_mute[i])
1486 			regmap_update_bits(arizona->regmap,
1487 					   ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1488 					   ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1489 					   ARIZONA_SPK1_MUTE_SEQ1_MASK,
1490 					   arizona->pdata.spk_mute[i]);
1491 
1492 		if (arizona->pdata.spk_fmt[i])
1493 			regmap_update_bits(arizona->regmap,
1494 					   ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1495 					   ARIZONA_SPK1_FMT_MASK,
1496 					   arizona->pdata.spk_fmt[i]);
1497 	}
1498 
1499 	pm_runtime_set_active(arizona->dev);
1500 	pm_runtime_enable(arizona->dev);
1501 
1502 	/* Set up for interrupts */
1503 	ret = arizona_irq_init(arizona);
1504 	if (ret != 0)
1505 		goto err_pm;
1506 
1507 	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1508 	pm_runtime_use_autosuspend(arizona->dev);
1509 
1510 	arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1511 			    arizona_clkgen_err, arizona);
1512 	arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1513 			    arizona_overclocked, arizona);
1514 	arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1515 			    arizona_underclocked, arizona);
1516 
1517 	ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1518 			      subdevs, n_subdevs, NULL, 0, NULL);
1519 
1520 	if (ret) {
1521 		dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1522 		goto err_irq;
1523 	}
1524 
1525 	return 0;
1526 
1527 err_irq:
1528 	arizona_irq_exit(arizona);
1529 err_pm:
1530 	pm_runtime_disable(arizona->dev);
1531 err_reset:
1532 	arizona_enable_reset(arizona);
1533 	regulator_disable(arizona->dcvdd);
1534 err_enable:
1535 	regulator_bulk_disable(arizona->num_core_supplies,
1536 			       arizona->core_supplies);
1537 err_dcvdd:
1538 	regulator_put(arizona->dcvdd);
1539 err_early:
1540 	mfd_remove_devices(dev);
1541 	return ret;
1542 }
1543 EXPORT_SYMBOL_GPL(arizona_dev_init);
1544 
1545 int arizona_dev_exit(struct arizona *arizona)
1546 {
1547 	disable_irq(arizona->irq);
1548 	pm_runtime_disable(arizona->dev);
1549 
1550 	regulator_disable(arizona->dcvdd);
1551 	regulator_put(arizona->dcvdd);
1552 
1553 	mfd_remove_devices(arizona->dev);
1554 	arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1555 	arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1556 	arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1557 	arizona_irq_exit(arizona);
1558 	arizona_enable_reset(arizona);
1559 
1560 	regulator_bulk_disable(arizona->num_core_supplies,
1561 			       arizona->core_supplies);
1562 	return 0;
1563 }
1564 EXPORT_SYMBOL_GPL(arizona_dev_exit);
1565