1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Arizona core driver 4 * 5 * Copyright 2012 Wolfson Microelectronics plc 6 * 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/err.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/interrupt.h> 15 #include <linux/mfd/core.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/slab.h> 24 #include <linux/ktime.h> 25 #include <linux/platform_device.h> 26 27 #include <linux/mfd/arizona/core.h> 28 #include <linux/mfd/arizona/registers.h> 29 30 #include "arizona.h" 31 32 static const char * const wm5102_core_supplies[] = { 33 "AVDD", 34 "DBVDD1", 35 }; 36 37 int arizona_clk32k_enable(struct arizona *arizona) 38 { 39 int ret = 0; 40 41 mutex_lock(&arizona->clk_lock); 42 43 arizona->clk32k_ref++; 44 45 if (arizona->clk32k_ref == 1) { 46 switch (arizona->pdata.clk32k_src) { 47 case ARIZONA_32KZ_MCLK1: 48 ret = pm_runtime_resume_and_get(arizona->dev); 49 if (ret != 0) 50 goto err_ref; 51 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); 52 if (ret != 0) { 53 pm_runtime_put_sync(arizona->dev); 54 goto err_ref; 55 } 56 break; 57 case ARIZONA_32KZ_MCLK2: 58 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); 59 if (ret != 0) 60 goto err_ref; 61 break; 62 } 63 64 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 65 ARIZONA_CLK_32K_ENA, 66 ARIZONA_CLK_32K_ENA); 67 } 68 69 err_ref: 70 if (ret != 0) 71 arizona->clk32k_ref--; 72 73 mutex_unlock(&arizona->clk_lock); 74 75 return ret; 76 } 77 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 78 79 int arizona_clk32k_disable(struct arizona *arizona) 80 { 81 mutex_lock(&arizona->clk_lock); 82 83 WARN_ON(arizona->clk32k_ref <= 0); 84 85 arizona->clk32k_ref--; 86 87 if (arizona->clk32k_ref == 0) { 88 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 89 ARIZONA_CLK_32K_ENA, 0); 90 91 switch (arizona->pdata.clk32k_src) { 92 case ARIZONA_32KZ_MCLK1: 93 pm_runtime_put_sync(arizona->dev); 94 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); 95 break; 96 case ARIZONA_32KZ_MCLK2: 97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); 98 break; 99 } 100 } 101 102 mutex_unlock(&arizona->clk_lock); 103 104 return 0; 105 } 106 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 107 108 static irqreturn_t arizona_clkgen_err(int irq, void *data) 109 { 110 struct arizona *arizona = data; 111 112 dev_err(arizona->dev, "CLKGEN error\n"); 113 114 return IRQ_HANDLED; 115 } 116 117 static irqreturn_t arizona_underclocked(int irq, void *data) 118 { 119 struct arizona *arizona = data; 120 unsigned int val; 121 int ret; 122 123 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 124 &val); 125 if (ret != 0) { 126 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 127 ret); 128 return IRQ_NONE; 129 } 130 131 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 132 dev_err(arizona->dev, "AIF3 underclocked\n"); 133 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 134 dev_err(arizona->dev, "AIF2 underclocked\n"); 135 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 136 dev_err(arizona->dev, "AIF1 underclocked\n"); 137 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) 138 dev_err(arizona->dev, "ISRC3 underclocked\n"); 139 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 140 dev_err(arizona->dev, "ISRC2 underclocked\n"); 141 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 142 dev_err(arizona->dev, "ISRC1 underclocked\n"); 143 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 144 dev_err(arizona->dev, "FX underclocked\n"); 145 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 146 dev_err(arizona->dev, "ASRC underclocked\n"); 147 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 148 dev_err(arizona->dev, "DAC underclocked\n"); 149 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 150 dev_err(arizona->dev, "ADC underclocked\n"); 151 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 152 dev_err(arizona->dev, "Mixer dropped sample\n"); 153 154 return IRQ_HANDLED; 155 } 156 157 static irqreturn_t arizona_overclocked(int irq, void *data) 158 { 159 struct arizona *arizona = data; 160 unsigned int val[3]; 161 int ret; 162 163 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 164 &val[0], 3); 165 if (ret != 0) { 166 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 167 ret); 168 return IRQ_NONE; 169 } 170 171 switch (arizona->type) { 172 case WM8998: 173 case WM1814: 174 /* Some bits are shifted on WM8998, 175 * rearrange to match the standard bit layout 176 */ 177 val[0] = ((val[0] & 0x60e0) >> 1) | 178 ((val[0] & 0x1e00) >> 2) | 179 (val[0] & 0x000f); 180 break; 181 default: 182 break; 183 } 184 185 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 186 dev_err(arizona->dev, "PWM overclocked\n"); 187 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 188 dev_err(arizona->dev, "FX core overclocked\n"); 189 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 190 dev_err(arizona->dev, "DAC SYS overclocked\n"); 191 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 192 dev_err(arizona->dev, "DAC WARP overclocked\n"); 193 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 194 dev_err(arizona->dev, "ADC overclocked\n"); 195 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 196 dev_err(arizona->dev, "Mixer overclocked\n"); 197 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 198 dev_err(arizona->dev, "AIF3 overclocked\n"); 199 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 200 dev_err(arizona->dev, "AIF2 overclocked\n"); 201 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 202 dev_err(arizona->dev, "AIF1 overclocked\n"); 203 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 204 dev_err(arizona->dev, "Pad control overclocked\n"); 205 206 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 207 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 208 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 209 dev_err(arizona->dev, "Slimbus async overclocked\n"); 210 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 211 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 212 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 213 dev_err(arizona->dev, "ASRC async system overclocked\n"); 214 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 215 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 216 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 217 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 218 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 219 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 220 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 221 dev_err(arizona->dev, "DSP1 overclocked\n"); 222 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) 223 dev_err(arizona->dev, "ISRC3 overclocked\n"); 224 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 225 dev_err(arizona->dev, "ISRC2 overclocked\n"); 226 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 227 dev_err(arizona->dev, "ISRC1 overclocked\n"); 228 229 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) 230 dev_err(arizona->dev, "SPDIF overclocked\n"); 231 232 return IRQ_HANDLED; 233 } 234 235 #define ARIZONA_REG_POLL_DELAY_US 7500 236 237 static inline bool arizona_poll_reg_delay(ktime_t timeout) 238 { 239 if (ktime_compare(ktime_get(), timeout) > 0) 240 return false; 241 242 usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US); 243 244 return true; 245 } 246 247 static int arizona_poll_reg(struct arizona *arizona, 248 int timeout_ms, unsigned int reg, 249 unsigned int mask, unsigned int target) 250 { 251 ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC); 252 unsigned int val = 0; 253 int ret; 254 255 do { 256 ret = regmap_read(arizona->regmap, reg, &val); 257 258 if ((val & mask) == target) 259 return 0; 260 } while (arizona_poll_reg_delay(timeout)); 261 262 if (ret) { 263 dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n", 264 reg, ret); 265 return ret; 266 } 267 268 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val); 269 return -ETIMEDOUT; 270 } 271 272 static int arizona_wait_for_boot(struct arizona *arizona) 273 { 274 int ret; 275 276 /* 277 * We can't use an interrupt as we need to runtime resume to do so, 278 * we won't race with the interrupt handler as it'll be blocked on 279 * runtime resume. 280 */ 281 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, 282 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 283 284 if (!ret) 285 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 286 ARIZONA_BOOT_DONE_STS); 287 288 pm_runtime_mark_last_busy(arizona->dev); 289 290 return ret; 291 } 292 293 static inline void arizona_enable_reset(struct arizona *arizona) 294 { 295 if (arizona->pdata.reset) 296 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0); 297 } 298 299 static void arizona_disable_reset(struct arizona *arizona) 300 { 301 if (arizona->pdata.reset) { 302 switch (arizona->type) { 303 case WM5110: 304 case WM8280: 305 /* Meet requirements for minimum reset duration */ 306 usleep_range(5000, 10000); 307 break; 308 default: 309 break; 310 } 311 312 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1); 313 usleep_range(1000, 5000); 314 } 315 } 316 317 struct arizona_sysclk_state { 318 unsigned int fll; 319 unsigned int sysclk; 320 }; 321 322 static int arizona_enable_freerun_sysclk(struct arizona *arizona, 323 struct arizona_sysclk_state *state) 324 { 325 int ret, err; 326 327 /* Cache existing FLL and SYSCLK settings */ 328 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); 329 if (ret) { 330 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 331 ret); 332 return ret; 333 } 334 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 335 &state->sysclk); 336 if (ret) { 337 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 338 ret); 339 return ret; 340 } 341 342 /* Start up SYSCLK using the FLL in free running mode */ 343 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 344 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 345 if (ret) { 346 dev_err(arizona->dev, 347 "Failed to start FLL in freerunning mode: %d\n", 348 ret); 349 return ret; 350 } 351 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, 352 ARIZONA_FLL1_CLOCK_OK_STS, 353 ARIZONA_FLL1_CLOCK_OK_STS); 354 if (ret) 355 goto err_fll; 356 357 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 358 if (ret) { 359 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 360 goto err_fll; 361 } 362 363 return 0; 364 365 err_fll: 366 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 367 if (err) 368 dev_err(arizona->dev, 369 "Failed to re-apply old FLL settings: %d\n", err); 370 371 return ret; 372 } 373 374 static int arizona_disable_freerun_sysclk(struct arizona *arizona, 375 struct arizona_sysclk_state *state) 376 { 377 int ret; 378 379 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 380 state->sysclk); 381 if (ret) { 382 dev_err(arizona->dev, 383 "Failed to re-apply old SYSCLK settings: %d\n", ret); 384 return ret; 385 } 386 387 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 388 if (ret) { 389 dev_err(arizona->dev, 390 "Failed to re-apply old FLL settings: %d\n", ret); 391 return ret; 392 } 393 394 return 0; 395 } 396 397 static int wm5102_apply_hardware_patch(struct arizona *arizona) 398 { 399 struct arizona_sysclk_state state; 400 int err, ret; 401 402 ret = arizona_enable_freerun_sysclk(arizona, &state); 403 if (ret) 404 return ret; 405 406 /* Start the write sequencer and wait for it to finish */ 407 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 408 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 409 if (ret) { 410 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 411 ret); 412 goto err; 413 } 414 415 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, 416 ARIZONA_WSEQ_BUSY, 0); 417 if (ret) 418 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 419 ARIZONA_WSEQ_ABORT); 420 421 err: 422 err = arizona_disable_freerun_sysclk(arizona, &state); 423 424 return ret ?: err; 425 } 426 427 /* 428 * Register patch to some of the CODECs internal write sequences 429 * to ensure a clean exit from the low power sleep state. 430 */ 431 static const struct reg_sequence wm5110_sleep_patch[] = { 432 { 0x337A, 0xC100 }, 433 { 0x337B, 0x0041 }, 434 { 0x3300, 0xA210 }, 435 { 0x3301, 0x050C }, 436 }; 437 438 static int wm5110_apply_sleep_patch(struct arizona *arizona) 439 { 440 struct arizona_sysclk_state state; 441 int err, ret; 442 443 ret = arizona_enable_freerun_sysclk(arizona, &state); 444 if (ret) 445 return ret; 446 447 ret = regmap_multi_reg_write_bypassed(arizona->regmap, 448 wm5110_sleep_patch, 449 ARRAY_SIZE(wm5110_sleep_patch)); 450 451 err = arizona_disable_freerun_sysclk(arizona, &state); 452 453 return ret ?: err; 454 } 455 456 static int wm5102_clear_write_sequencer(struct arizona *arizona) 457 { 458 int ret; 459 460 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, 461 0x0); 462 if (ret) { 463 dev_err(arizona->dev, 464 "Failed to clear write sequencer state: %d\n", ret); 465 return ret; 466 } 467 468 arizona_enable_reset(arizona); 469 regulator_disable(arizona->dcvdd); 470 471 msleep(20); 472 473 ret = regulator_enable(arizona->dcvdd); 474 if (ret) { 475 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); 476 return ret; 477 } 478 arizona_disable_reset(arizona); 479 480 return 0; 481 } 482 483 static int arizona_isolate_dcvdd(struct arizona *arizona) 484 { 485 int ret; 486 487 ret = regmap_update_bits(arizona->regmap, 488 ARIZONA_ISOLATION_CONTROL, 489 ARIZONA_ISOLATE_DCVDD1, 490 ARIZONA_ISOLATE_DCVDD1); 491 if (ret != 0) 492 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); 493 494 return ret; 495 } 496 497 static int arizona_connect_dcvdd(struct arizona *arizona) 498 { 499 int ret; 500 501 ret = regmap_update_bits(arizona->regmap, 502 ARIZONA_ISOLATION_CONTROL, 503 ARIZONA_ISOLATE_DCVDD1, 0); 504 if (ret != 0) 505 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); 506 507 return ret; 508 } 509 510 static int arizona_is_jack_det_active(struct arizona *arizona) 511 { 512 unsigned int val; 513 int ret; 514 515 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); 516 if (ret) { 517 dev_err(arizona->dev, 518 "Failed to check jack det status: %d\n", ret); 519 return ret; 520 } else if (val & ARIZONA_JD1_ENA) { 521 return 1; 522 } else { 523 return 0; 524 } 525 } 526 527 static int arizona_runtime_resume(struct device *dev) 528 { 529 struct arizona *arizona = dev_get_drvdata(dev); 530 int ret; 531 532 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 533 534 if (arizona->has_fully_powered_off) { 535 dev_dbg(arizona->dev, "Re-enabling core supplies\n"); 536 537 ret = regulator_bulk_enable(arizona->num_core_supplies, 538 arizona->core_supplies); 539 if (ret) { 540 dev_err(dev, "Failed to enable core supplies: %d\n", 541 ret); 542 return ret; 543 } 544 } 545 546 ret = regulator_enable(arizona->dcvdd); 547 if (ret != 0) { 548 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 549 if (arizona->has_fully_powered_off) 550 regulator_bulk_disable(arizona->num_core_supplies, 551 arizona->core_supplies); 552 return ret; 553 } 554 555 if (arizona->has_fully_powered_off) { 556 arizona_disable_reset(arizona); 557 enable_irq(arizona->irq); 558 arizona->has_fully_powered_off = false; 559 } 560 561 regcache_cache_only(arizona->regmap, false); 562 563 switch (arizona->type) { 564 case WM5102: 565 if (arizona->external_dcvdd) { 566 ret = arizona_connect_dcvdd(arizona); 567 if (ret != 0) 568 goto err; 569 } 570 571 ret = wm5102_patch(arizona); 572 if (ret != 0) { 573 dev_err(arizona->dev, "Failed to apply patch: %d\n", 574 ret); 575 goto err; 576 } 577 578 ret = wm5102_apply_hardware_patch(arizona); 579 if (ret) { 580 dev_err(arizona->dev, 581 "Failed to apply hardware patch: %d\n", 582 ret); 583 goto err; 584 } 585 break; 586 case WM5110: 587 case WM8280: 588 ret = arizona_wait_for_boot(arizona); 589 if (ret) 590 goto err; 591 592 if (arizona->external_dcvdd) { 593 ret = arizona_connect_dcvdd(arizona); 594 if (ret != 0) 595 goto err; 596 } else { 597 /* 598 * As this is only called for the internal regulator 599 * (where we know voltage ranges available) it is ok 600 * to request an exact range. 601 */ 602 ret = regulator_set_voltage(arizona->dcvdd, 603 1200000, 1200000); 604 if (ret < 0) { 605 dev_err(arizona->dev, 606 "Failed to set resume voltage: %d\n", 607 ret); 608 goto err; 609 } 610 } 611 612 ret = wm5110_apply_sleep_patch(arizona); 613 if (ret) { 614 dev_err(arizona->dev, 615 "Failed to re-apply sleep patch: %d\n", 616 ret); 617 goto err; 618 } 619 break; 620 case WM1831: 621 case CS47L24: 622 ret = arizona_wait_for_boot(arizona); 623 if (ret != 0) 624 goto err; 625 break; 626 default: 627 ret = arizona_wait_for_boot(arizona); 628 if (ret != 0) 629 goto err; 630 631 if (arizona->external_dcvdd) { 632 ret = arizona_connect_dcvdd(arizona); 633 if (ret != 0) 634 goto err; 635 } 636 break; 637 } 638 639 ret = regcache_sync(arizona->regmap); 640 if (ret != 0) { 641 dev_err(arizona->dev, "Failed to restore register cache\n"); 642 goto err; 643 } 644 645 return 0; 646 647 err: 648 regcache_cache_only(arizona->regmap, true); 649 regulator_disable(arizona->dcvdd); 650 return ret; 651 } 652 653 static int arizona_runtime_suspend(struct device *dev) 654 { 655 struct arizona *arizona = dev_get_drvdata(dev); 656 int jd_active = 0; 657 int ret; 658 659 dev_dbg(arizona->dev, "Entering AoD mode\n"); 660 661 switch (arizona->type) { 662 case WM5110: 663 case WM8280: 664 jd_active = arizona_is_jack_det_active(arizona); 665 if (jd_active < 0) 666 return jd_active; 667 668 if (arizona->external_dcvdd) { 669 ret = arizona_isolate_dcvdd(arizona); 670 if (ret != 0) 671 return ret; 672 } else { 673 /* 674 * As this is only called for the internal regulator 675 * (where we know voltage ranges available) it is ok 676 * to request an exact range. 677 */ 678 ret = regulator_set_voltage(arizona->dcvdd, 679 1175000, 1175000); 680 if (ret < 0) { 681 dev_err(arizona->dev, 682 "Failed to set suspend voltage: %d\n", 683 ret); 684 return ret; 685 } 686 } 687 break; 688 case WM5102: 689 jd_active = arizona_is_jack_det_active(arizona); 690 if (jd_active < 0) 691 return jd_active; 692 693 if (arizona->external_dcvdd) { 694 ret = arizona_isolate_dcvdd(arizona); 695 if (ret != 0) 696 return ret; 697 } 698 699 if (!jd_active) { 700 ret = regmap_write(arizona->regmap, 701 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); 702 if (ret) { 703 dev_err(arizona->dev, 704 "Failed to clear write sequencer: %d\n", 705 ret); 706 return ret; 707 } 708 } 709 break; 710 case WM1831: 711 case CS47L24: 712 break; 713 default: 714 jd_active = arizona_is_jack_det_active(arizona); 715 if (jd_active < 0) 716 return jd_active; 717 718 if (arizona->external_dcvdd) { 719 ret = arizona_isolate_dcvdd(arizona); 720 if (ret != 0) 721 return ret; 722 } 723 break; 724 } 725 726 regcache_cache_only(arizona->regmap, true); 727 regcache_mark_dirty(arizona->regmap); 728 regulator_disable(arizona->dcvdd); 729 730 /* Allow us to completely power down if no jack detection */ 731 if (!jd_active) { 732 dev_dbg(arizona->dev, "Fully powering off\n"); 733 734 arizona->has_fully_powered_off = true; 735 736 disable_irq_nosync(arizona->irq); 737 arizona_enable_reset(arizona); 738 regulator_bulk_disable(arizona->num_core_supplies, 739 arizona->core_supplies); 740 } 741 742 return 0; 743 } 744 745 static int arizona_suspend(struct device *dev) 746 { 747 struct arizona *arizona = dev_get_drvdata(dev); 748 749 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 750 disable_irq(arizona->irq); 751 752 return 0; 753 } 754 755 static int arizona_suspend_noirq(struct device *dev) 756 { 757 struct arizona *arizona = dev_get_drvdata(dev); 758 759 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 760 enable_irq(arizona->irq); 761 762 return 0; 763 } 764 765 static int arizona_resume_noirq(struct device *dev) 766 { 767 struct arizona *arizona = dev_get_drvdata(dev); 768 769 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 770 disable_irq(arizona->irq); 771 772 return 0; 773 } 774 775 static int arizona_resume(struct device *dev) 776 { 777 struct arizona *arizona = dev_get_drvdata(dev); 778 779 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); 780 enable_irq(arizona->irq); 781 782 return 0; 783 } 784 785 EXPORT_GPL_DEV_PM_OPS(arizona_pm_ops) = { 786 RUNTIME_PM_OPS(arizona_runtime_suspend, 787 arizona_runtime_resume, 788 NULL) 789 SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 790 NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, 791 arizona_resume_noirq) 792 }; 793 794 #ifdef CONFIG_OF 795 static int arizona_of_get_core_pdata(struct arizona *arizona) 796 { 797 struct arizona_pdata *pdata = &arizona->pdata; 798 int ret, i; 799 800 /* Handle old non-standard DT binding */ 801 pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW); 802 if (IS_ERR(pdata->reset)) { 803 ret = PTR_ERR(pdata->reset); 804 805 /* 806 * Reset missing will be caught when other binding is read 807 * but all other errors imply this binding is in use but has 808 * encountered a problem so should be handled. 809 */ 810 if (ret == -EPROBE_DEFER) 811 return ret; 812 else if (ret != -ENOENT && ret != -ENOSYS) 813 dev_err(arizona->dev, "Reset GPIO malformed: %d\n", 814 ret); 815 816 pdata->reset = NULL; 817 } 818 819 ret = of_property_read_u32_array(arizona->dev->of_node, 820 "wlf,gpio-defaults", 821 pdata->gpio_defaults, 822 ARRAY_SIZE(pdata->gpio_defaults)); 823 if (ret >= 0) { 824 /* 825 * All values are literal except out of range values 826 * which are chip default, translate into platform 827 * data which uses 0 as chip default and out of range 828 * as zero. 829 */ 830 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { 831 if (pdata->gpio_defaults[i] > 0xffff) 832 pdata->gpio_defaults[i] = 0; 833 else if (pdata->gpio_defaults[i] == 0) 834 pdata->gpio_defaults[i] = 0x10000; 835 } 836 } else { 837 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 838 ret); 839 } 840 841 return 0; 842 } 843 #else 844 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 845 { 846 return 0; 847 } 848 #endif 849 850 static const struct mfd_cell early_devs[] = { 851 { .name = "arizona-ldo1" }, 852 }; 853 854 static const char * const wm5102_supplies[] = { 855 "MICVDD", 856 "DBVDD2", 857 "DBVDD3", 858 "CPVDD", 859 "SPKVDDL", 860 "SPKVDDR", 861 }; 862 863 static const struct mfd_cell wm5102_devs[] = { 864 { .name = "arizona-micsupp" }, 865 { .name = "arizona-gpio" }, 866 { .name = "arizona-haptics" }, 867 { .name = "arizona-pwm" }, 868 { 869 .name = "wm5102-codec", 870 .parent_supplies = wm5102_supplies, 871 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 872 }, 873 }; 874 875 static const struct mfd_cell wm5110_devs[] = { 876 { .name = "arizona-micsupp" }, 877 { .name = "arizona-gpio" }, 878 { .name = "arizona-haptics" }, 879 { .name = "arizona-pwm" }, 880 { 881 .name = "wm5110-codec", 882 .parent_supplies = wm5102_supplies, 883 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 884 }, 885 }; 886 887 static const char * const cs47l24_supplies[] = { 888 "MICVDD", 889 "CPVDD", 890 "SPKVDD", 891 }; 892 893 static const struct mfd_cell cs47l24_devs[] = { 894 { .name = "arizona-gpio" }, 895 { .name = "arizona-haptics" }, 896 { .name = "arizona-pwm" }, 897 { 898 .name = "cs47l24-codec", 899 .parent_supplies = cs47l24_supplies, 900 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), 901 }, 902 }; 903 904 static const char * const wm8997_supplies[] = { 905 "MICVDD", 906 "DBVDD2", 907 "CPVDD", 908 "SPKVDD", 909 }; 910 911 static const struct mfd_cell wm8997_devs[] = { 912 { .name = "arizona-micsupp" }, 913 { .name = "arizona-gpio" }, 914 { .name = "arizona-haptics" }, 915 { .name = "arizona-pwm" }, 916 { 917 .name = "wm8997-codec", 918 .parent_supplies = wm8997_supplies, 919 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 920 }, 921 }; 922 923 static const struct mfd_cell wm8998_devs[] = { 924 { .name = "arizona-micsupp" }, 925 { .name = "arizona-gpio" }, 926 { .name = "arizona-haptics" }, 927 { .name = "arizona-pwm" }, 928 { 929 .name = "wm8998-codec", 930 .parent_supplies = wm5102_supplies, 931 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 932 }, 933 }; 934 935 int arizona_dev_init(struct arizona *arizona) 936 { 937 static const char * const mclk_name[] = { "mclk1", "mclk2" }; 938 struct device *dev = arizona->dev; 939 const char *type_name = NULL; 940 unsigned int reg, val; 941 int (*apply_patch)(struct arizona *) = NULL; 942 const struct mfd_cell *subdevs = NULL; 943 int n_subdevs = 0, ret, i; 944 945 dev_set_drvdata(arizona->dev, arizona); 946 mutex_init(&arizona->clk_lock); 947 948 if (dev_get_platdata(arizona->dev)) { 949 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 950 sizeof(arizona->pdata)); 951 } else { 952 ret = arizona_of_get_core_pdata(arizona); 953 if (ret < 0) 954 return ret; 955 } 956 957 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); 958 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { 959 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); 960 if (IS_ERR(arizona->mclk[i])) { 961 dev_info(arizona->dev, "Failed to get %s: %ld\n", 962 mclk_name[i], PTR_ERR(arizona->mclk[i])); 963 arizona->mclk[i] = NULL; 964 } 965 } 966 967 regcache_cache_only(arizona->regmap, true); 968 969 switch (arizona->type) { 970 case WM5102: 971 case WM5110: 972 case WM8280: 973 case WM8997: 974 case WM8998: 975 case WM1814: 976 case WM1831: 977 case CS47L24: 978 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 979 arizona->core_supplies[i].supply 980 = wm5102_core_supplies[i]; 981 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 982 break; 983 default: 984 dev_err(arizona->dev, "Unknown device type %d\n", 985 arizona->type); 986 return -ENODEV; 987 } 988 989 /* Mark DCVDD as external, LDO1 driver will clear if internal */ 990 arizona->external_dcvdd = true; 991 992 switch (arizona->type) { 993 case WM1831: 994 case CS47L24: 995 break; /* No LDO1 regulator */ 996 default: 997 ret = mfd_add_devices(arizona->dev, -1, early_devs, 998 ARRAY_SIZE(early_devs), NULL, 0, NULL); 999 if (ret != 0) { 1000 dev_err(dev, "Failed to add early children: %d\n", ret); 1001 return ret; 1002 } 1003 break; 1004 } 1005 1006 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 1007 arizona->core_supplies); 1008 if (ret != 0) { 1009 dev_err(dev, "Failed to request core supplies: %d\n", 1010 ret); 1011 goto err_early; 1012 } 1013 1014 /** 1015 * Don't use devres here because the only device we have to get 1016 * against is the MFD device and DCVDD will likely be supplied by 1017 * one of its children. Meaning that the regulator will be 1018 * destroyed by the time devres calls regulator put. 1019 */ 1020 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); 1021 if (IS_ERR(arizona->dcvdd)) { 1022 ret = PTR_ERR(arizona->dcvdd); 1023 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 1024 goto err_early; 1025 } 1026 1027 if (!arizona->pdata.reset) { 1028 /* Start out with /RESET low to put the chip into reset */ 1029 arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset", 1030 GPIOD_OUT_LOW); 1031 if (IS_ERR(arizona->pdata.reset)) { 1032 ret = PTR_ERR(arizona->pdata.reset); 1033 if (ret == -EPROBE_DEFER) 1034 goto err_dcvdd; 1035 1036 dev_err(arizona->dev, 1037 "Reset GPIO missing/malformed: %d\n", ret); 1038 1039 arizona->pdata.reset = NULL; 1040 } 1041 } 1042 1043 ret = regulator_bulk_enable(arizona->num_core_supplies, 1044 arizona->core_supplies); 1045 if (ret != 0) { 1046 dev_err(dev, "Failed to enable core supplies: %d\n", 1047 ret); 1048 goto err_dcvdd; 1049 } 1050 1051 ret = regulator_enable(arizona->dcvdd); 1052 if (ret != 0) { 1053 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 1054 goto err_enable; 1055 } 1056 1057 arizona_disable_reset(arizona); 1058 1059 regcache_cache_only(arizona->regmap, false); 1060 1061 /* Verify that this is a chip we know about */ 1062 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1063 if (ret != 0) { 1064 dev_err(dev, "Failed to read ID register: %d\n", ret); 1065 goto err_reset; 1066 } 1067 1068 switch (reg) { 1069 case 0x5102: 1070 case 0x5110: 1071 case 0x6349: 1072 case 0x6363: 1073 case 0x8997: 1074 break; 1075 default: 1076 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 1077 ret = -ENODEV; 1078 goto err_reset; 1079 } 1080 1081 /* If we have a /RESET GPIO we'll already be reset */ 1082 if (!arizona->pdata.reset) { 1083 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 1084 if (ret != 0) { 1085 dev_err(dev, "Failed to reset device: %d\n", ret); 1086 goto err_reset; 1087 } 1088 1089 usleep_range(1000, 5000); 1090 } 1091 1092 /* Ensure device startup is complete */ 1093 switch (arizona->type) { 1094 case WM5102: 1095 ret = regmap_read(arizona->regmap, 1096 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); 1097 if (ret) { 1098 dev_err(dev, 1099 "Failed to check write sequencer state: %d\n", 1100 ret); 1101 } else if (val & 0x01) { 1102 ret = wm5102_clear_write_sequencer(arizona); 1103 if (ret) 1104 return ret; 1105 } 1106 break; 1107 default: 1108 break; 1109 } 1110 1111 ret = arizona_wait_for_boot(arizona); 1112 if (ret) { 1113 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); 1114 goto err_reset; 1115 } 1116 1117 /* Read the device ID information & do device specific stuff */ 1118 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1119 if (ret != 0) { 1120 dev_err(dev, "Failed to read ID register: %d\n", ret); 1121 goto err_reset; 1122 } 1123 1124 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 1125 &arizona->rev); 1126 if (ret != 0) { 1127 dev_err(dev, "Failed to read revision register: %d\n", ret); 1128 goto err_reset; 1129 } 1130 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 1131 1132 switch (reg) { 1133 case 0x5102: 1134 if (IS_ENABLED(CONFIG_MFD_WM5102)) { 1135 type_name = "WM5102"; 1136 if (arizona->type != WM5102) { 1137 dev_warn(arizona->dev, 1138 "WM5102 registered as %d\n", 1139 arizona->type); 1140 arizona->type = WM5102; 1141 } 1142 1143 apply_patch = wm5102_patch; 1144 arizona->rev &= 0x7; 1145 subdevs = wm5102_devs; 1146 n_subdevs = ARRAY_SIZE(wm5102_devs); 1147 } 1148 break; 1149 case 0x5110: 1150 if (IS_ENABLED(CONFIG_MFD_WM5110)) { 1151 switch (arizona->type) { 1152 case WM5110: 1153 type_name = "WM5110"; 1154 break; 1155 case WM8280: 1156 type_name = "WM8280"; 1157 break; 1158 default: 1159 type_name = "WM5110"; 1160 dev_warn(arizona->dev, 1161 "WM5110 registered as %d\n", 1162 arizona->type); 1163 arizona->type = WM5110; 1164 break; 1165 } 1166 1167 apply_patch = wm5110_patch; 1168 subdevs = wm5110_devs; 1169 n_subdevs = ARRAY_SIZE(wm5110_devs); 1170 } 1171 break; 1172 case 0x6363: 1173 if (IS_ENABLED(CONFIG_MFD_CS47L24)) { 1174 switch (arizona->type) { 1175 case CS47L24: 1176 type_name = "CS47L24"; 1177 break; 1178 1179 case WM1831: 1180 type_name = "WM1831"; 1181 break; 1182 1183 default: 1184 dev_warn(arizona->dev, 1185 "CS47L24 registered as %d\n", 1186 arizona->type); 1187 arizona->type = CS47L24; 1188 break; 1189 } 1190 1191 apply_patch = cs47l24_patch; 1192 subdevs = cs47l24_devs; 1193 n_subdevs = ARRAY_SIZE(cs47l24_devs); 1194 } 1195 break; 1196 case 0x8997: 1197 if (IS_ENABLED(CONFIG_MFD_WM8997)) { 1198 type_name = "WM8997"; 1199 if (arizona->type != WM8997) { 1200 dev_warn(arizona->dev, 1201 "WM8997 registered as %d\n", 1202 arizona->type); 1203 arizona->type = WM8997; 1204 } 1205 1206 apply_patch = wm8997_patch; 1207 subdevs = wm8997_devs; 1208 n_subdevs = ARRAY_SIZE(wm8997_devs); 1209 } 1210 break; 1211 case 0x6349: 1212 if (IS_ENABLED(CONFIG_MFD_WM8998)) { 1213 switch (arizona->type) { 1214 case WM8998: 1215 type_name = "WM8998"; 1216 break; 1217 1218 case WM1814: 1219 type_name = "WM1814"; 1220 break; 1221 1222 default: 1223 type_name = "WM8998"; 1224 dev_warn(arizona->dev, 1225 "WM8998 registered as %d\n", 1226 arizona->type); 1227 arizona->type = WM8998; 1228 } 1229 1230 apply_patch = wm8998_patch; 1231 subdevs = wm8998_devs; 1232 n_subdevs = ARRAY_SIZE(wm8998_devs); 1233 } 1234 break; 1235 default: 1236 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 1237 ret = -ENODEV; 1238 goto err_reset; 1239 } 1240 1241 if (!subdevs) { 1242 dev_err(arizona->dev, 1243 "No kernel support for device ID %x\n", reg); 1244 ret = -ENODEV; 1245 goto err_reset; 1246 } 1247 1248 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 1249 1250 if (apply_patch) { 1251 ret = apply_patch(arizona); 1252 if (ret != 0) { 1253 dev_err(arizona->dev, "Failed to apply patch: %d\n", 1254 ret); 1255 goto err_reset; 1256 } 1257 1258 switch (arizona->type) { 1259 case WM5102: 1260 ret = wm5102_apply_hardware_patch(arizona); 1261 if (ret) { 1262 dev_err(arizona->dev, 1263 "Failed to apply hardware patch: %d\n", 1264 ret); 1265 goto err_reset; 1266 } 1267 break; 1268 case WM5110: 1269 case WM8280: 1270 ret = wm5110_apply_sleep_patch(arizona); 1271 if (ret) { 1272 dev_err(arizona->dev, 1273 "Failed to apply sleep patch: %d\n", 1274 ret); 1275 goto err_reset; 1276 } 1277 break; 1278 default: 1279 break; 1280 } 1281 } 1282 1283 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 1284 if (!arizona->pdata.gpio_defaults[i]) 1285 continue; 1286 1287 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 1288 arizona->pdata.gpio_defaults[i]); 1289 } 1290 1291 /* Chip default */ 1292 if (!arizona->pdata.clk32k_src) 1293 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 1294 1295 switch (arizona->pdata.clk32k_src) { 1296 case ARIZONA_32KZ_MCLK1: 1297 case ARIZONA_32KZ_MCLK2: 1298 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1299 ARIZONA_CLK_32K_SRC_MASK, 1300 arizona->pdata.clk32k_src - 1); 1301 arizona_clk32k_enable(arizona); 1302 break; 1303 case ARIZONA_32KZ_NONE: 1304 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1305 ARIZONA_CLK_32K_SRC_MASK, 2); 1306 break; 1307 default: 1308 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 1309 arizona->pdata.clk32k_src); 1310 ret = -EINVAL; 1311 goto err_reset; 1312 } 1313 1314 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 1315 if (!arizona->pdata.micbias[i].mV && 1316 !arizona->pdata.micbias[i].bypass) 1317 continue; 1318 1319 /* Apply default for bypass mode */ 1320 if (!arizona->pdata.micbias[i].mV) 1321 arizona->pdata.micbias[i].mV = 2800; 1322 1323 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 1324 1325 val <<= ARIZONA_MICB1_LVL_SHIFT; 1326 1327 if (arizona->pdata.micbias[i].ext_cap) 1328 val |= ARIZONA_MICB1_EXT_CAP; 1329 1330 if (arizona->pdata.micbias[i].discharge) 1331 val |= ARIZONA_MICB1_DISCH; 1332 1333 if (arizona->pdata.micbias[i].soft_start) 1334 val |= ARIZONA_MICB1_RATE; 1335 1336 if (arizona->pdata.micbias[i].bypass) 1337 val |= ARIZONA_MICB1_BYPASS; 1338 1339 regmap_update_bits(arizona->regmap, 1340 ARIZONA_MIC_BIAS_CTRL_1 + i, 1341 ARIZONA_MICB1_LVL_MASK | 1342 ARIZONA_MICB1_EXT_CAP | 1343 ARIZONA_MICB1_DISCH | 1344 ARIZONA_MICB1_BYPASS | 1345 ARIZONA_MICB1_RATE, val); 1346 } 1347 1348 pm_runtime_set_active(arizona->dev); 1349 pm_runtime_enable(arizona->dev); 1350 1351 /* Set up for interrupts */ 1352 ret = arizona_irq_init(arizona); 1353 if (ret != 0) 1354 goto err_pm; 1355 1356 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 1357 pm_runtime_use_autosuspend(arizona->dev); 1358 1359 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 1360 arizona_clkgen_err, arizona); 1361 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 1362 arizona_overclocked, arizona); 1363 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 1364 arizona_underclocked, arizona); 1365 1366 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, 1367 subdevs, n_subdevs, NULL, 0, NULL); 1368 1369 if (ret) { 1370 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 1371 goto err_irq; 1372 } 1373 1374 return 0; 1375 1376 err_irq: 1377 arizona_irq_exit(arizona); 1378 err_pm: 1379 pm_runtime_disable(arizona->dev); 1380 1381 switch (arizona->pdata.clk32k_src) { 1382 case ARIZONA_32KZ_MCLK1: 1383 case ARIZONA_32KZ_MCLK2: 1384 arizona_clk32k_disable(arizona); 1385 break; 1386 default: 1387 break; 1388 } 1389 err_reset: 1390 arizona_enable_reset(arizona); 1391 regulator_disable(arizona->dcvdd); 1392 err_enable: 1393 regulator_bulk_disable(arizona->num_core_supplies, 1394 arizona->core_supplies); 1395 err_dcvdd: 1396 regulator_put(arizona->dcvdd); 1397 err_early: 1398 mfd_remove_devices(dev); 1399 return ret; 1400 } 1401 EXPORT_SYMBOL_GPL(arizona_dev_init); 1402 1403 int arizona_dev_exit(struct arizona *arizona) 1404 { 1405 disable_irq(arizona->irq); 1406 pm_runtime_disable(arizona->dev); 1407 1408 regulator_disable(arizona->dcvdd); 1409 regulator_put(arizona->dcvdd); 1410 1411 switch (arizona->pdata.clk32k_src) { 1412 case ARIZONA_32KZ_MCLK1: 1413 case ARIZONA_32KZ_MCLK2: 1414 arizona_clk32k_disable(arizona); 1415 break; 1416 default: 1417 break; 1418 } 1419 1420 mfd_remove_devices(arizona->dev); 1421 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1422 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1423 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1424 arizona_irq_exit(arizona); 1425 arizona_enable_reset(arizona); 1426 1427 regulator_bulk_disable(arizona->num_core_supplies, 1428 arizona->core_supplies); 1429 return 0; 1430 } 1431 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1432 1433 MODULE_LICENSE("GPL v2"); 1434