1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Arizona core driver 4 * 5 * Copyright 2012 Wolfson Microelectronics plc 6 * 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/err.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/interrupt.h> 15 #include <linux/mfd/core.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/slab.h> 24 #include <linux/ktime.h> 25 #include <linux/platform_device.h> 26 27 #include <linux/mfd/arizona/core.h> 28 #include <linux/mfd/arizona/registers.h> 29 30 #include "arizona.h" 31 32 static const char * const wm5102_core_supplies[] = { 33 "AVDD", 34 "DBVDD1", 35 }; 36 37 int arizona_clk32k_enable(struct arizona *arizona) 38 { 39 int ret = 0; 40 41 mutex_lock(&arizona->clk_lock); 42 43 arizona->clk32k_ref++; 44 45 if (arizona->clk32k_ref == 1) { 46 switch (arizona->pdata.clk32k_src) { 47 case ARIZONA_32KZ_MCLK1: 48 ret = pm_runtime_get_sync(arizona->dev); 49 if (ret != 0) 50 goto err_ref; 51 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); 52 if (ret != 0) { 53 pm_runtime_put_sync(arizona->dev); 54 goto err_ref; 55 } 56 break; 57 case ARIZONA_32KZ_MCLK2: 58 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); 59 if (ret != 0) 60 goto err_ref; 61 break; 62 } 63 64 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 65 ARIZONA_CLK_32K_ENA, 66 ARIZONA_CLK_32K_ENA); 67 } 68 69 err_ref: 70 if (ret != 0) 71 arizona->clk32k_ref--; 72 73 mutex_unlock(&arizona->clk_lock); 74 75 return ret; 76 } 77 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 78 79 int arizona_clk32k_disable(struct arizona *arizona) 80 { 81 mutex_lock(&arizona->clk_lock); 82 83 WARN_ON(arizona->clk32k_ref <= 0); 84 85 arizona->clk32k_ref--; 86 87 if (arizona->clk32k_ref == 0) { 88 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 89 ARIZONA_CLK_32K_ENA, 0); 90 91 switch (arizona->pdata.clk32k_src) { 92 case ARIZONA_32KZ_MCLK1: 93 pm_runtime_put_sync(arizona->dev); 94 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); 95 break; 96 case ARIZONA_32KZ_MCLK2: 97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); 98 break; 99 } 100 } 101 102 mutex_unlock(&arizona->clk_lock); 103 104 return 0; 105 } 106 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 107 108 static irqreturn_t arizona_clkgen_err(int irq, void *data) 109 { 110 struct arizona *arizona = data; 111 112 dev_err(arizona->dev, "CLKGEN error\n"); 113 114 return IRQ_HANDLED; 115 } 116 117 static irqreturn_t arizona_underclocked(int irq, void *data) 118 { 119 struct arizona *arizona = data; 120 unsigned int val; 121 int ret; 122 123 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 124 &val); 125 if (ret != 0) { 126 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 127 ret); 128 return IRQ_NONE; 129 } 130 131 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 132 dev_err(arizona->dev, "AIF3 underclocked\n"); 133 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 134 dev_err(arizona->dev, "AIF2 underclocked\n"); 135 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 136 dev_err(arizona->dev, "AIF1 underclocked\n"); 137 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) 138 dev_err(arizona->dev, "ISRC3 underclocked\n"); 139 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 140 dev_err(arizona->dev, "ISRC2 underclocked\n"); 141 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 142 dev_err(arizona->dev, "ISRC1 underclocked\n"); 143 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 144 dev_err(arizona->dev, "FX underclocked\n"); 145 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 146 dev_err(arizona->dev, "ASRC underclocked\n"); 147 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 148 dev_err(arizona->dev, "DAC underclocked\n"); 149 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 150 dev_err(arizona->dev, "ADC underclocked\n"); 151 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 152 dev_err(arizona->dev, "Mixer dropped sample\n"); 153 154 return IRQ_HANDLED; 155 } 156 157 static irqreturn_t arizona_overclocked(int irq, void *data) 158 { 159 struct arizona *arizona = data; 160 unsigned int val[3]; 161 int ret; 162 163 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 164 &val[0], 3); 165 if (ret != 0) { 166 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 167 ret); 168 return IRQ_NONE; 169 } 170 171 switch (arizona->type) { 172 case WM8998: 173 case WM1814: 174 /* Some bits are shifted on WM8998, 175 * rearrange to match the standard bit layout 176 */ 177 val[0] = ((val[0] & 0x60e0) >> 1) | 178 ((val[0] & 0x1e00) >> 2) | 179 (val[0] & 0x000f); 180 break; 181 default: 182 break; 183 } 184 185 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 186 dev_err(arizona->dev, "PWM overclocked\n"); 187 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 188 dev_err(arizona->dev, "FX core overclocked\n"); 189 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 190 dev_err(arizona->dev, "DAC SYS overclocked\n"); 191 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 192 dev_err(arizona->dev, "DAC WARP overclocked\n"); 193 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 194 dev_err(arizona->dev, "ADC overclocked\n"); 195 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 196 dev_err(arizona->dev, "Mixer overclocked\n"); 197 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 198 dev_err(arizona->dev, "AIF3 overclocked\n"); 199 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 200 dev_err(arizona->dev, "AIF2 overclocked\n"); 201 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 202 dev_err(arizona->dev, "AIF1 overclocked\n"); 203 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 204 dev_err(arizona->dev, "Pad control overclocked\n"); 205 206 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 207 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 208 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 209 dev_err(arizona->dev, "Slimbus async overclocked\n"); 210 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 211 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 212 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 213 dev_err(arizona->dev, "ASRC async system overclocked\n"); 214 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 215 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 216 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 217 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 218 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 219 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 220 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 221 dev_err(arizona->dev, "DSP1 overclocked\n"); 222 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) 223 dev_err(arizona->dev, "ISRC3 overclocked\n"); 224 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 225 dev_err(arizona->dev, "ISRC2 overclocked\n"); 226 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 227 dev_err(arizona->dev, "ISRC1 overclocked\n"); 228 229 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) 230 dev_err(arizona->dev, "SPDIF overclocked\n"); 231 232 return IRQ_HANDLED; 233 } 234 235 #define ARIZONA_REG_POLL_DELAY_US 7500 236 237 static inline bool arizona_poll_reg_delay(ktime_t timeout) 238 { 239 if (ktime_compare(ktime_get(), timeout) > 0) 240 return false; 241 242 usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US); 243 244 return true; 245 } 246 247 static int arizona_poll_reg(struct arizona *arizona, 248 int timeout_ms, unsigned int reg, 249 unsigned int mask, unsigned int target) 250 { 251 ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC); 252 unsigned int val = 0; 253 int ret; 254 255 do { 256 ret = regmap_read(arizona->regmap, reg, &val); 257 258 if ((val & mask) == target) 259 return 0; 260 } while (arizona_poll_reg_delay(timeout)); 261 262 if (ret) { 263 dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n", 264 reg, ret); 265 return ret; 266 } 267 268 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val); 269 return -ETIMEDOUT; 270 } 271 272 static int arizona_wait_for_boot(struct arizona *arizona) 273 { 274 int ret; 275 276 /* 277 * We can't use an interrupt as we need to runtime resume to do so, 278 * we won't race with the interrupt handler as it'll be blocked on 279 * runtime resume. 280 */ 281 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, 282 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 283 284 if (!ret) 285 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 286 ARIZONA_BOOT_DONE_STS); 287 288 pm_runtime_mark_last_busy(arizona->dev); 289 290 return ret; 291 } 292 293 static inline void arizona_enable_reset(struct arizona *arizona) 294 { 295 if (arizona->pdata.reset) 296 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0); 297 } 298 299 static void arizona_disable_reset(struct arizona *arizona) 300 { 301 if (arizona->pdata.reset) { 302 switch (arizona->type) { 303 case WM5110: 304 case WM8280: 305 /* Meet requirements for minimum reset duration */ 306 usleep_range(5000, 10000); 307 break; 308 default: 309 break; 310 } 311 312 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1); 313 usleep_range(1000, 5000); 314 } 315 } 316 317 struct arizona_sysclk_state { 318 unsigned int fll; 319 unsigned int sysclk; 320 }; 321 322 static int arizona_enable_freerun_sysclk(struct arizona *arizona, 323 struct arizona_sysclk_state *state) 324 { 325 int ret, err; 326 327 /* Cache existing FLL and SYSCLK settings */ 328 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); 329 if (ret) { 330 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 331 ret); 332 return ret; 333 } 334 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 335 &state->sysclk); 336 if (ret) { 337 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 338 ret); 339 return ret; 340 } 341 342 /* Start up SYSCLK using the FLL in free running mode */ 343 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 344 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 345 if (ret) { 346 dev_err(arizona->dev, 347 "Failed to start FLL in freerunning mode: %d\n", 348 ret); 349 return ret; 350 } 351 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, 352 ARIZONA_FLL1_CLOCK_OK_STS, 353 ARIZONA_FLL1_CLOCK_OK_STS); 354 if (ret) 355 goto err_fll; 356 357 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 358 if (ret) { 359 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 360 goto err_fll; 361 } 362 363 return 0; 364 365 err_fll: 366 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 367 if (err) 368 dev_err(arizona->dev, 369 "Failed to re-apply old FLL settings: %d\n", err); 370 371 return ret; 372 } 373 374 static int arizona_disable_freerun_sysclk(struct arizona *arizona, 375 struct arizona_sysclk_state *state) 376 { 377 int ret; 378 379 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 380 state->sysclk); 381 if (ret) { 382 dev_err(arizona->dev, 383 "Failed to re-apply old SYSCLK settings: %d\n", ret); 384 return ret; 385 } 386 387 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 388 if (ret) { 389 dev_err(arizona->dev, 390 "Failed to re-apply old FLL settings: %d\n", ret); 391 return ret; 392 } 393 394 return 0; 395 } 396 397 static int wm5102_apply_hardware_patch(struct arizona *arizona) 398 { 399 struct arizona_sysclk_state state; 400 int err, ret; 401 402 ret = arizona_enable_freerun_sysclk(arizona, &state); 403 if (ret) 404 return ret; 405 406 /* Start the write sequencer and wait for it to finish */ 407 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 408 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 409 if (ret) { 410 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 411 ret); 412 goto err; 413 } 414 415 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, 416 ARIZONA_WSEQ_BUSY, 0); 417 if (ret) 418 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 419 ARIZONA_WSEQ_ABORT); 420 421 err: 422 err = arizona_disable_freerun_sysclk(arizona, &state); 423 424 return ret ?: err; 425 } 426 427 /* 428 * Register patch to some of the CODECs internal write sequences 429 * to ensure a clean exit from the low power sleep state. 430 */ 431 static const struct reg_sequence wm5110_sleep_patch[] = { 432 { 0x337A, 0xC100 }, 433 { 0x337B, 0x0041 }, 434 { 0x3300, 0xA210 }, 435 { 0x3301, 0x050C }, 436 }; 437 438 static int wm5110_apply_sleep_patch(struct arizona *arizona) 439 { 440 struct arizona_sysclk_state state; 441 int err, ret; 442 443 ret = arizona_enable_freerun_sysclk(arizona, &state); 444 if (ret) 445 return ret; 446 447 ret = regmap_multi_reg_write_bypassed(arizona->regmap, 448 wm5110_sleep_patch, 449 ARRAY_SIZE(wm5110_sleep_patch)); 450 451 err = arizona_disable_freerun_sysclk(arizona, &state); 452 453 return ret ?: err; 454 } 455 456 static int wm5102_clear_write_sequencer(struct arizona *arizona) 457 { 458 int ret; 459 460 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, 461 0x0); 462 if (ret) { 463 dev_err(arizona->dev, 464 "Failed to clear write sequencer state: %d\n", ret); 465 return ret; 466 } 467 468 arizona_enable_reset(arizona); 469 regulator_disable(arizona->dcvdd); 470 471 msleep(20); 472 473 ret = regulator_enable(arizona->dcvdd); 474 if (ret) { 475 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); 476 return ret; 477 } 478 arizona_disable_reset(arizona); 479 480 return 0; 481 } 482 483 #ifdef CONFIG_PM 484 static int arizona_isolate_dcvdd(struct arizona *arizona) 485 { 486 int ret; 487 488 ret = regmap_update_bits(arizona->regmap, 489 ARIZONA_ISOLATION_CONTROL, 490 ARIZONA_ISOLATE_DCVDD1, 491 ARIZONA_ISOLATE_DCVDD1); 492 if (ret != 0) 493 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); 494 495 return ret; 496 } 497 498 static int arizona_connect_dcvdd(struct arizona *arizona) 499 { 500 int ret; 501 502 ret = regmap_update_bits(arizona->regmap, 503 ARIZONA_ISOLATION_CONTROL, 504 ARIZONA_ISOLATE_DCVDD1, 0); 505 if (ret != 0) 506 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); 507 508 return ret; 509 } 510 511 static int arizona_is_jack_det_active(struct arizona *arizona) 512 { 513 unsigned int val; 514 int ret; 515 516 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); 517 if (ret) { 518 dev_err(arizona->dev, 519 "Failed to check jack det status: %d\n", ret); 520 return ret; 521 } else if (val & ARIZONA_JD1_ENA) { 522 return 1; 523 } else { 524 return 0; 525 } 526 } 527 528 static int arizona_runtime_resume(struct device *dev) 529 { 530 struct arizona *arizona = dev_get_drvdata(dev); 531 int ret; 532 533 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 534 535 if (arizona->has_fully_powered_off) { 536 dev_dbg(arizona->dev, "Re-enabling core supplies\n"); 537 538 ret = regulator_bulk_enable(arizona->num_core_supplies, 539 arizona->core_supplies); 540 if (ret) { 541 dev_err(dev, "Failed to enable core supplies: %d\n", 542 ret); 543 return ret; 544 } 545 } 546 547 ret = regulator_enable(arizona->dcvdd); 548 if (ret != 0) { 549 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 550 if (arizona->has_fully_powered_off) 551 regulator_bulk_disable(arizona->num_core_supplies, 552 arizona->core_supplies); 553 return ret; 554 } 555 556 if (arizona->has_fully_powered_off) { 557 arizona_disable_reset(arizona); 558 enable_irq(arizona->irq); 559 arizona->has_fully_powered_off = false; 560 } 561 562 regcache_cache_only(arizona->regmap, false); 563 564 switch (arizona->type) { 565 case WM5102: 566 if (arizona->external_dcvdd) { 567 ret = arizona_connect_dcvdd(arizona); 568 if (ret != 0) 569 goto err; 570 } 571 572 ret = wm5102_patch(arizona); 573 if (ret != 0) { 574 dev_err(arizona->dev, "Failed to apply patch: %d\n", 575 ret); 576 goto err; 577 } 578 579 ret = wm5102_apply_hardware_patch(arizona); 580 if (ret) { 581 dev_err(arizona->dev, 582 "Failed to apply hardware patch: %d\n", 583 ret); 584 goto err; 585 } 586 break; 587 case WM5110: 588 case WM8280: 589 ret = arizona_wait_for_boot(arizona); 590 if (ret) 591 goto err; 592 593 if (arizona->external_dcvdd) { 594 ret = arizona_connect_dcvdd(arizona); 595 if (ret != 0) 596 goto err; 597 } else { 598 /* 599 * As this is only called for the internal regulator 600 * (where we know voltage ranges available) it is ok 601 * to request an exact range. 602 */ 603 ret = regulator_set_voltage(arizona->dcvdd, 604 1200000, 1200000); 605 if (ret < 0) { 606 dev_err(arizona->dev, 607 "Failed to set resume voltage: %d\n", 608 ret); 609 goto err; 610 } 611 } 612 613 ret = wm5110_apply_sleep_patch(arizona); 614 if (ret) { 615 dev_err(arizona->dev, 616 "Failed to re-apply sleep patch: %d\n", 617 ret); 618 goto err; 619 } 620 break; 621 case WM1831: 622 case CS47L24: 623 ret = arizona_wait_for_boot(arizona); 624 if (ret != 0) 625 goto err; 626 break; 627 default: 628 ret = arizona_wait_for_boot(arizona); 629 if (ret != 0) 630 goto err; 631 632 if (arizona->external_dcvdd) { 633 ret = arizona_connect_dcvdd(arizona); 634 if (ret != 0) 635 goto err; 636 } 637 break; 638 } 639 640 ret = regcache_sync(arizona->regmap); 641 if (ret != 0) { 642 dev_err(arizona->dev, "Failed to restore register cache\n"); 643 goto err; 644 } 645 646 return 0; 647 648 err: 649 regcache_cache_only(arizona->regmap, true); 650 regulator_disable(arizona->dcvdd); 651 return ret; 652 } 653 654 static int arizona_runtime_suspend(struct device *dev) 655 { 656 struct arizona *arizona = dev_get_drvdata(dev); 657 int jd_active = 0; 658 int ret; 659 660 dev_dbg(arizona->dev, "Entering AoD mode\n"); 661 662 switch (arizona->type) { 663 case WM5110: 664 case WM8280: 665 jd_active = arizona_is_jack_det_active(arizona); 666 if (jd_active < 0) 667 return jd_active; 668 669 if (arizona->external_dcvdd) { 670 ret = arizona_isolate_dcvdd(arizona); 671 if (ret != 0) 672 return ret; 673 } else { 674 /* 675 * As this is only called for the internal regulator 676 * (where we know voltage ranges available) it is ok 677 * to request an exact range. 678 */ 679 ret = regulator_set_voltage(arizona->dcvdd, 680 1175000, 1175000); 681 if (ret < 0) { 682 dev_err(arizona->dev, 683 "Failed to set suspend voltage: %d\n", 684 ret); 685 return ret; 686 } 687 } 688 break; 689 case WM5102: 690 jd_active = arizona_is_jack_det_active(arizona); 691 if (jd_active < 0) 692 return jd_active; 693 694 if (arizona->external_dcvdd) { 695 ret = arizona_isolate_dcvdd(arizona); 696 if (ret != 0) 697 return ret; 698 } 699 700 if (!jd_active) { 701 ret = regmap_write(arizona->regmap, 702 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); 703 if (ret) { 704 dev_err(arizona->dev, 705 "Failed to clear write sequencer: %d\n", 706 ret); 707 return ret; 708 } 709 } 710 break; 711 case WM1831: 712 case CS47L24: 713 break; 714 default: 715 jd_active = arizona_is_jack_det_active(arizona); 716 if (jd_active < 0) 717 return jd_active; 718 719 if (arizona->external_dcvdd) { 720 ret = arizona_isolate_dcvdd(arizona); 721 if (ret != 0) 722 return ret; 723 } 724 break; 725 } 726 727 regcache_cache_only(arizona->regmap, true); 728 regcache_mark_dirty(arizona->regmap); 729 regulator_disable(arizona->dcvdd); 730 731 /* Allow us to completely power down if no jack detection */ 732 if (!jd_active) { 733 dev_dbg(arizona->dev, "Fully powering off\n"); 734 735 arizona->has_fully_powered_off = true; 736 737 disable_irq_nosync(arizona->irq); 738 arizona_enable_reset(arizona); 739 regulator_bulk_disable(arizona->num_core_supplies, 740 arizona->core_supplies); 741 } 742 743 return 0; 744 } 745 #endif 746 747 #ifdef CONFIG_PM_SLEEP 748 static int arizona_suspend(struct device *dev) 749 { 750 struct arizona *arizona = dev_get_drvdata(dev); 751 752 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 753 disable_irq(arizona->irq); 754 755 return 0; 756 } 757 758 static int arizona_suspend_noirq(struct device *dev) 759 { 760 struct arizona *arizona = dev_get_drvdata(dev); 761 762 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 763 enable_irq(arizona->irq); 764 765 return 0; 766 } 767 768 static int arizona_resume_noirq(struct device *dev) 769 { 770 struct arizona *arizona = dev_get_drvdata(dev); 771 772 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 773 disable_irq(arizona->irq); 774 775 return 0; 776 } 777 778 static int arizona_resume(struct device *dev) 779 { 780 struct arizona *arizona = dev_get_drvdata(dev); 781 782 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); 783 enable_irq(arizona->irq); 784 785 return 0; 786 } 787 #endif 788 789 const struct dev_pm_ops arizona_pm_ops = { 790 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 791 arizona_runtime_resume, 792 NULL) 793 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 794 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, 795 arizona_resume_noirq) 796 }; 797 EXPORT_SYMBOL_GPL(arizona_pm_ops); 798 799 #ifdef CONFIG_OF 800 static int arizona_of_get_core_pdata(struct arizona *arizona) 801 { 802 struct arizona_pdata *pdata = &arizona->pdata; 803 int ret, i; 804 805 /* Handle old non-standard DT binding */ 806 pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW); 807 if (IS_ERR(pdata->reset)) { 808 ret = PTR_ERR(pdata->reset); 809 810 /* 811 * Reset missing will be caught when other binding is read 812 * but all other errors imply this binding is in use but has 813 * encountered a problem so should be handled. 814 */ 815 if (ret == -EPROBE_DEFER) 816 return ret; 817 else if (ret != -ENOENT && ret != -ENOSYS) 818 dev_err(arizona->dev, "Reset GPIO malformed: %d\n", 819 ret); 820 821 pdata->reset = NULL; 822 } 823 824 ret = of_property_read_u32_array(arizona->dev->of_node, 825 "wlf,gpio-defaults", 826 pdata->gpio_defaults, 827 ARRAY_SIZE(pdata->gpio_defaults)); 828 if (ret >= 0) { 829 /* 830 * All values are literal except out of range values 831 * which are chip default, translate into platform 832 * data which uses 0 as chip default and out of range 833 * as zero. 834 */ 835 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { 836 if (pdata->gpio_defaults[i] > 0xffff) 837 pdata->gpio_defaults[i] = 0; 838 else if (pdata->gpio_defaults[i] == 0) 839 pdata->gpio_defaults[i] = 0x10000; 840 } 841 } else { 842 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 843 ret); 844 } 845 846 return 0; 847 } 848 849 const struct of_device_id arizona_of_match[] = { 850 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 851 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 852 { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, 853 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 854 { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, 855 { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, 856 { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, 857 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, 858 {}, 859 }; 860 EXPORT_SYMBOL_GPL(arizona_of_match); 861 #else 862 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 863 { 864 return 0; 865 } 866 #endif 867 868 static const struct mfd_cell early_devs[] = { 869 { .name = "arizona-ldo1" }, 870 }; 871 872 static const char * const wm5102_supplies[] = { 873 "MICVDD", 874 "DBVDD2", 875 "DBVDD3", 876 "CPVDD", 877 "SPKVDDL", 878 "SPKVDDR", 879 }; 880 881 static const struct mfd_cell wm5102_devs[] = { 882 { .name = "arizona-micsupp" }, 883 { .name = "arizona-gpio" }, 884 { .name = "arizona-haptics" }, 885 { .name = "arizona-pwm" }, 886 { 887 .name = "wm5102-codec", 888 .parent_supplies = wm5102_supplies, 889 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 890 }, 891 }; 892 893 static const struct mfd_cell wm5110_devs[] = { 894 { .name = "arizona-micsupp" }, 895 { .name = "arizona-gpio" }, 896 { .name = "arizona-haptics" }, 897 { .name = "arizona-pwm" }, 898 { 899 .name = "wm5110-codec", 900 .parent_supplies = wm5102_supplies, 901 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 902 }, 903 }; 904 905 static const char * const cs47l24_supplies[] = { 906 "MICVDD", 907 "CPVDD", 908 "SPKVDD", 909 }; 910 911 static const struct mfd_cell cs47l24_devs[] = { 912 { .name = "arizona-gpio" }, 913 { .name = "arizona-haptics" }, 914 { .name = "arizona-pwm" }, 915 { 916 .name = "cs47l24-codec", 917 .parent_supplies = cs47l24_supplies, 918 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), 919 }, 920 }; 921 922 static const char * const wm8997_supplies[] = { 923 "MICVDD", 924 "DBVDD2", 925 "CPVDD", 926 "SPKVDD", 927 }; 928 929 static const struct mfd_cell wm8997_devs[] = { 930 { .name = "arizona-micsupp" }, 931 { .name = "arizona-gpio" }, 932 { .name = "arizona-haptics" }, 933 { .name = "arizona-pwm" }, 934 { 935 .name = "wm8997-codec", 936 .parent_supplies = wm8997_supplies, 937 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 938 }, 939 }; 940 941 static const struct mfd_cell wm8998_devs[] = { 942 { .name = "arizona-micsupp" }, 943 { .name = "arizona-gpio" }, 944 { .name = "arizona-haptics" }, 945 { .name = "arizona-pwm" }, 946 { 947 .name = "wm8998-codec", 948 .parent_supplies = wm5102_supplies, 949 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 950 }, 951 }; 952 953 int arizona_dev_init(struct arizona *arizona) 954 { 955 static const char * const mclk_name[] = { "mclk1", "mclk2" }; 956 struct device *dev = arizona->dev; 957 const char *type_name = NULL; 958 unsigned int reg, val; 959 int (*apply_patch)(struct arizona *) = NULL; 960 const struct mfd_cell *subdevs = NULL; 961 int n_subdevs = 0, ret, i; 962 963 dev_set_drvdata(arizona->dev, arizona); 964 mutex_init(&arizona->clk_lock); 965 966 if (dev_get_platdata(arizona->dev)) { 967 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 968 sizeof(arizona->pdata)); 969 } else { 970 ret = arizona_of_get_core_pdata(arizona); 971 if (ret < 0) 972 return ret; 973 } 974 975 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); 976 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { 977 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); 978 if (IS_ERR(arizona->mclk[i])) { 979 dev_info(arizona->dev, "Failed to get %s: %ld\n", 980 mclk_name[i], PTR_ERR(arizona->mclk[i])); 981 arizona->mclk[i] = NULL; 982 } 983 } 984 985 regcache_cache_only(arizona->regmap, true); 986 987 switch (arizona->type) { 988 case WM5102: 989 case WM5110: 990 case WM8280: 991 case WM8997: 992 case WM8998: 993 case WM1814: 994 case WM1831: 995 case CS47L24: 996 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 997 arizona->core_supplies[i].supply 998 = wm5102_core_supplies[i]; 999 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 1000 break; 1001 default: 1002 dev_err(arizona->dev, "Unknown device type %d\n", 1003 arizona->type); 1004 return -ENODEV; 1005 } 1006 1007 /* Mark DCVDD as external, LDO1 driver will clear if internal */ 1008 arizona->external_dcvdd = true; 1009 1010 switch (arizona->type) { 1011 case WM1831: 1012 case CS47L24: 1013 break; /* No LDO1 regulator */ 1014 default: 1015 ret = mfd_add_devices(arizona->dev, -1, early_devs, 1016 ARRAY_SIZE(early_devs), NULL, 0, NULL); 1017 if (ret != 0) { 1018 dev_err(dev, "Failed to add early children: %d\n", ret); 1019 return ret; 1020 } 1021 break; 1022 } 1023 1024 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 1025 arizona->core_supplies); 1026 if (ret != 0) { 1027 dev_err(dev, "Failed to request core supplies: %d\n", 1028 ret); 1029 goto err_early; 1030 } 1031 1032 /** 1033 * Don't use devres here because the only device we have to get 1034 * against is the MFD device and DCVDD will likely be supplied by 1035 * one of its children. Meaning that the regulator will be 1036 * destroyed by the time devres calls regulator put. 1037 */ 1038 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); 1039 if (IS_ERR(arizona->dcvdd)) { 1040 ret = PTR_ERR(arizona->dcvdd); 1041 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 1042 goto err_early; 1043 } 1044 1045 if (!arizona->pdata.reset) { 1046 /* Start out with /RESET low to put the chip into reset */ 1047 arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset", 1048 GPIOD_OUT_LOW); 1049 if (IS_ERR(arizona->pdata.reset)) { 1050 ret = PTR_ERR(arizona->pdata.reset); 1051 if (ret == -EPROBE_DEFER) 1052 goto err_dcvdd; 1053 1054 dev_err(arizona->dev, 1055 "Reset GPIO missing/malformed: %d\n", ret); 1056 1057 arizona->pdata.reset = NULL; 1058 } 1059 } 1060 1061 ret = regulator_bulk_enable(arizona->num_core_supplies, 1062 arizona->core_supplies); 1063 if (ret != 0) { 1064 dev_err(dev, "Failed to enable core supplies: %d\n", 1065 ret); 1066 goto err_dcvdd; 1067 } 1068 1069 ret = regulator_enable(arizona->dcvdd); 1070 if (ret != 0) { 1071 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 1072 goto err_enable; 1073 } 1074 1075 arizona_disable_reset(arizona); 1076 1077 regcache_cache_only(arizona->regmap, false); 1078 1079 /* Verify that this is a chip we know about */ 1080 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1081 if (ret != 0) { 1082 dev_err(dev, "Failed to read ID register: %d\n", ret); 1083 goto err_reset; 1084 } 1085 1086 switch (reg) { 1087 case 0x5102: 1088 case 0x5110: 1089 case 0x6349: 1090 case 0x6363: 1091 case 0x8997: 1092 break; 1093 default: 1094 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 1095 ret = -ENODEV; 1096 goto err_reset; 1097 } 1098 1099 /* If we have a /RESET GPIO we'll already be reset */ 1100 if (!arizona->pdata.reset) { 1101 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 1102 if (ret != 0) { 1103 dev_err(dev, "Failed to reset device: %d\n", ret); 1104 goto err_reset; 1105 } 1106 1107 usleep_range(1000, 5000); 1108 } 1109 1110 /* Ensure device startup is complete */ 1111 switch (arizona->type) { 1112 case WM5102: 1113 ret = regmap_read(arizona->regmap, 1114 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); 1115 if (ret) { 1116 dev_err(dev, 1117 "Failed to check write sequencer state: %d\n", 1118 ret); 1119 } else if (val & 0x01) { 1120 ret = wm5102_clear_write_sequencer(arizona); 1121 if (ret) 1122 return ret; 1123 } 1124 break; 1125 default: 1126 break; 1127 } 1128 1129 ret = arizona_wait_for_boot(arizona); 1130 if (ret) { 1131 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); 1132 goto err_reset; 1133 } 1134 1135 /* Read the device ID information & do device specific stuff */ 1136 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1137 if (ret != 0) { 1138 dev_err(dev, "Failed to read ID register: %d\n", ret); 1139 goto err_reset; 1140 } 1141 1142 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 1143 &arizona->rev); 1144 if (ret != 0) { 1145 dev_err(dev, "Failed to read revision register: %d\n", ret); 1146 goto err_reset; 1147 } 1148 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 1149 1150 switch (reg) { 1151 case 0x5102: 1152 if (IS_ENABLED(CONFIG_MFD_WM5102)) { 1153 type_name = "WM5102"; 1154 if (arizona->type != WM5102) { 1155 dev_warn(arizona->dev, 1156 "WM5102 registered as %d\n", 1157 arizona->type); 1158 arizona->type = WM5102; 1159 } 1160 1161 apply_patch = wm5102_patch; 1162 arizona->rev &= 0x7; 1163 subdevs = wm5102_devs; 1164 n_subdevs = ARRAY_SIZE(wm5102_devs); 1165 } 1166 break; 1167 case 0x5110: 1168 if (IS_ENABLED(CONFIG_MFD_WM5110)) { 1169 switch (arizona->type) { 1170 case WM5110: 1171 type_name = "WM5110"; 1172 break; 1173 case WM8280: 1174 type_name = "WM8280"; 1175 break; 1176 default: 1177 type_name = "WM5110"; 1178 dev_warn(arizona->dev, 1179 "WM5110 registered as %d\n", 1180 arizona->type); 1181 arizona->type = WM5110; 1182 break; 1183 } 1184 1185 apply_patch = wm5110_patch; 1186 subdevs = wm5110_devs; 1187 n_subdevs = ARRAY_SIZE(wm5110_devs); 1188 } 1189 break; 1190 case 0x6363: 1191 if (IS_ENABLED(CONFIG_MFD_CS47L24)) { 1192 switch (arizona->type) { 1193 case CS47L24: 1194 type_name = "CS47L24"; 1195 break; 1196 1197 case WM1831: 1198 type_name = "WM1831"; 1199 break; 1200 1201 default: 1202 dev_warn(arizona->dev, 1203 "CS47L24 registered as %d\n", 1204 arizona->type); 1205 arizona->type = CS47L24; 1206 break; 1207 } 1208 1209 apply_patch = cs47l24_patch; 1210 subdevs = cs47l24_devs; 1211 n_subdevs = ARRAY_SIZE(cs47l24_devs); 1212 } 1213 break; 1214 case 0x8997: 1215 if (IS_ENABLED(CONFIG_MFD_WM8997)) { 1216 type_name = "WM8997"; 1217 if (arizona->type != WM8997) { 1218 dev_warn(arizona->dev, 1219 "WM8997 registered as %d\n", 1220 arizona->type); 1221 arizona->type = WM8997; 1222 } 1223 1224 apply_patch = wm8997_patch; 1225 subdevs = wm8997_devs; 1226 n_subdevs = ARRAY_SIZE(wm8997_devs); 1227 } 1228 break; 1229 case 0x6349: 1230 if (IS_ENABLED(CONFIG_MFD_WM8998)) { 1231 switch (arizona->type) { 1232 case WM8998: 1233 type_name = "WM8998"; 1234 break; 1235 1236 case WM1814: 1237 type_name = "WM1814"; 1238 break; 1239 1240 default: 1241 type_name = "WM8998"; 1242 dev_warn(arizona->dev, 1243 "WM8998 registered as %d\n", 1244 arizona->type); 1245 arizona->type = WM8998; 1246 } 1247 1248 apply_patch = wm8998_patch; 1249 subdevs = wm8998_devs; 1250 n_subdevs = ARRAY_SIZE(wm8998_devs); 1251 } 1252 break; 1253 default: 1254 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 1255 ret = -ENODEV; 1256 goto err_reset; 1257 } 1258 1259 if (!subdevs) { 1260 dev_err(arizona->dev, 1261 "No kernel support for device ID %x\n", reg); 1262 ret = -ENODEV; 1263 goto err_reset; 1264 } 1265 1266 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 1267 1268 if (apply_patch) { 1269 ret = apply_patch(arizona); 1270 if (ret != 0) { 1271 dev_err(arizona->dev, "Failed to apply patch: %d\n", 1272 ret); 1273 goto err_reset; 1274 } 1275 1276 switch (arizona->type) { 1277 case WM5102: 1278 ret = wm5102_apply_hardware_patch(arizona); 1279 if (ret) { 1280 dev_err(arizona->dev, 1281 "Failed to apply hardware patch: %d\n", 1282 ret); 1283 goto err_reset; 1284 } 1285 break; 1286 case WM5110: 1287 case WM8280: 1288 ret = wm5110_apply_sleep_patch(arizona); 1289 if (ret) { 1290 dev_err(arizona->dev, 1291 "Failed to apply sleep patch: %d\n", 1292 ret); 1293 goto err_reset; 1294 } 1295 break; 1296 default: 1297 break; 1298 } 1299 } 1300 1301 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 1302 if (!arizona->pdata.gpio_defaults[i]) 1303 continue; 1304 1305 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 1306 arizona->pdata.gpio_defaults[i]); 1307 } 1308 1309 /* Chip default */ 1310 if (!arizona->pdata.clk32k_src) 1311 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 1312 1313 switch (arizona->pdata.clk32k_src) { 1314 case ARIZONA_32KZ_MCLK1: 1315 case ARIZONA_32KZ_MCLK2: 1316 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1317 ARIZONA_CLK_32K_SRC_MASK, 1318 arizona->pdata.clk32k_src - 1); 1319 arizona_clk32k_enable(arizona); 1320 break; 1321 case ARIZONA_32KZ_NONE: 1322 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1323 ARIZONA_CLK_32K_SRC_MASK, 2); 1324 break; 1325 default: 1326 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 1327 arizona->pdata.clk32k_src); 1328 ret = -EINVAL; 1329 goto err_reset; 1330 } 1331 1332 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 1333 if (!arizona->pdata.micbias[i].mV && 1334 !arizona->pdata.micbias[i].bypass) 1335 continue; 1336 1337 /* Apply default for bypass mode */ 1338 if (!arizona->pdata.micbias[i].mV) 1339 arizona->pdata.micbias[i].mV = 2800; 1340 1341 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 1342 1343 val <<= ARIZONA_MICB1_LVL_SHIFT; 1344 1345 if (arizona->pdata.micbias[i].ext_cap) 1346 val |= ARIZONA_MICB1_EXT_CAP; 1347 1348 if (arizona->pdata.micbias[i].discharge) 1349 val |= ARIZONA_MICB1_DISCH; 1350 1351 if (arizona->pdata.micbias[i].soft_start) 1352 val |= ARIZONA_MICB1_RATE; 1353 1354 if (arizona->pdata.micbias[i].bypass) 1355 val |= ARIZONA_MICB1_BYPASS; 1356 1357 regmap_update_bits(arizona->regmap, 1358 ARIZONA_MIC_BIAS_CTRL_1 + i, 1359 ARIZONA_MICB1_LVL_MASK | 1360 ARIZONA_MICB1_EXT_CAP | 1361 ARIZONA_MICB1_DISCH | 1362 ARIZONA_MICB1_BYPASS | 1363 ARIZONA_MICB1_RATE, val); 1364 } 1365 1366 pm_runtime_set_active(arizona->dev); 1367 pm_runtime_enable(arizona->dev); 1368 1369 /* Set up for interrupts */ 1370 ret = arizona_irq_init(arizona); 1371 if (ret != 0) 1372 goto err_pm; 1373 1374 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 1375 pm_runtime_use_autosuspend(arizona->dev); 1376 1377 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 1378 arizona_clkgen_err, arizona); 1379 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 1380 arizona_overclocked, arizona); 1381 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 1382 arizona_underclocked, arizona); 1383 1384 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, 1385 subdevs, n_subdevs, NULL, 0, NULL); 1386 1387 if (ret) { 1388 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 1389 goto err_irq; 1390 } 1391 1392 return 0; 1393 1394 err_irq: 1395 arizona_irq_exit(arizona); 1396 err_pm: 1397 pm_runtime_disable(arizona->dev); 1398 1399 switch (arizona->pdata.clk32k_src) { 1400 case ARIZONA_32KZ_MCLK1: 1401 case ARIZONA_32KZ_MCLK2: 1402 arizona_clk32k_disable(arizona); 1403 break; 1404 default: 1405 break; 1406 } 1407 err_reset: 1408 arizona_enable_reset(arizona); 1409 regulator_disable(arizona->dcvdd); 1410 err_enable: 1411 regulator_bulk_disable(arizona->num_core_supplies, 1412 arizona->core_supplies); 1413 err_dcvdd: 1414 regulator_put(arizona->dcvdd); 1415 err_early: 1416 mfd_remove_devices(dev); 1417 return ret; 1418 } 1419 EXPORT_SYMBOL_GPL(arizona_dev_init); 1420 1421 int arizona_dev_exit(struct arizona *arizona) 1422 { 1423 disable_irq(arizona->irq); 1424 pm_runtime_disable(arizona->dev); 1425 1426 regulator_disable(arizona->dcvdd); 1427 regulator_put(arizona->dcvdd); 1428 1429 switch (arizona->pdata.clk32k_src) { 1430 case ARIZONA_32KZ_MCLK1: 1431 case ARIZONA_32KZ_MCLK2: 1432 arizona_clk32k_disable(arizona); 1433 break; 1434 default: 1435 break; 1436 } 1437 1438 mfd_remove_devices(arizona->dev); 1439 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1440 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1441 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1442 arizona_irq_exit(arizona); 1443 arizona_enable_reset(arizona); 1444 1445 regulator_bulk_disable(arizona->num_core_supplies, 1446 arizona->core_supplies); 1447 return 0; 1448 } 1449 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1450