1 /* 2 * Arizona core driver 3 * 4 * Copyright 2012 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/err.h> 15 #include <linux/gpio.h> 16 #include <linux/interrupt.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_device.h> 21 #include <linux/of_gpio.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 #include <linux/regulator/consumer.h> 25 #include <linux/regulator/machine.h> 26 #include <linux/slab.h> 27 #include <linux/platform_device.h> 28 29 #include <linux/mfd/arizona/core.h> 30 #include <linux/mfd/arizona/registers.h> 31 32 #include "arizona.h" 33 34 static const char * const wm5102_core_supplies[] = { 35 "AVDD", 36 "DBVDD1", 37 }; 38 39 int arizona_clk32k_enable(struct arizona *arizona) 40 { 41 int ret = 0; 42 43 mutex_lock(&arizona->clk_lock); 44 45 arizona->clk32k_ref++; 46 47 if (arizona->clk32k_ref == 1) { 48 switch (arizona->pdata.clk32k_src) { 49 case ARIZONA_32KZ_MCLK1: 50 ret = pm_runtime_get_sync(arizona->dev); 51 if (ret != 0) 52 goto out; 53 break; 54 } 55 56 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 57 ARIZONA_CLK_32K_ENA, 58 ARIZONA_CLK_32K_ENA); 59 } 60 61 out: 62 if (ret != 0) 63 arizona->clk32k_ref--; 64 65 mutex_unlock(&arizona->clk_lock); 66 67 return ret; 68 } 69 EXPORT_SYMBOL_GPL(arizona_clk32k_enable); 70 71 int arizona_clk32k_disable(struct arizona *arizona) 72 { 73 mutex_lock(&arizona->clk_lock); 74 75 BUG_ON(arizona->clk32k_ref <= 0); 76 77 arizona->clk32k_ref--; 78 79 if (arizona->clk32k_ref == 0) { 80 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 81 ARIZONA_CLK_32K_ENA, 0); 82 83 switch (arizona->pdata.clk32k_src) { 84 case ARIZONA_32KZ_MCLK1: 85 pm_runtime_put_sync(arizona->dev); 86 break; 87 } 88 } 89 90 mutex_unlock(&arizona->clk_lock); 91 92 return 0; 93 } 94 EXPORT_SYMBOL_GPL(arizona_clk32k_disable); 95 96 static irqreturn_t arizona_clkgen_err(int irq, void *data) 97 { 98 struct arizona *arizona = data; 99 100 dev_err(arizona->dev, "CLKGEN error\n"); 101 102 return IRQ_HANDLED; 103 } 104 105 static irqreturn_t arizona_underclocked(int irq, void *data) 106 { 107 struct arizona *arizona = data; 108 unsigned int val; 109 int ret; 110 111 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, 112 &val); 113 if (ret != 0) { 114 dev_err(arizona->dev, "Failed to read underclock status: %d\n", 115 ret); 116 return IRQ_NONE; 117 } 118 119 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) 120 dev_err(arizona->dev, "AIF3 underclocked\n"); 121 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) 122 dev_err(arizona->dev, "AIF2 underclocked\n"); 123 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) 124 dev_err(arizona->dev, "AIF1 underclocked\n"); 125 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) 126 dev_err(arizona->dev, "ISRC3 underclocked\n"); 127 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) 128 dev_err(arizona->dev, "ISRC2 underclocked\n"); 129 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) 130 dev_err(arizona->dev, "ISRC1 underclocked\n"); 131 if (val & ARIZONA_FX_UNDERCLOCKED_STS) 132 dev_err(arizona->dev, "FX underclocked\n"); 133 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) 134 dev_err(arizona->dev, "ASRC underclocked\n"); 135 if (val & ARIZONA_DAC_UNDERCLOCKED_STS) 136 dev_err(arizona->dev, "DAC underclocked\n"); 137 if (val & ARIZONA_ADC_UNDERCLOCKED_STS) 138 dev_err(arizona->dev, "ADC underclocked\n"); 139 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) 140 dev_err(arizona->dev, "Mixer dropped sample\n"); 141 142 return IRQ_HANDLED; 143 } 144 145 static irqreturn_t arizona_overclocked(int irq, void *data) 146 { 147 struct arizona *arizona = data; 148 unsigned int val[3]; 149 int ret; 150 151 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, 152 &val[0], 3); 153 if (ret != 0) { 154 dev_err(arizona->dev, "Failed to read overclock status: %d\n", 155 ret); 156 return IRQ_NONE; 157 } 158 159 switch (arizona->type) { 160 case WM8998: 161 case WM1814: 162 /* Some bits are shifted on WM8998, 163 * rearrange to match the standard bit layout 164 */ 165 val[0] = ((val[0] & 0x60e0) >> 1) | 166 ((val[0] & 0x1e00) >> 2) | 167 (val[0] & 0x000f); 168 break; 169 default: 170 break; 171 } 172 173 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) 174 dev_err(arizona->dev, "PWM overclocked\n"); 175 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) 176 dev_err(arizona->dev, "FX core overclocked\n"); 177 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) 178 dev_err(arizona->dev, "DAC SYS overclocked\n"); 179 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) 180 dev_err(arizona->dev, "DAC WARP overclocked\n"); 181 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) 182 dev_err(arizona->dev, "ADC overclocked\n"); 183 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) 184 dev_err(arizona->dev, "Mixer overclocked\n"); 185 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) 186 dev_err(arizona->dev, "AIF3 overclocked\n"); 187 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) 188 dev_err(arizona->dev, "AIF2 overclocked\n"); 189 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) 190 dev_err(arizona->dev, "AIF1 overclocked\n"); 191 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) 192 dev_err(arizona->dev, "Pad control overclocked\n"); 193 194 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) 195 dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); 196 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) 197 dev_err(arizona->dev, "Slimbus async overclocked\n"); 198 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) 199 dev_err(arizona->dev, "Slimbus sync overclocked\n"); 200 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) 201 dev_err(arizona->dev, "ASRC async system overclocked\n"); 202 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) 203 dev_err(arizona->dev, "ASRC async WARP overclocked\n"); 204 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) 205 dev_err(arizona->dev, "ASRC sync system overclocked\n"); 206 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) 207 dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); 208 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) 209 dev_err(arizona->dev, "DSP1 overclocked\n"); 210 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) 211 dev_err(arizona->dev, "ISRC3 overclocked\n"); 212 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) 213 dev_err(arizona->dev, "ISRC2 overclocked\n"); 214 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) 215 dev_err(arizona->dev, "ISRC1 overclocked\n"); 216 217 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) 218 dev_err(arizona->dev, "SPDIF overclocked\n"); 219 220 return IRQ_HANDLED; 221 } 222 223 static int arizona_poll_reg(struct arizona *arizona, 224 int timeout, unsigned int reg, 225 unsigned int mask, unsigned int target) 226 { 227 unsigned int val = 0; 228 int ret, i; 229 230 for (i = 0; i < timeout; i++) { 231 ret = regmap_read(arizona->regmap, reg, &val); 232 if (ret != 0) { 233 dev_err(arizona->dev, "Failed to read reg %u: %d\n", 234 reg, ret); 235 continue; 236 } 237 238 if ((val & mask) == target) 239 return 0; 240 241 usleep_range(1000, 5000); 242 } 243 244 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); 245 return -ETIMEDOUT; 246 } 247 248 static int arizona_wait_for_boot(struct arizona *arizona) 249 { 250 int ret; 251 252 /* 253 * We can't use an interrupt as we need to runtime resume to do so, 254 * we won't race with the interrupt handler as it'll be blocked on 255 * runtime resume. 256 */ 257 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, 258 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); 259 260 if (!ret) 261 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, 262 ARIZONA_BOOT_DONE_STS); 263 264 pm_runtime_mark_last_busy(arizona->dev); 265 266 return ret; 267 } 268 269 static inline void arizona_enable_reset(struct arizona *arizona) 270 { 271 if (arizona->pdata.reset) 272 gpio_set_value_cansleep(arizona->pdata.reset, 0); 273 } 274 275 static void arizona_disable_reset(struct arizona *arizona) 276 { 277 if (arizona->pdata.reset) { 278 switch (arizona->type) { 279 case WM5110: 280 case WM8280: 281 /* Meet requirements for minimum reset duration */ 282 usleep_range(5000, 10000); 283 break; 284 default: 285 break; 286 } 287 288 gpio_set_value_cansleep(arizona->pdata.reset, 1); 289 usleep_range(1000, 5000); 290 } 291 } 292 293 struct arizona_sysclk_state { 294 unsigned int fll; 295 unsigned int sysclk; 296 }; 297 298 static int arizona_enable_freerun_sysclk(struct arizona *arizona, 299 struct arizona_sysclk_state *state) 300 { 301 int ret, err; 302 303 /* Cache existing FLL and SYSCLK settings */ 304 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); 305 if (ret) { 306 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", 307 ret); 308 return ret; 309 } 310 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 311 &state->sysclk); 312 if (ret) { 313 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", 314 ret); 315 return ret; 316 } 317 318 /* Start up SYSCLK using the FLL in free running mode */ 319 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, 320 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); 321 if (ret) { 322 dev_err(arizona->dev, 323 "Failed to start FLL in freerunning mode: %d\n", 324 ret); 325 return ret; 326 } 327 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, 328 ARIZONA_FLL1_CLOCK_OK_STS, 329 ARIZONA_FLL1_CLOCK_OK_STS); 330 if (ret) { 331 ret = -ETIMEDOUT; 332 goto err_fll; 333 } 334 335 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); 336 if (ret) { 337 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); 338 goto err_fll; 339 } 340 341 return 0; 342 343 err_fll: 344 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 345 if (err) 346 dev_err(arizona->dev, 347 "Failed to re-apply old FLL settings: %d\n", err); 348 349 return ret; 350 } 351 352 static int arizona_disable_freerun_sysclk(struct arizona *arizona, 353 struct arizona_sysclk_state *state) 354 { 355 int ret; 356 357 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 358 state->sysclk); 359 if (ret) { 360 dev_err(arizona->dev, 361 "Failed to re-apply old SYSCLK settings: %d\n", ret); 362 return ret; 363 } 364 365 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); 366 if (ret) { 367 dev_err(arizona->dev, 368 "Failed to re-apply old FLL settings: %d\n", ret); 369 return ret; 370 } 371 372 return 0; 373 } 374 375 static int wm5102_apply_hardware_patch(struct arizona *arizona) 376 { 377 struct arizona_sysclk_state state; 378 int err, ret; 379 380 ret = arizona_enable_freerun_sysclk(arizona, &state); 381 if (ret) 382 return ret; 383 384 /* Start the write sequencer and wait for it to finish */ 385 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 386 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); 387 if (ret) { 388 dev_err(arizona->dev, "Failed to start write sequencer: %d\n", 389 ret); 390 goto err; 391 } 392 393 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, 394 ARIZONA_WSEQ_BUSY, 0); 395 if (ret) { 396 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, 397 ARIZONA_WSEQ_ABORT); 398 ret = -ETIMEDOUT; 399 } 400 401 err: 402 err = arizona_disable_freerun_sysclk(arizona, &state); 403 404 return ret ?: err; 405 } 406 407 /* 408 * Register patch to some of the CODECs internal write sequences 409 * to ensure a clean exit from the low power sleep state. 410 */ 411 static const struct reg_sequence wm5110_sleep_patch[] = { 412 { 0x337A, 0xC100 }, 413 { 0x337B, 0x0041 }, 414 { 0x3300, 0xA210 }, 415 { 0x3301, 0x050C }, 416 }; 417 418 static int wm5110_apply_sleep_patch(struct arizona *arizona) 419 { 420 struct arizona_sysclk_state state; 421 int err, ret; 422 423 ret = arizona_enable_freerun_sysclk(arizona, &state); 424 if (ret) 425 return ret; 426 427 ret = regmap_multi_reg_write_bypassed(arizona->regmap, 428 wm5110_sleep_patch, 429 ARRAY_SIZE(wm5110_sleep_patch)); 430 431 err = arizona_disable_freerun_sysclk(arizona, &state); 432 433 return ret ?: err; 434 } 435 436 static int wm5102_clear_write_sequencer(struct arizona *arizona) 437 { 438 int ret; 439 440 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, 441 0x0); 442 if (ret) { 443 dev_err(arizona->dev, 444 "Failed to clear write sequencer state: %d\n", ret); 445 return ret; 446 } 447 448 arizona_enable_reset(arizona); 449 regulator_disable(arizona->dcvdd); 450 451 msleep(20); 452 453 ret = regulator_enable(arizona->dcvdd); 454 if (ret) { 455 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); 456 return ret; 457 } 458 arizona_disable_reset(arizona); 459 460 return 0; 461 } 462 463 #ifdef CONFIG_PM 464 static int arizona_isolate_dcvdd(struct arizona *arizona) 465 { 466 int ret; 467 468 ret = regmap_update_bits(arizona->regmap, 469 ARIZONA_ISOLATION_CONTROL, 470 ARIZONA_ISOLATE_DCVDD1, 471 ARIZONA_ISOLATE_DCVDD1); 472 if (ret != 0) 473 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); 474 475 return ret; 476 } 477 478 static int arizona_connect_dcvdd(struct arizona *arizona) 479 { 480 int ret; 481 482 ret = regmap_update_bits(arizona->regmap, 483 ARIZONA_ISOLATION_CONTROL, 484 ARIZONA_ISOLATE_DCVDD1, 0); 485 if (ret != 0) 486 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); 487 488 return ret; 489 } 490 491 static int arizona_is_jack_det_active(struct arizona *arizona) 492 { 493 unsigned int val; 494 int ret; 495 496 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); 497 if (ret) { 498 dev_err(arizona->dev, 499 "Failed to check jack det status: %d\n", ret); 500 return ret; 501 } else if (val & ARIZONA_JD1_ENA) { 502 return 1; 503 } else { 504 return 0; 505 } 506 } 507 508 static int arizona_runtime_resume(struct device *dev) 509 { 510 struct arizona *arizona = dev_get_drvdata(dev); 511 int ret; 512 513 dev_dbg(arizona->dev, "Leaving AoD mode\n"); 514 515 if (arizona->has_fully_powered_off) { 516 dev_dbg(arizona->dev, "Re-enabling core supplies\n"); 517 518 ret = regulator_bulk_enable(arizona->num_core_supplies, 519 arizona->core_supplies); 520 if (ret) { 521 dev_err(dev, "Failed to enable core supplies: %d\n", 522 ret); 523 return ret; 524 } 525 } 526 527 ret = regulator_enable(arizona->dcvdd); 528 if (ret != 0) { 529 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); 530 if (arizona->has_fully_powered_off) 531 regulator_bulk_disable(arizona->num_core_supplies, 532 arizona->core_supplies); 533 return ret; 534 } 535 536 if (arizona->has_fully_powered_off) { 537 arizona_disable_reset(arizona); 538 enable_irq(arizona->irq); 539 arizona->has_fully_powered_off = false; 540 } 541 542 regcache_cache_only(arizona->regmap, false); 543 544 switch (arizona->type) { 545 case WM5102: 546 if (arizona->external_dcvdd) { 547 ret = arizona_connect_dcvdd(arizona); 548 if (ret != 0) 549 goto err; 550 } 551 552 ret = wm5102_patch(arizona); 553 if (ret != 0) { 554 dev_err(arizona->dev, "Failed to apply patch: %d\n", 555 ret); 556 goto err; 557 } 558 559 ret = wm5102_apply_hardware_patch(arizona); 560 if (ret) { 561 dev_err(arizona->dev, 562 "Failed to apply hardware patch: %d\n", 563 ret); 564 goto err; 565 } 566 break; 567 case WM5110: 568 case WM8280: 569 ret = arizona_wait_for_boot(arizona); 570 if (ret) 571 goto err; 572 573 if (arizona->external_dcvdd) { 574 ret = arizona_connect_dcvdd(arizona); 575 if (ret != 0) 576 goto err; 577 } else { 578 /* 579 * As this is only called for the internal regulator 580 * (where we know voltage ranges available) it is ok 581 * to request an exact range. 582 */ 583 ret = regulator_set_voltage(arizona->dcvdd, 584 1200000, 1200000); 585 if (ret < 0) { 586 dev_err(arizona->dev, 587 "Failed to set resume voltage: %d\n", 588 ret); 589 goto err; 590 } 591 } 592 593 ret = wm5110_apply_sleep_patch(arizona); 594 if (ret) { 595 dev_err(arizona->dev, 596 "Failed to re-apply sleep patch: %d\n", 597 ret); 598 goto err; 599 } 600 break; 601 case WM1831: 602 case CS47L24: 603 ret = arizona_wait_for_boot(arizona); 604 if (ret != 0) 605 goto err; 606 break; 607 default: 608 ret = arizona_wait_for_boot(arizona); 609 if (ret != 0) 610 goto err; 611 612 if (arizona->external_dcvdd) { 613 ret = arizona_connect_dcvdd(arizona); 614 if (ret != 0) 615 goto err; 616 } 617 break; 618 } 619 620 ret = regcache_sync(arizona->regmap); 621 if (ret != 0) { 622 dev_err(arizona->dev, "Failed to restore register cache\n"); 623 goto err; 624 } 625 626 return 0; 627 628 err: 629 regcache_cache_only(arizona->regmap, true); 630 regulator_disable(arizona->dcvdd); 631 return ret; 632 } 633 634 static int arizona_runtime_suspend(struct device *dev) 635 { 636 struct arizona *arizona = dev_get_drvdata(dev); 637 int jd_active = 0; 638 int ret; 639 640 dev_dbg(arizona->dev, "Entering AoD mode\n"); 641 642 switch (arizona->type) { 643 case WM5110: 644 case WM8280: 645 jd_active = arizona_is_jack_det_active(arizona); 646 if (jd_active < 0) 647 return jd_active; 648 649 if (arizona->external_dcvdd) { 650 ret = arizona_isolate_dcvdd(arizona); 651 if (ret != 0) 652 return ret; 653 } else { 654 /* 655 * As this is only called for the internal regulator 656 * (where we know voltage ranges available) it is ok 657 * to request an exact range. 658 */ 659 ret = regulator_set_voltage(arizona->dcvdd, 660 1175000, 1175000); 661 if (ret < 0) { 662 dev_err(arizona->dev, 663 "Failed to set suspend voltage: %d\n", 664 ret); 665 return ret; 666 } 667 } 668 break; 669 case WM5102: 670 jd_active = arizona_is_jack_det_active(arizona); 671 if (jd_active < 0) 672 return jd_active; 673 674 if (arizona->external_dcvdd) { 675 ret = arizona_isolate_dcvdd(arizona); 676 if (ret != 0) 677 return ret; 678 } 679 680 if (!jd_active) { 681 ret = regmap_write(arizona->regmap, 682 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); 683 if (ret) { 684 dev_err(arizona->dev, 685 "Failed to clear write sequencer: %d\n", 686 ret); 687 return ret; 688 } 689 } 690 break; 691 case WM1831: 692 case CS47L24: 693 break; 694 default: 695 jd_active = arizona_is_jack_det_active(arizona); 696 if (jd_active < 0) 697 return jd_active; 698 699 if (arizona->external_dcvdd) { 700 ret = arizona_isolate_dcvdd(arizona); 701 if (ret != 0) 702 return ret; 703 } 704 break; 705 } 706 707 regcache_cache_only(arizona->regmap, true); 708 regcache_mark_dirty(arizona->regmap); 709 regulator_disable(arizona->dcvdd); 710 711 /* Allow us to completely power down if no jack detection */ 712 if (!jd_active) { 713 dev_dbg(arizona->dev, "Fully powering off\n"); 714 715 arizona->has_fully_powered_off = true; 716 717 disable_irq_nosync(arizona->irq); 718 arizona_enable_reset(arizona); 719 regulator_bulk_disable(arizona->num_core_supplies, 720 arizona->core_supplies); 721 } 722 723 return 0; 724 } 725 #endif 726 727 #ifdef CONFIG_PM_SLEEP 728 static int arizona_suspend(struct device *dev) 729 { 730 struct arizona *arizona = dev_get_drvdata(dev); 731 732 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); 733 disable_irq(arizona->irq); 734 735 return 0; 736 } 737 738 static int arizona_suspend_late(struct device *dev) 739 { 740 struct arizona *arizona = dev_get_drvdata(dev); 741 742 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); 743 enable_irq(arizona->irq); 744 745 return 0; 746 } 747 748 static int arizona_resume_noirq(struct device *dev) 749 { 750 struct arizona *arizona = dev_get_drvdata(dev); 751 752 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); 753 disable_irq(arizona->irq); 754 755 return 0; 756 } 757 758 static int arizona_resume(struct device *dev) 759 { 760 struct arizona *arizona = dev_get_drvdata(dev); 761 762 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); 763 enable_irq(arizona->irq); 764 765 return 0; 766 } 767 #endif 768 769 const struct dev_pm_ops arizona_pm_ops = { 770 SET_RUNTIME_PM_OPS(arizona_runtime_suspend, 771 arizona_runtime_resume, 772 NULL) 773 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) 774 #ifdef CONFIG_PM_SLEEP 775 .suspend_late = arizona_suspend_late, 776 .resume_noirq = arizona_resume_noirq, 777 #endif 778 }; 779 EXPORT_SYMBOL_GPL(arizona_pm_ops); 780 781 #ifdef CONFIG_OF 782 unsigned long arizona_of_get_type(struct device *dev) 783 { 784 const struct of_device_id *id = of_match_device(arizona_of_match, dev); 785 786 if (id) 787 return (unsigned long)id->data; 788 else 789 return 0; 790 } 791 EXPORT_SYMBOL_GPL(arizona_of_get_type); 792 793 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, 794 bool mandatory) 795 { 796 int gpio; 797 798 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); 799 if (gpio < 0) { 800 if (mandatory) 801 dev_err(arizona->dev, 802 "Mandatory DT gpio %s missing/malformed: %d\n", 803 prop, gpio); 804 805 gpio = 0; 806 } 807 808 return gpio; 809 } 810 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); 811 812 static int arizona_of_get_core_pdata(struct arizona *arizona) 813 { 814 struct arizona_pdata *pdata = &arizona->pdata; 815 struct property *prop; 816 const __be32 *cur; 817 u32 val; 818 int ret, i; 819 int count = 0; 820 821 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); 822 823 ret = of_property_read_u32_array(arizona->dev->of_node, 824 "wlf,gpio-defaults", 825 pdata->gpio_defaults, 826 ARRAY_SIZE(pdata->gpio_defaults)); 827 if (ret >= 0) { 828 /* 829 * All values are literal except out of range values 830 * which are chip default, translate into platform 831 * data which uses 0 as chip default and out of range 832 * as zero. 833 */ 834 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { 835 if (pdata->gpio_defaults[i] > 0xffff) 836 pdata->gpio_defaults[i] = 0; 837 else if (pdata->gpio_defaults[i] == 0) 838 pdata->gpio_defaults[i] = 0x10000; 839 } 840 } else { 841 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", 842 ret); 843 } 844 845 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, 846 cur, val) { 847 if (count == ARRAY_SIZE(pdata->inmode)) 848 break; 849 850 pdata->inmode[count] = val; 851 count++; 852 } 853 854 count = 0; 855 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, 856 cur, val) { 857 if (count == ARRAY_SIZE(pdata->dmic_ref)) 858 break; 859 860 pdata->dmic_ref[count] = val; 861 count++; 862 } 863 864 count = 0; 865 of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop, 866 cur, val) { 867 if (count == ARRAY_SIZE(pdata->out_mono)) 868 break; 869 870 pdata->out_mono[count] = !!val; 871 count++; 872 } 873 874 return 0; 875 } 876 877 const struct of_device_id arizona_of_match[] = { 878 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 879 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 880 { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, 881 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 882 { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, 883 { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, 884 { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, 885 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, 886 {}, 887 }; 888 EXPORT_SYMBOL_GPL(arizona_of_match); 889 #else 890 static inline int arizona_of_get_core_pdata(struct arizona *arizona) 891 { 892 return 0; 893 } 894 #endif 895 896 static const struct mfd_cell early_devs[] = { 897 { .name = "arizona-ldo1" }, 898 }; 899 900 static const char * const wm5102_supplies[] = { 901 "MICVDD", 902 "DBVDD2", 903 "DBVDD3", 904 "CPVDD", 905 "SPKVDDL", 906 "SPKVDDR", 907 }; 908 909 static const struct mfd_cell wm5102_devs[] = { 910 { .name = "arizona-micsupp" }, 911 { .name = "arizona-gpio" }, 912 { 913 .name = "arizona-extcon", 914 .parent_supplies = wm5102_supplies, 915 .num_parent_supplies = 1, /* We only need MICVDD */ 916 }, 917 { .name = "arizona-haptics" }, 918 { .name = "arizona-pwm" }, 919 { 920 .name = "wm5102-codec", 921 .parent_supplies = wm5102_supplies, 922 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 923 }, 924 }; 925 926 static const struct mfd_cell wm5110_devs[] = { 927 { .name = "arizona-micsupp" }, 928 { .name = "arizona-gpio" }, 929 { 930 .name = "arizona-extcon", 931 .parent_supplies = wm5102_supplies, 932 .num_parent_supplies = 1, /* We only need MICVDD */ 933 }, 934 { .name = "arizona-haptics" }, 935 { .name = "arizona-pwm" }, 936 { 937 .name = "wm5110-codec", 938 .parent_supplies = wm5102_supplies, 939 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 940 }, 941 }; 942 943 static const char * const cs47l24_supplies[] = { 944 "MICVDD", 945 "CPVDD", 946 "SPKVDD", 947 }; 948 949 static const struct mfd_cell cs47l24_devs[] = { 950 { .name = "arizona-gpio" }, 951 { .name = "arizona-haptics" }, 952 { .name = "arizona-pwm" }, 953 { 954 .name = "cs47l24-codec", 955 .parent_supplies = cs47l24_supplies, 956 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), 957 }, 958 }; 959 960 static const char * const wm8997_supplies[] = { 961 "MICVDD", 962 "DBVDD2", 963 "CPVDD", 964 "SPKVDD", 965 }; 966 967 static const struct mfd_cell wm8997_devs[] = { 968 { .name = "arizona-micsupp" }, 969 { .name = "arizona-gpio" }, 970 { 971 .name = "arizona-extcon", 972 .parent_supplies = wm8997_supplies, 973 .num_parent_supplies = 1, /* We only need MICVDD */ 974 }, 975 { .name = "arizona-haptics" }, 976 { .name = "arizona-pwm" }, 977 { 978 .name = "wm8997-codec", 979 .parent_supplies = wm8997_supplies, 980 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), 981 }, 982 }; 983 984 static const struct mfd_cell wm8998_devs[] = { 985 { .name = "arizona-micsupp" }, 986 { .name = "arizona-gpio" }, 987 { 988 .name = "arizona-extcon", 989 .parent_supplies = wm5102_supplies, 990 .num_parent_supplies = 1, /* We only need MICVDD */ 991 }, 992 { .name = "arizona-haptics" }, 993 { .name = "arizona-pwm" }, 994 { 995 .name = "wm8998-codec", 996 .parent_supplies = wm5102_supplies, 997 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), 998 }, 999 }; 1000 1001 int arizona_dev_init(struct arizona *arizona) 1002 { 1003 struct device *dev = arizona->dev; 1004 const char *type_name = NULL; 1005 unsigned int reg, val, mask; 1006 int (*apply_patch)(struct arizona *) = NULL; 1007 const struct mfd_cell *subdevs = NULL; 1008 int n_subdevs, ret, i; 1009 1010 dev_set_drvdata(arizona->dev, arizona); 1011 mutex_init(&arizona->clk_lock); 1012 1013 if (dev_get_platdata(arizona->dev)) 1014 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), 1015 sizeof(arizona->pdata)); 1016 else 1017 arizona_of_get_core_pdata(arizona); 1018 1019 regcache_cache_only(arizona->regmap, true); 1020 1021 switch (arizona->type) { 1022 case WM5102: 1023 case WM5110: 1024 case WM8280: 1025 case WM8997: 1026 case WM8998: 1027 case WM1814: 1028 case WM1831: 1029 case CS47L24: 1030 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 1031 arizona->core_supplies[i].supply 1032 = wm5102_core_supplies[i]; 1033 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); 1034 break; 1035 default: 1036 dev_err(arizona->dev, "Unknown device type %d\n", 1037 arizona->type); 1038 return -EINVAL; 1039 } 1040 1041 /* Mark DCVDD as external, LDO1 driver will clear if internal */ 1042 arizona->external_dcvdd = true; 1043 1044 switch (arizona->type) { 1045 case WM1831: 1046 case CS47L24: 1047 break; /* No LDO1 regulator */ 1048 default: 1049 ret = mfd_add_devices(arizona->dev, -1, early_devs, 1050 ARRAY_SIZE(early_devs), NULL, 0, NULL); 1051 if (ret != 0) { 1052 dev_err(dev, "Failed to add early children: %d\n", ret); 1053 return ret; 1054 } 1055 break; 1056 } 1057 1058 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, 1059 arizona->core_supplies); 1060 if (ret != 0) { 1061 dev_err(dev, "Failed to request core supplies: %d\n", 1062 ret); 1063 goto err_early; 1064 } 1065 1066 /** 1067 * Don't use devres here because the only device we have to get 1068 * against is the MFD device and DCVDD will likely be supplied by 1069 * one of its children. Meaning that the regulator will be 1070 * destroyed by the time devres calls regulator put. 1071 */ 1072 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); 1073 if (IS_ERR(arizona->dcvdd)) { 1074 ret = PTR_ERR(arizona->dcvdd); 1075 dev_err(dev, "Failed to request DCVDD: %d\n", ret); 1076 goto err_early; 1077 } 1078 1079 if (arizona->pdata.reset) { 1080 /* Start out with /RESET low to put the chip into reset */ 1081 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, 1082 GPIOF_DIR_OUT | GPIOF_INIT_LOW, 1083 "arizona /RESET"); 1084 if (ret != 0) { 1085 dev_err(dev, "Failed to request /RESET: %d\n", ret); 1086 goto err_dcvdd; 1087 } 1088 } 1089 1090 ret = regulator_bulk_enable(arizona->num_core_supplies, 1091 arizona->core_supplies); 1092 if (ret != 0) { 1093 dev_err(dev, "Failed to enable core supplies: %d\n", 1094 ret); 1095 goto err_dcvdd; 1096 } 1097 1098 ret = regulator_enable(arizona->dcvdd); 1099 if (ret != 0) { 1100 dev_err(dev, "Failed to enable DCVDD: %d\n", ret); 1101 goto err_enable; 1102 } 1103 1104 arizona_disable_reset(arizona); 1105 1106 regcache_cache_only(arizona->regmap, false); 1107 1108 /* Verify that this is a chip we know about */ 1109 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1110 if (ret != 0) { 1111 dev_err(dev, "Failed to read ID register: %d\n", ret); 1112 goto err_reset; 1113 } 1114 1115 switch (reg) { 1116 case 0x5102: 1117 case 0x5110: 1118 case 0x6349: 1119 case 0x6363: 1120 case 0x8997: 1121 break; 1122 default: 1123 dev_err(arizona->dev, "Unknown device ID: %x\n", reg); 1124 goto err_reset; 1125 } 1126 1127 /* If we have a /RESET GPIO we'll already be reset */ 1128 if (!arizona->pdata.reset) { 1129 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); 1130 if (ret != 0) { 1131 dev_err(dev, "Failed to reset device: %d\n", ret); 1132 goto err_reset; 1133 } 1134 1135 usleep_range(1000, 5000); 1136 } 1137 1138 /* Ensure device startup is complete */ 1139 switch (arizona->type) { 1140 case WM5102: 1141 ret = regmap_read(arizona->regmap, 1142 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); 1143 if (ret) { 1144 dev_err(dev, 1145 "Failed to check write sequencer state: %d\n", 1146 ret); 1147 } else if (val & 0x01) { 1148 ret = wm5102_clear_write_sequencer(arizona); 1149 if (ret) 1150 return ret; 1151 } 1152 break; 1153 default: 1154 break; 1155 } 1156 1157 ret = arizona_wait_for_boot(arizona); 1158 if (ret) { 1159 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); 1160 goto err_reset; 1161 } 1162 1163 /* Read the device ID information & do device specific stuff */ 1164 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); 1165 if (ret != 0) { 1166 dev_err(dev, "Failed to read ID register: %d\n", ret); 1167 goto err_reset; 1168 } 1169 1170 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, 1171 &arizona->rev); 1172 if (ret != 0) { 1173 dev_err(dev, "Failed to read revision register: %d\n", ret); 1174 goto err_reset; 1175 } 1176 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; 1177 1178 switch (reg) { 1179 case 0x5102: 1180 if (IS_ENABLED(CONFIG_MFD_WM5102)) { 1181 type_name = "WM5102"; 1182 if (arizona->type != WM5102) { 1183 dev_warn(arizona->dev, 1184 "WM5102 registered as %d\n", 1185 arizona->type); 1186 arizona->type = WM5102; 1187 } 1188 1189 apply_patch = wm5102_patch; 1190 arizona->rev &= 0x7; 1191 subdevs = wm5102_devs; 1192 n_subdevs = ARRAY_SIZE(wm5102_devs); 1193 } 1194 break; 1195 case 0x5110: 1196 if (IS_ENABLED(CONFIG_MFD_WM5110)) { 1197 switch (arizona->type) { 1198 case WM5110: 1199 type_name = "WM5110"; 1200 break; 1201 case WM8280: 1202 type_name = "WM8280"; 1203 break; 1204 default: 1205 type_name = "WM5110"; 1206 dev_warn(arizona->dev, 1207 "WM5110 registered as %d\n", 1208 arizona->type); 1209 arizona->type = WM5110; 1210 break; 1211 } 1212 1213 apply_patch = wm5110_patch; 1214 subdevs = wm5110_devs; 1215 n_subdevs = ARRAY_SIZE(wm5110_devs); 1216 } 1217 break; 1218 case 0x6363: 1219 if (IS_ENABLED(CONFIG_MFD_CS47L24)) { 1220 switch (arizona->type) { 1221 case CS47L24: 1222 type_name = "CS47L24"; 1223 break; 1224 1225 case WM1831: 1226 type_name = "WM1831"; 1227 break; 1228 1229 default: 1230 dev_warn(arizona->dev, 1231 "CS47L24 registered as %d\n", 1232 arizona->type); 1233 arizona->type = CS47L24; 1234 break; 1235 } 1236 1237 apply_patch = cs47l24_patch; 1238 subdevs = cs47l24_devs; 1239 n_subdevs = ARRAY_SIZE(cs47l24_devs); 1240 } 1241 break; 1242 case 0x8997: 1243 if (IS_ENABLED(CONFIG_MFD_WM8997)) { 1244 type_name = "WM8997"; 1245 if (arizona->type != WM8997) { 1246 dev_warn(arizona->dev, 1247 "WM8997 registered as %d\n", 1248 arizona->type); 1249 arizona->type = WM8997; 1250 } 1251 1252 apply_patch = wm8997_patch; 1253 subdevs = wm8997_devs; 1254 n_subdevs = ARRAY_SIZE(wm8997_devs); 1255 } 1256 break; 1257 case 0x6349: 1258 if (IS_ENABLED(CONFIG_MFD_WM8998)) { 1259 switch (arizona->type) { 1260 case WM8998: 1261 type_name = "WM8998"; 1262 break; 1263 1264 case WM1814: 1265 type_name = "WM1814"; 1266 break; 1267 1268 default: 1269 type_name = "WM8998"; 1270 dev_warn(arizona->dev, 1271 "WM8998 registered as %d\n", 1272 arizona->type); 1273 arizona->type = WM8998; 1274 } 1275 1276 apply_patch = wm8998_patch; 1277 subdevs = wm8998_devs; 1278 n_subdevs = ARRAY_SIZE(wm8998_devs); 1279 } 1280 break; 1281 default: 1282 dev_err(arizona->dev, "Unknown device ID %x\n", reg); 1283 goto err_reset; 1284 } 1285 1286 if (!subdevs) { 1287 dev_err(arizona->dev, 1288 "No kernel support for device ID %x\n", reg); 1289 goto err_reset; 1290 } 1291 1292 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); 1293 1294 if (apply_patch) { 1295 ret = apply_patch(arizona); 1296 if (ret != 0) { 1297 dev_err(arizona->dev, "Failed to apply patch: %d\n", 1298 ret); 1299 goto err_reset; 1300 } 1301 1302 switch (arizona->type) { 1303 case WM5102: 1304 ret = wm5102_apply_hardware_patch(arizona); 1305 if (ret) { 1306 dev_err(arizona->dev, 1307 "Failed to apply hardware patch: %d\n", 1308 ret); 1309 goto err_reset; 1310 } 1311 break; 1312 case WM5110: 1313 case WM8280: 1314 ret = wm5110_apply_sleep_patch(arizona); 1315 if (ret) { 1316 dev_err(arizona->dev, 1317 "Failed to apply sleep patch: %d\n", 1318 ret); 1319 goto err_reset; 1320 } 1321 break; 1322 default: 1323 break; 1324 } 1325 } 1326 1327 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { 1328 if (!arizona->pdata.gpio_defaults[i]) 1329 continue; 1330 1331 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, 1332 arizona->pdata.gpio_defaults[i]); 1333 } 1334 1335 /* Chip default */ 1336 if (!arizona->pdata.clk32k_src) 1337 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; 1338 1339 switch (arizona->pdata.clk32k_src) { 1340 case ARIZONA_32KZ_MCLK1: 1341 case ARIZONA_32KZ_MCLK2: 1342 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1343 ARIZONA_CLK_32K_SRC_MASK, 1344 arizona->pdata.clk32k_src - 1); 1345 arizona_clk32k_enable(arizona); 1346 break; 1347 case ARIZONA_32KZ_NONE: 1348 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, 1349 ARIZONA_CLK_32K_SRC_MASK, 2); 1350 break; 1351 default: 1352 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", 1353 arizona->pdata.clk32k_src); 1354 ret = -EINVAL; 1355 goto err_reset; 1356 } 1357 1358 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { 1359 if (!arizona->pdata.micbias[i].mV && 1360 !arizona->pdata.micbias[i].bypass) 1361 continue; 1362 1363 /* Apply default for bypass mode */ 1364 if (!arizona->pdata.micbias[i].mV) 1365 arizona->pdata.micbias[i].mV = 2800; 1366 1367 val = (arizona->pdata.micbias[i].mV - 1500) / 100; 1368 1369 val <<= ARIZONA_MICB1_LVL_SHIFT; 1370 1371 if (arizona->pdata.micbias[i].ext_cap) 1372 val |= ARIZONA_MICB1_EXT_CAP; 1373 1374 if (arizona->pdata.micbias[i].discharge) 1375 val |= ARIZONA_MICB1_DISCH; 1376 1377 if (arizona->pdata.micbias[i].soft_start) 1378 val |= ARIZONA_MICB1_RATE; 1379 1380 if (arizona->pdata.micbias[i].bypass) 1381 val |= ARIZONA_MICB1_BYPASS; 1382 1383 regmap_update_bits(arizona->regmap, 1384 ARIZONA_MIC_BIAS_CTRL_1 + i, 1385 ARIZONA_MICB1_LVL_MASK | 1386 ARIZONA_MICB1_EXT_CAP | 1387 ARIZONA_MICB1_DISCH | 1388 ARIZONA_MICB1_BYPASS | 1389 ARIZONA_MICB1_RATE, val); 1390 } 1391 1392 for (i = 0; i < ARIZONA_MAX_INPUT; i++) { 1393 /* Default for both is 0 so noop with defaults */ 1394 val = arizona->pdata.dmic_ref[i] 1395 << ARIZONA_IN1_DMIC_SUP_SHIFT; 1396 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) 1397 val |= 1 << ARIZONA_IN1_MODE_SHIFT; 1398 1399 switch (arizona->type) { 1400 case WM8998: 1401 case WM1814: 1402 regmap_update_bits(arizona->regmap, 1403 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), 1404 ARIZONA_IN1L_SRC_SE_MASK, 1405 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1406 << ARIZONA_IN1L_SRC_SE_SHIFT); 1407 1408 regmap_update_bits(arizona->regmap, 1409 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), 1410 ARIZONA_IN1R_SRC_SE_MASK, 1411 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1412 << ARIZONA_IN1R_SRC_SE_SHIFT); 1413 1414 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1415 ARIZONA_IN1_MODE_MASK; 1416 break; 1417 default: 1418 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) 1419 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; 1420 1421 mask = ARIZONA_IN1_DMIC_SUP_MASK | 1422 ARIZONA_IN1_MODE_MASK | 1423 ARIZONA_IN1_SINGLE_ENDED_MASK; 1424 break; 1425 } 1426 1427 regmap_update_bits(arizona->regmap, 1428 ARIZONA_IN1L_CONTROL + (i * 8), 1429 mask, val); 1430 } 1431 1432 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { 1433 /* Default is 0 so noop with defaults */ 1434 if (arizona->pdata.out_mono[i]) 1435 val = ARIZONA_OUT1_MONO; 1436 else 1437 val = 0; 1438 1439 regmap_update_bits(arizona->regmap, 1440 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), 1441 ARIZONA_OUT1_MONO, val); 1442 } 1443 1444 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { 1445 if (arizona->pdata.spk_mute[i]) 1446 regmap_update_bits(arizona->regmap, 1447 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), 1448 ARIZONA_SPK1_MUTE_ENDIAN_MASK | 1449 ARIZONA_SPK1_MUTE_SEQ1_MASK, 1450 arizona->pdata.spk_mute[i]); 1451 1452 if (arizona->pdata.spk_fmt[i]) 1453 regmap_update_bits(arizona->regmap, 1454 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), 1455 ARIZONA_SPK1_FMT_MASK, 1456 arizona->pdata.spk_fmt[i]); 1457 } 1458 1459 pm_runtime_set_active(arizona->dev); 1460 pm_runtime_enable(arizona->dev); 1461 1462 /* Set up for interrupts */ 1463 ret = arizona_irq_init(arizona); 1464 if (ret != 0) 1465 goto err_reset; 1466 1467 pm_runtime_set_autosuspend_delay(arizona->dev, 100); 1468 pm_runtime_use_autosuspend(arizona->dev); 1469 1470 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", 1471 arizona_clkgen_err, arizona); 1472 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", 1473 arizona_overclocked, arizona); 1474 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", 1475 arizona_underclocked, arizona); 1476 1477 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, 1478 subdevs, n_subdevs, NULL, 0, NULL); 1479 1480 if (ret) { 1481 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); 1482 goto err_irq; 1483 } 1484 1485 return 0; 1486 1487 err_irq: 1488 arizona_irq_exit(arizona); 1489 err_reset: 1490 arizona_enable_reset(arizona); 1491 regulator_disable(arizona->dcvdd); 1492 err_enable: 1493 regulator_bulk_disable(arizona->num_core_supplies, 1494 arizona->core_supplies); 1495 err_dcvdd: 1496 regulator_put(arizona->dcvdd); 1497 err_early: 1498 mfd_remove_devices(dev); 1499 return ret; 1500 } 1501 EXPORT_SYMBOL_GPL(arizona_dev_init); 1502 1503 int arizona_dev_exit(struct arizona *arizona) 1504 { 1505 pm_runtime_disable(arizona->dev); 1506 1507 regulator_disable(arizona->dcvdd); 1508 regulator_put(arizona->dcvdd); 1509 1510 mfd_remove_devices(arizona->dev); 1511 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); 1512 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); 1513 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); 1514 arizona_irq_exit(arizona); 1515 arizona_enable_reset(arizona); 1516 1517 regulator_bulk_disable(arizona->num_core_supplies, 1518 arizona->core_supplies); 1519 return 0; 1520 } 1521 EXPORT_SYMBOL_GPL(arizona_dev_exit); 1522