1 /* 2 * Copyright (C) ST-Ericsson SA 2010 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Changes: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/delay.h> 15 #include <linux/interrupt.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/mfd/core.h> 19 #include <linux/mfd/abx500.h> 20 #include <linux/mfd/ab8500.h> 21 #include <linux/regulator/ab8500.h> 22 23 /* 24 * Interrupt register offsets 25 * Bank : 0x0E 26 */ 27 #define AB8500_IT_SOURCE1_REG 0x00 28 #define AB8500_IT_SOURCE2_REG 0x01 29 #define AB8500_IT_SOURCE3_REG 0x02 30 #define AB8500_IT_SOURCE4_REG 0x03 31 #define AB8500_IT_SOURCE5_REG 0x04 32 #define AB8500_IT_SOURCE6_REG 0x05 33 #define AB8500_IT_SOURCE7_REG 0x06 34 #define AB8500_IT_SOURCE8_REG 0x07 35 #define AB8500_IT_SOURCE19_REG 0x12 36 #define AB8500_IT_SOURCE20_REG 0x13 37 #define AB8500_IT_SOURCE21_REG 0x14 38 #define AB8500_IT_SOURCE22_REG 0x15 39 #define AB8500_IT_SOURCE23_REG 0x16 40 #define AB8500_IT_SOURCE24_REG 0x17 41 42 /* 43 * latch registers 44 */ 45 #define AB8500_IT_LATCH1_REG 0x20 46 #define AB8500_IT_LATCH2_REG 0x21 47 #define AB8500_IT_LATCH3_REG 0x22 48 #define AB8500_IT_LATCH4_REG 0x23 49 #define AB8500_IT_LATCH5_REG 0x24 50 #define AB8500_IT_LATCH6_REG 0x25 51 #define AB8500_IT_LATCH7_REG 0x26 52 #define AB8500_IT_LATCH8_REG 0x27 53 #define AB8500_IT_LATCH9_REG 0x28 54 #define AB8500_IT_LATCH10_REG 0x29 55 #define AB8500_IT_LATCH19_REG 0x32 56 #define AB8500_IT_LATCH20_REG 0x33 57 #define AB8500_IT_LATCH21_REG 0x34 58 #define AB8500_IT_LATCH22_REG 0x35 59 #define AB8500_IT_LATCH23_REG 0x36 60 #define AB8500_IT_LATCH24_REG 0x37 61 62 /* 63 * mask registers 64 */ 65 66 #define AB8500_IT_MASK1_REG 0x40 67 #define AB8500_IT_MASK2_REG 0x41 68 #define AB8500_IT_MASK3_REG 0x42 69 #define AB8500_IT_MASK4_REG 0x43 70 #define AB8500_IT_MASK5_REG 0x44 71 #define AB8500_IT_MASK6_REG 0x45 72 #define AB8500_IT_MASK7_REG 0x46 73 #define AB8500_IT_MASK8_REG 0x47 74 #define AB8500_IT_MASK9_REG 0x48 75 #define AB8500_IT_MASK10_REG 0x49 76 #define AB8500_IT_MASK11_REG 0x4A 77 #define AB8500_IT_MASK12_REG 0x4B 78 #define AB8500_IT_MASK13_REG 0x4C 79 #define AB8500_IT_MASK14_REG 0x4D 80 #define AB8500_IT_MASK15_REG 0x4E 81 #define AB8500_IT_MASK16_REG 0x4F 82 #define AB8500_IT_MASK17_REG 0x50 83 #define AB8500_IT_MASK18_REG 0x51 84 #define AB8500_IT_MASK19_REG 0x52 85 #define AB8500_IT_MASK20_REG 0x53 86 #define AB8500_IT_MASK21_REG 0x54 87 #define AB8500_IT_MASK22_REG 0x55 88 #define AB8500_IT_MASK23_REG 0x56 89 #define AB8500_IT_MASK24_REG 0x57 90 91 #define AB8500_REV_REG 0x80 92 93 /* 94 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 95 * numbers are indexed into this array with (num / 8). 96 * 97 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 98 * offset 0. 99 */ 100 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 101 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21, 102 }; 103 104 static int ab8500_get_chip_id(struct device *dev) 105 { 106 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 107 return (int)ab8500->chip_id; 108 } 109 110 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 111 u8 reg, u8 data) 112 { 113 int ret; 114 /* 115 * Put the u8 bank and u8 register together into a an u16. 116 * The bank on higher 8 bits and register in lower 8 bits. 117 * */ 118 u16 addr = ((u16)bank) << 8 | reg; 119 120 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 121 122 ret = mutex_lock_interruptible(&ab8500->lock); 123 if (ret) 124 return ret; 125 126 ret = ab8500->write(ab8500, addr, data); 127 if (ret < 0) 128 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 129 addr, ret); 130 mutex_unlock(&ab8500->lock); 131 132 return ret; 133 } 134 135 static int ab8500_set_register(struct device *dev, u8 bank, 136 u8 reg, u8 value) 137 { 138 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 139 140 return set_register_interruptible(ab8500, bank, reg, value); 141 } 142 143 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 144 u8 reg, u8 *value) 145 { 146 int ret; 147 /* put the u8 bank and u8 reg together into a an u16. 148 * bank on higher 8 bits and reg in lower */ 149 u16 addr = ((u16)bank) << 8 | reg; 150 151 ret = mutex_lock_interruptible(&ab8500->lock); 152 if (ret) 153 return ret; 154 155 ret = ab8500->read(ab8500, addr); 156 if (ret < 0) 157 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 158 addr, ret); 159 else 160 *value = ret; 161 162 mutex_unlock(&ab8500->lock); 163 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 164 165 return ret; 166 } 167 168 static int ab8500_get_register(struct device *dev, u8 bank, 169 u8 reg, u8 *value) 170 { 171 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 172 173 return get_register_interruptible(ab8500, bank, reg, value); 174 } 175 176 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 177 u8 reg, u8 bitmask, u8 bitvalues) 178 { 179 int ret; 180 u8 data; 181 /* put the u8 bank and u8 reg together into a an u16. 182 * bank on higher 8 bits and reg in lower */ 183 u16 addr = ((u16)bank) << 8 | reg; 184 185 ret = mutex_lock_interruptible(&ab8500->lock); 186 if (ret) 187 return ret; 188 189 ret = ab8500->read(ab8500, addr); 190 if (ret < 0) { 191 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 192 addr, ret); 193 goto out; 194 } 195 196 data = (u8)ret; 197 data = (~bitmask & data) | (bitmask & bitvalues); 198 199 ret = ab8500->write(ab8500, addr, data); 200 if (ret < 0) 201 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 202 addr, ret); 203 204 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 205 out: 206 mutex_unlock(&ab8500->lock); 207 return ret; 208 } 209 210 static int ab8500_mask_and_set_register(struct device *dev, 211 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 212 { 213 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 214 215 return mask_and_set_register_interruptible(ab8500, bank, reg, 216 bitmask, bitvalues); 217 218 } 219 220 static struct abx500_ops ab8500_ops = { 221 .get_chip_id = ab8500_get_chip_id, 222 .get_register = ab8500_get_register, 223 .set_register = ab8500_set_register, 224 .get_register_page = NULL, 225 .set_register_page = NULL, 226 .mask_and_set_register = ab8500_mask_and_set_register, 227 .event_registers_startup_state_get = NULL, 228 .startup_irq_enabled = NULL, 229 }; 230 231 static void ab8500_irq_lock(unsigned int irq) 232 { 233 struct ab8500 *ab8500 = get_irq_chip_data(irq); 234 235 mutex_lock(&ab8500->irq_lock); 236 } 237 238 static void ab8500_irq_sync_unlock(unsigned int irq) 239 { 240 struct ab8500 *ab8500 = get_irq_chip_data(irq); 241 int i; 242 243 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 244 u8 old = ab8500->oldmask[i]; 245 u8 new = ab8500->mask[i]; 246 int reg; 247 248 if (new == old) 249 continue; 250 251 ab8500->oldmask[i] = new; 252 253 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 254 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 255 } 256 257 mutex_unlock(&ab8500->irq_lock); 258 } 259 260 static void ab8500_irq_mask(unsigned int irq) 261 { 262 struct ab8500 *ab8500 = get_irq_chip_data(irq); 263 int offset = irq - ab8500->irq_base; 264 int index = offset / 8; 265 int mask = 1 << (offset % 8); 266 267 ab8500->mask[index] |= mask; 268 } 269 270 static void ab8500_irq_unmask(unsigned int irq) 271 { 272 struct ab8500 *ab8500 = get_irq_chip_data(irq); 273 int offset = irq - ab8500->irq_base; 274 int index = offset / 8; 275 int mask = 1 << (offset % 8); 276 277 ab8500->mask[index] &= ~mask; 278 } 279 280 static struct irq_chip ab8500_irq_chip = { 281 .name = "ab8500", 282 .bus_lock = ab8500_irq_lock, 283 .bus_sync_unlock = ab8500_irq_sync_unlock, 284 .mask = ab8500_irq_mask, 285 .unmask = ab8500_irq_unmask, 286 }; 287 288 static irqreturn_t ab8500_irq(int irq, void *dev) 289 { 290 struct ab8500 *ab8500 = dev; 291 int i; 292 293 dev_vdbg(ab8500->dev, "interrupt\n"); 294 295 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 296 int regoffset = ab8500_irq_regoffset[i]; 297 int status; 298 u8 value; 299 300 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 301 AB8500_IT_LATCH1_REG + regoffset, &value); 302 if (status < 0 || value == 0) 303 continue; 304 305 do { 306 int bit = __ffs(value); 307 int line = i * 8 + bit; 308 309 handle_nested_irq(ab8500->irq_base + line); 310 value &= ~(1 << bit); 311 } while (value); 312 } 313 314 return IRQ_HANDLED; 315 } 316 317 static int ab8500_irq_init(struct ab8500 *ab8500) 318 { 319 int base = ab8500->irq_base; 320 int irq; 321 322 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 323 set_irq_chip_data(irq, ab8500); 324 set_irq_chip_and_handler(irq, &ab8500_irq_chip, 325 handle_simple_irq); 326 set_irq_nested_thread(irq, 1); 327 #ifdef CONFIG_ARM 328 set_irq_flags(irq, IRQF_VALID); 329 #else 330 set_irq_noprobe(irq); 331 #endif 332 } 333 334 return 0; 335 } 336 337 static void ab8500_irq_remove(struct ab8500 *ab8500) 338 { 339 int base = ab8500->irq_base; 340 int irq; 341 342 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 343 #ifdef CONFIG_ARM 344 set_irq_flags(irq, 0); 345 #endif 346 set_irq_chip_and_handler(irq, NULL, NULL); 347 set_irq_chip_data(irq, NULL); 348 } 349 } 350 351 static struct resource ab8500_gpadc_resources[] = { 352 { 353 .name = "HW_CONV_END", 354 .start = AB8500_INT_GP_HW_ADC_CONV_END, 355 .end = AB8500_INT_GP_HW_ADC_CONV_END, 356 .flags = IORESOURCE_IRQ, 357 }, 358 { 359 .name = "SW_CONV_END", 360 .start = AB8500_INT_GP_SW_ADC_CONV_END, 361 .end = AB8500_INT_GP_SW_ADC_CONV_END, 362 .flags = IORESOURCE_IRQ, 363 }, 364 }; 365 366 static struct resource ab8500_rtc_resources[] = { 367 { 368 .name = "60S", 369 .start = AB8500_INT_RTC_60S, 370 .end = AB8500_INT_RTC_60S, 371 .flags = IORESOURCE_IRQ, 372 }, 373 { 374 .name = "ALARM", 375 .start = AB8500_INT_RTC_ALARM, 376 .end = AB8500_INT_RTC_ALARM, 377 .flags = IORESOURCE_IRQ, 378 }, 379 }; 380 381 static struct resource ab8500_poweronkey_db_resources[] = { 382 { 383 .name = "ONKEY_DBF", 384 .start = AB8500_INT_PON_KEY1DB_F, 385 .end = AB8500_INT_PON_KEY1DB_F, 386 .flags = IORESOURCE_IRQ, 387 }, 388 { 389 .name = "ONKEY_DBR", 390 .start = AB8500_INT_PON_KEY1DB_R, 391 .end = AB8500_INT_PON_KEY1DB_R, 392 .flags = IORESOURCE_IRQ, 393 }, 394 }; 395 396 static struct mfd_cell ab8500_devs[] = { 397 #ifdef CONFIG_DEBUG_FS 398 { 399 .name = "ab8500-debug", 400 }, 401 #endif 402 { 403 .name = "ab8500-gpadc", 404 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 405 .resources = ab8500_gpadc_resources, 406 }, 407 { 408 .name = "ab8500-rtc", 409 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 410 .resources = ab8500_rtc_resources, 411 }, 412 { 413 .name = "ab8500-pwm", 414 .id = 1, 415 }, 416 { 417 .name = "ab8500-pwm", 418 .id = 2, 419 }, 420 { 421 .name = "ab8500-pwm", 422 .id = 3, 423 }, 424 { .name = "ab8500-charger", }, 425 { .name = "ab8500-audio", }, 426 { .name = "ab8500-usb", }, 427 { .name = "ab8500-regulator", }, 428 { 429 .name = "ab8500-poweron-key", 430 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 431 .resources = ab8500_poweronkey_db_resources, 432 }, 433 }; 434 435 int __devinit ab8500_init(struct ab8500 *ab8500) 436 { 437 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 438 int ret; 439 int i; 440 u8 value; 441 442 if (plat) 443 ab8500->irq_base = plat->irq_base; 444 445 mutex_init(&ab8500->lock); 446 mutex_init(&ab8500->irq_lock); 447 448 ret = get_register_interruptible(ab8500, AB8500_MISC, 449 AB8500_REV_REG, &value); 450 if (ret < 0) 451 return ret; 452 453 /* 454 * 0x0 - Early Drop 455 * 0x10 - Cut 1.0 456 * 0x11 - Cut 1.1 457 */ 458 if (value == 0x0 || value == 0x10 || value == 0x11) { 459 ab8500->revision = value; 460 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 461 } else { 462 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 463 return -EINVAL; 464 } 465 ab8500->chip_id = value; 466 467 if (plat && plat->init) 468 plat->init(ab8500); 469 470 /* Clear and mask all interrupts */ 471 for (i = 0; i < 10; i++) { 472 get_register_interruptible(ab8500, AB8500_INTERRUPT, 473 AB8500_IT_LATCH1_REG + i, &value); 474 set_register_interruptible(ab8500, AB8500_INTERRUPT, 475 AB8500_IT_MASK1_REG + i, 0xff); 476 } 477 478 for (i = 18; i < 24; i++) { 479 get_register_interruptible(ab8500, AB8500_INTERRUPT, 480 AB8500_IT_LATCH1_REG + i, &value); 481 set_register_interruptible(ab8500, AB8500_INTERRUPT, 482 AB8500_IT_MASK1_REG + i, 0xff); 483 } 484 485 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 486 if (ret) 487 return ret; 488 489 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 490 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 491 492 if (ab8500->irq_base) { 493 ret = ab8500_irq_init(ab8500); 494 if (ret) 495 return ret; 496 497 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 498 IRQF_ONESHOT, "ab8500", ab8500); 499 if (ret) 500 goto out_removeirq; 501 } 502 503 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 504 ARRAY_SIZE(ab8500_devs), NULL, 505 ab8500->irq_base); 506 if (ret) 507 goto out_freeirq; 508 509 return ret; 510 511 out_freeirq: 512 if (ab8500->irq_base) { 513 free_irq(ab8500->irq, ab8500); 514 out_removeirq: 515 ab8500_irq_remove(ab8500); 516 } 517 return ret; 518 } 519 520 int __devexit ab8500_exit(struct ab8500 *ab8500) 521 { 522 mfd_remove_devices(ab8500->dev); 523 if (ab8500->irq_base) { 524 free_irq(ab8500->irq, ab8500); 525 ab8500_irq_remove(ab8500); 526 } 527 528 return 0; 529 } 530 531 MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent"); 532 MODULE_DESCRIPTION("AB8500 MFD core"); 533 MODULE_LICENSE("GPL v2"); 534