1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) ST-Ericsson SA 2010 4 * 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/moduleparam.h> 18 #include <linux/platform_device.h> 19 #include <linux/mfd/core.h> 20 #include <linux/mfd/abx500.h> 21 #include <linux/mfd/abx500/ab8500.h> 22 #include <linux/mfd/dbx500-prcmu.h> 23 #include <linux/of.h> 24 #include <linux/of_device.h> 25 26 /* 27 * Interrupt register offsets 28 * Bank : 0x0E 29 */ 30 #define AB8500_IT_SOURCE1_REG 0x00 31 #define AB8500_IT_SOURCE2_REG 0x01 32 #define AB8500_IT_SOURCE3_REG 0x02 33 #define AB8500_IT_SOURCE4_REG 0x03 34 #define AB8500_IT_SOURCE5_REG 0x04 35 #define AB8500_IT_SOURCE6_REG 0x05 36 #define AB8500_IT_SOURCE7_REG 0x06 37 #define AB8500_IT_SOURCE8_REG 0x07 38 #define AB9540_IT_SOURCE13_REG 0x0C 39 #define AB8500_IT_SOURCE19_REG 0x12 40 #define AB8500_IT_SOURCE20_REG 0x13 41 #define AB8500_IT_SOURCE21_REG 0x14 42 #define AB8500_IT_SOURCE22_REG 0x15 43 #define AB8500_IT_SOURCE23_REG 0x16 44 #define AB8500_IT_SOURCE24_REG 0x17 45 46 /* 47 * latch registers 48 */ 49 #define AB8500_IT_LATCH1_REG 0x20 50 #define AB8500_IT_LATCH2_REG 0x21 51 #define AB8500_IT_LATCH3_REG 0x22 52 #define AB8500_IT_LATCH4_REG 0x23 53 #define AB8500_IT_LATCH5_REG 0x24 54 #define AB8500_IT_LATCH6_REG 0x25 55 #define AB8500_IT_LATCH7_REG 0x26 56 #define AB8500_IT_LATCH8_REG 0x27 57 #define AB8500_IT_LATCH9_REG 0x28 58 #define AB8500_IT_LATCH10_REG 0x29 59 #define AB8500_IT_LATCH12_REG 0x2B 60 #define AB9540_IT_LATCH13_REG 0x2C 61 #define AB8500_IT_LATCH19_REG 0x32 62 #define AB8500_IT_LATCH20_REG 0x33 63 #define AB8500_IT_LATCH21_REG 0x34 64 #define AB8500_IT_LATCH22_REG 0x35 65 #define AB8500_IT_LATCH23_REG 0x36 66 #define AB8500_IT_LATCH24_REG 0x37 67 68 /* 69 * mask registers 70 */ 71 72 #define AB8500_IT_MASK1_REG 0x40 73 #define AB8500_IT_MASK2_REG 0x41 74 #define AB8500_IT_MASK3_REG 0x42 75 #define AB8500_IT_MASK4_REG 0x43 76 #define AB8500_IT_MASK5_REG 0x44 77 #define AB8500_IT_MASK6_REG 0x45 78 #define AB8500_IT_MASK7_REG 0x46 79 #define AB8500_IT_MASK8_REG 0x47 80 #define AB8500_IT_MASK9_REG 0x48 81 #define AB8500_IT_MASK10_REG 0x49 82 #define AB8500_IT_MASK11_REG 0x4A 83 #define AB8500_IT_MASK12_REG 0x4B 84 #define AB8500_IT_MASK13_REG 0x4C 85 #define AB8500_IT_MASK14_REG 0x4D 86 #define AB8500_IT_MASK15_REG 0x4E 87 #define AB8500_IT_MASK16_REG 0x4F 88 #define AB8500_IT_MASK17_REG 0x50 89 #define AB8500_IT_MASK18_REG 0x51 90 #define AB8500_IT_MASK19_REG 0x52 91 #define AB8500_IT_MASK20_REG 0x53 92 #define AB8500_IT_MASK21_REG 0x54 93 #define AB8500_IT_MASK22_REG 0x55 94 #define AB8500_IT_MASK23_REG 0x56 95 #define AB8500_IT_MASK24_REG 0x57 96 #define AB8500_IT_MASK25_REG 0x58 97 98 /* 99 * latch hierarchy registers 100 */ 101 #define AB8500_IT_LATCHHIER1_REG 0x60 102 #define AB8500_IT_LATCHHIER2_REG 0x61 103 #define AB8500_IT_LATCHHIER3_REG 0x62 104 #define AB8540_IT_LATCHHIER4_REG 0x63 105 106 #define AB8500_IT_LATCHHIER_NUM 3 107 #define AB8540_IT_LATCHHIER_NUM 4 108 109 #define AB8500_REV_REG 0x80 110 #define AB8500_IC_NAME_REG 0x82 111 #define AB8500_SWITCH_OFF_STATUS 0x00 112 113 #define AB8500_TURN_ON_STATUS 0x00 114 #define AB8505_TURN_ON_STATUS_2 0x04 115 116 #define AB8500_CH_USBCH_STAT1_REG 0x02 117 #define VBUS_DET_DBNC100 0x02 118 #define VBUS_DET_DBNC1 0x01 119 120 static DEFINE_SPINLOCK(on_stat_lock); 121 static u8 turn_on_stat_mask = 0xFF; 122 static u8 turn_on_stat_set; 123 124 #define AB9540_MODEM_CTRL2_REG 0x23 125 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 126 127 /* 128 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 129 * numbers are indexed into this array with (num / 8). The interupts are 130 * defined in linux/mfd/ab8500.h 131 * 132 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 133 * offset 0. 134 */ 135 /* AB8500 support */ 136 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 137 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 138 }; 139 140 /* AB9540 / AB8505 support */ 141 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 142 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 143 }; 144 145 /* AB8540 support */ 146 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { 147 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 148 23, 25, 26, 27, 28, 29, 30, 31, 149 }; 150 151 static const char ab8500_version_str[][7] = { 152 [AB8500_VERSION_AB8500] = "AB8500", 153 [AB8500_VERSION_AB8505] = "AB8505", 154 [AB8500_VERSION_AB9540] = "AB9540", 155 [AB8500_VERSION_AB8540] = "AB8540", 156 }; 157 158 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 159 { 160 int ret; 161 162 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 163 if (ret < 0) 164 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 165 return ret; 166 } 167 168 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 169 u8 data) 170 { 171 int ret; 172 173 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 174 &mask, 1); 175 if (ret < 0) 176 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 177 return ret; 178 } 179 180 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 181 { 182 int ret; 183 u8 data; 184 185 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 186 if (ret < 0) { 187 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 188 return ret; 189 } 190 return (int)data; 191 } 192 193 static int ab8500_get_chip_id(struct device *dev) 194 { 195 struct ab8500 *ab8500; 196 197 if (!dev) 198 return -EINVAL; 199 ab8500 = dev_get_drvdata(dev->parent); 200 return ab8500 ? (int)ab8500->chip_id : -EINVAL; 201 } 202 203 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 204 u8 reg, u8 data) 205 { 206 int ret; 207 /* 208 * Put the u8 bank and u8 register together into a an u16. 209 * The bank on higher 8 bits and register in lower 8 bits. 210 */ 211 u16 addr = ((u16)bank) << 8 | reg; 212 213 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 214 215 mutex_lock(&ab8500->lock); 216 217 ret = ab8500->write(ab8500, addr, data); 218 if (ret < 0) 219 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 220 addr, ret); 221 mutex_unlock(&ab8500->lock); 222 223 return ret; 224 } 225 226 static int ab8500_set_register(struct device *dev, u8 bank, 227 u8 reg, u8 value) 228 { 229 int ret; 230 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 231 232 atomic_inc(&ab8500->transfer_ongoing); 233 ret = set_register_interruptible(ab8500, bank, reg, value); 234 atomic_dec(&ab8500->transfer_ongoing); 235 return ret; 236 } 237 238 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 239 u8 reg, u8 *value) 240 { 241 int ret; 242 u16 addr = ((u16)bank) << 8 | reg; 243 244 mutex_lock(&ab8500->lock); 245 246 ret = ab8500->read(ab8500, addr); 247 if (ret < 0) 248 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 249 addr, ret); 250 else 251 *value = ret; 252 253 mutex_unlock(&ab8500->lock); 254 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 255 256 return (ret < 0) ? ret : 0; 257 } 258 259 static int ab8500_get_register(struct device *dev, u8 bank, 260 u8 reg, u8 *value) 261 { 262 int ret; 263 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 264 265 atomic_inc(&ab8500->transfer_ongoing); 266 ret = get_register_interruptible(ab8500, bank, reg, value); 267 atomic_dec(&ab8500->transfer_ongoing); 268 return ret; 269 } 270 271 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 272 u8 reg, u8 bitmask, u8 bitvalues) 273 { 274 int ret; 275 u16 addr = ((u16)bank) << 8 | reg; 276 277 mutex_lock(&ab8500->lock); 278 279 if (ab8500->write_masked == NULL) { 280 u8 data; 281 282 ret = ab8500->read(ab8500, addr); 283 if (ret < 0) { 284 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 285 addr, ret); 286 goto out; 287 } 288 289 data = (u8)ret; 290 data = (~bitmask & data) | (bitmask & bitvalues); 291 292 ret = ab8500->write(ab8500, addr, data); 293 if (ret < 0) 294 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 295 addr, ret); 296 297 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 298 data); 299 goto out; 300 } 301 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 302 if (ret < 0) 303 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 304 ret); 305 out: 306 mutex_unlock(&ab8500->lock); 307 return ret; 308 } 309 310 static int ab8500_mask_and_set_register(struct device *dev, 311 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 312 { 313 int ret; 314 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 315 316 atomic_inc(&ab8500->transfer_ongoing); 317 ret = mask_and_set_register_interruptible(ab8500, bank, reg, 318 bitmask, bitvalues); 319 atomic_dec(&ab8500->transfer_ongoing); 320 return ret; 321 } 322 323 static struct abx500_ops ab8500_ops = { 324 .get_chip_id = ab8500_get_chip_id, 325 .get_register = ab8500_get_register, 326 .set_register = ab8500_set_register, 327 .get_register_page = NULL, 328 .set_register_page = NULL, 329 .mask_and_set_register = ab8500_mask_and_set_register, 330 .event_registers_startup_state_get = NULL, 331 .startup_irq_enabled = NULL, 332 .dump_all_banks = ab8500_dump_all_banks, 333 }; 334 335 static void ab8500_irq_lock(struct irq_data *data) 336 { 337 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 338 339 mutex_lock(&ab8500->irq_lock); 340 atomic_inc(&ab8500->transfer_ongoing); 341 } 342 343 static void ab8500_irq_sync_unlock(struct irq_data *data) 344 { 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 346 int i; 347 348 for (i = 0; i < ab8500->mask_size; i++) { 349 u8 old = ab8500->oldmask[i]; 350 u8 new = ab8500->mask[i]; 351 int reg; 352 353 if (new == old) 354 continue; 355 356 /* 357 * Interrupt register 12 doesn't exist prior to AB8500 version 358 * 2.0 359 */ 360 if (ab8500->irq_reg_offset[i] == 11 && 361 is_ab8500_1p1_or_earlier(ab8500)) 362 continue; 363 364 if (ab8500->irq_reg_offset[i] < 0) 365 continue; 366 367 ab8500->oldmask[i] = new; 368 369 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 370 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 371 } 372 atomic_dec(&ab8500->transfer_ongoing); 373 mutex_unlock(&ab8500->irq_lock); 374 } 375 376 static void ab8500_irq_mask(struct irq_data *data) 377 { 378 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 379 int offset = data->hwirq; 380 int index = offset / 8; 381 int mask = 1 << (offset % 8); 382 383 ab8500->mask[index] |= mask; 384 385 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 386 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 387 ab8500->mask[index + 2] |= mask; 388 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) 389 ab8500->mask[index + 1] |= mask; 390 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) 391 /* Here the falling IRQ is one bit lower */ 392 ab8500->mask[index] |= (mask << 1); 393 } 394 395 static void ab8500_irq_unmask(struct irq_data *data) 396 { 397 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 398 unsigned int type = irqd_get_trigger_type(data); 399 int offset = data->hwirq; 400 int index = offset / 8; 401 int mask = 1 << (offset % 8); 402 403 if (type & IRQ_TYPE_EDGE_RISING) 404 ab8500->mask[index] &= ~mask; 405 406 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 407 if (type & IRQ_TYPE_EDGE_FALLING) { 408 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 409 ab8500->mask[index + 2] &= ~mask; 410 else if (offset >= AB9540_INT_GPIO50R && 411 offset <= AB9540_INT_GPIO54R) 412 ab8500->mask[index + 1] &= ~mask; 413 else if (offset == AB8540_INT_GPIO43R || 414 offset == AB8540_INT_GPIO44R) 415 /* Here the falling IRQ is one bit lower */ 416 ab8500->mask[index] &= ~(mask << 1); 417 else 418 ab8500->mask[index] &= ~mask; 419 } else { 420 /* Satisfies the case where type is not set. */ 421 ab8500->mask[index] &= ~mask; 422 } 423 } 424 425 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) 426 { 427 return 0; 428 } 429 430 static struct irq_chip ab8500_irq_chip = { 431 .name = "ab8500", 432 .irq_bus_lock = ab8500_irq_lock, 433 .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 434 .irq_mask = ab8500_irq_mask, 435 .irq_disable = ab8500_irq_mask, 436 .irq_unmask = ab8500_irq_unmask, 437 .irq_set_type = ab8500_irq_set_type, 438 }; 439 440 static void update_latch_offset(u8 *offset, int i) 441 { 442 /* Fix inconsistent ITFromLatch25 bit mapping... */ 443 if (unlikely(*offset == 17)) 444 *offset = 24; 445 /* Fix inconsistent ab8540 bit mapping... */ 446 if (unlikely(*offset == 16)) 447 *offset = 25; 448 if ((i == 3) && (*offset >= 24)) 449 *offset += 2; 450 } 451 452 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 453 int latch_offset, u8 latch_val) 454 { 455 int int_bit, line, i; 456 457 for (i = 0; i < ab8500->mask_size; i++) 458 if (ab8500->irq_reg_offset[i] == latch_offset) 459 break; 460 461 if (i >= ab8500->mask_size) { 462 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 463 latch_offset); 464 return -ENXIO; 465 } 466 467 /* ignore masked out interrupts */ 468 latch_val &= ~ab8500->mask[i]; 469 470 while (latch_val) { 471 int_bit = __ffs(latch_val); 472 line = (i << 3) + int_bit; 473 latch_val &= ~(1 << int_bit); 474 475 /* 476 * This handles the falling edge hwirqs from the GPIO 477 * lines. Route them back to the line registered for the 478 * rising IRQ, as this is merely a flag for the same IRQ 479 * in linux terms. 480 */ 481 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) 482 line -= 16; 483 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) 484 line -= 8; 485 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) 486 line += 1; 487 488 handle_nested_irq(irq_find_mapping(ab8500->domain, line)); 489 } 490 491 return 0; 492 } 493 494 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 495 int hier_offset, u8 hier_val) 496 { 497 int latch_bit, status; 498 u8 latch_offset, latch_val; 499 500 do { 501 latch_bit = __ffs(hier_val); 502 latch_offset = (hier_offset << 3) + latch_bit; 503 504 update_latch_offset(&latch_offset, hier_offset); 505 506 status = get_register_interruptible(ab8500, 507 AB8500_INTERRUPT, 508 AB8500_IT_LATCH1_REG + latch_offset, 509 &latch_val); 510 if (status < 0 || latch_val == 0) 511 goto discard; 512 513 status = ab8500_handle_hierarchical_line(ab8500, 514 latch_offset, latch_val); 515 if (status < 0) 516 return status; 517 discard: 518 hier_val &= ~(1 << latch_bit); 519 } while (hier_val); 520 521 return 0; 522 } 523 524 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 525 { 526 struct ab8500 *ab8500 = dev; 527 u8 i; 528 529 dev_vdbg(ab8500->dev, "interrupt\n"); 530 531 /* Hierarchical interrupt version */ 532 for (i = 0; i < (ab8500->it_latchhier_num); i++) { 533 int status; 534 u8 hier_val; 535 536 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 537 AB8500_IT_LATCHHIER1_REG + i, &hier_val); 538 if (status < 0 || hier_val == 0) 539 continue; 540 541 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 542 if (status < 0) 543 break; 544 } 545 return IRQ_HANDLED; 546 } 547 548 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 549 irq_hw_number_t hwirq) 550 { 551 struct ab8500 *ab8500 = d->host_data; 552 553 if (!ab8500) 554 return -EINVAL; 555 556 irq_set_chip_data(virq, ab8500); 557 irq_set_chip_and_handler(virq, &ab8500_irq_chip, 558 handle_simple_irq); 559 irq_set_nested_thread(virq, 1); 560 irq_set_noprobe(virq); 561 562 return 0; 563 } 564 565 static const struct irq_domain_ops ab8500_irq_ops = { 566 .map = ab8500_irq_map, 567 .xlate = irq_domain_xlate_twocell, 568 }; 569 570 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 571 { 572 int num_irqs; 573 574 if (is_ab8540(ab8500)) 575 num_irqs = AB8540_NR_IRQS; 576 else if (is_ab9540(ab8500)) 577 num_irqs = AB9540_NR_IRQS; 578 else if (is_ab8505(ab8500)) 579 num_irqs = AB8505_NR_IRQS; 580 else 581 num_irqs = AB8500_NR_IRQS; 582 583 /* If ->irq_base is zero this will give a linear mapping */ 584 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, 585 num_irqs, 0, 586 &ab8500_irq_ops, ab8500); 587 588 if (!ab8500->domain) { 589 dev_err(ab8500->dev, "Failed to create irqdomain\n"); 590 return -ENODEV; 591 } 592 593 return 0; 594 } 595 596 int ab8500_suspend(struct ab8500 *ab8500) 597 { 598 if (atomic_read(&ab8500->transfer_ongoing)) 599 return -EINVAL; 600 601 return 0; 602 } 603 604 static const struct mfd_cell ab8500_bm_devs[] = { 605 MFD_CELL_OF("ab8500-charger", NULL, NULL, 0, 0, 606 "stericsson,ab8500-charger"), 607 MFD_CELL_OF("ab8500-btemp", NULL, NULL, 0, 0, 608 "stericsson,ab8500-btemp"), 609 MFD_CELL_OF("ab8500-fg", NULL, NULL, 0, 0, 610 "stericsson,ab8500-fg"), 611 MFD_CELL_OF("ab8500-chargalg", NULL, NULL, 0, 0, 612 "stericsson,ab8500-chargalg"), 613 }; 614 615 static const struct mfd_cell ab8500_devs[] = { 616 #ifdef CONFIG_DEBUG_FS 617 MFD_CELL_OF("ab8500-debug", 618 NULL, NULL, 0, 0, "stericsson,ab8500-debug"), 619 #endif 620 MFD_CELL_OF("ab8500-sysctrl", 621 NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"), 622 MFD_CELL_OF("ab8500-ext-regulator", 623 NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"), 624 MFD_CELL_OF("ab8500-regulator", 625 NULL, NULL, 0, 0, "stericsson,ab8500-regulator"), 626 MFD_CELL_OF("ab8500-clk", 627 NULL, NULL, 0, 0, "stericsson,ab8500-clk"), 628 MFD_CELL_OF("ab8500-gpadc", 629 NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"), 630 MFD_CELL_OF("ab8500-rtc", 631 NULL, NULL, 0, 0, "stericsson,ab8500-rtc"), 632 MFD_CELL_OF("ab8500-acc-det", 633 NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"), 634 MFD_CELL_OF("ab8500-poweron-key", 635 NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"), 636 MFD_CELL_OF("ab8500-pwm", 637 NULL, NULL, 0, 1, "stericsson,ab8500-pwm"), 638 MFD_CELL_OF("ab8500-pwm", 639 NULL, NULL, 0, 2, "stericsson,ab8500-pwm"), 640 MFD_CELL_OF("ab8500-pwm", 641 NULL, NULL, 0, 3, "stericsson,ab8500-pwm"), 642 MFD_CELL_OF("ab8500-denc", 643 NULL, NULL, 0, 0, "stericsson,ab8500-denc"), 644 MFD_CELL_OF("pinctrl-ab8500", 645 NULL, NULL, 0, 0, "stericsson,ab8500-gpio"), 646 MFD_CELL_OF("abx500-temp", 647 NULL, NULL, 0, 0, "stericsson,abx500-temp"), 648 MFD_CELL_OF("ab8500-usb", 649 NULL, NULL, 0, 0, "stericsson,ab8500-usb"), 650 MFD_CELL_OF("ab8500-codec", 651 NULL, NULL, 0, 0, "stericsson,ab8500-codec"), 652 }; 653 654 static const struct mfd_cell ab9540_devs[] = { 655 #ifdef CONFIG_DEBUG_FS 656 { 657 .name = "ab8500-debug", 658 }, 659 #endif 660 { 661 .name = "ab8500-sysctrl", 662 }, 663 { 664 .name = "ab8500-ext-regulator", 665 }, 666 { 667 .name = "ab8500-regulator", 668 }, 669 { 670 .name = "abx500-clk", 671 .of_compatible = "stericsson,abx500-clk", 672 }, 673 { 674 .name = "ab8500-gpadc", 675 .of_compatible = "stericsson,ab8500-gpadc", 676 }, 677 { 678 .name = "ab8500-rtc", 679 }, 680 { 681 .name = "ab8500-acc-det", 682 }, 683 { 684 .name = "ab8500-poweron-key", 685 }, 686 { 687 .name = "ab8500-pwm", 688 .id = 1, 689 }, 690 { 691 .name = "abx500-temp", 692 }, 693 { 694 .name = "pinctrl-ab9540", 695 .of_compatible = "stericsson,ab9540-gpio", 696 }, 697 { 698 .name = "ab9540-usb", 699 }, 700 { 701 .name = "ab9540-codec", 702 }, 703 { 704 .name = "ab-iddet", 705 }, 706 }; 707 708 /* Device list for ab8505 */ 709 static const struct mfd_cell ab8505_devs[] = { 710 #ifdef CONFIG_DEBUG_FS 711 { 712 .name = "ab8500-debug", 713 .of_compatible = "stericsson,ab8500-debug", 714 }, 715 #endif 716 { 717 .name = "ab8500-sysctrl", 718 .of_compatible = "stericsson,ab8500-sysctrl", 719 }, 720 { 721 .name = "ab8500-regulator", 722 .of_compatible = "stericsson,ab8505-regulator", 723 }, 724 { 725 .name = "abx500-clk", 726 .of_compatible = "stericsson,ab8500-clk", 727 }, 728 { 729 .name = "ab8500-gpadc", 730 .of_compatible = "stericsson,ab8500-gpadc", 731 }, 732 { 733 .name = "ab8500-rtc", 734 .of_compatible = "stericsson,ab8500-rtc", 735 }, 736 { 737 .name = "ab8500-acc-det", 738 .of_compatible = "stericsson,ab8500-acc-det", 739 }, 740 { 741 .name = "ab8500-poweron-key", 742 .of_compatible = "stericsson,ab8500-poweron-key", 743 }, 744 { 745 .name = "ab8500-pwm", 746 .of_compatible = "stericsson,ab8500-pwm", 747 .id = 1, 748 }, 749 { 750 .name = "pinctrl-ab8505", 751 .of_compatible = "stericsson,ab8505-gpio", 752 }, 753 { 754 .name = "ab8500-usb", 755 .of_compatible = "stericsson,ab8500-usb", 756 }, 757 { 758 .name = "ab8500-codec", 759 .of_compatible = "stericsson,ab8500-codec", 760 }, 761 { 762 .name = "ab-iddet", 763 }, 764 }; 765 766 static const struct mfd_cell ab8540_devs[] = { 767 #ifdef CONFIG_DEBUG_FS 768 { 769 .name = "ab8500-debug", 770 }, 771 #endif 772 { 773 .name = "ab8500-sysctrl", 774 }, 775 { 776 .name = "ab8500-ext-regulator", 777 }, 778 { 779 .name = "ab8500-regulator", 780 }, 781 { 782 .name = "abx500-clk", 783 .of_compatible = "stericsson,abx500-clk", 784 }, 785 { 786 .name = "ab8500-gpadc", 787 .of_compatible = "stericsson,ab8500-gpadc", 788 }, 789 { 790 .name = "ab8500-acc-det", 791 }, 792 { 793 .name = "ab8500-poweron-key", 794 }, 795 { 796 .name = "ab8500-pwm", 797 .id = 1, 798 }, 799 { 800 .name = "abx500-temp", 801 }, 802 { 803 .name = "pinctrl-ab8540", 804 }, 805 { 806 .name = "ab8540-usb", 807 }, 808 { 809 .name = "ab8540-codec", 810 }, 811 { 812 .name = "ab-iddet", 813 }, 814 }; 815 816 static const struct mfd_cell ab8540_cut1_devs[] = { 817 { 818 .name = "ab8500-rtc", 819 .of_compatible = "stericsson,ab8500-rtc", 820 }, 821 }; 822 823 static const struct mfd_cell ab8540_cut2_devs[] = { 824 { 825 .name = "ab8540-rtc", 826 .of_compatible = "stericsson,ab8540-rtc", 827 }, 828 }; 829 830 static ssize_t chip_id_show(struct device *dev, 831 struct device_attribute *attr, char *buf) 832 { 833 struct ab8500 *ab8500; 834 835 ab8500 = dev_get_drvdata(dev); 836 837 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 838 } 839 840 /* 841 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 842 * 0x01 Swoff bit programming 843 * 0x02 Thermal protection activation 844 * 0x04 Vbat lower then BattOk falling threshold 845 * 0x08 Watchdog expired 846 * 0x10 Non presence of 32kHz clock 847 * 0x20 Battery level lower than power on reset threshold 848 * 0x40 Power on key 1 pressed longer than 10 seconds 849 * 0x80 DB8500 thermal shutdown 850 */ 851 static ssize_t switch_off_status_show(struct device *dev, 852 struct device_attribute *attr, char *buf) 853 { 854 int ret; 855 u8 value; 856 struct ab8500 *ab8500; 857 858 ab8500 = dev_get_drvdata(dev); 859 ret = get_register_interruptible(ab8500, AB8500_RTC, 860 AB8500_SWITCH_OFF_STATUS, &value); 861 if (ret < 0) 862 return ret; 863 return sprintf(buf, "%#x\n", value); 864 } 865 866 /* use mask and set to override the register turn_on_stat value */ 867 void ab8500_override_turn_on_stat(u8 mask, u8 set) 868 { 869 spin_lock(&on_stat_lock); 870 turn_on_stat_mask = mask; 871 turn_on_stat_set = set; 872 spin_unlock(&on_stat_lock); 873 } 874 875 /* 876 * ab8500 has turned on due to (TURN_ON_STATUS): 877 * 0x01 PORnVbat 878 * 0x02 PonKey1dbF 879 * 0x04 PonKey2dbF 880 * 0x08 RTCAlarm 881 * 0x10 MainChDet 882 * 0x20 VbusDet 883 * 0x40 UsbIDDetect 884 * 0x80 Reserved 885 */ 886 static ssize_t turn_on_status_show(struct device *dev, 887 struct device_attribute *attr, char *buf) 888 { 889 int ret; 890 u8 value; 891 struct ab8500 *ab8500; 892 893 ab8500 = dev_get_drvdata(dev); 894 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 895 AB8500_TURN_ON_STATUS, &value); 896 if (ret < 0) 897 return ret; 898 899 /* 900 * In L9540, turn_on_status register is not updated correctly if 901 * the device is rebooted with AC/USB charger connected. Due to 902 * this, the device boots android instead of entering into charge 903 * only mode. Read the AC/USB status register to detect the charger 904 * presence and update the turn on status manually. 905 */ 906 if (is_ab9540(ab8500)) { 907 spin_lock(&on_stat_lock); 908 value = (value & turn_on_stat_mask) | turn_on_stat_set; 909 spin_unlock(&on_stat_lock); 910 } 911 912 return sprintf(buf, "%#x\n", value); 913 } 914 915 static ssize_t turn_on_status_2_show(struct device *dev, 916 struct device_attribute *attr, char *buf) 917 { 918 int ret; 919 u8 value; 920 struct ab8500 *ab8500; 921 922 ab8500 = dev_get_drvdata(dev); 923 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 924 AB8505_TURN_ON_STATUS_2, &value); 925 if (ret < 0) 926 return ret; 927 return sprintf(buf, "%#x\n", (value & 0x1)); 928 } 929 930 static ssize_t dbbrstn_show(struct device *dev, 931 struct device_attribute *attr, char *buf) 932 { 933 struct ab8500 *ab8500; 934 int ret; 935 u8 value; 936 937 ab8500 = dev_get_drvdata(dev); 938 939 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 940 AB9540_MODEM_CTRL2_REG, &value); 941 if (ret < 0) 942 return ret; 943 944 return sprintf(buf, "%d\n", 945 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 946 } 947 948 static ssize_t dbbrstn_store(struct device *dev, 949 struct device_attribute *attr, const char *buf, size_t count) 950 { 951 struct ab8500 *ab8500; 952 int ret = count; 953 int err; 954 u8 bitvalues; 955 956 ab8500 = dev_get_drvdata(dev); 957 958 if (count > 0) { 959 switch (buf[0]) { 960 case '0': 961 bitvalues = 0; 962 break; 963 case '1': 964 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 965 break; 966 default: 967 goto exit; 968 } 969 970 err = mask_and_set_register_interruptible(ab8500, 971 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 972 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 973 if (err) 974 dev_info(ab8500->dev, 975 "Failed to set DBBRSTN %c, err %#x\n", 976 buf[0], err); 977 } 978 979 exit: 980 return ret; 981 } 982 983 static DEVICE_ATTR_RO(chip_id); 984 static DEVICE_ATTR_RO(switch_off_status); 985 static DEVICE_ATTR_RO(turn_on_status); 986 static DEVICE_ATTR_RO(turn_on_status_2); 987 static DEVICE_ATTR_RW(dbbrstn); 988 989 static struct attribute *ab8500_sysfs_entries[] = { 990 &dev_attr_chip_id.attr, 991 &dev_attr_switch_off_status.attr, 992 &dev_attr_turn_on_status.attr, 993 NULL, 994 }; 995 996 static struct attribute *ab8505_sysfs_entries[] = { 997 &dev_attr_turn_on_status_2.attr, 998 NULL, 999 }; 1000 1001 static struct attribute *ab9540_sysfs_entries[] = { 1002 &dev_attr_chip_id.attr, 1003 &dev_attr_switch_off_status.attr, 1004 &dev_attr_turn_on_status.attr, 1005 &dev_attr_dbbrstn.attr, 1006 NULL, 1007 }; 1008 1009 static const struct attribute_group ab8500_attr_group = { 1010 .attrs = ab8500_sysfs_entries, 1011 }; 1012 1013 static const struct attribute_group ab8505_attr_group = { 1014 .attrs = ab8505_sysfs_entries, 1015 }; 1016 1017 static const struct attribute_group ab9540_attr_group = { 1018 .attrs = ab9540_sysfs_entries, 1019 }; 1020 1021 static int ab8500_probe(struct platform_device *pdev) 1022 { 1023 static const char * const switch_off_status[] = { 1024 "Swoff bit programming", 1025 "Thermal protection activation", 1026 "Vbat lower then BattOk falling threshold", 1027 "Watchdog expired", 1028 "Non presence of 32kHz clock", 1029 "Battery level lower than power on reset threshold", 1030 "Power on key 1 pressed longer than 10 seconds", 1031 "DB8500 thermal shutdown"}; 1032 static const char * const turn_on_status[] = { 1033 "Battery rising (Vbat)", 1034 "Power On Key 1 dbF", 1035 "Power On Key 2 dbF", 1036 "RTC Alarm", 1037 "Main Charger Detect", 1038 "Vbus Detect (USB)", 1039 "USB ID Detect", 1040 "UART Factory Mode Detect"}; 1041 const struct platform_device_id *platid = platform_get_device_id(pdev); 1042 enum ab8500_version version = AB8500_VERSION_UNDEFINED; 1043 struct device_node *np = pdev->dev.of_node; 1044 struct ab8500 *ab8500; 1045 struct resource *resource; 1046 int ret; 1047 int i; 1048 u8 value; 1049 1050 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); 1051 if (!ab8500) 1052 return -ENOMEM; 1053 1054 ab8500->dev = &pdev->dev; 1055 1056 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1057 if (!resource) { 1058 dev_err(&pdev->dev, "no IRQ resource\n"); 1059 return -ENODEV; 1060 } 1061 1062 ab8500->irq = resource->start; 1063 1064 ab8500->read = ab8500_prcmu_read; 1065 ab8500->write = ab8500_prcmu_write; 1066 ab8500->write_masked = ab8500_prcmu_write_masked; 1067 1068 mutex_init(&ab8500->lock); 1069 mutex_init(&ab8500->irq_lock); 1070 atomic_set(&ab8500->transfer_ongoing, 0); 1071 1072 platform_set_drvdata(pdev, ab8500); 1073 1074 if (platid) 1075 version = platid->driver_data; 1076 1077 if (version != AB8500_VERSION_UNDEFINED) 1078 ab8500->version = version; 1079 else { 1080 ret = get_register_interruptible(ab8500, AB8500_MISC, 1081 AB8500_IC_NAME_REG, &value); 1082 if (ret < 0) { 1083 dev_err(&pdev->dev, "could not probe HW\n"); 1084 return ret; 1085 } 1086 1087 ab8500->version = value; 1088 } 1089 1090 ret = get_register_interruptible(ab8500, AB8500_MISC, 1091 AB8500_REV_REG, &value); 1092 if (ret < 0) 1093 return ret; 1094 1095 ab8500->chip_id = value; 1096 1097 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 1098 ab8500_version_str[ab8500->version], 1099 ab8500->chip_id >> 4, 1100 ab8500->chip_id & 0x0F); 1101 1102 /* Configure AB8540 */ 1103 if (is_ab8540(ab8500)) { 1104 ab8500->mask_size = AB8540_NUM_IRQ_REGS; 1105 ab8500->irq_reg_offset = ab8540_irq_regoffset; 1106 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; 1107 } /* Configure AB8500 or AB9540 IRQ */ 1108 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1109 ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1110 ab8500->irq_reg_offset = ab9540_irq_regoffset; 1111 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1112 } else { 1113 ab8500->mask_size = AB8500_NUM_IRQ_REGS; 1114 ab8500->irq_reg_offset = ab8500_irq_regoffset; 1115 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1116 } 1117 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1118 GFP_KERNEL); 1119 if (!ab8500->mask) 1120 return -ENOMEM; 1121 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1122 GFP_KERNEL); 1123 if (!ab8500->oldmask) 1124 return -ENOMEM; 1125 1126 /* 1127 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1128 * 0x01 Swoff bit programming 1129 * 0x02 Thermal protection activation 1130 * 0x04 Vbat lower then BattOk falling threshold 1131 * 0x08 Watchdog expired 1132 * 0x10 Non presence of 32kHz clock 1133 * 0x20 Battery level lower than power on reset threshold 1134 * 0x40 Power on key 1 pressed longer than 10 seconds 1135 * 0x80 DB8500 thermal shutdown 1136 */ 1137 1138 ret = get_register_interruptible(ab8500, AB8500_RTC, 1139 AB8500_SWITCH_OFF_STATUS, &value); 1140 if (ret < 0) 1141 return ret; 1142 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1143 1144 if (value) { 1145 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1146 if (value & 1) 1147 pr_cont(" \"%s\"", switch_off_status[i]); 1148 value = value >> 1; 1149 1150 } 1151 pr_cont("\n"); 1152 } else { 1153 pr_cont(" None\n"); 1154 } 1155 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1156 AB8500_TURN_ON_STATUS, &value); 1157 if (ret < 0) 1158 return ret; 1159 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); 1160 1161 if (value) { 1162 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { 1163 if (value & 1) 1164 pr_cont("\"%s\" ", turn_on_status[i]); 1165 value = value >> 1; 1166 } 1167 pr_cont("\n"); 1168 } else { 1169 pr_cont("None\n"); 1170 } 1171 1172 if (is_ab9540(ab8500)) { 1173 ret = get_register_interruptible(ab8500, AB8500_CHARGER, 1174 AB8500_CH_USBCH_STAT1_REG, &value); 1175 if (ret < 0) 1176 return ret; 1177 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) 1178 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, 1179 AB8500_VBUS_DET); 1180 } 1181 1182 /* Clear and mask all interrupts */ 1183 for (i = 0; i < ab8500->mask_size; i++) { 1184 /* 1185 * Interrupt register 12 doesn't exist prior to AB8500 version 1186 * 2.0 1187 */ 1188 if (ab8500->irq_reg_offset[i] == 11 && 1189 is_ab8500_1p1_or_earlier(ab8500)) 1190 continue; 1191 1192 if (ab8500->irq_reg_offset[i] < 0) 1193 continue; 1194 1195 get_register_interruptible(ab8500, AB8500_INTERRUPT, 1196 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 1197 &value); 1198 set_register_interruptible(ab8500, AB8500_INTERRUPT, 1199 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 1200 } 1201 1202 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 1203 if (ret) 1204 return ret; 1205 1206 for (i = 0; i < ab8500->mask_size; i++) 1207 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 1208 1209 ret = ab8500_irq_init(ab8500, np); 1210 if (ret) 1211 return ret; 1212 1213 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 1214 ab8500_hierarchical_irq, 1215 IRQF_ONESHOT | IRQF_NO_SUSPEND, 1216 "ab8500", ab8500); 1217 if (ret) 1218 return ret; 1219 1220 if (is_ab9540(ab8500)) 1221 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1222 ARRAY_SIZE(ab9540_devs), NULL, 1223 0, ab8500->domain); 1224 else if (is_ab8540(ab8500)) { 1225 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1226 ARRAY_SIZE(ab8540_devs), NULL, 1227 0, ab8500->domain); 1228 if (ret) 1229 return ret; 1230 1231 if (is_ab8540_1p2_or_earlier(ab8500)) 1232 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1233 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1234 0, ab8500->domain); 1235 else /* ab8540 >= cut2 */ 1236 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1237 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1238 0, ab8500->domain); 1239 } else if (is_ab8505(ab8500)) 1240 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1241 ARRAY_SIZE(ab8505_devs), NULL, 1242 0, ab8500->domain); 1243 else 1244 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1245 ARRAY_SIZE(ab8500_devs), NULL, 1246 0, ab8500->domain); 1247 if (ret) 1248 return ret; 1249 1250 /* Add battery management devices */ 1251 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1252 ARRAY_SIZE(ab8500_bm_devs), NULL, 1253 0, ab8500->domain); 1254 if (ret) 1255 dev_err(ab8500->dev, "error adding bm devices\n"); 1256 1257 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1258 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1259 ret = sysfs_create_group(&ab8500->dev->kobj, 1260 &ab9540_attr_group); 1261 else 1262 ret = sysfs_create_group(&ab8500->dev->kobj, 1263 &ab8500_attr_group); 1264 1265 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1266 ab8500->chip_id >= AB8500_CUT2P0) 1267 ret = sysfs_create_group(&ab8500->dev->kobj, 1268 &ab8505_attr_group); 1269 1270 if (ret) 1271 dev_err(ab8500->dev, "error creating sysfs entries\n"); 1272 1273 return ret; 1274 } 1275 1276 static const struct platform_device_id ab8500_id[] = { 1277 { "ab8500-core", AB8500_VERSION_AB8500 }, 1278 { "ab8505-core", AB8500_VERSION_AB8505 }, 1279 { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1280 { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1281 { } 1282 }; 1283 1284 static struct platform_driver ab8500_core_driver = { 1285 .driver = { 1286 .name = "ab8500-core", 1287 .suppress_bind_attrs = true, 1288 }, 1289 .probe = ab8500_probe, 1290 .id_table = ab8500_id, 1291 }; 1292 1293 static int __init ab8500_core_init(void) 1294 { 1295 return platform_driver_register(&ab8500_core_driver); 1296 } 1297 core_initcall(ab8500_core_init); 1298