1 /* 2 * Copyright (C) ST-Ericsson SA 2010 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/module.h> 18 #include <linux/platform_device.h> 19 #include <linux/mfd/core.h> 20 #include <linux/mfd/abx500.h> 21 #include <linux/mfd/abx500/ab8500.h> 22 #include <linux/mfd/abx500/ab8500-bm.h> 23 #include <linux/mfd/dbx500-prcmu.h> 24 #include <linux/regulator/ab8500.h> 25 #include <linux/of.h> 26 #include <linux/of_device.h> 27 28 /* 29 * Interrupt register offsets 30 * Bank : 0x0E 31 */ 32 #define AB8500_IT_SOURCE1_REG 0x00 33 #define AB8500_IT_SOURCE2_REG 0x01 34 #define AB8500_IT_SOURCE3_REG 0x02 35 #define AB8500_IT_SOURCE4_REG 0x03 36 #define AB8500_IT_SOURCE5_REG 0x04 37 #define AB8500_IT_SOURCE6_REG 0x05 38 #define AB8500_IT_SOURCE7_REG 0x06 39 #define AB8500_IT_SOURCE8_REG 0x07 40 #define AB9540_IT_SOURCE13_REG 0x0C 41 #define AB8500_IT_SOURCE19_REG 0x12 42 #define AB8500_IT_SOURCE20_REG 0x13 43 #define AB8500_IT_SOURCE21_REG 0x14 44 #define AB8500_IT_SOURCE22_REG 0x15 45 #define AB8500_IT_SOURCE23_REG 0x16 46 #define AB8500_IT_SOURCE24_REG 0x17 47 48 /* 49 * latch registers 50 */ 51 #define AB8500_IT_LATCH1_REG 0x20 52 #define AB8500_IT_LATCH2_REG 0x21 53 #define AB8500_IT_LATCH3_REG 0x22 54 #define AB8500_IT_LATCH4_REG 0x23 55 #define AB8500_IT_LATCH5_REG 0x24 56 #define AB8500_IT_LATCH6_REG 0x25 57 #define AB8500_IT_LATCH7_REG 0x26 58 #define AB8500_IT_LATCH8_REG 0x27 59 #define AB8500_IT_LATCH9_REG 0x28 60 #define AB8500_IT_LATCH10_REG 0x29 61 #define AB8500_IT_LATCH12_REG 0x2B 62 #define AB9540_IT_LATCH13_REG 0x2C 63 #define AB8500_IT_LATCH19_REG 0x32 64 #define AB8500_IT_LATCH20_REG 0x33 65 #define AB8500_IT_LATCH21_REG 0x34 66 #define AB8500_IT_LATCH22_REG 0x35 67 #define AB8500_IT_LATCH23_REG 0x36 68 #define AB8500_IT_LATCH24_REG 0x37 69 70 /* 71 * mask registers 72 */ 73 74 #define AB8500_IT_MASK1_REG 0x40 75 #define AB8500_IT_MASK2_REG 0x41 76 #define AB8500_IT_MASK3_REG 0x42 77 #define AB8500_IT_MASK4_REG 0x43 78 #define AB8500_IT_MASK5_REG 0x44 79 #define AB8500_IT_MASK6_REG 0x45 80 #define AB8500_IT_MASK7_REG 0x46 81 #define AB8500_IT_MASK8_REG 0x47 82 #define AB8500_IT_MASK9_REG 0x48 83 #define AB8500_IT_MASK10_REG 0x49 84 #define AB8500_IT_MASK11_REG 0x4A 85 #define AB8500_IT_MASK12_REG 0x4B 86 #define AB8500_IT_MASK13_REG 0x4C 87 #define AB8500_IT_MASK14_REG 0x4D 88 #define AB8500_IT_MASK15_REG 0x4E 89 #define AB8500_IT_MASK16_REG 0x4F 90 #define AB8500_IT_MASK17_REG 0x50 91 #define AB8500_IT_MASK18_REG 0x51 92 #define AB8500_IT_MASK19_REG 0x52 93 #define AB8500_IT_MASK20_REG 0x53 94 #define AB8500_IT_MASK21_REG 0x54 95 #define AB8500_IT_MASK22_REG 0x55 96 #define AB8500_IT_MASK23_REG 0x56 97 #define AB8500_IT_MASK24_REG 0x57 98 #define AB8500_IT_MASK25_REG 0x58 99 100 /* 101 * latch hierarchy registers 102 */ 103 #define AB8500_IT_LATCHHIER1_REG 0x60 104 #define AB8500_IT_LATCHHIER2_REG 0x61 105 #define AB8500_IT_LATCHHIER3_REG 0x62 106 #define AB8540_IT_LATCHHIER4_REG 0x63 107 108 #define AB8500_IT_LATCHHIER_NUM 3 109 #define AB8540_IT_LATCHHIER_NUM 4 110 111 #define AB8500_REV_REG 0x80 112 #define AB8500_IC_NAME_REG 0x82 113 #define AB8500_SWITCH_OFF_STATUS 0x00 114 115 #define AB8500_TURN_ON_STATUS 0x00 116 #define AB8505_TURN_ON_STATUS_2 0x04 117 118 #define AB8500_CH_USBCH_STAT1_REG 0x02 119 #define VBUS_DET_DBNC100 0x02 120 #define VBUS_DET_DBNC1 0x01 121 122 static DEFINE_SPINLOCK(on_stat_lock); 123 static u8 turn_on_stat_mask = 0xFF; 124 static u8 turn_on_stat_set; 125 static bool no_bm; /* No battery management */ 126 module_param(no_bm, bool, S_IRUGO); 127 128 #define AB9540_MODEM_CTRL2_REG 0x23 129 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 130 131 /* 132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 133 * numbers are indexed into this array with (num / 8). The interupts are 134 * defined in linux/mfd/ab8500.h 135 * 136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 137 * offset 0. 138 */ 139 /* AB8500 support */ 140 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 142 }; 143 144 /* AB9540 / AB8505 support */ 145 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 147 }; 148 149 /* AB8540 support */ 150 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { 151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 152 23, 25, 26, 27, 28, 29, 30, 31, 153 }; 154 155 static const char ab8500_version_str[][7] = { 156 [AB8500_VERSION_AB8500] = "AB8500", 157 [AB8500_VERSION_AB8505] = "AB8505", 158 [AB8500_VERSION_AB9540] = "AB9540", 159 [AB8500_VERSION_AB8540] = "AB8540", 160 }; 161 162 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 163 { 164 int ret; 165 166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 167 if (ret < 0) 168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 169 return ret; 170 } 171 172 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 173 u8 data) 174 { 175 int ret; 176 177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 178 &mask, 1); 179 if (ret < 0) 180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 181 return ret; 182 } 183 184 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 185 { 186 int ret; 187 u8 data; 188 189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 190 if (ret < 0) { 191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 192 return ret; 193 } 194 return (int)data; 195 } 196 197 static int ab8500_get_chip_id(struct device *dev) 198 { 199 struct ab8500 *ab8500; 200 201 if (!dev) 202 return -EINVAL; 203 ab8500 = dev_get_drvdata(dev->parent); 204 return ab8500 ? (int)ab8500->chip_id : -EINVAL; 205 } 206 207 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 208 u8 reg, u8 data) 209 { 210 int ret; 211 /* 212 * Put the u8 bank and u8 register together into a an u16. 213 * The bank on higher 8 bits and register in lower 8 bits. 214 * */ 215 u16 addr = ((u16)bank) << 8 | reg; 216 217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 218 219 mutex_lock(&ab8500->lock); 220 221 ret = ab8500->write(ab8500, addr, data); 222 if (ret < 0) 223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 224 addr, ret); 225 mutex_unlock(&ab8500->lock); 226 227 return ret; 228 } 229 230 static int ab8500_set_register(struct device *dev, u8 bank, 231 u8 reg, u8 value) 232 { 233 int ret; 234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 235 236 atomic_inc(&ab8500->transfer_ongoing); 237 ret = set_register_interruptible(ab8500, bank, reg, value); 238 atomic_dec(&ab8500->transfer_ongoing); 239 return ret; 240 } 241 242 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 243 u8 reg, u8 *value) 244 { 245 int ret; 246 /* put the u8 bank and u8 reg together into a an u16. 247 * bank on higher 8 bits and reg in lower */ 248 u16 addr = ((u16)bank) << 8 | reg; 249 250 mutex_lock(&ab8500->lock); 251 252 ret = ab8500->read(ab8500, addr); 253 if (ret < 0) 254 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 255 addr, ret); 256 else 257 *value = ret; 258 259 mutex_unlock(&ab8500->lock); 260 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 261 262 return ret; 263 } 264 265 static int ab8500_get_register(struct device *dev, u8 bank, 266 u8 reg, u8 *value) 267 { 268 int ret; 269 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 270 271 atomic_inc(&ab8500->transfer_ongoing); 272 ret = get_register_interruptible(ab8500, bank, reg, value); 273 atomic_dec(&ab8500->transfer_ongoing); 274 return ret; 275 } 276 277 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 278 u8 reg, u8 bitmask, u8 bitvalues) 279 { 280 int ret; 281 /* put the u8 bank and u8 reg together into a an u16. 282 * bank on higher 8 bits and reg in lower */ 283 u16 addr = ((u16)bank) << 8 | reg; 284 285 mutex_lock(&ab8500->lock); 286 287 if (ab8500->write_masked == NULL) { 288 u8 data; 289 290 ret = ab8500->read(ab8500, addr); 291 if (ret < 0) { 292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 293 addr, ret); 294 goto out; 295 } 296 297 data = (u8)ret; 298 data = (~bitmask & data) | (bitmask & bitvalues); 299 300 ret = ab8500->write(ab8500, addr, data); 301 if (ret < 0) 302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 303 addr, ret); 304 305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 306 data); 307 goto out; 308 } 309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 310 if (ret < 0) 311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 312 ret); 313 out: 314 mutex_unlock(&ab8500->lock); 315 return ret; 316 } 317 318 static int ab8500_mask_and_set_register(struct device *dev, 319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 320 { 321 int ret; 322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 323 324 atomic_inc(&ab8500->transfer_ongoing); 325 ret = mask_and_set_register_interruptible(ab8500, bank, reg, 326 bitmask, bitvalues); 327 atomic_dec(&ab8500->transfer_ongoing); 328 return ret; 329 } 330 331 static struct abx500_ops ab8500_ops = { 332 .get_chip_id = ab8500_get_chip_id, 333 .get_register = ab8500_get_register, 334 .set_register = ab8500_set_register, 335 .get_register_page = NULL, 336 .set_register_page = NULL, 337 .mask_and_set_register = ab8500_mask_and_set_register, 338 .event_registers_startup_state_get = NULL, 339 .startup_irq_enabled = NULL, 340 .dump_all_banks = ab8500_dump_all_banks, 341 }; 342 343 static void ab8500_irq_lock(struct irq_data *data) 344 { 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 346 347 mutex_lock(&ab8500->irq_lock); 348 atomic_inc(&ab8500->transfer_ongoing); 349 } 350 351 static void ab8500_irq_sync_unlock(struct irq_data *data) 352 { 353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 354 int i; 355 356 for (i = 0; i < ab8500->mask_size; i++) { 357 u8 old = ab8500->oldmask[i]; 358 u8 new = ab8500->mask[i]; 359 int reg; 360 361 if (new == old) 362 continue; 363 364 /* 365 * Interrupt register 12 doesn't exist prior to AB8500 version 366 * 2.0 367 */ 368 if (ab8500->irq_reg_offset[i] == 11 && 369 is_ab8500_1p1_or_earlier(ab8500)) 370 continue; 371 372 if (ab8500->irq_reg_offset[i] < 0) 373 continue; 374 375 ab8500->oldmask[i] = new; 376 377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 379 } 380 atomic_dec(&ab8500->transfer_ongoing); 381 mutex_unlock(&ab8500->irq_lock); 382 } 383 384 static void ab8500_irq_mask(struct irq_data *data) 385 { 386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 387 int offset = data->hwirq; 388 int index = offset / 8; 389 int mask = 1 << (offset % 8); 390 391 ab8500->mask[index] |= mask; 392 393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 395 ab8500->mask[index + 2] |= mask; 396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) 397 ab8500->mask[index + 1] |= mask; 398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) 399 /* Here the falling IRQ is one bit lower */ 400 ab8500->mask[index] |= (mask << 1); 401 } 402 403 static void ab8500_irq_unmask(struct irq_data *data) 404 { 405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 406 unsigned int type = irqd_get_trigger_type(data); 407 int offset = data->hwirq; 408 int index = offset / 8; 409 int mask = 1 << (offset % 8); 410 411 if (type & IRQ_TYPE_EDGE_RISING) 412 ab8500->mask[index] &= ~mask; 413 414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 415 if (type & IRQ_TYPE_EDGE_FALLING) { 416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 417 ab8500->mask[index + 2] &= ~mask; 418 else if (offset >= AB9540_INT_GPIO50R && 419 offset <= AB9540_INT_GPIO54R) 420 ab8500->mask[index + 1] &= ~mask; 421 else if (offset == AB8540_INT_GPIO43R || 422 offset == AB8540_INT_GPIO44R) 423 /* Here the falling IRQ is one bit lower */ 424 ab8500->mask[index] &= ~(mask << 1); 425 else 426 ab8500->mask[index] &= ~mask; 427 } else { 428 /* Satisfies the case where type is not set. */ 429 ab8500->mask[index] &= ~mask; 430 } 431 } 432 433 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) 434 { 435 return 0; 436 } 437 438 static struct irq_chip ab8500_irq_chip = { 439 .name = "ab8500", 440 .irq_bus_lock = ab8500_irq_lock, 441 .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 442 .irq_mask = ab8500_irq_mask, 443 .irq_disable = ab8500_irq_mask, 444 .irq_unmask = ab8500_irq_unmask, 445 .irq_set_type = ab8500_irq_set_type, 446 }; 447 448 static void update_latch_offset(u8 *offset, int i) 449 { 450 /* Fix inconsistent ITFromLatch25 bit mapping... */ 451 if (unlikely(*offset == 17)) 452 *offset = 24; 453 /* Fix inconsistent ab8540 bit mapping... */ 454 if (unlikely(*offset == 16)) 455 *offset = 25; 456 if ((i == 3) && (*offset >= 24)) 457 *offset += 2; 458 } 459 460 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 461 int latch_offset, u8 latch_val) 462 { 463 int int_bit, line, i; 464 465 for (i = 0; i < ab8500->mask_size; i++) 466 if (ab8500->irq_reg_offset[i] == latch_offset) 467 break; 468 469 if (i >= ab8500->mask_size) { 470 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 471 latch_offset); 472 return -ENXIO; 473 } 474 475 /* ignore masked out interrupts */ 476 latch_val &= ~ab8500->mask[i]; 477 478 while (latch_val) { 479 int_bit = __ffs(latch_val); 480 line = (i << 3) + int_bit; 481 latch_val &= ~(1 << int_bit); 482 483 /* 484 * This handles the falling edge hwirqs from the GPIO 485 * lines. Route them back to the line registered for the 486 * rising IRQ, as this is merely a flag for the same IRQ 487 * in linux terms. 488 */ 489 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) 490 line -= 16; 491 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) 492 line -= 8; 493 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) 494 line += 1; 495 496 handle_nested_irq(irq_create_mapping(ab8500->domain, line)); 497 } 498 499 return 0; 500 } 501 502 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 503 int hier_offset, u8 hier_val) 504 { 505 int latch_bit, status; 506 u8 latch_offset, latch_val; 507 508 do { 509 latch_bit = __ffs(hier_val); 510 latch_offset = (hier_offset << 3) + latch_bit; 511 512 update_latch_offset(&latch_offset, hier_offset); 513 514 status = get_register_interruptible(ab8500, 515 AB8500_INTERRUPT, 516 AB8500_IT_LATCH1_REG + latch_offset, 517 &latch_val); 518 if (status < 0 || latch_val == 0) 519 goto discard; 520 521 status = ab8500_handle_hierarchical_line(ab8500, 522 latch_offset, latch_val); 523 if (status < 0) 524 return status; 525 discard: 526 hier_val &= ~(1 << latch_bit); 527 } while (hier_val); 528 529 return 0; 530 } 531 532 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 533 { 534 struct ab8500 *ab8500 = dev; 535 u8 i; 536 537 dev_vdbg(ab8500->dev, "interrupt\n"); 538 539 /* Hierarchical interrupt version */ 540 for (i = 0; i < (ab8500->it_latchhier_num); i++) { 541 int status; 542 u8 hier_val; 543 544 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 545 AB8500_IT_LATCHHIER1_REG + i, &hier_val); 546 if (status < 0 || hier_val == 0) 547 continue; 548 549 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 550 if (status < 0) 551 break; 552 } 553 return IRQ_HANDLED; 554 } 555 556 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 557 irq_hw_number_t hwirq) 558 { 559 struct ab8500 *ab8500 = d->host_data; 560 561 if (!ab8500) 562 return -EINVAL; 563 564 irq_set_chip_data(virq, ab8500); 565 irq_set_chip_and_handler(virq, &ab8500_irq_chip, 566 handle_simple_irq); 567 irq_set_nested_thread(virq, 1); 568 irq_set_noprobe(virq); 569 570 return 0; 571 } 572 573 static const struct irq_domain_ops ab8500_irq_ops = { 574 .map = ab8500_irq_map, 575 .xlate = irq_domain_xlate_twocell, 576 }; 577 578 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 579 { 580 int num_irqs; 581 582 if (is_ab8540(ab8500)) 583 num_irqs = AB8540_NR_IRQS; 584 else if (is_ab9540(ab8500)) 585 num_irqs = AB9540_NR_IRQS; 586 else if (is_ab8505(ab8500)) 587 num_irqs = AB8505_NR_IRQS; 588 else 589 num_irqs = AB8500_NR_IRQS; 590 591 /* If ->irq_base is zero this will give a linear mapping */ 592 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, 593 num_irqs, 0, 594 &ab8500_irq_ops, ab8500); 595 596 if (!ab8500->domain) { 597 dev_err(ab8500->dev, "Failed to create irqdomain\n"); 598 return -ENOSYS; 599 } 600 601 return 0; 602 } 603 604 int ab8500_suspend(struct ab8500 *ab8500) 605 { 606 if (atomic_read(&ab8500->transfer_ongoing)) 607 return -EINVAL; 608 609 return 0; 610 } 611 612 static struct resource ab8500_gpadc_resources[] = { 613 { 614 .name = "HW_CONV_END", 615 .start = AB8500_INT_GP_HW_ADC_CONV_END, 616 .end = AB8500_INT_GP_HW_ADC_CONV_END, 617 .flags = IORESOURCE_IRQ, 618 }, 619 { 620 .name = "SW_CONV_END", 621 .start = AB8500_INT_GP_SW_ADC_CONV_END, 622 .end = AB8500_INT_GP_SW_ADC_CONV_END, 623 .flags = IORESOURCE_IRQ, 624 }, 625 }; 626 627 static struct resource ab8505_gpadc_resources[] = { 628 { 629 .name = "SW_CONV_END", 630 .start = AB8500_INT_GP_SW_ADC_CONV_END, 631 .end = AB8500_INT_GP_SW_ADC_CONV_END, 632 .flags = IORESOURCE_IRQ, 633 }, 634 }; 635 636 static struct resource ab8500_rtc_resources[] = { 637 { 638 .name = "60S", 639 .start = AB8500_INT_RTC_60S, 640 .end = AB8500_INT_RTC_60S, 641 .flags = IORESOURCE_IRQ, 642 }, 643 { 644 .name = "ALARM", 645 .start = AB8500_INT_RTC_ALARM, 646 .end = AB8500_INT_RTC_ALARM, 647 .flags = IORESOURCE_IRQ, 648 }, 649 }; 650 651 static struct resource ab8540_rtc_resources[] = { 652 { 653 .name = "1S", 654 .start = AB8540_INT_RTC_1S, 655 .end = AB8540_INT_RTC_1S, 656 .flags = IORESOURCE_IRQ, 657 }, 658 { 659 .name = "ALARM", 660 .start = AB8500_INT_RTC_ALARM, 661 .end = AB8500_INT_RTC_ALARM, 662 .flags = IORESOURCE_IRQ, 663 }, 664 }; 665 666 static struct resource ab8500_poweronkey_db_resources[] = { 667 { 668 .name = "ONKEY_DBF", 669 .start = AB8500_INT_PON_KEY1DB_F, 670 .end = AB8500_INT_PON_KEY1DB_F, 671 .flags = IORESOURCE_IRQ, 672 }, 673 { 674 .name = "ONKEY_DBR", 675 .start = AB8500_INT_PON_KEY1DB_R, 676 .end = AB8500_INT_PON_KEY1DB_R, 677 .flags = IORESOURCE_IRQ, 678 }, 679 }; 680 681 static struct resource ab8500_av_acc_detect_resources[] = { 682 { 683 .name = "ACC_DETECT_1DB_F", 684 .start = AB8500_INT_ACC_DETECT_1DB_F, 685 .end = AB8500_INT_ACC_DETECT_1DB_F, 686 .flags = IORESOURCE_IRQ, 687 }, 688 { 689 .name = "ACC_DETECT_1DB_R", 690 .start = AB8500_INT_ACC_DETECT_1DB_R, 691 .end = AB8500_INT_ACC_DETECT_1DB_R, 692 .flags = IORESOURCE_IRQ, 693 }, 694 { 695 .name = "ACC_DETECT_21DB_F", 696 .start = AB8500_INT_ACC_DETECT_21DB_F, 697 .end = AB8500_INT_ACC_DETECT_21DB_F, 698 .flags = IORESOURCE_IRQ, 699 }, 700 { 701 .name = "ACC_DETECT_21DB_R", 702 .start = AB8500_INT_ACC_DETECT_21DB_R, 703 .end = AB8500_INT_ACC_DETECT_21DB_R, 704 .flags = IORESOURCE_IRQ, 705 }, 706 { 707 .name = "ACC_DETECT_22DB_F", 708 .start = AB8500_INT_ACC_DETECT_22DB_F, 709 .end = AB8500_INT_ACC_DETECT_22DB_F, 710 .flags = IORESOURCE_IRQ, 711 }, 712 { 713 .name = "ACC_DETECT_22DB_R", 714 .start = AB8500_INT_ACC_DETECT_22DB_R, 715 .end = AB8500_INT_ACC_DETECT_22DB_R, 716 .flags = IORESOURCE_IRQ, 717 }, 718 }; 719 720 static struct resource ab8500_charger_resources[] = { 721 { 722 .name = "MAIN_CH_UNPLUG_DET", 723 .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 724 .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 725 .flags = IORESOURCE_IRQ, 726 }, 727 { 728 .name = "MAIN_CHARGE_PLUG_DET", 729 .start = AB8500_INT_MAIN_CH_PLUG_DET, 730 .end = AB8500_INT_MAIN_CH_PLUG_DET, 731 .flags = IORESOURCE_IRQ, 732 }, 733 { 734 .name = "VBUS_DET_R", 735 .start = AB8500_INT_VBUS_DET_R, 736 .end = AB8500_INT_VBUS_DET_R, 737 .flags = IORESOURCE_IRQ, 738 }, 739 { 740 .name = "VBUS_DET_F", 741 .start = AB8500_INT_VBUS_DET_F, 742 .end = AB8500_INT_VBUS_DET_F, 743 .flags = IORESOURCE_IRQ, 744 }, 745 { 746 .name = "USB_LINK_STATUS", 747 .start = AB8500_INT_USB_LINK_STATUS, 748 .end = AB8500_INT_USB_LINK_STATUS, 749 .flags = IORESOURCE_IRQ, 750 }, 751 { 752 .name = "VBUS_OVV", 753 .start = AB8500_INT_VBUS_OVV, 754 .end = AB8500_INT_VBUS_OVV, 755 .flags = IORESOURCE_IRQ, 756 }, 757 { 758 .name = "USB_CH_TH_PROT_R", 759 .start = AB8500_INT_USB_CH_TH_PROT_R, 760 .end = AB8500_INT_USB_CH_TH_PROT_R, 761 .flags = IORESOURCE_IRQ, 762 }, 763 { 764 .name = "USB_CH_TH_PROT_F", 765 .start = AB8500_INT_USB_CH_TH_PROT_F, 766 .end = AB8500_INT_USB_CH_TH_PROT_F, 767 .flags = IORESOURCE_IRQ, 768 }, 769 { 770 .name = "MAIN_EXT_CH_NOT_OK", 771 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 772 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 773 .flags = IORESOURCE_IRQ, 774 }, 775 { 776 .name = "MAIN_CH_TH_PROT_R", 777 .start = AB8500_INT_MAIN_CH_TH_PROT_R, 778 .end = AB8500_INT_MAIN_CH_TH_PROT_R, 779 .flags = IORESOURCE_IRQ, 780 }, 781 { 782 .name = "MAIN_CH_TH_PROT_F", 783 .start = AB8500_INT_MAIN_CH_TH_PROT_F, 784 .end = AB8500_INT_MAIN_CH_TH_PROT_F, 785 .flags = IORESOURCE_IRQ, 786 }, 787 { 788 .name = "USB_CHARGER_NOT_OKR", 789 .start = AB8500_INT_USB_CHARGER_NOT_OKR, 790 .end = AB8500_INT_USB_CHARGER_NOT_OKR, 791 .flags = IORESOURCE_IRQ, 792 }, 793 { 794 .name = "CH_WD_EXP", 795 .start = AB8500_INT_CH_WD_EXP, 796 .end = AB8500_INT_CH_WD_EXP, 797 .flags = IORESOURCE_IRQ, 798 }, 799 { 800 .name = "VBUS_CH_DROP_END", 801 .start = AB8500_INT_VBUS_CH_DROP_END, 802 .end = AB8500_INT_VBUS_CH_DROP_END, 803 .flags = IORESOURCE_IRQ, 804 }, 805 }; 806 807 static struct resource ab8500_btemp_resources[] = { 808 { 809 .name = "BAT_CTRL_INDB", 810 .start = AB8500_INT_BAT_CTRL_INDB, 811 .end = AB8500_INT_BAT_CTRL_INDB, 812 .flags = IORESOURCE_IRQ, 813 }, 814 { 815 .name = "BTEMP_LOW", 816 .start = AB8500_INT_BTEMP_LOW, 817 .end = AB8500_INT_BTEMP_LOW, 818 .flags = IORESOURCE_IRQ, 819 }, 820 { 821 .name = "BTEMP_HIGH", 822 .start = AB8500_INT_BTEMP_HIGH, 823 .end = AB8500_INT_BTEMP_HIGH, 824 .flags = IORESOURCE_IRQ, 825 }, 826 { 827 .name = "BTEMP_LOW_MEDIUM", 828 .start = AB8500_INT_BTEMP_LOW_MEDIUM, 829 .end = AB8500_INT_BTEMP_LOW_MEDIUM, 830 .flags = IORESOURCE_IRQ, 831 }, 832 { 833 .name = "BTEMP_MEDIUM_HIGH", 834 .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 835 .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 836 .flags = IORESOURCE_IRQ, 837 }, 838 }; 839 840 static struct resource ab8500_fg_resources[] = { 841 { 842 .name = "NCONV_ACCU", 843 .start = AB8500_INT_CCN_CONV_ACC, 844 .end = AB8500_INT_CCN_CONV_ACC, 845 .flags = IORESOURCE_IRQ, 846 }, 847 { 848 .name = "BATT_OVV", 849 .start = AB8500_INT_BATT_OVV, 850 .end = AB8500_INT_BATT_OVV, 851 .flags = IORESOURCE_IRQ, 852 }, 853 { 854 .name = "LOW_BAT_F", 855 .start = AB8500_INT_LOW_BAT_F, 856 .end = AB8500_INT_LOW_BAT_F, 857 .flags = IORESOURCE_IRQ, 858 }, 859 { 860 .name = "LOW_BAT_R", 861 .start = AB8500_INT_LOW_BAT_R, 862 .end = AB8500_INT_LOW_BAT_R, 863 .flags = IORESOURCE_IRQ, 864 }, 865 { 866 .name = "CC_INT_CALIB", 867 .start = AB8500_INT_CC_INT_CALIB, 868 .end = AB8500_INT_CC_INT_CALIB, 869 .flags = IORESOURCE_IRQ, 870 }, 871 { 872 .name = "CCEOC", 873 .start = AB8500_INT_CCEOC, 874 .end = AB8500_INT_CCEOC, 875 .flags = IORESOURCE_IRQ, 876 }, 877 }; 878 879 static struct resource ab8500_chargalg_resources[] = {}; 880 881 #ifdef CONFIG_DEBUG_FS 882 static struct resource ab8500_debug_resources[] = { 883 { 884 .name = "IRQ_AB8500", 885 /* 886 * Number will be filled in. NOTE: this is deliberately 887 * not flagged as an IRQ in ordet to avoid remapping using 888 * the irqdomain in the MFD core, so that this IRQ passes 889 * unremapped to the debug code. 890 */ 891 }, 892 { 893 .name = "IRQ_FIRST", 894 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 895 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 896 .flags = IORESOURCE_IRQ, 897 }, 898 { 899 .name = "IRQ_LAST", 900 .start = AB8500_INT_XTAL32K_KO, 901 .end = AB8500_INT_XTAL32K_KO, 902 .flags = IORESOURCE_IRQ, 903 }, 904 }; 905 #endif 906 907 static struct resource ab8500_usb_resources[] = { 908 { 909 .name = "ID_WAKEUP_R", 910 .start = AB8500_INT_ID_WAKEUP_R, 911 .end = AB8500_INT_ID_WAKEUP_R, 912 .flags = IORESOURCE_IRQ, 913 }, 914 { 915 .name = "ID_WAKEUP_F", 916 .start = AB8500_INT_ID_WAKEUP_F, 917 .end = AB8500_INT_ID_WAKEUP_F, 918 .flags = IORESOURCE_IRQ, 919 }, 920 { 921 .name = "VBUS_DET_F", 922 .start = AB8500_INT_VBUS_DET_F, 923 .end = AB8500_INT_VBUS_DET_F, 924 .flags = IORESOURCE_IRQ, 925 }, 926 { 927 .name = "VBUS_DET_R", 928 .start = AB8500_INT_VBUS_DET_R, 929 .end = AB8500_INT_VBUS_DET_R, 930 .flags = IORESOURCE_IRQ, 931 }, 932 { 933 .name = "USB_LINK_STATUS", 934 .start = AB8500_INT_USB_LINK_STATUS, 935 .end = AB8500_INT_USB_LINK_STATUS, 936 .flags = IORESOURCE_IRQ, 937 }, 938 { 939 .name = "USB_ADP_PROBE_PLUG", 940 .start = AB8500_INT_ADP_PROBE_PLUG, 941 .end = AB8500_INT_ADP_PROBE_PLUG, 942 .flags = IORESOURCE_IRQ, 943 }, 944 { 945 .name = "USB_ADP_PROBE_UNPLUG", 946 .start = AB8500_INT_ADP_PROBE_UNPLUG, 947 .end = AB8500_INT_ADP_PROBE_UNPLUG, 948 .flags = IORESOURCE_IRQ, 949 }, 950 }; 951 952 static struct resource ab8505_iddet_resources[] = { 953 { 954 .name = "KeyDeglitch", 955 .start = AB8505_INT_KEYDEGLITCH, 956 .end = AB8505_INT_KEYDEGLITCH, 957 .flags = IORESOURCE_IRQ, 958 }, 959 { 960 .name = "KP", 961 .start = AB8505_INT_KP, 962 .end = AB8505_INT_KP, 963 .flags = IORESOURCE_IRQ, 964 }, 965 { 966 .name = "IKP", 967 .start = AB8505_INT_IKP, 968 .end = AB8505_INT_IKP, 969 .flags = IORESOURCE_IRQ, 970 }, 971 { 972 .name = "IKR", 973 .start = AB8505_INT_IKR, 974 .end = AB8505_INT_IKR, 975 .flags = IORESOURCE_IRQ, 976 }, 977 { 978 .name = "KeyStuck", 979 .start = AB8505_INT_KEYSTUCK, 980 .end = AB8505_INT_KEYSTUCK, 981 .flags = IORESOURCE_IRQ, 982 }, 983 { 984 .name = "VBUS_DET_R", 985 .start = AB8500_INT_VBUS_DET_R, 986 .end = AB8500_INT_VBUS_DET_R, 987 .flags = IORESOURCE_IRQ, 988 }, 989 { 990 .name = "VBUS_DET_F", 991 .start = AB8500_INT_VBUS_DET_F, 992 .end = AB8500_INT_VBUS_DET_F, 993 .flags = IORESOURCE_IRQ, 994 }, 995 { 996 .name = "ID_DET_PLUGR", 997 .start = AB8500_INT_ID_DET_PLUGR, 998 .end = AB8500_INT_ID_DET_PLUGR, 999 .flags = IORESOURCE_IRQ, 1000 }, 1001 { 1002 .name = "ID_DET_PLUGF", 1003 .start = AB8500_INT_ID_DET_PLUGF, 1004 .end = AB8500_INT_ID_DET_PLUGF, 1005 .flags = IORESOURCE_IRQ, 1006 }, 1007 }; 1008 1009 static struct resource ab8500_temp_resources[] = { 1010 { 1011 .name = "ABX500_TEMP_WARM", 1012 .start = AB8500_INT_TEMP_WARM, 1013 .end = AB8500_INT_TEMP_WARM, 1014 .flags = IORESOURCE_IRQ, 1015 }, 1016 }; 1017 1018 static const struct mfd_cell ab8500_bm_devs[] = { 1019 { 1020 .name = "ab8500-charger", 1021 .of_compatible = "stericsson,ab8500-charger", 1022 .num_resources = ARRAY_SIZE(ab8500_charger_resources), 1023 .resources = ab8500_charger_resources, 1024 .platform_data = &ab8500_bm_data, 1025 .pdata_size = sizeof(ab8500_bm_data), 1026 }, 1027 { 1028 .name = "ab8500-btemp", 1029 .of_compatible = "stericsson,ab8500-btemp", 1030 .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 1031 .resources = ab8500_btemp_resources, 1032 .platform_data = &ab8500_bm_data, 1033 .pdata_size = sizeof(ab8500_bm_data), 1034 }, 1035 { 1036 .name = "ab8500-fg", 1037 .of_compatible = "stericsson,ab8500-fg", 1038 .num_resources = ARRAY_SIZE(ab8500_fg_resources), 1039 .resources = ab8500_fg_resources, 1040 .platform_data = &ab8500_bm_data, 1041 .pdata_size = sizeof(ab8500_bm_data), 1042 }, 1043 { 1044 .name = "ab8500-chargalg", 1045 .of_compatible = "stericsson,ab8500-chargalg", 1046 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 1047 .resources = ab8500_chargalg_resources, 1048 .platform_data = &ab8500_bm_data, 1049 .pdata_size = sizeof(ab8500_bm_data), 1050 }, 1051 }; 1052 1053 static const struct mfd_cell ab8500_devs[] = { 1054 #ifdef CONFIG_DEBUG_FS 1055 { 1056 .name = "ab8500-debug", 1057 .of_compatible = "stericsson,ab8500-debug", 1058 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1059 .resources = ab8500_debug_resources, 1060 }, 1061 #endif 1062 { 1063 .name = "ab8500-sysctrl", 1064 .of_compatible = "stericsson,ab8500-sysctrl", 1065 }, 1066 { 1067 .name = "ab8500-ext-regulator", 1068 .of_compatible = "stericsson,ab8500-ext-regulator", 1069 }, 1070 { 1071 .name = "ab8500-regulator", 1072 .of_compatible = "stericsson,ab8500-regulator", 1073 }, 1074 { 1075 .name = "abx500-clk", 1076 .of_compatible = "stericsson,abx500-clk", 1077 }, 1078 { 1079 .name = "ab8500-gpadc", 1080 .of_compatible = "stericsson,ab8500-gpadc", 1081 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 1082 .resources = ab8500_gpadc_resources, 1083 }, 1084 { 1085 .name = "ab8500-rtc", 1086 .of_compatible = "stericsson,ab8500-rtc", 1087 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1088 .resources = ab8500_rtc_resources, 1089 }, 1090 { 1091 .name = "ab8500-acc-det", 1092 .of_compatible = "stericsson,ab8500-acc-det", 1093 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1094 .resources = ab8500_av_acc_detect_resources, 1095 }, 1096 { 1097 1098 .name = "ab8500-poweron-key", 1099 .of_compatible = "stericsson,ab8500-poweron-key", 1100 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1101 .resources = ab8500_poweronkey_db_resources, 1102 }, 1103 { 1104 .name = "ab8500-pwm", 1105 .of_compatible = "stericsson,ab8500-pwm", 1106 .id = 1, 1107 }, 1108 { 1109 .name = "ab8500-pwm", 1110 .of_compatible = "stericsson,ab8500-pwm", 1111 .id = 2, 1112 }, 1113 { 1114 .name = "ab8500-pwm", 1115 .of_compatible = "stericsson,ab8500-pwm", 1116 .id = 3, 1117 }, 1118 { 1119 .name = "ab8500-denc", 1120 .of_compatible = "stericsson,ab8500-denc", 1121 }, 1122 { 1123 .name = "pinctrl-ab8500", 1124 .of_compatible = "stericsson,ab8500-gpio", 1125 }, 1126 { 1127 .name = "abx500-temp", 1128 .of_compatible = "stericsson,abx500-temp", 1129 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1130 .resources = ab8500_temp_resources, 1131 }, 1132 { 1133 .name = "ab8500-usb", 1134 .of_compatible = "stericsson,ab8500-usb", 1135 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1136 .resources = ab8500_usb_resources, 1137 }, 1138 { 1139 .name = "ab8500-codec", 1140 .of_compatible = "stericsson,ab8500-codec", 1141 }, 1142 }; 1143 1144 static const struct mfd_cell ab9540_devs[] = { 1145 #ifdef CONFIG_DEBUG_FS 1146 { 1147 .name = "ab8500-debug", 1148 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1149 .resources = ab8500_debug_resources, 1150 }, 1151 #endif 1152 { 1153 .name = "ab8500-sysctrl", 1154 }, 1155 { 1156 .name = "ab8500-ext-regulator", 1157 }, 1158 { 1159 .name = "ab8500-regulator", 1160 }, 1161 { 1162 .name = "abx500-clk", 1163 .of_compatible = "stericsson,abx500-clk", 1164 }, 1165 { 1166 .name = "ab8500-gpadc", 1167 .of_compatible = "stericsson,ab8500-gpadc", 1168 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 1169 .resources = ab8500_gpadc_resources, 1170 }, 1171 { 1172 .name = "ab8500-rtc", 1173 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1174 .resources = ab8500_rtc_resources, 1175 }, 1176 { 1177 .name = "ab8500-acc-det", 1178 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1179 .resources = ab8500_av_acc_detect_resources, 1180 }, 1181 { 1182 .name = "ab8500-poweron-key", 1183 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1184 .resources = ab8500_poweronkey_db_resources, 1185 }, 1186 { 1187 .name = "ab8500-pwm", 1188 .id = 1, 1189 }, 1190 { 1191 .name = "abx500-temp", 1192 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1193 .resources = ab8500_temp_resources, 1194 }, 1195 { 1196 .name = "pinctrl-ab9540", 1197 .of_compatible = "stericsson,ab9540-gpio", 1198 }, 1199 { 1200 .name = "ab9540-usb", 1201 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1202 .resources = ab8500_usb_resources, 1203 }, 1204 { 1205 .name = "ab9540-codec", 1206 }, 1207 { 1208 .name = "ab-iddet", 1209 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1210 .resources = ab8505_iddet_resources, 1211 }, 1212 }; 1213 1214 /* Device list for ab8505 */ 1215 static const struct mfd_cell ab8505_devs[] = { 1216 #ifdef CONFIG_DEBUG_FS 1217 { 1218 .name = "ab8500-debug", 1219 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1220 .resources = ab8500_debug_resources, 1221 }, 1222 #endif 1223 { 1224 .name = "ab8500-sysctrl", 1225 }, 1226 { 1227 .name = "ab8500-regulator", 1228 }, 1229 { 1230 .name = "abx500-clk", 1231 .of_compatible = "stericsson,abx500-clk", 1232 }, 1233 { 1234 .name = "ab8500-gpadc", 1235 .of_compatible = "stericsson,ab8500-gpadc", 1236 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources), 1237 .resources = ab8505_gpadc_resources, 1238 }, 1239 { 1240 .name = "ab8500-rtc", 1241 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1242 .resources = ab8500_rtc_resources, 1243 }, 1244 { 1245 .name = "ab8500-acc-det", 1246 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1247 .resources = ab8500_av_acc_detect_resources, 1248 }, 1249 { 1250 .name = "ab8500-poweron-key", 1251 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1252 .resources = ab8500_poweronkey_db_resources, 1253 }, 1254 { 1255 .name = "ab8500-pwm", 1256 .id = 1, 1257 }, 1258 { 1259 .name = "pinctrl-ab8505", 1260 }, 1261 { 1262 .name = "ab8500-usb", 1263 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1264 .resources = ab8500_usb_resources, 1265 }, 1266 { 1267 .name = "ab8500-codec", 1268 }, 1269 { 1270 .name = "ab-iddet", 1271 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1272 .resources = ab8505_iddet_resources, 1273 }, 1274 }; 1275 1276 static const struct mfd_cell ab8540_devs[] = { 1277 #ifdef CONFIG_DEBUG_FS 1278 { 1279 .name = "ab8500-debug", 1280 .num_resources = ARRAY_SIZE(ab8500_debug_resources), 1281 .resources = ab8500_debug_resources, 1282 }, 1283 #endif 1284 { 1285 .name = "ab8500-sysctrl", 1286 }, 1287 { 1288 .name = "ab8500-ext-regulator", 1289 }, 1290 { 1291 .name = "ab8500-regulator", 1292 }, 1293 { 1294 .name = "abx500-clk", 1295 .of_compatible = "stericsson,abx500-clk", 1296 }, 1297 { 1298 .name = "ab8500-gpadc", 1299 .of_compatible = "stericsson,ab8500-gpadc", 1300 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources), 1301 .resources = ab8505_gpadc_resources, 1302 }, 1303 { 1304 .name = "ab8500-acc-det", 1305 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 1306 .resources = ab8500_av_acc_detect_resources, 1307 }, 1308 { 1309 .name = "ab8500-poweron-key", 1310 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 1311 .resources = ab8500_poweronkey_db_resources, 1312 }, 1313 { 1314 .name = "ab8500-pwm", 1315 .id = 1, 1316 }, 1317 { 1318 .name = "abx500-temp", 1319 .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1320 .resources = ab8500_temp_resources, 1321 }, 1322 { 1323 .name = "pinctrl-ab8540", 1324 }, 1325 { 1326 .name = "ab8540-usb", 1327 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1328 .resources = ab8500_usb_resources, 1329 }, 1330 { 1331 .name = "ab8540-codec", 1332 }, 1333 { 1334 .name = "ab-iddet", 1335 .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 1336 .resources = ab8505_iddet_resources, 1337 }, 1338 }; 1339 1340 static const struct mfd_cell ab8540_cut1_devs[] = { 1341 { 1342 .name = "ab8500-rtc", 1343 .of_compatible = "stericsson,ab8500-rtc", 1344 .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 1345 .resources = ab8500_rtc_resources, 1346 }, 1347 }; 1348 1349 static const struct mfd_cell ab8540_cut2_devs[] = { 1350 { 1351 .name = "ab8540-rtc", 1352 .of_compatible = "stericsson,ab8540-rtc", 1353 .num_resources = ARRAY_SIZE(ab8540_rtc_resources), 1354 .resources = ab8540_rtc_resources, 1355 }, 1356 }; 1357 1358 static ssize_t show_chip_id(struct device *dev, 1359 struct device_attribute *attr, char *buf) 1360 { 1361 struct ab8500 *ab8500; 1362 1363 ab8500 = dev_get_drvdata(dev); 1364 1365 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 1366 } 1367 1368 /* 1369 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1370 * 0x01 Swoff bit programming 1371 * 0x02 Thermal protection activation 1372 * 0x04 Vbat lower then BattOk falling threshold 1373 * 0x08 Watchdog expired 1374 * 0x10 Non presence of 32kHz clock 1375 * 0x20 Battery level lower than power on reset threshold 1376 * 0x40 Power on key 1 pressed longer than 10 seconds 1377 * 0x80 DB8500 thermal shutdown 1378 */ 1379 static ssize_t show_switch_off_status(struct device *dev, 1380 struct device_attribute *attr, char *buf) 1381 { 1382 int ret; 1383 u8 value; 1384 struct ab8500 *ab8500; 1385 1386 ab8500 = dev_get_drvdata(dev); 1387 ret = get_register_interruptible(ab8500, AB8500_RTC, 1388 AB8500_SWITCH_OFF_STATUS, &value); 1389 if (ret < 0) 1390 return ret; 1391 return sprintf(buf, "%#x\n", value); 1392 } 1393 1394 /* use mask and set to override the register turn_on_stat value */ 1395 void ab8500_override_turn_on_stat(u8 mask, u8 set) 1396 { 1397 spin_lock(&on_stat_lock); 1398 turn_on_stat_mask = mask; 1399 turn_on_stat_set = set; 1400 spin_unlock(&on_stat_lock); 1401 } 1402 1403 /* 1404 * ab8500 has turned on due to (TURN_ON_STATUS): 1405 * 0x01 PORnVbat 1406 * 0x02 PonKey1dbF 1407 * 0x04 PonKey2dbF 1408 * 0x08 RTCAlarm 1409 * 0x10 MainChDet 1410 * 0x20 VbusDet 1411 * 0x40 UsbIDDetect 1412 * 0x80 Reserved 1413 */ 1414 static ssize_t show_turn_on_status(struct device *dev, 1415 struct device_attribute *attr, char *buf) 1416 { 1417 int ret; 1418 u8 value; 1419 struct ab8500 *ab8500; 1420 1421 ab8500 = dev_get_drvdata(dev); 1422 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1423 AB8500_TURN_ON_STATUS, &value); 1424 if (ret < 0) 1425 return ret; 1426 1427 /* 1428 * In L9540, turn_on_status register is not updated correctly if 1429 * the device is rebooted with AC/USB charger connected. Due to 1430 * this, the device boots android instead of entering into charge 1431 * only mode. Read the AC/USB status register to detect the charger 1432 * presence and update the turn on status manually. 1433 */ 1434 if (is_ab9540(ab8500)) { 1435 spin_lock(&on_stat_lock); 1436 value = (value & turn_on_stat_mask) | turn_on_stat_set; 1437 spin_unlock(&on_stat_lock); 1438 } 1439 1440 return sprintf(buf, "%#x\n", value); 1441 } 1442 1443 static ssize_t show_turn_on_status_2(struct device *dev, 1444 struct device_attribute *attr, char *buf) 1445 { 1446 int ret; 1447 u8 value; 1448 struct ab8500 *ab8500; 1449 1450 ab8500 = dev_get_drvdata(dev); 1451 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1452 AB8505_TURN_ON_STATUS_2, &value); 1453 if (ret < 0) 1454 return ret; 1455 return sprintf(buf, "%#x\n", (value & 0x1)); 1456 } 1457 1458 static ssize_t show_ab9540_dbbrstn(struct device *dev, 1459 struct device_attribute *attr, char *buf) 1460 { 1461 struct ab8500 *ab8500; 1462 int ret; 1463 u8 value; 1464 1465 ab8500 = dev_get_drvdata(dev); 1466 1467 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1468 AB9540_MODEM_CTRL2_REG, &value); 1469 if (ret < 0) 1470 return ret; 1471 1472 return sprintf(buf, "%d\n", 1473 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1474 } 1475 1476 static ssize_t store_ab9540_dbbrstn(struct device *dev, 1477 struct device_attribute *attr, const char *buf, size_t count) 1478 { 1479 struct ab8500 *ab8500; 1480 int ret = count; 1481 int err; 1482 u8 bitvalues; 1483 1484 ab8500 = dev_get_drvdata(dev); 1485 1486 if (count > 0) { 1487 switch (buf[0]) { 1488 case '0': 1489 bitvalues = 0; 1490 break; 1491 case '1': 1492 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1493 break; 1494 default: 1495 goto exit; 1496 } 1497 1498 err = mask_and_set_register_interruptible(ab8500, 1499 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1500 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1501 if (err) 1502 dev_info(ab8500->dev, 1503 "Failed to set DBBRSTN %c, err %#x\n", 1504 buf[0], err); 1505 } 1506 1507 exit: 1508 return ret; 1509 } 1510 1511 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1512 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1513 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1514 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL); 1515 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1516 show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1517 1518 static struct attribute *ab8500_sysfs_entries[] = { 1519 &dev_attr_chip_id.attr, 1520 &dev_attr_switch_off_status.attr, 1521 &dev_attr_turn_on_status.attr, 1522 NULL, 1523 }; 1524 1525 static struct attribute *ab8505_sysfs_entries[] = { 1526 &dev_attr_turn_on_status_2.attr, 1527 NULL, 1528 }; 1529 1530 static struct attribute *ab9540_sysfs_entries[] = { 1531 &dev_attr_chip_id.attr, 1532 &dev_attr_switch_off_status.attr, 1533 &dev_attr_turn_on_status.attr, 1534 &dev_attr_dbbrstn.attr, 1535 NULL, 1536 }; 1537 1538 static struct attribute_group ab8500_attr_group = { 1539 .attrs = ab8500_sysfs_entries, 1540 }; 1541 1542 static struct attribute_group ab8505_attr_group = { 1543 .attrs = ab8505_sysfs_entries, 1544 }; 1545 1546 static struct attribute_group ab9540_attr_group = { 1547 .attrs = ab9540_sysfs_entries, 1548 }; 1549 1550 static int ab8500_probe(struct platform_device *pdev) 1551 { 1552 static const char *switch_off_status[] = { 1553 "Swoff bit programming", 1554 "Thermal protection activation", 1555 "Vbat lower then BattOk falling threshold", 1556 "Watchdog expired", 1557 "Non presence of 32kHz clock", 1558 "Battery level lower than power on reset threshold", 1559 "Power on key 1 pressed longer than 10 seconds", 1560 "DB8500 thermal shutdown"}; 1561 static const char *turn_on_status[] = { 1562 "Battery rising (Vbat)", 1563 "Power On Key 1 dbF", 1564 "Power On Key 2 dbF", 1565 "RTC Alarm", 1566 "Main Charger Detect", 1567 "Vbus Detect (USB)", 1568 "USB ID Detect", 1569 "UART Factory Mode Detect"}; 1570 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); 1571 const struct platform_device_id *platid = platform_get_device_id(pdev); 1572 enum ab8500_version version = AB8500_VERSION_UNDEFINED; 1573 struct device_node *np = pdev->dev.of_node; 1574 struct ab8500 *ab8500; 1575 struct resource *resource; 1576 int ret; 1577 int i; 1578 u8 value; 1579 1580 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); 1581 if (!ab8500) 1582 return -ENOMEM; 1583 1584 ab8500->dev = &pdev->dev; 1585 1586 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1587 if (!resource) { 1588 dev_err(&pdev->dev, "no IRQ resource\n"); 1589 return -ENODEV; 1590 } 1591 1592 ab8500->irq = resource->start; 1593 1594 ab8500->read = ab8500_prcmu_read; 1595 ab8500->write = ab8500_prcmu_write; 1596 ab8500->write_masked = ab8500_prcmu_write_masked; 1597 1598 mutex_init(&ab8500->lock); 1599 mutex_init(&ab8500->irq_lock); 1600 atomic_set(&ab8500->transfer_ongoing, 0); 1601 1602 platform_set_drvdata(pdev, ab8500); 1603 1604 if (platid) 1605 version = platid->driver_data; 1606 1607 if (version != AB8500_VERSION_UNDEFINED) 1608 ab8500->version = version; 1609 else { 1610 ret = get_register_interruptible(ab8500, AB8500_MISC, 1611 AB8500_IC_NAME_REG, &value); 1612 if (ret < 0) { 1613 dev_err(&pdev->dev, "could not probe HW\n"); 1614 return ret; 1615 } 1616 1617 ab8500->version = value; 1618 } 1619 1620 ret = get_register_interruptible(ab8500, AB8500_MISC, 1621 AB8500_REV_REG, &value); 1622 if (ret < 0) 1623 return ret; 1624 1625 ab8500->chip_id = value; 1626 1627 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 1628 ab8500_version_str[ab8500->version], 1629 ab8500->chip_id >> 4, 1630 ab8500->chip_id & 0x0F); 1631 1632 /* Configure AB8540 */ 1633 if (is_ab8540(ab8500)) { 1634 ab8500->mask_size = AB8540_NUM_IRQ_REGS; 1635 ab8500->irq_reg_offset = ab8540_irq_regoffset; 1636 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; 1637 } /* Configure AB8500 or AB9540 IRQ */ 1638 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1639 ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1640 ab8500->irq_reg_offset = ab9540_irq_regoffset; 1641 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1642 } else { 1643 ab8500->mask_size = AB8500_NUM_IRQ_REGS; 1644 ab8500->irq_reg_offset = ab8500_irq_regoffset; 1645 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1646 } 1647 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1648 GFP_KERNEL); 1649 if (!ab8500->mask) 1650 return -ENOMEM; 1651 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1652 GFP_KERNEL); 1653 if (!ab8500->oldmask) 1654 return -ENOMEM; 1655 1656 /* 1657 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1658 * 0x01 Swoff bit programming 1659 * 0x02 Thermal protection activation 1660 * 0x04 Vbat lower then BattOk falling threshold 1661 * 0x08 Watchdog expired 1662 * 0x10 Non presence of 32kHz clock 1663 * 0x20 Battery level lower than power on reset threshold 1664 * 0x40 Power on key 1 pressed longer than 10 seconds 1665 * 0x80 DB8500 thermal shutdown 1666 */ 1667 1668 ret = get_register_interruptible(ab8500, AB8500_RTC, 1669 AB8500_SWITCH_OFF_STATUS, &value); 1670 if (ret < 0) 1671 return ret; 1672 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1673 1674 if (value) { 1675 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1676 if (value & 1) 1677 pr_cont(" \"%s\"", switch_off_status[i]); 1678 value = value >> 1; 1679 1680 } 1681 pr_cont("\n"); 1682 } else { 1683 pr_cont(" None\n"); 1684 } 1685 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1686 AB8500_TURN_ON_STATUS, &value); 1687 if (ret < 0) 1688 return ret; 1689 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); 1690 1691 if (value) { 1692 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { 1693 if (value & 1) 1694 pr_cont("\"%s\" ", turn_on_status[i]); 1695 value = value >> 1; 1696 } 1697 pr_cont("\n"); 1698 } else { 1699 pr_cont("None\n"); 1700 } 1701 1702 if (plat && plat->init) 1703 plat->init(ab8500); 1704 1705 if (is_ab9540(ab8500)) { 1706 ret = get_register_interruptible(ab8500, AB8500_CHARGER, 1707 AB8500_CH_USBCH_STAT1_REG, &value); 1708 if (ret < 0) 1709 return ret; 1710 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) 1711 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, 1712 AB8500_VBUS_DET); 1713 } 1714 1715 /* Clear and mask all interrupts */ 1716 for (i = 0; i < ab8500->mask_size; i++) { 1717 /* 1718 * Interrupt register 12 doesn't exist prior to AB8500 version 1719 * 2.0 1720 */ 1721 if (ab8500->irq_reg_offset[i] == 11 && 1722 is_ab8500_1p1_or_earlier(ab8500)) 1723 continue; 1724 1725 if (ab8500->irq_reg_offset[i] < 0) 1726 continue; 1727 1728 get_register_interruptible(ab8500, AB8500_INTERRUPT, 1729 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 1730 &value); 1731 set_register_interruptible(ab8500, AB8500_INTERRUPT, 1732 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 1733 } 1734 1735 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 1736 if (ret) 1737 return ret; 1738 1739 for (i = 0; i < ab8500->mask_size; i++) 1740 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 1741 1742 ret = ab8500_irq_init(ab8500, np); 1743 if (ret) 1744 return ret; 1745 1746 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 1747 ab8500_hierarchical_irq, 1748 IRQF_ONESHOT | IRQF_NO_SUSPEND, 1749 "ab8500", ab8500); 1750 if (ret) 1751 return ret; 1752 1753 #ifdef CONFIG_DEBUG_FS 1754 /* Pass to debugfs */ 1755 ab8500_debug_resources[0].start = ab8500->irq; 1756 ab8500_debug_resources[0].end = ab8500->irq; 1757 #endif 1758 1759 if (is_ab9540(ab8500)) 1760 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1761 ARRAY_SIZE(ab9540_devs), NULL, 1762 0, ab8500->domain); 1763 else if (is_ab8540(ab8500)) { 1764 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1765 ARRAY_SIZE(ab8540_devs), NULL, 1766 0, ab8500->domain); 1767 if (ret) 1768 return ret; 1769 1770 if (is_ab8540_1p2_or_earlier(ab8500)) 1771 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1772 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1773 0, ab8500->domain); 1774 else /* ab8540 >= cut2 */ 1775 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1776 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1777 0, ab8500->domain); 1778 } else if (is_ab8505(ab8500)) 1779 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1780 ARRAY_SIZE(ab8505_devs), NULL, 1781 0, ab8500->domain); 1782 else 1783 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1784 ARRAY_SIZE(ab8500_devs), NULL, 1785 0, ab8500->domain); 1786 if (ret) 1787 return ret; 1788 1789 if (!no_bm) { 1790 /* Add battery management devices */ 1791 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1792 ARRAY_SIZE(ab8500_bm_devs), NULL, 1793 0, ab8500->domain); 1794 if (ret) 1795 dev_err(ab8500->dev, "error adding bm devices\n"); 1796 } 1797 1798 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1799 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1800 ret = sysfs_create_group(&ab8500->dev->kobj, 1801 &ab9540_attr_group); 1802 else 1803 ret = sysfs_create_group(&ab8500->dev->kobj, 1804 &ab8500_attr_group); 1805 1806 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1807 ab8500->chip_id >= AB8500_CUT2P0) 1808 ret = sysfs_create_group(&ab8500->dev->kobj, 1809 &ab8505_attr_group); 1810 1811 if (ret) 1812 dev_err(ab8500->dev, "error creating sysfs entries\n"); 1813 1814 return ret; 1815 } 1816 1817 static int ab8500_remove(struct platform_device *pdev) 1818 { 1819 struct ab8500 *ab8500 = platform_get_drvdata(pdev); 1820 1821 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1822 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1823 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1824 else 1825 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 1826 1827 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1828 ab8500->chip_id >= AB8500_CUT2P0) 1829 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group); 1830 1831 mfd_remove_devices(ab8500->dev); 1832 1833 return 0; 1834 } 1835 1836 static const struct platform_device_id ab8500_id[] = { 1837 { "ab8500-core", AB8500_VERSION_AB8500 }, 1838 { "ab8505-i2c", AB8500_VERSION_AB8505 }, 1839 { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1840 { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1841 { } 1842 }; 1843 1844 static struct platform_driver ab8500_core_driver = { 1845 .driver = { 1846 .name = "ab8500-core", 1847 }, 1848 .probe = ab8500_probe, 1849 .remove = ab8500_remove, 1850 .id_table = ab8500_id, 1851 }; 1852 1853 static int __init ab8500_core_init(void) 1854 { 1855 return platform_driver_register(&ab8500_core_driver); 1856 } 1857 1858 static void __exit ab8500_core_exit(void) 1859 { 1860 platform_driver_unregister(&ab8500_core_driver); 1861 } 1862 core_initcall(ab8500_core_init); 1863 module_exit(ab8500_core_exit); 1864 1865 MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 1866 MODULE_DESCRIPTION("AB8500 MFD core"); 1867 MODULE_LICENSE("GPL v2"); 1868