1 /* 2 * Copyright (C) ST-Ericsson SA 2010 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/moduleparam.h> 18 #include <linux/platform_device.h> 19 #include <linux/mfd/core.h> 20 #include <linux/mfd/abx500.h> 21 #include <linux/mfd/abx500/ab8500.h> 22 #include <linux/mfd/abx500/ab8500-bm.h> 23 #include <linux/mfd/dbx500-prcmu.h> 24 #include <linux/regulator/ab8500.h> 25 #include <linux/of.h> 26 #include <linux/of_device.h> 27 28 /* 29 * Interrupt register offsets 30 * Bank : 0x0E 31 */ 32 #define AB8500_IT_SOURCE1_REG 0x00 33 #define AB8500_IT_SOURCE2_REG 0x01 34 #define AB8500_IT_SOURCE3_REG 0x02 35 #define AB8500_IT_SOURCE4_REG 0x03 36 #define AB8500_IT_SOURCE5_REG 0x04 37 #define AB8500_IT_SOURCE6_REG 0x05 38 #define AB8500_IT_SOURCE7_REG 0x06 39 #define AB8500_IT_SOURCE8_REG 0x07 40 #define AB9540_IT_SOURCE13_REG 0x0C 41 #define AB8500_IT_SOURCE19_REG 0x12 42 #define AB8500_IT_SOURCE20_REG 0x13 43 #define AB8500_IT_SOURCE21_REG 0x14 44 #define AB8500_IT_SOURCE22_REG 0x15 45 #define AB8500_IT_SOURCE23_REG 0x16 46 #define AB8500_IT_SOURCE24_REG 0x17 47 48 /* 49 * latch registers 50 */ 51 #define AB8500_IT_LATCH1_REG 0x20 52 #define AB8500_IT_LATCH2_REG 0x21 53 #define AB8500_IT_LATCH3_REG 0x22 54 #define AB8500_IT_LATCH4_REG 0x23 55 #define AB8500_IT_LATCH5_REG 0x24 56 #define AB8500_IT_LATCH6_REG 0x25 57 #define AB8500_IT_LATCH7_REG 0x26 58 #define AB8500_IT_LATCH8_REG 0x27 59 #define AB8500_IT_LATCH9_REG 0x28 60 #define AB8500_IT_LATCH10_REG 0x29 61 #define AB8500_IT_LATCH12_REG 0x2B 62 #define AB9540_IT_LATCH13_REG 0x2C 63 #define AB8500_IT_LATCH19_REG 0x32 64 #define AB8500_IT_LATCH20_REG 0x33 65 #define AB8500_IT_LATCH21_REG 0x34 66 #define AB8500_IT_LATCH22_REG 0x35 67 #define AB8500_IT_LATCH23_REG 0x36 68 #define AB8500_IT_LATCH24_REG 0x37 69 70 /* 71 * mask registers 72 */ 73 74 #define AB8500_IT_MASK1_REG 0x40 75 #define AB8500_IT_MASK2_REG 0x41 76 #define AB8500_IT_MASK3_REG 0x42 77 #define AB8500_IT_MASK4_REG 0x43 78 #define AB8500_IT_MASK5_REG 0x44 79 #define AB8500_IT_MASK6_REG 0x45 80 #define AB8500_IT_MASK7_REG 0x46 81 #define AB8500_IT_MASK8_REG 0x47 82 #define AB8500_IT_MASK9_REG 0x48 83 #define AB8500_IT_MASK10_REG 0x49 84 #define AB8500_IT_MASK11_REG 0x4A 85 #define AB8500_IT_MASK12_REG 0x4B 86 #define AB8500_IT_MASK13_REG 0x4C 87 #define AB8500_IT_MASK14_REG 0x4D 88 #define AB8500_IT_MASK15_REG 0x4E 89 #define AB8500_IT_MASK16_REG 0x4F 90 #define AB8500_IT_MASK17_REG 0x50 91 #define AB8500_IT_MASK18_REG 0x51 92 #define AB8500_IT_MASK19_REG 0x52 93 #define AB8500_IT_MASK20_REG 0x53 94 #define AB8500_IT_MASK21_REG 0x54 95 #define AB8500_IT_MASK22_REG 0x55 96 #define AB8500_IT_MASK23_REG 0x56 97 #define AB8500_IT_MASK24_REG 0x57 98 #define AB8500_IT_MASK25_REG 0x58 99 100 /* 101 * latch hierarchy registers 102 */ 103 #define AB8500_IT_LATCHHIER1_REG 0x60 104 #define AB8500_IT_LATCHHIER2_REG 0x61 105 #define AB8500_IT_LATCHHIER3_REG 0x62 106 #define AB8540_IT_LATCHHIER4_REG 0x63 107 108 #define AB8500_IT_LATCHHIER_NUM 3 109 #define AB8540_IT_LATCHHIER_NUM 4 110 111 #define AB8500_REV_REG 0x80 112 #define AB8500_IC_NAME_REG 0x82 113 #define AB8500_SWITCH_OFF_STATUS 0x00 114 115 #define AB8500_TURN_ON_STATUS 0x00 116 #define AB8505_TURN_ON_STATUS_2 0x04 117 118 #define AB8500_CH_USBCH_STAT1_REG 0x02 119 #define VBUS_DET_DBNC100 0x02 120 #define VBUS_DET_DBNC1 0x01 121 122 static DEFINE_SPINLOCK(on_stat_lock); 123 static u8 turn_on_stat_mask = 0xFF; 124 static u8 turn_on_stat_set; 125 static bool no_bm; /* No battery management */ 126 /* 127 * not really modular, but the easiest way to keep compat with existing 128 * bootargs behaviour is to continue using module_param here. 129 */ 130 module_param(no_bm, bool, S_IRUGO); 131 132 #define AB9540_MODEM_CTRL2_REG 0x23 133 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 134 135 /* 136 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 137 * numbers are indexed into this array with (num / 8). The interupts are 138 * defined in linux/mfd/ab8500.h 139 * 140 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 141 * offset 0. 142 */ 143 /* AB8500 support */ 144 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 145 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 146 }; 147 148 /* AB9540 / AB8505 support */ 149 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 150 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 151 }; 152 153 /* AB8540 support */ 154 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { 155 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 156 23, 25, 26, 27, 28, 29, 30, 31, 157 }; 158 159 static const char ab8500_version_str[][7] = { 160 [AB8500_VERSION_AB8500] = "AB8500", 161 [AB8500_VERSION_AB8505] = "AB8505", 162 [AB8500_VERSION_AB9540] = "AB9540", 163 [AB8500_VERSION_AB8540] = "AB8540", 164 }; 165 166 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 167 { 168 int ret; 169 170 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 171 if (ret < 0) 172 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 173 return ret; 174 } 175 176 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 177 u8 data) 178 { 179 int ret; 180 181 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 182 &mask, 1); 183 if (ret < 0) 184 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 185 return ret; 186 } 187 188 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 189 { 190 int ret; 191 u8 data; 192 193 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 194 if (ret < 0) { 195 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 196 return ret; 197 } 198 return (int)data; 199 } 200 201 static int ab8500_get_chip_id(struct device *dev) 202 { 203 struct ab8500 *ab8500; 204 205 if (!dev) 206 return -EINVAL; 207 ab8500 = dev_get_drvdata(dev->parent); 208 return ab8500 ? (int)ab8500->chip_id : -EINVAL; 209 } 210 211 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 212 u8 reg, u8 data) 213 { 214 int ret; 215 /* 216 * Put the u8 bank and u8 register together into a an u16. 217 * The bank on higher 8 bits and register in lower 8 bits. 218 */ 219 u16 addr = ((u16)bank) << 8 | reg; 220 221 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 222 223 mutex_lock(&ab8500->lock); 224 225 ret = ab8500->write(ab8500, addr, data); 226 if (ret < 0) 227 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 228 addr, ret); 229 mutex_unlock(&ab8500->lock); 230 231 return ret; 232 } 233 234 static int ab8500_set_register(struct device *dev, u8 bank, 235 u8 reg, u8 value) 236 { 237 int ret; 238 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 239 240 atomic_inc(&ab8500->transfer_ongoing); 241 ret = set_register_interruptible(ab8500, bank, reg, value); 242 atomic_dec(&ab8500->transfer_ongoing); 243 return ret; 244 } 245 246 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 247 u8 reg, u8 *value) 248 { 249 int ret; 250 u16 addr = ((u16)bank) << 8 | reg; 251 252 mutex_lock(&ab8500->lock); 253 254 ret = ab8500->read(ab8500, addr); 255 if (ret < 0) 256 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 257 addr, ret); 258 else 259 *value = ret; 260 261 mutex_unlock(&ab8500->lock); 262 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 263 264 return (ret < 0) ? ret : 0; 265 } 266 267 static int ab8500_get_register(struct device *dev, u8 bank, 268 u8 reg, u8 *value) 269 { 270 int ret; 271 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 272 273 atomic_inc(&ab8500->transfer_ongoing); 274 ret = get_register_interruptible(ab8500, bank, reg, value); 275 atomic_dec(&ab8500->transfer_ongoing); 276 return ret; 277 } 278 279 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 280 u8 reg, u8 bitmask, u8 bitvalues) 281 { 282 int ret; 283 u16 addr = ((u16)bank) << 8 | reg; 284 285 mutex_lock(&ab8500->lock); 286 287 if (ab8500->write_masked == NULL) { 288 u8 data; 289 290 ret = ab8500->read(ab8500, addr); 291 if (ret < 0) { 292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 293 addr, ret); 294 goto out; 295 } 296 297 data = (u8)ret; 298 data = (~bitmask & data) | (bitmask & bitvalues); 299 300 ret = ab8500->write(ab8500, addr, data); 301 if (ret < 0) 302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 303 addr, ret); 304 305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 306 data); 307 goto out; 308 } 309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 310 if (ret < 0) 311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 312 ret); 313 out: 314 mutex_unlock(&ab8500->lock); 315 return ret; 316 } 317 318 static int ab8500_mask_and_set_register(struct device *dev, 319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 320 { 321 int ret; 322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 323 324 atomic_inc(&ab8500->transfer_ongoing); 325 ret = mask_and_set_register_interruptible(ab8500, bank, reg, 326 bitmask, bitvalues); 327 atomic_dec(&ab8500->transfer_ongoing); 328 return ret; 329 } 330 331 static struct abx500_ops ab8500_ops = { 332 .get_chip_id = ab8500_get_chip_id, 333 .get_register = ab8500_get_register, 334 .set_register = ab8500_set_register, 335 .get_register_page = NULL, 336 .set_register_page = NULL, 337 .mask_and_set_register = ab8500_mask_and_set_register, 338 .event_registers_startup_state_get = NULL, 339 .startup_irq_enabled = NULL, 340 .dump_all_banks = ab8500_dump_all_banks, 341 }; 342 343 static void ab8500_irq_lock(struct irq_data *data) 344 { 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 346 347 mutex_lock(&ab8500->irq_lock); 348 atomic_inc(&ab8500->transfer_ongoing); 349 } 350 351 static void ab8500_irq_sync_unlock(struct irq_data *data) 352 { 353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 354 int i; 355 356 for (i = 0; i < ab8500->mask_size; i++) { 357 u8 old = ab8500->oldmask[i]; 358 u8 new = ab8500->mask[i]; 359 int reg; 360 361 if (new == old) 362 continue; 363 364 /* 365 * Interrupt register 12 doesn't exist prior to AB8500 version 366 * 2.0 367 */ 368 if (ab8500->irq_reg_offset[i] == 11 && 369 is_ab8500_1p1_or_earlier(ab8500)) 370 continue; 371 372 if (ab8500->irq_reg_offset[i] < 0) 373 continue; 374 375 ab8500->oldmask[i] = new; 376 377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 379 } 380 atomic_dec(&ab8500->transfer_ongoing); 381 mutex_unlock(&ab8500->irq_lock); 382 } 383 384 static void ab8500_irq_mask(struct irq_data *data) 385 { 386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 387 int offset = data->hwirq; 388 int index = offset / 8; 389 int mask = 1 << (offset % 8); 390 391 ab8500->mask[index] |= mask; 392 393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 395 ab8500->mask[index + 2] |= mask; 396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) 397 ab8500->mask[index + 1] |= mask; 398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) 399 /* Here the falling IRQ is one bit lower */ 400 ab8500->mask[index] |= (mask << 1); 401 } 402 403 static void ab8500_irq_unmask(struct irq_data *data) 404 { 405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 406 unsigned int type = irqd_get_trigger_type(data); 407 int offset = data->hwirq; 408 int index = offset / 8; 409 int mask = 1 << (offset % 8); 410 411 if (type & IRQ_TYPE_EDGE_RISING) 412 ab8500->mask[index] &= ~mask; 413 414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 415 if (type & IRQ_TYPE_EDGE_FALLING) { 416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 417 ab8500->mask[index + 2] &= ~mask; 418 else if (offset >= AB9540_INT_GPIO50R && 419 offset <= AB9540_INT_GPIO54R) 420 ab8500->mask[index + 1] &= ~mask; 421 else if (offset == AB8540_INT_GPIO43R || 422 offset == AB8540_INT_GPIO44R) 423 /* Here the falling IRQ is one bit lower */ 424 ab8500->mask[index] &= ~(mask << 1); 425 else 426 ab8500->mask[index] &= ~mask; 427 } else { 428 /* Satisfies the case where type is not set. */ 429 ab8500->mask[index] &= ~mask; 430 } 431 } 432 433 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) 434 { 435 return 0; 436 } 437 438 static struct irq_chip ab8500_irq_chip = { 439 .name = "ab8500", 440 .irq_bus_lock = ab8500_irq_lock, 441 .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 442 .irq_mask = ab8500_irq_mask, 443 .irq_disable = ab8500_irq_mask, 444 .irq_unmask = ab8500_irq_unmask, 445 .irq_set_type = ab8500_irq_set_type, 446 }; 447 448 static void update_latch_offset(u8 *offset, int i) 449 { 450 /* Fix inconsistent ITFromLatch25 bit mapping... */ 451 if (unlikely(*offset == 17)) 452 *offset = 24; 453 /* Fix inconsistent ab8540 bit mapping... */ 454 if (unlikely(*offset == 16)) 455 *offset = 25; 456 if ((i == 3) && (*offset >= 24)) 457 *offset += 2; 458 } 459 460 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 461 int latch_offset, u8 latch_val) 462 { 463 int int_bit, line, i; 464 465 for (i = 0; i < ab8500->mask_size; i++) 466 if (ab8500->irq_reg_offset[i] == latch_offset) 467 break; 468 469 if (i >= ab8500->mask_size) { 470 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 471 latch_offset); 472 return -ENXIO; 473 } 474 475 /* ignore masked out interrupts */ 476 latch_val &= ~ab8500->mask[i]; 477 478 while (latch_val) { 479 int_bit = __ffs(latch_val); 480 line = (i << 3) + int_bit; 481 latch_val &= ~(1 << int_bit); 482 483 /* 484 * This handles the falling edge hwirqs from the GPIO 485 * lines. Route them back to the line registered for the 486 * rising IRQ, as this is merely a flag for the same IRQ 487 * in linux terms. 488 */ 489 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) 490 line -= 16; 491 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) 492 line -= 8; 493 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) 494 line += 1; 495 496 handle_nested_irq(irq_create_mapping(ab8500->domain, line)); 497 } 498 499 return 0; 500 } 501 502 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 503 int hier_offset, u8 hier_val) 504 { 505 int latch_bit, status; 506 u8 latch_offset, latch_val; 507 508 do { 509 latch_bit = __ffs(hier_val); 510 latch_offset = (hier_offset << 3) + latch_bit; 511 512 update_latch_offset(&latch_offset, hier_offset); 513 514 status = get_register_interruptible(ab8500, 515 AB8500_INTERRUPT, 516 AB8500_IT_LATCH1_REG + latch_offset, 517 &latch_val); 518 if (status < 0 || latch_val == 0) 519 goto discard; 520 521 status = ab8500_handle_hierarchical_line(ab8500, 522 latch_offset, latch_val); 523 if (status < 0) 524 return status; 525 discard: 526 hier_val &= ~(1 << latch_bit); 527 } while (hier_val); 528 529 return 0; 530 } 531 532 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 533 { 534 struct ab8500 *ab8500 = dev; 535 u8 i; 536 537 dev_vdbg(ab8500->dev, "interrupt\n"); 538 539 /* Hierarchical interrupt version */ 540 for (i = 0; i < (ab8500->it_latchhier_num); i++) { 541 int status; 542 u8 hier_val; 543 544 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 545 AB8500_IT_LATCHHIER1_REG + i, &hier_val); 546 if (status < 0 || hier_val == 0) 547 continue; 548 549 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 550 if (status < 0) 551 break; 552 } 553 return IRQ_HANDLED; 554 } 555 556 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 557 irq_hw_number_t hwirq) 558 { 559 struct ab8500 *ab8500 = d->host_data; 560 561 if (!ab8500) 562 return -EINVAL; 563 564 irq_set_chip_data(virq, ab8500); 565 irq_set_chip_and_handler(virq, &ab8500_irq_chip, 566 handle_simple_irq); 567 irq_set_nested_thread(virq, 1); 568 irq_set_noprobe(virq); 569 570 return 0; 571 } 572 573 static const struct irq_domain_ops ab8500_irq_ops = { 574 .map = ab8500_irq_map, 575 .xlate = irq_domain_xlate_twocell, 576 }; 577 578 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 579 { 580 int num_irqs; 581 582 if (is_ab8540(ab8500)) 583 num_irqs = AB8540_NR_IRQS; 584 else if (is_ab9540(ab8500)) 585 num_irqs = AB9540_NR_IRQS; 586 else if (is_ab8505(ab8500)) 587 num_irqs = AB8505_NR_IRQS; 588 else 589 num_irqs = AB8500_NR_IRQS; 590 591 /* If ->irq_base is zero this will give a linear mapping */ 592 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, 593 num_irqs, 0, 594 &ab8500_irq_ops, ab8500); 595 596 if (!ab8500->domain) { 597 dev_err(ab8500->dev, "Failed to create irqdomain\n"); 598 return -ENODEV; 599 } 600 601 return 0; 602 } 603 604 int ab8500_suspend(struct ab8500 *ab8500) 605 { 606 if (atomic_read(&ab8500->transfer_ongoing)) 607 return -EINVAL; 608 609 return 0; 610 } 611 612 static const struct mfd_cell ab8500_bm_devs[] = { 613 { 614 .name = "ab8500-charger", 615 .of_compatible = "stericsson,ab8500-charger", 616 .platform_data = &ab8500_bm_data, 617 .pdata_size = sizeof(ab8500_bm_data), 618 }, 619 { 620 .name = "ab8500-btemp", 621 .of_compatible = "stericsson,ab8500-btemp", 622 .platform_data = &ab8500_bm_data, 623 .pdata_size = sizeof(ab8500_bm_data), 624 }, 625 { 626 .name = "ab8500-fg", 627 .of_compatible = "stericsson,ab8500-fg", 628 .platform_data = &ab8500_bm_data, 629 .pdata_size = sizeof(ab8500_bm_data), 630 }, 631 { 632 .name = "ab8500-chargalg", 633 .of_compatible = "stericsson,ab8500-chargalg", 634 .platform_data = &ab8500_bm_data, 635 .pdata_size = sizeof(ab8500_bm_data), 636 }, 637 }; 638 639 static const struct mfd_cell ab8500_devs[] = { 640 #ifdef CONFIG_DEBUG_FS 641 { 642 .name = "ab8500-debug", 643 .of_compatible = "stericsson,ab8500-debug", 644 }, 645 #endif 646 { 647 .name = "ab8500-sysctrl", 648 .of_compatible = "stericsson,ab8500-sysctrl", 649 }, 650 { 651 .name = "ab8500-ext-regulator", 652 .of_compatible = "stericsson,ab8500-ext-regulator", 653 }, 654 { 655 .name = "ab8500-regulator", 656 .of_compatible = "stericsson,ab8500-regulator", 657 }, 658 { 659 .name = "ab8500-clk", 660 .of_compatible = "stericsson,ab8500-clk", 661 }, 662 { 663 .name = "ab8500-gpadc", 664 .of_compatible = "stericsson,ab8500-gpadc", 665 }, 666 { 667 .name = "ab8500-rtc", 668 .of_compatible = "stericsson,ab8500-rtc", 669 }, 670 { 671 .name = "ab8500-acc-det", 672 .of_compatible = "stericsson,ab8500-acc-det", 673 }, 674 { 675 676 .name = "ab8500-poweron-key", 677 .of_compatible = "stericsson,ab8500-poweron-key", 678 }, 679 { 680 .name = "ab8500-pwm", 681 .of_compatible = "stericsson,ab8500-pwm", 682 .id = 1, 683 }, 684 { 685 .name = "ab8500-pwm", 686 .of_compatible = "stericsson,ab8500-pwm", 687 .id = 2, 688 }, 689 { 690 .name = "ab8500-pwm", 691 .of_compatible = "stericsson,ab8500-pwm", 692 .id = 3, 693 }, 694 { 695 .name = "ab8500-denc", 696 .of_compatible = "stericsson,ab8500-denc", 697 }, 698 { 699 .name = "pinctrl-ab8500", 700 .of_compatible = "stericsson,ab8500-gpio", 701 }, 702 { 703 .name = "abx500-temp", 704 .of_compatible = "stericsson,abx500-temp", 705 }, 706 { 707 .name = "ab8500-usb", 708 .of_compatible = "stericsson,ab8500-usb", 709 }, 710 { 711 .name = "ab8500-codec", 712 .of_compatible = "stericsson,ab8500-codec", 713 }, 714 }; 715 716 static const struct mfd_cell ab9540_devs[] = { 717 #ifdef CONFIG_DEBUG_FS 718 { 719 .name = "ab8500-debug", 720 }, 721 #endif 722 { 723 .name = "ab8500-sysctrl", 724 }, 725 { 726 .name = "ab8500-ext-regulator", 727 }, 728 { 729 .name = "ab8500-regulator", 730 }, 731 { 732 .name = "abx500-clk", 733 .of_compatible = "stericsson,abx500-clk", 734 }, 735 { 736 .name = "ab8500-gpadc", 737 .of_compatible = "stericsson,ab8500-gpadc", 738 }, 739 { 740 .name = "ab8500-rtc", 741 }, 742 { 743 .name = "ab8500-acc-det", 744 }, 745 { 746 .name = "ab8500-poweron-key", 747 }, 748 { 749 .name = "ab8500-pwm", 750 .id = 1, 751 }, 752 { 753 .name = "abx500-temp", 754 }, 755 { 756 .name = "pinctrl-ab9540", 757 .of_compatible = "stericsson,ab9540-gpio", 758 }, 759 { 760 .name = "ab9540-usb", 761 }, 762 { 763 .name = "ab9540-codec", 764 }, 765 { 766 .name = "ab-iddet", 767 }, 768 }; 769 770 /* Device list for ab8505 */ 771 static const struct mfd_cell ab8505_devs[] = { 772 #ifdef CONFIG_DEBUG_FS 773 { 774 .name = "ab8500-debug", 775 }, 776 #endif 777 { 778 .name = "ab8500-sysctrl", 779 }, 780 { 781 .name = "ab8500-regulator", 782 }, 783 { 784 .name = "abx500-clk", 785 .of_compatible = "stericsson,abx500-clk", 786 }, 787 { 788 .name = "ab8500-gpadc", 789 .of_compatible = "stericsson,ab8500-gpadc", 790 }, 791 { 792 .name = "ab8500-rtc", 793 }, 794 { 795 .name = "ab8500-acc-det", 796 }, 797 { 798 .name = "ab8500-poweron-key", 799 }, 800 { 801 .name = "ab8500-pwm", 802 .id = 1, 803 }, 804 { 805 .name = "pinctrl-ab8505", 806 }, 807 { 808 .name = "ab8500-usb", 809 }, 810 { 811 .name = "ab8500-codec", 812 }, 813 { 814 .name = "ab-iddet", 815 }, 816 }; 817 818 static const struct mfd_cell ab8540_devs[] = { 819 #ifdef CONFIG_DEBUG_FS 820 { 821 .name = "ab8500-debug", 822 }, 823 #endif 824 { 825 .name = "ab8500-sysctrl", 826 }, 827 { 828 .name = "ab8500-ext-regulator", 829 }, 830 { 831 .name = "ab8500-regulator", 832 }, 833 { 834 .name = "abx500-clk", 835 .of_compatible = "stericsson,abx500-clk", 836 }, 837 { 838 .name = "ab8500-gpadc", 839 .of_compatible = "stericsson,ab8500-gpadc", 840 }, 841 { 842 .name = "ab8500-acc-det", 843 }, 844 { 845 .name = "ab8500-poweron-key", 846 }, 847 { 848 .name = "ab8500-pwm", 849 .id = 1, 850 }, 851 { 852 .name = "abx500-temp", 853 }, 854 { 855 .name = "pinctrl-ab8540", 856 }, 857 { 858 .name = "ab8540-usb", 859 }, 860 { 861 .name = "ab8540-codec", 862 }, 863 { 864 .name = "ab-iddet", 865 }, 866 }; 867 868 static const struct mfd_cell ab8540_cut1_devs[] = { 869 { 870 .name = "ab8500-rtc", 871 .of_compatible = "stericsson,ab8500-rtc", 872 }, 873 }; 874 875 static const struct mfd_cell ab8540_cut2_devs[] = { 876 { 877 .name = "ab8540-rtc", 878 .of_compatible = "stericsson,ab8540-rtc", 879 }, 880 }; 881 882 static ssize_t show_chip_id(struct device *dev, 883 struct device_attribute *attr, char *buf) 884 { 885 struct ab8500 *ab8500; 886 887 ab8500 = dev_get_drvdata(dev); 888 889 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 890 } 891 892 /* 893 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 894 * 0x01 Swoff bit programming 895 * 0x02 Thermal protection activation 896 * 0x04 Vbat lower then BattOk falling threshold 897 * 0x08 Watchdog expired 898 * 0x10 Non presence of 32kHz clock 899 * 0x20 Battery level lower than power on reset threshold 900 * 0x40 Power on key 1 pressed longer than 10 seconds 901 * 0x80 DB8500 thermal shutdown 902 */ 903 static ssize_t show_switch_off_status(struct device *dev, 904 struct device_attribute *attr, char *buf) 905 { 906 int ret; 907 u8 value; 908 struct ab8500 *ab8500; 909 910 ab8500 = dev_get_drvdata(dev); 911 ret = get_register_interruptible(ab8500, AB8500_RTC, 912 AB8500_SWITCH_OFF_STATUS, &value); 913 if (ret < 0) 914 return ret; 915 return sprintf(buf, "%#x\n", value); 916 } 917 918 /* use mask and set to override the register turn_on_stat value */ 919 void ab8500_override_turn_on_stat(u8 mask, u8 set) 920 { 921 spin_lock(&on_stat_lock); 922 turn_on_stat_mask = mask; 923 turn_on_stat_set = set; 924 spin_unlock(&on_stat_lock); 925 } 926 927 /* 928 * ab8500 has turned on due to (TURN_ON_STATUS): 929 * 0x01 PORnVbat 930 * 0x02 PonKey1dbF 931 * 0x04 PonKey2dbF 932 * 0x08 RTCAlarm 933 * 0x10 MainChDet 934 * 0x20 VbusDet 935 * 0x40 UsbIDDetect 936 * 0x80 Reserved 937 */ 938 static ssize_t show_turn_on_status(struct device *dev, 939 struct device_attribute *attr, char *buf) 940 { 941 int ret; 942 u8 value; 943 struct ab8500 *ab8500; 944 945 ab8500 = dev_get_drvdata(dev); 946 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 947 AB8500_TURN_ON_STATUS, &value); 948 if (ret < 0) 949 return ret; 950 951 /* 952 * In L9540, turn_on_status register is not updated correctly if 953 * the device is rebooted with AC/USB charger connected. Due to 954 * this, the device boots android instead of entering into charge 955 * only mode. Read the AC/USB status register to detect the charger 956 * presence and update the turn on status manually. 957 */ 958 if (is_ab9540(ab8500)) { 959 spin_lock(&on_stat_lock); 960 value = (value & turn_on_stat_mask) | turn_on_stat_set; 961 spin_unlock(&on_stat_lock); 962 } 963 964 return sprintf(buf, "%#x\n", value); 965 } 966 967 static ssize_t show_turn_on_status_2(struct device *dev, 968 struct device_attribute *attr, char *buf) 969 { 970 int ret; 971 u8 value; 972 struct ab8500 *ab8500; 973 974 ab8500 = dev_get_drvdata(dev); 975 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 976 AB8505_TURN_ON_STATUS_2, &value); 977 if (ret < 0) 978 return ret; 979 return sprintf(buf, "%#x\n", (value & 0x1)); 980 } 981 982 static ssize_t show_ab9540_dbbrstn(struct device *dev, 983 struct device_attribute *attr, char *buf) 984 { 985 struct ab8500 *ab8500; 986 int ret; 987 u8 value; 988 989 ab8500 = dev_get_drvdata(dev); 990 991 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 992 AB9540_MODEM_CTRL2_REG, &value); 993 if (ret < 0) 994 return ret; 995 996 return sprintf(buf, "%d\n", 997 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 998 } 999 1000 static ssize_t store_ab9540_dbbrstn(struct device *dev, 1001 struct device_attribute *attr, const char *buf, size_t count) 1002 { 1003 struct ab8500 *ab8500; 1004 int ret = count; 1005 int err; 1006 u8 bitvalues; 1007 1008 ab8500 = dev_get_drvdata(dev); 1009 1010 if (count > 0) { 1011 switch (buf[0]) { 1012 case '0': 1013 bitvalues = 0; 1014 break; 1015 case '1': 1016 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1017 break; 1018 default: 1019 goto exit; 1020 } 1021 1022 err = mask_and_set_register_interruptible(ab8500, 1023 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1024 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1025 if (err) 1026 dev_info(ab8500->dev, 1027 "Failed to set DBBRSTN %c, err %#x\n", 1028 buf[0], err); 1029 } 1030 1031 exit: 1032 return ret; 1033 } 1034 1035 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1036 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1037 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1038 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL); 1039 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1040 show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1041 1042 static struct attribute *ab8500_sysfs_entries[] = { 1043 &dev_attr_chip_id.attr, 1044 &dev_attr_switch_off_status.attr, 1045 &dev_attr_turn_on_status.attr, 1046 NULL, 1047 }; 1048 1049 static struct attribute *ab8505_sysfs_entries[] = { 1050 &dev_attr_turn_on_status_2.attr, 1051 NULL, 1052 }; 1053 1054 static struct attribute *ab9540_sysfs_entries[] = { 1055 &dev_attr_chip_id.attr, 1056 &dev_attr_switch_off_status.attr, 1057 &dev_attr_turn_on_status.attr, 1058 &dev_attr_dbbrstn.attr, 1059 NULL, 1060 }; 1061 1062 static const struct attribute_group ab8500_attr_group = { 1063 .attrs = ab8500_sysfs_entries, 1064 }; 1065 1066 static const struct attribute_group ab8505_attr_group = { 1067 .attrs = ab8505_sysfs_entries, 1068 }; 1069 1070 static const struct attribute_group ab9540_attr_group = { 1071 .attrs = ab9540_sysfs_entries, 1072 }; 1073 1074 static int ab8500_probe(struct platform_device *pdev) 1075 { 1076 static const char * const switch_off_status[] = { 1077 "Swoff bit programming", 1078 "Thermal protection activation", 1079 "Vbat lower then BattOk falling threshold", 1080 "Watchdog expired", 1081 "Non presence of 32kHz clock", 1082 "Battery level lower than power on reset threshold", 1083 "Power on key 1 pressed longer than 10 seconds", 1084 "DB8500 thermal shutdown"}; 1085 static const char * const turn_on_status[] = { 1086 "Battery rising (Vbat)", 1087 "Power On Key 1 dbF", 1088 "Power On Key 2 dbF", 1089 "RTC Alarm", 1090 "Main Charger Detect", 1091 "Vbus Detect (USB)", 1092 "USB ID Detect", 1093 "UART Factory Mode Detect"}; 1094 const struct platform_device_id *platid = platform_get_device_id(pdev); 1095 enum ab8500_version version = AB8500_VERSION_UNDEFINED; 1096 struct device_node *np = pdev->dev.of_node; 1097 struct ab8500 *ab8500; 1098 struct resource *resource; 1099 int ret; 1100 int i; 1101 u8 value; 1102 1103 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); 1104 if (!ab8500) 1105 return -ENOMEM; 1106 1107 ab8500->dev = &pdev->dev; 1108 1109 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1110 if (!resource) { 1111 dev_err(&pdev->dev, "no IRQ resource\n"); 1112 return -ENODEV; 1113 } 1114 1115 ab8500->irq = resource->start; 1116 1117 ab8500->read = ab8500_prcmu_read; 1118 ab8500->write = ab8500_prcmu_write; 1119 ab8500->write_masked = ab8500_prcmu_write_masked; 1120 1121 mutex_init(&ab8500->lock); 1122 mutex_init(&ab8500->irq_lock); 1123 atomic_set(&ab8500->transfer_ongoing, 0); 1124 1125 platform_set_drvdata(pdev, ab8500); 1126 1127 if (platid) 1128 version = platid->driver_data; 1129 1130 if (version != AB8500_VERSION_UNDEFINED) 1131 ab8500->version = version; 1132 else { 1133 ret = get_register_interruptible(ab8500, AB8500_MISC, 1134 AB8500_IC_NAME_REG, &value); 1135 if (ret < 0) { 1136 dev_err(&pdev->dev, "could not probe HW\n"); 1137 return ret; 1138 } 1139 1140 ab8500->version = value; 1141 } 1142 1143 ret = get_register_interruptible(ab8500, AB8500_MISC, 1144 AB8500_REV_REG, &value); 1145 if (ret < 0) 1146 return ret; 1147 1148 ab8500->chip_id = value; 1149 1150 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 1151 ab8500_version_str[ab8500->version], 1152 ab8500->chip_id >> 4, 1153 ab8500->chip_id & 0x0F); 1154 1155 /* Configure AB8540 */ 1156 if (is_ab8540(ab8500)) { 1157 ab8500->mask_size = AB8540_NUM_IRQ_REGS; 1158 ab8500->irq_reg_offset = ab8540_irq_regoffset; 1159 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; 1160 } /* Configure AB8500 or AB9540 IRQ */ 1161 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1162 ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1163 ab8500->irq_reg_offset = ab9540_irq_regoffset; 1164 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1165 } else { 1166 ab8500->mask_size = AB8500_NUM_IRQ_REGS; 1167 ab8500->irq_reg_offset = ab8500_irq_regoffset; 1168 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1169 } 1170 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1171 GFP_KERNEL); 1172 if (!ab8500->mask) 1173 return -ENOMEM; 1174 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1175 GFP_KERNEL); 1176 if (!ab8500->oldmask) 1177 return -ENOMEM; 1178 1179 /* 1180 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1181 * 0x01 Swoff bit programming 1182 * 0x02 Thermal protection activation 1183 * 0x04 Vbat lower then BattOk falling threshold 1184 * 0x08 Watchdog expired 1185 * 0x10 Non presence of 32kHz clock 1186 * 0x20 Battery level lower than power on reset threshold 1187 * 0x40 Power on key 1 pressed longer than 10 seconds 1188 * 0x80 DB8500 thermal shutdown 1189 */ 1190 1191 ret = get_register_interruptible(ab8500, AB8500_RTC, 1192 AB8500_SWITCH_OFF_STATUS, &value); 1193 if (ret < 0) 1194 return ret; 1195 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1196 1197 if (value) { 1198 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1199 if (value & 1) 1200 pr_cont(" \"%s\"", switch_off_status[i]); 1201 value = value >> 1; 1202 1203 } 1204 pr_cont("\n"); 1205 } else { 1206 pr_cont(" None\n"); 1207 } 1208 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1209 AB8500_TURN_ON_STATUS, &value); 1210 if (ret < 0) 1211 return ret; 1212 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); 1213 1214 if (value) { 1215 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { 1216 if (value & 1) 1217 pr_cont("\"%s\" ", turn_on_status[i]); 1218 value = value >> 1; 1219 } 1220 pr_cont("\n"); 1221 } else { 1222 pr_cont("None\n"); 1223 } 1224 1225 if (is_ab9540(ab8500)) { 1226 ret = get_register_interruptible(ab8500, AB8500_CHARGER, 1227 AB8500_CH_USBCH_STAT1_REG, &value); 1228 if (ret < 0) 1229 return ret; 1230 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) 1231 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, 1232 AB8500_VBUS_DET); 1233 } 1234 1235 /* Clear and mask all interrupts */ 1236 for (i = 0; i < ab8500->mask_size; i++) { 1237 /* 1238 * Interrupt register 12 doesn't exist prior to AB8500 version 1239 * 2.0 1240 */ 1241 if (ab8500->irq_reg_offset[i] == 11 && 1242 is_ab8500_1p1_or_earlier(ab8500)) 1243 continue; 1244 1245 if (ab8500->irq_reg_offset[i] < 0) 1246 continue; 1247 1248 get_register_interruptible(ab8500, AB8500_INTERRUPT, 1249 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 1250 &value); 1251 set_register_interruptible(ab8500, AB8500_INTERRUPT, 1252 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 1253 } 1254 1255 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 1256 if (ret) 1257 return ret; 1258 1259 for (i = 0; i < ab8500->mask_size; i++) 1260 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 1261 1262 ret = ab8500_irq_init(ab8500, np); 1263 if (ret) 1264 return ret; 1265 1266 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 1267 ab8500_hierarchical_irq, 1268 IRQF_ONESHOT | IRQF_NO_SUSPEND, 1269 "ab8500", ab8500); 1270 if (ret) 1271 return ret; 1272 1273 if (is_ab9540(ab8500)) 1274 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1275 ARRAY_SIZE(ab9540_devs), NULL, 1276 0, ab8500->domain); 1277 else if (is_ab8540(ab8500)) { 1278 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1279 ARRAY_SIZE(ab8540_devs), NULL, 1280 0, ab8500->domain); 1281 if (ret) 1282 return ret; 1283 1284 if (is_ab8540_1p2_or_earlier(ab8500)) 1285 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1286 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1287 0, ab8500->domain); 1288 else /* ab8540 >= cut2 */ 1289 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1290 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1291 0, ab8500->domain); 1292 } else if (is_ab8505(ab8500)) 1293 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1294 ARRAY_SIZE(ab8505_devs), NULL, 1295 0, ab8500->domain); 1296 else 1297 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1298 ARRAY_SIZE(ab8500_devs), NULL, 1299 0, ab8500->domain); 1300 if (ret) 1301 return ret; 1302 1303 if (!no_bm) { 1304 /* Add battery management devices */ 1305 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1306 ARRAY_SIZE(ab8500_bm_devs), NULL, 1307 0, ab8500->domain); 1308 if (ret) 1309 dev_err(ab8500->dev, "error adding bm devices\n"); 1310 } 1311 1312 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1313 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1314 ret = sysfs_create_group(&ab8500->dev->kobj, 1315 &ab9540_attr_group); 1316 else 1317 ret = sysfs_create_group(&ab8500->dev->kobj, 1318 &ab8500_attr_group); 1319 1320 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1321 ab8500->chip_id >= AB8500_CUT2P0) 1322 ret = sysfs_create_group(&ab8500->dev->kobj, 1323 &ab8505_attr_group); 1324 1325 if (ret) 1326 dev_err(ab8500->dev, "error creating sysfs entries\n"); 1327 1328 return ret; 1329 } 1330 1331 static const struct platform_device_id ab8500_id[] = { 1332 { "ab8500-core", AB8500_VERSION_AB8500 }, 1333 { "ab8505-i2c", AB8500_VERSION_AB8505 }, 1334 { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1335 { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1336 { } 1337 }; 1338 1339 static struct platform_driver ab8500_core_driver = { 1340 .driver = { 1341 .name = "ab8500-core", 1342 .suppress_bind_attrs = true, 1343 }, 1344 .probe = ab8500_probe, 1345 .id_table = ab8500_id, 1346 }; 1347 1348 static int __init ab8500_core_init(void) 1349 { 1350 return platform_driver_register(&ab8500_core_driver); 1351 } 1352 core_initcall(ab8500_core_init); 1353