162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1406e589efSLee Jones #include <linux/irqdomain.h> 1562579266SRabin Vincent #include <linux/delay.h> 1662579266SRabin Vincent #include <linux/interrupt.h> 1762579266SRabin Vincent #include <linux/module.h> 1862579266SRabin Vincent #include <linux/platform_device.h> 1962579266SRabin Vincent #include <linux/mfd/core.h> 2047c16975SMattias Wallin #include <linux/mfd/abx500.h> 21ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h> 22d28f1db8SLee Jones #include <linux/mfd/dbx500-prcmu.h> 23549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 246bc4a568SLee Jones #include <linux/of.h> 256bc4a568SLee Jones #include <linux/of_device.h> 2662579266SRabin Vincent 2762579266SRabin Vincent /* 2862579266SRabin Vincent * Interrupt register offsets 2962579266SRabin Vincent * Bank : 0x0E 3062579266SRabin Vincent */ 3147c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 3247c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 3347c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3447c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3547c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3647c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3747c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3847c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 39d6255529SLinus Walleij #define AB9540_IT_SOURCE13_REG 0x0C 4047c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 4147c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 4247c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 4347c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 4447c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4547c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4662579266SRabin Vincent 4762579266SRabin Vincent /* 4862579266SRabin Vincent * latch registers 4962579266SRabin Vincent */ 5047c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 5147c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 5247c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 5347c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 5447c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5547c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5647c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5747c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5847c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5947c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 6092d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 61d6255529SLinus Walleij #define AB9540_IT_LATCH13_REG 0x2C 6247c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 6347c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 6447c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 6547c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6647c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6747c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6862579266SRabin Vincent 6962579266SRabin Vincent /* 7062579266SRabin Vincent * mask registers 7162579266SRabin Vincent */ 7262579266SRabin Vincent 7347c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 7447c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 7547c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7647c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7747c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7847c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7947c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 8047c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 8147c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 8247c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 8347c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 8447c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 8547c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8647c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8747c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8847c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8947c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 9047c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 9147c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 9247c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 9347c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 9447c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 9547c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9647c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9762579266SRabin Vincent 987ccfe9b1SMichel JAOUEN /* 997ccfe9b1SMichel JAOUEN * latch hierarchy registers 1007ccfe9b1SMichel JAOUEN */ 1017ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER1_REG 0x60 1027ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER2_REG 0x61 1037ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER3_REG 0x62 1047ccfe9b1SMichel JAOUEN 1057ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER_NUM 3 1067ccfe9b1SMichel JAOUEN 10747c16975SMattias Wallin #define AB8500_REV_REG 0x80 1080f620837SLinus Walleij #define AB8500_IC_NAME_REG 0x82 109e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 11062579266SRabin Vincent 111b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS 0x00 112b4a31037SAndrew Lynn 1136ef9418cSRickard Andersson static bool no_bm; /* No battery management */ 1146ef9418cSRickard Andersson module_param(no_bm, bool, S_IRUGO); 1156ef9418cSRickard Andersson 116d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_REG 0x23 117d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 118d6255529SLinus Walleij 11962579266SRabin Vincent /* 12062579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 1212ced445eSLinus Walleij * numbers are indexed into this array with (num / 8). The interupts are 1222ced445eSLinus Walleij * defined in linux/mfd/ab8500.h 12362579266SRabin Vincent * 12462579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 12562579266SRabin Vincent * offset 0. 12662579266SRabin Vincent */ 1272ced445eSLinus Walleij /* AB8500 support */ 12862579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 12992d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 13062579266SRabin Vincent }; 13162579266SRabin Vincent 132d6255529SLinus Walleij /* AB9540 support */ 133d6255529SLinus Walleij static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 134d6255529SLinus Walleij 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 135d6255529SLinus Walleij }; 136d6255529SLinus Walleij 1370f620837SLinus Walleij static const char ab8500_version_str[][7] = { 1380f620837SLinus Walleij [AB8500_VERSION_AB8500] = "AB8500", 1390f620837SLinus Walleij [AB8500_VERSION_AB8505] = "AB8505", 1400f620837SLinus Walleij [AB8500_VERSION_AB9540] = "AB9540", 1410f620837SLinus Walleij [AB8500_VERSION_AB8540] = "AB8540", 1420f620837SLinus Walleij }; 1430f620837SLinus Walleij 144822672a7SLee Jones static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 145d28f1db8SLee Jones { 146d28f1db8SLee Jones int ret; 147d28f1db8SLee Jones 148d28f1db8SLee Jones ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 149d28f1db8SLee Jones if (ret < 0) 150d28f1db8SLee Jones dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 151d28f1db8SLee Jones return ret; 152d28f1db8SLee Jones } 153d28f1db8SLee Jones 154822672a7SLee Jones static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 155d28f1db8SLee Jones u8 data) 156d28f1db8SLee Jones { 157d28f1db8SLee Jones int ret; 158d28f1db8SLee Jones 159d28f1db8SLee Jones ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 160d28f1db8SLee Jones &mask, 1); 161d28f1db8SLee Jones if (ret < 0) 162d28f1db8SLee Jones dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 163d28f1db8SLee Jones return ret; 164d28f1db8SLee Jones } 165d28f1db8SLee Jones 166822672a7SLee Jones static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 167d28f1db8SLee Jones { 168d28f1db8SLee Jones int ret; 169d28f1db8SLee Jones u8 data; 170d28f1db8SLee Jones 171d28f1db8SLee Jones ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 172d28f1db8SLee Jones if (ret < 0) { 173d28f1db8SLee Jones dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 174d28f1db8SLee Jones return ret; 175d28f1db8SLee Jones } 176d28f1db8SLee Jones return (int)data; 177d28f1db8SLee Jones } 178d28f1db8SLee Jones 17947c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 18047c16975SMattias Wallin { 1816bce7bf1SMattias Wallin struct ab8500 *ab8500; 1826bce7bf1SMattias Wallin 1836bce7bf1SMattias Wallin if (!dev) 1846bce7bf1SMattias Wallin return -EINVAL; 1856bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1866bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 18747c16975SMattias Wallin } 18847c16975SMattias Wallin 18947c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 19047c16975SMattias Wallin u8 reg, u8 data) 19162579266SRabin Vincent { 19262579266SRabin Vincent int ret; 19347c16975SMattias Wallin /* 19447c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 19547c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 19647c16975SMattias Wallin * */ 19747c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 19862579266SRabin Vincent 19962579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 20062579266SRabin Vincent 201392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 20247c16975SMattias Wallin 20347c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 20447c16975SMattias Wallin if (ret < 0) 20547c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 20647c16975SMattias Wallin addr, ret); 20747c16975SMattias Wallin mutex_unlock(&ab8500->lock); 20847c16975SMattias Wallin 20947c16975SMattias Wallin return ret; 21047c16975SMattias Wallin } 21147c16975SMattias Wallin 21247c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 21347c16975SMattias Wallin u8 reg, u8 value) 21447c16975SMattias Wallin { 215112a80d2SJonas Aaberg int ret; 21647c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 21747c16975SMattias Wallin 218112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 219112a80d2SJonas Aaberg ret = set_register_interruptible(ab8500, bank, reg, value); 220112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 221112a80d2SJonas Aaberg return ret; 22247c16975SMattias Wallin } 22347c16975SMattias Wallin 22447c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 22547c16975SMattias Wallin u8 reg, u8 *value) 22647c16975SMattias Wallin { 22747c16975SMattias Wallin int ret; 22847c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 22947c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 23047c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 23147c16975SMattias Wallin 232392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 23347c16975SMattias Wallin 23447c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 23547c16975SMattias Wallin if (ret < 0) 23647c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 23747c16975SMattias Wallin addr, ret); 23847c16975SMattias Wallin else 23947c16975SMattias Wallin *value = ret; 24047c16975SMattias Wallin 24147c16975SMattias Wallin mutex_unlock(&ab8500->lock); 24247c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 24347c16975SMattias Wallin 24447c16975SMattias Wallin return ret; 24547c16975SMattias Wallin } 24647c16975SMattias Wallin 24747c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 24847c16975SMattias Wallin u8 reg, u8 *value) 24947c16975SMattias Wallin { 250112a80d2SJonas Aaberg int ret; 25147c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 25247c16975SMattias Wallin 253112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 254112a80d2SJonas Aaberg ret = get_register_interruptible(ab8500, bank, reg, value); 255112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 256112a80d2SJonas Aaberg return ret; 25747c16975SMattias Wallin } 25847c16975SMattias Wallin 25947c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 26047c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 26147c16975SMattias Wallin { 26247c16975SMattias Wallin int ret; 26347c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 26447c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 26547c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 26647c16975SMattias Wallin 267392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 26847c16975SMattias Wallin 269bc628fd1SMattias Nilsson if (ab8500->write_masked == NULL) { 270bc628fd1SMattias Nilsson u8 data; 271bc628fd1SMattias Nilsson 27247c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 27347c16975SMattias Wallin if (ret < 0) { 27447c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 27547c16975SMattias Wallin addr, ret); 27647c16975SMattias Wallin goto out; 27747c16975SMattias Wallin } 27847c16975SMattias Wallin 27947c16975SMattias Wallin data = (u8)ret; 28047c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 28147c16975SMattias Wallin 28262579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 28362579266SRabin Vincent if (ret < 0) 28462579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 28562579266SRabin Vincent addr, ret); 28662579266SRabin Vincent 287bc628fd1SMattias Nilsson dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 288bc628fd1SMattias Nilsson data); 289bc628fd1SMattias Nilsson goto out; 290bc628fd1SMattias Nilsson } 291bc628fd1SMattias Nilsson ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 292bc628fd1SMattias Nilsson if (ret < 0) 293bc628fd1SMattias Nilsson dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 294bc628fd1SMattias Nilsson ret); 29562579266SRabin Vincent out: 29662579266SRabin Vincent mutex_unlock(&ab8500->lock); 29762579266SRabin Vincent return ret; 29862579266SRabin Vincent } 29947c16975SMattias Wallin 30047c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 30147c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 30247c16975SMattias Wallin { 303112a80d2SJonas Aaberg int ret; 30447c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 30547c16975SMattias Wallin 306112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 307112a80d2SJonas Aaberg ret= mask_and_set_register_interruptible(ab8500, bank, reg, 30847c16975SMattias Wallin bitmask, bitvalues); 309112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 310112a80d2SJonas Aaberg return ret; 31147c16975SMattias Wallin } 31247c16975SMattias Wallin 31347c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 31447c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 31547c16975SMattias Wallin .get_register = ab8500_get_register, 31647c16975SMattias Wallin .set_register = ab8500_set_register, 31747c16975SMattias Wallin .get_register_page = NULL, 31847c16975SMattias Wallin .set_register_page = NULL, 31947c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 32047c16975SMattias Wallin .event_registers_startup_state_get = NULL, 32147c16975SMattias Wallin .startup_irq_enabled = NULL, 32247c16975SMattias Wallin }; 32362579266SRabin Vincent 3249505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 32562579266SRabin Vincent { 3269505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 32762579266SRabin Vincent 32862579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 329112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 33062579266SRabin Vincent } 33162579266SRabin Vincent 3329505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 33362579266SRabin Vincent { 3349505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 33562579266SRabin Vincent int i; 33662579266SRabin Vincent 3372ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 33862579266SRabin Vincent u8 old = ab8500->oldmask[i]; 33962579266SRabin Vincent u8 new = ab8500->mask[i]; 34062579266SRabin Vincent int reg; 34162579266SRabin Vincent 34262579266SRabin Vincent if (new == old) 34362579266SRabin Vincent continue; 34462579266SRabin Vincent 3450f620837SLinus Walleij /* 3460f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 3470f620837SLinus Walleij * 2.0 3480f620837SLinus Walleij */ 3490f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 3500f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 35192d50a41SMattias Wallin continue; 35292d50a41SMattias Wallin 35362579266SRabin Vincent ab8500->oldmask[i] = new; 35462579266SRabin Vincent 3552ced445eSLinus Walleij reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 35647c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 35762579266SRabin Vincent } 358112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 35962579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 36062579266SRabin Vincent } 36162579266SRabin Vincent 3629505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 36362579266SRabin Vincent { 3649505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 36506e589efSLee Jones int offset = data->hwirq; 36662579266SRabin Vincent int index = offset / 8; 36762579266SRabin Vincent int mask = 1 << (offset % 8); 36862579266SRabin Vincent 36962579266SRabin Vincent ab8500->mask[index] |= mask; 37062579266SRabin Vincent } 37162579266SRabin Vincent 3729505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 37362579266SRabin Vincent { 3749505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 37506e589efSLee Jones int offset = data->hwirq; 37662579266SRabin Vincent int index = offset / 8; 37762579266SRabin Vincent int mask = 1 << (offset % 8); 37862579266SRabin Vincent 37962579266SRabin Vincent ab8500->mask[index] &= ~mask; 38062579266SRabin Vincent } 38162579266SRabin Vincent 38262579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 38362579266SRabin Vincent .name = "ab8500", 3849505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 3859505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 3869505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 387e6f9306eSVirupax Sadashivpetimath .irq_disable = ab8500_irq_mask, 3889505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 38962579266SRabin Vincent }; 39062579266SRabin Vincent 3917ccfe9b1SMichel JAOUEN static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 3927ccfe9b1SMichel JAOUEN int latch_offset, u8 latch_val) 3937ccfe9b1SMichel JAOUEN { 3947ccfe9b1SMichel JAOUEN int int_bit = __ffs(latch_val); 3957ccfe9b1SMichel JAOUEN int line, i; 3967ccfe9b1SMichel JAOUEN 3977ccfe9b1SMichel JAOUEN do { 3987ccfe9b1SMichel JAOUEN int_bit = __ffs(latch_val); 3997ccfe9b1SMichel JAOUEN 4007ccfe9b1SMichel JAOUEN for (i = 0; i < ab8500->mask_size; i++) 4017ccfe9b1SMichel JAOUEN if (ab8500->irq_reg_offset[i] == latch_offset) 4027ccfe9b1SMichel JAOUEN break; 4037ccfe9b1SMichel JAOUEN 4047ccfe9b1SMichel JAOUEN if (i >= ab8500->mask_size) { 4057ccfe9b1SMichel JAOUEN dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 4067ccfe9b1SMichel JAOUEN latch_offset); 4077ccfe9b1SMichel JAOUEN return -ENXIO; 4087ccfe9b1SMichel JAOUEN } 4097ccfe9b1SMichel JAOUEN 4107ccfe9b1SMichel JAOUEN line = (i << 3) + int_bit; 4117ccfe9b1SMichel JAOUEN latch_val &= ~(1 << int_bit); 4127ccfe9b1SMichel JAOUEN 4137ccfe9b1SMichel JAOUEN handle_nested_irq(ab8500->irq_base + line); 4147ccfe9b1SMichel JAOUEN } while (latch_val); 4157ccfe9b1SMichel JAOUEN 4167ccfe9b1SMichel JAOUEN return 0; 4177ccfe9b1SMichel JAOUEN } 4187ccfe9b1SMichel JAOUEN 4197ccfe9b1SMichel JAOUEN static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 4207ccfe9b1SMichel JAOUEN int hier_offset, u8 hier_val) 4217ccfe9b1SMichel JAOUEN { 4227ccfe9b1SMichel JAOUEN int latch_bit, status; 4237ccfe9b1SMichel JAOUEN u8 latch_offset, latch_val; 4247ccfe9b1SMichel JAOUEN 4257ccfe9b1SMichel JAOUEN do { 4267ccfe9b1SMichel JAOUEN latch_bit = __ffs(hier_val); 4277ccfe9b1SMichel JAOUEN latch_offset = (hier_offset << 3) + latch_bit; 4287ccfe9b1SMichel JAOUEN 4297ccfe9b1SMichel JAOUEN /* Fix inconsistent ITFromLatch25 bit mapping... */ 4307ccfe9b1SMichel JAOUEN if (unlikely(latch_offset == 17)) 4317ccfe9b1SMichel JAOUEN latch_offset = 24; 4327ccfe9b1SMichel JAOUEN 4337ccfe9b1SMichel JAOUEN status = get_register_interruptible(ab8500, 4347ccfe9b1SMichel JAOUEN AB8500_INTERRUPT, 4357ccfe9b1SMichel JAOUEN AB8500_IT_LATCH1_REG + latch_offset, 4367ccfe9b1SMichel JAOUEN &latch_val); 4377ccfe9b1SMichel JAOUEN if (status < 0 || latch_val == 0) 4387ccfe9b1SMichel JAOUEN goto discard; 4397ccfe9b1SMichel JAOUEN 4407ccfe9b1SMichel JAOUEN status = ab8500_handle_hierarchical_line(ab8500, 4417ccfe9b1SMichel JAOUEN latch_offset, latch_val); 4427ccfe9b1SMichel JAOUEN if (status < 0) 4437ccfe9b1SMichel JAOUEN return status; 4447ccfe9b1SMichel JAOUEN discard: 4457ccfe9b1SMichel JAOUEN hier_val &= ~(1 << latch_bit); 4467ccfe9b1SMichel JAOUEN } while (hier_val); 4477ccfe9b1SMichel JAOUEN 4487ccfe9b1SMichel JAOUEN return 0; 4497ccfe9b1SMichel JAOUEN } 4507ccfe9b1SMichel JAOUEN 4517ccfe9b1SMichel JAOUEN static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 4527ccfe9b1SMichel JAOUEN { 4537ccfe9b1SMichel JAOUEN struct ab8500 *ab8500 = dev; 4547ccfe9b1SMichel JAOUEN u8 i; 4557ccfe9b1SMichel JAOUEN 4567ccfe9b1SMichel JAOUEN dev_vdbg(ab8500->dev, "interrupt\n"); 4577ccfe9b1SMichel JAOUEN 4587ccfe9b1SMichel JAOUEN /* Hierarchical interrupt version */ 4597ccfe9b1SMichel JAOUEN for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) { 4607ccfe9b1SMichel JAOUEN int status; 4617ccfe9b1SMichel JAOUEN u8 hier_val; 4627ccfe9b1SMichel JAOUEN 4637ccfe9b1SMichel JAOUEN status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 4647ccfe9b1SMichel JAOUEN AB8500_IT_LATCHHIER1_REG + i, &hier_val); 4657ccfe9b1SMichel JAOUEN if (status < 0 || hier_val == 0) 4667ccfe9b1SMichel JAOUEN continue; 4677ccfe9b1SMichel JAOUEN 4687ccfe9b1SMichel JAOUEN status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 4697ccfe9b1SMichel JAOUEN if (status < 0) 4707ccfe9b1SMichel JAOUEN break; 4717ccfe9b1SMichel JAOUEN } 4727ccfe9b1SMichel JAOUEN return IRQ_HANDLED; 4737ccfe9b1SMichel JAOUEN } 4747ccfe9b1SMichel JAOUEN 47580633f05SLee Jones /** 47680633f05SLee Jones * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ 47780633f05SLee Jones * 47880633f05SLee Jones * @ab8500: ab8500_irq controller to operate on. 47980633f05SLee Jones * @irq: index of the interrupt requested in the chip IRQs 48080633f05SLee Jones * 48180633f05SLee Jones * Useful for drivers to request their own IRQs. 48280633f05SLee Jones */ 48380633f05SLee Jones static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq) 48480633f05SLee Jones { 48580633f05SLee Jones if (!ab8500) 48680633f05SLee Jones return -EINVAL; 48780633f05SLee Jones 48880633f05SLee Jones return irq_create_mapping(ab8500->domain, irq); 48980633f05SLee Jones } 49080633f05SLee Jones 49162579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 49262579266SRabin Vincent { 49362579266SRabin Vincent struct ab8500 *ab8500 = dev; 49462579266SRabin Vincent int i; 49562579266SRabin Vincent 49662579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 49762579266SRabin Vincent 498112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 499112a80d2SJonas Aaberg 5002ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 5012ced445eSLinus Walleij int regoffset = ab8500->irq_reg_offset[i]; 50262579266SRabin Vincent int status; 50347c16975SMattias Wallin u8 value; 50462579266SRabin Vincent 5050f620837SLinus Walleij /* 5060f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 5070f620837SLinus Walleij * 2.0 5080f620837SLinus Walleij */ 5090f620837SLinus Walleij if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) 51092d50a41SMattias Wallin continue; 51192d50a41SMattias Wallin 51247c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 51347c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 51447c16975SMattias Wallin if (status < 0 || value == 0) 51562579266SRabin Vincent continue; 51662579266SRabin Vincent 51762579266SRabin Vincent do { 51888aec4f7SMattias Wallin int bit = __ffs(value); 51962579266SRabin Vincent int line = i * 8 + bit; 5200a37fc56SLee Jones int virq = ab8500_irq_get_virq(ab8500, line); 52162579266SRabin Vincent 5220a37fc56SLee Jones handle_nested_irq(virq); 52347c16975SMattias Wallin value &= ~(1 << bit); 524112a80d2SJonas Aaberg 52547c16975SMattias Wallin } while (value); 52662579266SRabin Vincent } 527112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 52862579266SRabin Vincent return IRQ_HANDLED; 52962579266SRabin Vincent } 53062579266SRabin Vincent 53106e589efSLee Jones static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 53206e589efSLee Jones irq_hw_number_t hwirq) 53306e589efSLee Jones { 53406e589efSLee Jones struct ab8500 *ab8500 = d->host_data; 53506e589efSLee Jones 53606e589efSLee Jones if (!ab8500) 53706e589efSLee Jones return -EINVAL; 53806e589efSLee Jones 53906e589efSLee Jones irq_set_chip_data(virq, ab8500); 54006e589efSLee Jones irq_set_chip_and_handler(virq, &ab8500_irq_chip, 54106e589efSLee Jones handle_simple_irq); 54206e589efSLee Jones irq_set_nested_thread(virq, 1); 54306e589efSLee Jones #ifdef CONFIG_ARM 54406e589efSLee Jones set_irq_flags(virq, IRQF_VALID); 54506e589efSLee Jones #else 54606e589efSLee Jones irq_set_noprobe(virq); 54706e589efSLee Jones #endif 54862579266SRabin Vincent 54962579266SRabin Vincent return 0; 55062579266SRabin Vincent } 55162579266SRabin Vincent 55206e589efSLee Jones static struct irq_domain_ops ab8500_irq_ops = { 55306e589efSLee Jones .map = ab8500_irq_map, 55406e589efSLee Jones .xlate = irq_domain_xlate_twocell, 55506e589efSLee Jones }; 55606e589efSLee Jones 55706e589efSLee Jones static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 55862579266SRabin Vincent { 5592ced445eSLinus Walleij int num_irqs; 56062579266SRabin Vincent 561d6255529SLinus Walleij if (is_ab9540(ab8500)) 562d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 563a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 564a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 565d6255529SLinus Walleij else 5662ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 5672ced445eSLinus Walleij 56806e589efSLee Jones if (ab8500->irq_base) { 56906e589efSLee Jones ab8500->domain = irq_domain_add_legacy( 57006e589efSLee Jones NULL, num_irqs, ab8500->irq_base, 57106e589efSLee Jones 0, &ab8500_irq_ops, ab8500); 57262579266SRabin Vincent } 57306e589efSLee Jones else { 57406e589efSLee Jones ab8500->domain = irq_domain_add_linear( 57506e589efSLee Jones np, num_irqs, &ab8500_irq_ops, ab8500); 57606e589efSLee Jones } 57706e589efSLee Jones 57806e589efSLee Jones if (!ab8500->domain) { 57906e589efSLee Jones dev_err(ab8500->dev, "Failed to create irqdomain\n"); 58006e589efSLee Jones return -ENOSYS; 58106e589efSLee Jones } 58206e589efSLee Jones 58306e589efSLee Jones return 0; 58462579266SRabin Vincent } 58562579266SRabin Vincent 586112a80d2SJonas Aaberg int ab8500_suspend(struct ab8500 *ab8500) 587112a80d2SJonas Aaberg { 588112a80d2SJonas Aaberg if (atomic_read(&ab8500->transfer_ongoing)) 589112a80d2SJonas Aaberg return -EINVAL; 590112a80d2SJonas Aaberg else 591112a80d2SJonas Aaberg return 0; 592112a80d2SJonas Aaberg } 593112a80d2SJonas Aaberg 5945cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 59562579266SRabin Vincent { 59662579266SRabin Vincent .name = "HW_CONV_END", 59762579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 59862579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 59962579266SRabin Vincent .flags = IORESOURCE_IRQ, 60062579266SRabin Vincent }, 60162579266SRabin Vincent { 60262579266SRabin Vincent .name = "SW_CONV_END", 60362579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 60462579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 60562579266SRabin Vincent .flags = IORESOURCE_IRQ, 60662579266SRabin Vincent }, 60762579266SRabin Vincent }; 60862579266SRabin Vincent 6095cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 61062579266SRabin Vincent { 61162579266SRabin Vincent .name = "60S", 61262579266SRabin Vincent .start = AB8500_INT_RTC_60S, 61362579266SRabin Vincent .end = AB8500_INT_RTC_60S, 61462579266SRabin Vincent .flags = IORESOURCE_IRQ, 61562579266SRabin Vincent }, 61662579266SRabin Vincent { 61762579266SRabin Vincent .name = "ALARM", 61862579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 61962579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 62062579266SRabin Vincent .flags = IORESOURCE_IRQ, 62162579266SRabin Vincent }, 62262579266SRabin Vincent }; 62362579266SRabin Vincent 6245cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 62577686517SSundar R Iyer { 62677686517SSundar R Iyer .name = "ONKEY_DBF", 62777686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 62877686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 62977686517SSundar R Iyer .flags = IORESOURCE_IRQ, 63077686517SSundar R Iyer }, 63177686517SSundar R Iyer { 63277686517SSundar R Iyer .name = "ONKEY_DBR", 63377686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 63477686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 63577686517SSundar R Iyer .flags = IORESOURCE_IRQ, 63677686517SSundar R Iyer }, 63777686517SSundar R Iyer }; 63877686517SSundar R Iyer 6396af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { 640e098adedSMattias Wallin { 6416af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_F", 6426af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_F, 6436af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_F, 644e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 645e098adedSMattias Wallin }, 646e098adedSMattias Wallin { 6476af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_R", 6486af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_R, 6496af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_R, 650e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 651e098adedSMattias Wallin }, 652e098adedSMattias Wallin { 6536af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_F", 6546af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_F, 6556af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_F, 6566af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6576af75ecdSLinus Walleij }, 6586af75ecdSLinus Walleij { 6596af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_R", 6606af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_R, 6616af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_R, 6626af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6636af75ecdSLinus Walleij }, 6646af75ecdSLinus Walleij { 6656af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_F", 6666af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_F, 6676af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_F, 6686af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6696af75ecdSLinus Walleij }, 6706af75ecdSLinus Walleij { 6716af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_R", 6726af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_R, 6736af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_R, 6746af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6756af75ecdSLinus Walleij }, 6766af75ecdSLinus Walleij }; 6776af75ecdSLinus Walleij 6786af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = { 6796af75ecdSLinus Walleij { 680e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 681e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 682e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 683e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 684e098adedSMattias Wallin }, 685e098adedSMattias Wallin { 686e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 687e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 688e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 689e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 690e098adedSMattias Wallin }, 691e098adedSMattias Wallin { 692e098adedSMattias Wallin .name = "VBUS_DET_R", 693e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 694e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 695e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 696e098adedSMattias Wallin }, 697e098adedSMattias Wallin { 6986af75ecdSLinus Walleij .name = "VBUS_DET_F", 6996af75ecdSLinus Walleij .start = AB8500_INT_VBUS_DET_F, 7006af75ecdSLinus Walleij .end = AB8500_INT_VBUS_DET_F, 701e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 702e098adedSMattias Wallin }, 703e098adedSMattias Wallin { 7046af75ecdSLinus Walleij .name = "USB_LINK_STATUS", 7056af75ecdSLinus Walleij .start = AB8500_INT_USB_LINK_STATUS, 7066af75ecdSLinus Walleij .end = AB8500_INT_USB_LINK_STATUS, 7076af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7086af75ecdSLinus Walleij }, 7096af75ecdSLinus Walleij { 710e098adedSMattias Wallin .name = "VBUS_OVV", 711e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 712e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 713e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 714e098adedSMattias Wallin }, 715e098adedSMattias Wallin { 7166af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_R", 7176af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_R, 7186af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_R, 719e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 720e098adedSMattias Wallin }, 721e098adedSMattias Wallin { 7226af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_F", 7236af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_F, 7246af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_F, 725e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 726e098adedSMattias Wallin }, 727e098adedSMattias Wallin { 7286af75ecdSLinus Walleij .name = "MAIN_EXT_CH_NOT_OK", 7296af75ecdSLinus Walleij .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 7306af75ecdSLinus Walleij .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 7316af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7326af75ecdSLinus Walleij }, 7336af75ecdSLinus Walleij { 7346af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_R", 7356af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_R, 7366af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_R, 7376af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7386af75ecdSLinus Walleij }, 7396af75ecdSLinus Walleij { 7406af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_F", 7416af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_F, 7426af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_F, 7436af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7446af75ecdSLinus Walleij }, 7456af75ecdSLinus Walleij { 7466af75ecdSLinus Walleij .name = "USB_CHARGER_NOT_OKR", 747a982362cSBengt Jonsson .start = AB8500_INT_USB_CHARGER_NOT_OKR, 748a982362cSBengt Jonsson .end = AB8500_INT_USB_CHARGER_NOT_OKR, 7496af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7506af75ecdSLinus Walleij }, 7516af75ecdSLinus Walleij { 7526af75ecdSLinus Walleij .name = "CH_WD_EXP", 7536af75ecdSLinus Walleij .start = AB8500_INT_CH_WD_EXP, 7546af75ecdSLinus Walleij .end = AB8500_INT_CH_WD_EXP, 7556af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7566af75ecdSLinus Walleij }, 7576af75ecdSLinus Walleij }; 7586af75ecdSLinus Walleij 7596af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = { 7606af75ecdSLinus Walleij { 7616af75ecdSLinus Walleij .name = "BAT_CTRL_INDB", 7626af75ecdSLinus Walleij .start = AB8500_INT_BAT_CTRL_INDB, 7636af75ecdSLinus Walleij .end = AB8500_INT_BAT_CTRL_INDB, 764e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 765e098adedSMattias Wallin }, 766e098adedSMattias Wallin { 767e098adedSMattias Wallin .name = "BTEMP_LOW", 768e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 769e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 770e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 771e098adedSMattias Wallin }, 772e098adedSMattias Wallin { 773e098adedSMattias Wallin .name = "BTEMP_HIGH", 774e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 775e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 776e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 777e098adedSMattias Wallin }, 778e098adedSMattias Wallin { 7796af75ecdSLinus Walleij .name = "BTEMP_LOW_MEDIUM", 7806af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_LOW_MEDIUM, 7816af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_LOW_MEDIUM, 782e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 783e098adedSMattias Wallin }, 784e098adedSMattias Wallin { 7856af75ecdSLinus Walleij .name = "BTEMP_MEDIUM_HIGH", 7866af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 7876af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 788e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 789e098adedSMattias Wallin }, 790e098adedSMattias Wallin }; 791e098adedSMattias Wallin 7926af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = { 7936af75ecdSLinus Walleij { 7946af75ecdSLinus Walleij .name = "NCONV_ACCU", 7956af75ecdSLinus Walleij .start = AB8500_INT_CCN_CONV_ACC, 7966af75ecdSLinus Walleij .end = AB8500_INT_CCN_CONV_ACC, 7976af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7986af75ecdSLinus Walleij }, 7996af75ecdSLinus Walleij { 8006af75ecdSLinus Walleij .name = "BATT_OVV", 8016af75ecdSLinus Walleij .start = AB8500_INT_BATT_OVV, 8026af75ecdSLinus Walleij .end = AB8500_INT_BATT_OVV, 8036af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8046af75ecdSLinus Walleij }, 8056af75ecdSLinus Walleij { 8066af75ecdSLinus Walleij .name = "LOW_BAT_F", 8076af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_F, 8086af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_F, 8096af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8106af75ecdSLinus Walleij }, 8116af75ecdSLinus Walleij { 8126af75ecdSLinus Walleij .name = "LOW_BAT_R", 8136af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_R, 8146af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_R, 8156af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8166af75ecdSLinus Walleij }, 8176af75ecdSLinus Walleij { 8186af75ecdSLinus Walleij .name = "CC_INT_CALIB", 8196af75ecdSLinus Walleij .start = AB8500_INT_CC_INT_CALIB, 8206af75ecdSLinus Walleij .end = AB8500_INT_CC_INT_CALIB, 8216af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8226af75ecdSLinus Walleij }, 823a982362cSBengt Jonsson { 824a982362cSBengt Jonsson .name = "CCEOC", 825a982362cSBengt Jonsson .start = AB8500_INT_CCEOC, 826a982362cSBengt Jonsson .end = AB8500_INT_CCEOC, 827a982362cSBengt Jonsson .flags = IORESOURCE_IRQ, 828a982362cSBengt Jonsson }, 8296af75ecdSLinus Walleij }; 8306af75ecdSLinus Walleij 8316af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 8326af75ecdSLinus Walleij 833df720647SAxel Lin #ifdef CONFIG_DEBUG_FS 8345cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 835e098adedSMattias Wallin { 836e098adedSMattias Wallin .name = "IRQ_FIRST", 837e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 838e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 839e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 840e098adedSMattias Wallin }, 841e098adedSMattias Wallin { 842e098adedSMattias Wallin .name = "IRQ_LAST", 843a982362cSBengt Jonsson .start = AB8500_INT_XTAL32K_KO, 844a982362cSBengt Jonsson .end = AB8500_INT_XTAL32K_KO, 845e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 846e098adedSMattias Wallin }, 847e098adedSMattias Wallin }; 848df720647SAxel Lin #endif 849e098adedSMattias Wallin 8505cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 851e098adedSMattias Wallin { 852e098adedSMattias Wallin .name = "ID_WAKEUP_R", 853e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 854e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 855e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 856e098adedSMattias Wallin }, 857e098adedSMattias Wallin { 858e098adedSMattias Wallin .name = "ID_WAKEUP_F", 859e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 860e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 861e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 862e098adedSMattias Wallin }, 863e098adedSMattias Wallin { 864e098adedSMattias Wallin .name = "VBUS_DET_F", 865e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 866e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 867e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 868e098adedSMattias Wallin }, 869e098adedSMattias Wallin { 870e098adedSMattias Wallin .name = "VBUS_DET_R", 871e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 872e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 873e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 874e098adedSMattias Wallin }, 87592d50a41SMattias Wallin { 87692d50a41SMattias Wallin .name = "USB_LINK_STATUS", 87792d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 87892d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 87992d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 88092d50a41SMattias Wallin }, 8816af75ecdSLinus Walleij { 8826af75ecdSLinus Walleij .name = "USB_ADP_PROBE_PLUG", 8836af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_PLUG, 8846af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_PLUG, 8856af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8866af75ecdSLinus Walleij }, 8876af75ecdSLinus Walleij { 8886af75ecdSLinus Walleij .name = "USB_ADP_PROBE_UNPLUG", 8896af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_UNPLUG, 8906af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_UNPLUG, 8916af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8926af75ecdSLinus Walleij }, 893e098adedSMattias Wallin }; 894e098adedSMattias Wallin 89544f72e53SVirupax Sadashivpetimath static struct resource __devinitdata ab8505_iddet_resources[] = { 89644f72e53SVirupax Sadashivpetimath { 89744f72e53SVirupax Sadashivpetimath .name = "KeyDeglitch", 89844f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYDEGLITCH, 89944f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYDEGLITCH, 90044f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 90144f72e53SVirupax Sadashivpetimath }, 90244f72e53SVirupax Sadashivpetimath { 90344f72e53SVirupax Sadashivpetimath .name = "KP", 90444f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KP, 90544f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KP, 90644f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 90744f72e53SVirupax Sadashivpetimath }, 90844f72e53SVirupax Sadashivpetimath { 90944f72e53SVirupax Sadashivpetimath .name = "IKP", 91044f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKP, 91144f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKP, 91244f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 91344f72e53SVirupax Sadashivpetimath }, 91444f72e53SVirupax Sadashivpetimath { 91544f72e53SVirupax Sadashivpetimath .name = "IKR", 91644f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKR, 91744f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKR, 91844f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 91944f72e53SVirupax Sadashivpetimath }, 92044f72e53SVirupax Sadashivpetimath { 92144f72e53SVirupax Sadashivpetimath .name = "KeyStuck", 92244f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYSTUCK, 92344f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYSTUCK, 92444f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 92544f72e53SVirupax Sadashivpetimath }, 92644f72e53SVirupax Sadashivpetimath }; 92744f72e53SVirupax Sadashivpetimath 9285cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 929e098adedSMattias Wallin { 930e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 931e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 932e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 933e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 934e098adedSMattias Wallin }, 935e098adedSMattias Wallin }; 936e098adedSMattias Wallin 937d6255529SLinus Walleij static struct mfd_cell __devinitdata abx500_common_devs[] = { 9385814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 9395814fc35SMattias Wallin { 9405814fc35SMattias Wallin .name = "ab8500-debug", 941bad76991SLee Jones .of_compatible = "stericsson,ab8500-debug", 942e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 943e098adedSMattias Wallin .resources = ab8500_debug_resources, 9445814fc35SMattias Wallin }, 9455814fc35SMattias Wallin #endif 94662579266SRabin Vincent { 947e098adedSMattias Wallin .name = "ab8500-sysctrl", 948bad76991SLee Jones .of_compatible = "stericsson,ab8500-sysctrl", 949e098adedSMattias Wallin }, 950e098adedSMattias Wallin { 951e098adedSMattias Wallin .name = "ab8500-regulator", 952bad76991SLee Jones .of_compatible = "stericsson,ab8500-regulator", 953e098adedSMattias Wallin }, 954e098adedSMattias Wallin { 955916a871cSUlf Hansson .name = "abx500-clk", 956916a871cSUlf Hansson .of_compatible = "stericsson,abx500-clk", 957916a871cSUlf Hansson }, 958916a871cSUlf Hansson { 95962579266SRabin Vincent .name = "ab8500-gpadc", 960bad76991SLee Jones .of_compatible = "stericsson,ab8500-gpadc", 96162579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 96262579266SRabin Vincent .resources = ab8500_gpadc_resources, 96362579266SRabin Vincent }, 96462579266SRabin Vincent { 96562579266SRabin Vincent .name = "ab8500-rtc", 966bad76991SLee Jones .of_compatible = "stericsson,ab8500-rtc", 96762579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 96862579266SRabin Vincent .resources = ab8500_rtc_resources, 96962579266SRabin Vincent }, 970f0f05b1cSArun Murthy { 9716af75ecdSLinus Walleij .name = "ab8500-acc-det", 972bad76991SLee Jones .of_compatible = "stericsson,ab8500-acc-det", 9736af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 9746af75ecdSLinus Walleij .resources = ab8500_av_acc_detect_resources, 9756af75ecdSLinus Walleij }, 9766af75ecdSLinus Walleij { 977e098adedSMattias Wallin .name = "ab8500-poweron-key", 978bad76991SLee Jones .of_compatible = "stericsson,ab8500-poweron-key", 979e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 980e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 981e098adedSMattias Wallin }, 982e098adedSMattias Wallin { 983f0f05b1cSArun Murthy .name = "ab8500-pwm", 984bad76991SLee Jones .of_compatible = "stericsson,ab8500-pwm", 985f0f05b1cSArun Murthy .id = 1, 986f0f05b1cSArun Murthy }, 987f0f05b1cSArun Murthy { 988f0f05b1cSArun Murthy .name = "ab8500-pwm", 989bad76991SLee Jones .of_compatible = "stericsson,ab8500-pwm", 990f0f05b1cSArun Murthy .id = 2, 991f0f05b1cSArun Murthy }, 992f0f05b1cSArun Murthy { 993f0f05b1cSArun Murthy .name = "ab8500-pwm", 994bad76991SLee Jones .of_compatible = "stericsson,ab8500-pwm", 995f0f05b1cSArun Murthy .id = 3, 996f0f05b1cSArun Murthy }, 997bad76991SLee Jones { 998bad76991SLee Jones .name = "ab8500-leds", 999bad76991SLee Jones .of_compatible = "stericsson,ab8500-leds", 1000bad76991SLee Jones }, 100177686517SSundar R Iyer { 1002e098adedSMattias Wallin .name = "ab8500-denc", 1003bad76991SLee Jones .of_compatible = "stericsson,ab8500-denc", 1004e098adedSMattias Wallin }, 1005e098adedSMattias Wallin { 1006e098adedSMattias Wallin .name = "ab8500-temp", 1007bad76991SLee Jones .of_compatible = "stericsson,ab8500-temp", 1008e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 1009e098adedSMattias Wallin .resources = ab8500_temp_resources, 101077686517SSundar R Iyer }, 101162579266SRabin Vincent }; 101262579266SRabin Vincent 10136ef9418cSRickard Andersson static struct mfd_cell __devinitdata ab8500_bm_devs[] = { 10146ef9418cSRickard Andersson { 10156ef9418cSRickard Andersson .name = "ab8500-charger", 10166ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_charger_resources), 10176ef9418cSRickard Andersson .resources = ab8500_charger_resources, 10186ef9418cSRickard Andersson }, 10196ef9418cSRickard Andersson { 10206ef9418cSRickard Andersson .name = "ab8500-btemp", 10216ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 10226ef9418cSRickard Andersson .resources = ab8500_btemp_resources, 10236ef9418cSRickard Andersson }, 10246ef9418cSRickard Andersson { 10256ef9418cSRickard Andersson .name = "ab8500-fg", 10266ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_fg_resources), 10276ef9418cSRickard Andersson .resources = ab8500_fg_resources, 10286ef9418cSRickard Andersson }, 10296ef9418cSRickard Andersson { 10306ef9418cSRickard Andersson .name = "ab8500-chargalg", 10316ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 10326ef9418cSRickard Andersson .resources = ab8500_chargalg_resources, 10336ef9418cSRickard Andersson }, 10346ef9418cSRickard Andersson }; 10356ef9418cSRickard Andersson 1036d6255529SLinus Walleij static struct mfd_cell __devinitdata ab8500_devs[] = { 1037d6255529SLinus Walleij { 1038d6255529SLinus Walleij .name = "ab8500-gpio", 1039bad76991SLee Jones .of_compatible = "stericsson,ab8500-gpio", 1040d6255529SLinus Walleij }, 1041d6255529SLinus Walleij { 1042d6255529SLinus Walleij .name = "ab8500-usb", 1043bad76991SLee Jones .of_compatible = "stericsson,ab8500-usb", 1044d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1045d6255529SLinus Walleij .resources = ab8500_usb_resources, 1046d6255529SLinus Walleij }, 104744f72e53SVirupax Sadashivpetimath { 104844f72e53SVirupax Sadashivpetimath .name = "ab8500-codec", 104981a21cddSLee Jones .of_compatible = "stericsson,ab8500-codec", 105044f72e53SVirupax Sadashivpetimath }, 1051d6255529SLinus Walleij }; 1052d6255529SLinus Walleij 1053d6255529SLinus Walleij static struct mfd_cell __devinitdata ab9540_devs[] = { 1054d6255529SLinus Walleij { 1055d6255529SLinus Walleij .name = "ab8500-gpio", 1056d6255529SLinus Walleij }, 1057d6255529SLinus Walleij { 1058d6255529SLinus Walleij .name = "ab9540-usb", 1059d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1060d6255529SLinus Walleij .resources = ab8500_usb_resources, 1061d6255529SLinus Walleij }, 106244f72e53SVirupax Sadashivpetimath { 106344f72e53SVirupax Sadashivpetimath .name = "ab9540-codec", 106444f72e53SVirupax Sadashivpetimath }, 106544f72e53SVirupax Sadashivpetimath }; 106644f72e53SVirupax Sadashivpetimath 106744f72e53SVirupax Sadashivpetimath /* Device list common to ab9540 and ab8505 */ 106844f72e53SVirupax Sadashivpetimath static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { 106944f72e53SVirupax Sadashivpetimath { 107044f72e53SVirupax Sadashivpetimath .name = "ab-iddet", 107144f72e53SVirupax Sadashivpetimath .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 107244f72e53SVirupax Sadashivpetimath .resources = ab8505_iddet_resources, 107344f72e53SVirupax Sadashivpetimath }, 1074d6255529SLinus Walleij }; 1075d6255529SLinus Walleij 1076cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 1077cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 1078cca69b67SMattias Wallin { 1079cca69b67SMattias Wallin struct ab8500 *ab8500; 1080cca69b67SMattias Wallin 1081cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 1082cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 1083cca69b67SMattias Wallin } 1084cca69b67SMattias Wallin 1085e5c238c3SMattias Wallin /* 1086e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1087e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1088e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1089e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1090e5c238c3SMattias Wallin * 0x08 Watchdog expired 1091e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1092e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1093e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1094e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1095e5c238c3SMattias Wallin */ 1096e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 1097e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 1098e5c238c3SMattias Wallin { 1099e5c238c3SMattias Wallin int ret; 1100e5c238c3SMattias Wallin u8 value; 1101e5c238c3SMattias Wallin struct ab8500 *ab8500; 1102e5c238c3SMattias Wallin 1103e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 1104e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1105e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1106e5c238c3SMattias Wallin if (ret < 0) 1107e5c238c3SMattias Wallin return ret; 1108e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 1109e5c238c3SMattias Wallin } 1110e5c238c3SMattias Wallin 1111b4a31037SAndrew Lynn /* 1112b4a31037SAndrew Lynn * ab8500 has turned on due to (TURN_ON_STATUS): 1113b4a31037SAndrew Lynn * 0x01 PORnVbat 1114b4a31037SAndrew Lynn * 0x02 PonKey1dbF 1115b4a31037SAndrew Lynn * 0x04 PonKey2dbF 1116b4a31037SAndrew Lynn * 0x08 RTCAlarm 1117b4a31037SAndrew Lynn * 0x10 MainChDet 1118b4a31037SAndrew Lynn * 0x20 VbusDet 1119b4a31037SAndrew Lynn * 0x40 UsbIDDetect 1120b4a31037SAndrew Lynn * 0x80 Reserved 1121b4a31037SAndrew Lynn */ 1122b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev, 1123b4a31037SAndrew Lynn struct device_attribute *attr, char *buf) 1124b4a31037SAndrew Lynn { 1125b4a31037SAndrew Lynn int ret; 1126b4a31037SAndrew Lynn u8 value; 1127b4a31037SAndrew Lynn struct ab8500 *ab8500; 1128b4a31037SAndrew Lynn 1129b4a31037SAndrew Lynn ab8500 = dev_get_drvdata(dev); 1130b4a31037SAndrew Lynn ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1131b4a31037SAndrew Lynn AB8500_TURN_ON_STATUS, &value); 1132b4a31037SAndrew Lynn if (ret < 0) 1133b4a31037SAndrew Lynn return ret; 1134b4a31037SAndrew Lynn return sprintf(buf, "%#x\n", value); 1135b4a31037SAndrew Lynn } 1136b4a31037SAndrew Lynn 1137d6255529SLinus Walleij static ssize_t show_ab9540_dbbrstn(struct device *dev, 1138d6255529SLinus Walleij struct device_attribute *attr, char *buf) 1139d6255529SLinus Walleij { 1140d6255529SLinus Walleij struct ab8500 *ab8500; 1141d6255529SLinus Walleij int ret; 1142d6255529SLinus Walleij u8 value; 1143d6255529SLinus Walleij 1144d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1145d6255529SLinus Walleij 1146d6255529SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1147d6255529SLinus Walleij AB9540_MODEM_CTRL2_REG, &value); 1148d6255529SLinus Walleij if (ret < 0) 1149d6255529SLinus Walleij return ret; 1150d6255529SLinus Walleij 1151d6255529SLinus Walleij return sprintf(buf, "%d\n", 1152d6255529SLinus Walleij (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1153d6255529SLinus Walleij } 1154d6255529SLinus Walleij 1155d6255529SLinus Walleij static ssize_t store_ab9540_dbbrstn(struct device *dev, 1156d6255529SLinus Walleij struct device_attribute *attr, const char *buf, size_t count) 1157d6255529SLinus Walleij { 1158d6255529SLinus Walleij struct ab8500 *ab8500; 1159d6255529SLinus Walleij int ret = count; 1160d6255529SLinus Walleij int err; 1161d6255529SLinus Walleij u8 bitvalues; 1162d6255529SLinus Walleij 1163d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1164d6255529SLinus Walleij 1165d6255529SLinus Walleij if (count > 0) { 1166d6255529SLinus Walleij switch (buf[0]) { 1167d6255529SLinus Walleij case '0': 1168d6255529SLinus Walleij bitvalues = 0; 1169d6255529SLinus Walleij break; 1170d6255529SLinus Walleij case '1': 1171d6255529SLinus Walleij bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1172d6255529SLinus Walleij break; 1173d6255529SLinus Walleij default: 1174d6255529SLinus Walleij goto exit; 1175d6255529SLinus Walleij } 1176d6255529SLinus Walleij 1177d6255529SLinus Walleij err = mask_and_set_register_interruptible(ab8500, 1178d6255529SLinus Walleij AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1179d6255529SLinus Walleij AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1180d6255529SLinus Walleij if (err) 1181d6255529SLinus Walleij dev_info(ab8500->dev, 1182d6255529SLinus Walleij "Failed to set DBBRSTN %c, err %#x\n", 1183d6255529SLinus Walleij buf[0], err); 1184d6255529SLinus Walleij } 1185d6255529SLinus Walleij 1186d6255529SLinus Walleij exit: 1187d6255529SLinus Walleij return ret; 1188d6255529SLinus Walleij } 1189d6255529SLinus Walleij 1190cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1191e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1192b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1193d6255529SLinus Walleij static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1194d6255529SLinus Walleij show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1195cca69b67SMattias Wallin 1196cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 1197cca69b67SMattias Wallin &dev_attr_chip_id.attr, 1198e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 1199b4a31037SAndrew Lynn &dev_attr_turn_on_status.attr, 1200cca69b67SMattias Wallin NULL, 1201cca69b67SMattias Wallin }; 1202cca69b67SMattias Wallin 1203d6255529SLinus Walleij static struct attribute *ab9540_sysfs_entries[] = { 1204d6255529SLinus Walleij &dev_attr_chip_id.attr, 1205d6255529SLinus Walleij &dev_attr_switch_off_status.attr, 1206d6255529SLinus Walleij &dev_attr_turn_on_status.attr, 1207d6255529SLinus Walleij &dev_attr_dbbrstn.attr, 1208d6255529SLinus Walleij NULL, 1209d6255529SLinus Walleij }; 1210d6255529SLinus Walleij 1211cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 1212cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 1213cca69b67SMattias Wallin }; 1214cca69b67SMattias Wallin 1215d6255529SLinus Walleij static struct attribute_group ab9540_attr_group = { 1216d6255529SLinus Walleij .attrs = ab9540_sysfs_entries, 1217d6255529SLinus Walleij }; 1218d6255529SLinus Walleij 1219d28f1db8SLee Jones static int __devinit ab8500_probe(struct platform_device *pdev) 122062579266SRabin Vincent { 1221b04c530cSJonas Aaberg static char *switch_off_status[] = { 1222b04c530cSJonas Aaberg "Swoff bit programming", 1223b04c530cSJonas Aaberg "Thermal protection activation", 1224b04c530cSJonas Aaberg "Vbat lower then BattOk falling threshold", 1225b04c530cSJonas Aaberg "Watchdog expired", 1226b04c530cSJonas Aaberg "Non presence of 32kHz clock", 1227b04c530cSJonas Aaberg "Battery level lower than power on reset threshold", 1228b04c530cSJonas Aaberg "Power on key 1 pressed longer than 10 seconds", 1229b04c530cSJonas Aaberg "DB8500 thermal shutdown"}; 1230d28f1db8SLee Jones struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); 1231d28f1db8SLee Jones const struct platform_device_id *platid = platform_get_device_id(pdev); 12326bc4a568SLee Jones enum ab8500_version version = AB8500_VERSION_UNDEFINED; 12336bc4a568SLee Jones struct device_node *np = pdev->dev.of_node; 1234d28f1db8SLee Jones struct ab8500 *ab8500; 1235d28f1db8SLee Jones struct resource *resource; 123662579266SRabin Vincent int ret; 123762579266SRabin Vincent int i; 123847c16975SMattias Wallin u8 value; 123962579266SRabin Vincent 12408c4203cbSLee Jones ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL); 1241d28f1db8SLee Jones if (!ab8500) 1242d28f1db8SLee Jones return -ENOMEM; 1243d28f1db8SLee Jones 124462579266SRabin Vincent if (plat) 124562579266SRabin Vincent ab8500->irq_base = plat->irq_base; 124662579266SRabin Vincent 1247d28f1db8SLee Jones ab8500->dev = &pdev->dev; 1248d28f1db8SLee Jones 1249d28f1db8SLee Jones resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 12508c4203cbSLee Jones if (!resource) 12518c4203cbSLee Jones return -ENODEV; 1252d28f1db8SLee Jones 1253d28f1db8SLee Jones ab8500->irq = resource->start; 1254d28f1db8SLee Jones 1255822672a7SLee Jones ab8500->read = ab8500_prcmu_read; 1256822672a7SLee Jones ab8500->write = ab8500_prcmu_write; 1257822672a7SLee Jones ab8500->write_masked = ab8500_prcmu_write_masked; 1258d28f1db8SLee Jones 125962579266SRabin Vincent mutex_init(&ab8500->lock); 126062579266SRabin Vincent mutex_init(&ab8500->irq_lock); 1261112a80d2SJonas Aaberg atomic_set(&ab8500->transfer_ongoing, 0); 126262579266SRabin Vincent 1263d28f1db8SLee Jones platform_set_drvdata(pdev, ab8500); 1264d28f1db8SLee Jones 12656bc4a568SLee Jones if (platid) 12666bc4a568SLee Jones version = platid->driver_data; 12676bc4a568SLee Jones 12680f620837SLinus Walleij if (version != AB8500_VERSION_UNDEFINED) 12690f620837SLinus Walleij ab8500->version = version; 12700f620837SLinus Walleij else { 12710f620837SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_MISC, 12720f620837SLinus Walleij AB8500_IC_NAME_REG, &value); 12730f620837SLinus Walleij if (ret < 0) 12748c4203cbSLee Jones return ret; 12750f620837SLinus Walleij 12760f620837SLinus Walleij ab8500->version = value; 12770f620837SLinus Walleij } 12780f620837SLinus Walleij 127947c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 128047c16975SMattias Wallin AB8500_REV_REG, &value); 128162579266SRabin Vincent if (ret < 0) 12828c4203cbSLee Jones return ret; 128362579266SRabin Vincent 128447c16975SMattias Wallin ab8500->chip_id = value; 128562579266SRabin Vincent 12860f620837SLinus Walleij dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 12870f620837SLinus Walleij ab8500_version_str[ab8500->version], 12880f620837SLinus Walleij ab8500->chip_id >> 4, 12890f620837SLinus Walleij ab8500->chip_id & 0x0F); 12900f620837SLinus Walleij 1291d6255529SLinus Walleij /* Configure AB8500 or AB9540 IRQ */ 1292a982362cSBengt Jonsson if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1293d6255529SLinus Walleij ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1294d6255529SLinus Walleij ab8500->irq_reg_offset = ab9540_irq_regoffset; 1295d6255529SLinus Walleij } else { 12962ced445eSLinus Walleij ab8500->mask_size = AB8500_NUM_IRQ_REGS; 12972ced445eSLinus Walleij ab8500->irq_reg_offset = ab8500_irq_regoffset; 1298d6255529SLinus Walleij } 12998c4203cbSLee Jones ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL); 13002ced445eSLinus Walleij if (!ab8500->mask) 13012ced445eSLinus Walleij return -ENOMEM; 13028c4203cbSLee Jones ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL); 13038c4203cbSLee Jones if (!ab8500->oldmask) 13048c4203cbSLee Jones return -ENOMEM; 13058c4203cbSLee Jones 1306e5c238c3SMattias Wallin /* 1307e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1308e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1309e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1310e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1311e5c238c3SMattias Wallin * 0x08 Watchdog expired 1312e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1313e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1314e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1315e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1316e5c238c3SMattias Wallin */ 1317e5c238c3SMattias Wallin 1318e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1319e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1320e5c238c3SMattias Wallin if (ret < 0) 1321e5c238c3SMattias Wallin return ret; 1322b04c530cSJonas Aaberg dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1323b04c530cSJonas Aaberg 1324b04c530cSJonas Aaberg if (value) { 1325b04c530cSJonas Aaberg for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1326b04c530cSJonas Aaberg if (value & 1) 1327b04c530cSJonas Aaberg printk(KERN_CONT " \"%s\"", 1328b04c530cSJonas Aaberg switch_off_status[i]); 1329b04c530cSJonas Aaberg value = value >> 1; 1330b04c530cSJonas Aaberg 1331b04c530cSJonas Aaberg } 1332b04c530cSJonas Aaberg printk(KERN_CONT "\n"); 1333b04c530cSJonas Aaberg } else { 1334b04c530cSJonas Aaberg printk(KERN_CONT " None\n"); 1335b04c530cSJonas Aaberg } 1336e5c238c3SMattias Wallin 133762579266SRabin Vincent if (plat && plat->init) 133862579266SRabin Vincent plat->init(ab8500); 133962579266SRabin Vincent 134062579266SRabin Vincent /* Clear and mask all interrupts */ 13412ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 13420f620837SLinus Walleij /* 13430f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 13440f620837SLinus Walleij * 2.0 13450f620837SLinus Walleij */ 13460f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 13470f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 134892d50a41SMattias Wallin continue; 134962579266SRabin Vincent 135047c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 13512ced445eSLinus Walleij AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 135292d50a41SMattias Wallin &value); 135347c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 13542ced445eSLinus Walleij AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 135562579266SRabin Vincent } 135662579266SRabin Vincent 135747c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 135847c16975SMattias Wallin if (ret) 13598c4203cbSLee Jones return ret; 136047c16975SMattias Wallin 13612ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) 136262579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 136362579266SRabin Vincent 136406e589efSLee Jones ret = ab8500_irq_init(ab8500, np); 136562579266SRabin Vincent if (ret) 13668c4203cbSLee Jones return ret; 136762579266SRabin Vincent 13687ccfe9b1SMichel JAOUEN /* Activate this feature only in ab9540 */ 13697ccfe9b1SMichel JAOUEN /* till tests are done on ab8500 1p2 or later*/ 137006e589efSLee Jones if (is_ab9540(ab8500)) { 13718c4203cbSLee Jones ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 13727ccfe9b1SMichel JAOUEN ab8500_hierarchical_irq, 13737ccfe9b1SMichel JAOUEN IRQF_ONESHOT | IRQF_NO_SUSPEND, 13747ccfe9b1SMichel JAOUEN "ab8500", ab8500); 137506e589efSLee Jones } 137606e589efSLee Jones else { 13778c4203cbSLee Jones ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 13787ccfe9b1SMichel JAOUEN ab8500_irq, 13794f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 13804f079985SMattias Wallin "ab8500", ab8500); 138162579266SRabin Vincent if (ret) 13828c4203cbSLee Jones return ret; 138362579266SRabin Vincent } 138462579266SRabin Vincent 1385d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, 1386d6255529SLinus Walleij ARRAY_SIZE(abx500_common_devs), NULL, 138755692af5SMark Brown ab8500->irq_base, ab8500->domain); 1388d6255529SLinus Walleij if (ret) 13898c4203cbSLee Jones return ret; 1390d6255529SLinus Walleij 1391d6255529SLinus Walleij if (is_ab9540(ab8500)) 1392d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1393d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 139455692af5SMark Brown ab8500->irq_base, ab8500->domain); 1395d6255529SLinus Walleij else 1396549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 139744f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab8500_devs), NULL, 139855692af5SMark Brown ab8500->irq_base, ab8500->domain); 13996bc4a568SLee Jones if (ret) 14008c4203cbSLee Jones return ret; 140144f72e53SVirupax Sadashivpetimath 140244f72e53SVirupax Sadashivpetimath if (is_ab9540(ab8500) || is_ab8505(ab8500)) 140344f72e53SVirupax Sadashivpetimath ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, 140444f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab9540_ab8505_devs), NULL, 140555692af5SMark Brown ab8500->irq_base, ab8500->domain); 140662579266SRabin Vincent if (ret) 14078c4203cbSLee Jones return ret; 140862579266SRabin Vincent 14096ef9418cSRickard Andersson if (!no_bm) { 14106ef9418cSRickard Andersson /* Add battery management devices */ 14116ef9418cSRickard Andersson ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 14126ef9418cSRickard Andersson ARRAY_SIZE(ab8500_bm_devs), NULL, 141355692af5SMark Brown ab8500->irq_base, ab8500->domain); 14146ef9418cSRickard Andersson if (ret) 14156ef9418cSRickard Andersson dev_err(ab8500->dev, "error adding bm devices\n"); 14166ef9418cSRickard Andersson } 14176ef9418cSRickard Andersson 1418d6255529SLinus Walleij if (is_ab9540(ab8500)) 1419d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1420d6255529SLinus Walleij &ab9540_attr_group); 1421d6255529SLinus Walleij else 1422d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1423d6255529SLinus Walleij &ab8500_attr_group); 1424cca69b67SMattias Wallin if (ret) 1425cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 142606e589efSLee Jones 142762579266SRabin Vincent return ret; 142862579266SRabin Vincent } 142962579266SRabin Vincent 1430d28f1db8SLee Jones static int __devexit ab8500_remove(struct platform_device *pdev) 143162579266SRabin Vincent { 1432d28f1db8SLee Jones struct ab8500 *ab8500 = platform_get_drvdata(pdev); 1433d28f1db8SLee Jones 1434d6255529SLinus Walleij if (is_ab9540(ab8500)) 1435d6255529SLinus Walleij sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1436d6255529SLinus Walleij else 1437cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 143806e589efSLee Jones 143962579266SRabin Vincent mfd_remove_devices(ab8500->dev); 144062579266SRabin Vincent free_irq(ab8500->irq, ab8500); 144106e589efSLee Jones 14422ced445eSLinus Walleij kfree(ab8500->oldmask); 14432ced445eSLinus Walleij kfree(ab8500->mask); 1444d28f1db8SLee Jones kfree(ab8500); 144562579266SRabin Vincent 144662579266SRabin Vincent return 0; 144762579266SRabin Vincent } 144862579266SRabin Vincent 1449d28f1db8SLee Jones static const struct platform_device_id ab8500_id[] = { 1450d28f1db8SLee Jones { "ab8500-core", AB8500_VERSION_AB8500 }, 1451d28f1db8SLee Jones { "ab8505-i2c", AB8500_VERSION_AB8505 }, 1452d28f1db8SLee Jones { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1453d28f1db8SLee Jones { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1454d28f1db8SLee Jones { } 1455d28f1db8SLee Jones }; 1456d28f1db8SLee Jones 1457d28f1db8SLee Jones static struct platform_driver ab8500_core_driver = { 1458d28f1db8SLee Jones .driver = { 1459d28f1db8SLee Jones .name = "ab8500-core", 1460d28f1db8SLee Jones .owner = THIS_MODULE, 1461d28f1db8SLee Jones }, 1462d28f1db8SLee Jones .probe = ab8500_probe, 1463d28f1db8SLee Jones .remove = __devexit_p(ab8500_remove), 1464d28f1db8SLee Jones .id_table = ab8500_id, 1465d28f1db8SLee Jones }; 1466d28f1db8SLee Jones 1467d28f1db8SLee Jones static int __init ab8500_core_init(void) 1468d28f1db8SLee Jones { 1469d28f1db8SLee Jones return platform_driver_register(&ab8500_core_driver); 1470d28f1db8SLee Jones } 1471d28f1db8SLee Jones 1472d28f1db8SLee Jones static void __exit ab8500_core_exit(void) 1473d28f1db8SLee Jones { 1474d28f1db8SLee Jones platform_driver_unregister(&ab8500_core_driver); 1475d28f1db8SLee Jones } 1476ba7cbc3eSLee Jones core_initcall(ab8500_core_init); 1477d28f1db8SLee Jones module_exit(ab8500_core_exit); 1478d28f1db8SLee Jones 1479adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 148062579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 148162579266SRabin Vincent MODULE_LICENSE("GPL v2"); 1482