xref: /openbmc/linux/drivers/mfd/ab8500-core.c (revision 6af75ecd)
162579266SRabin Vincent /*
262579266SRabin Vincent  * Copyright (C) ST-Ericsson SA 2010
362579266SRabin Vincent  *
462579266SRabin Vincent  * License Terms: GNU General Public License v2
562579266SRabin Vincent  * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
662579266SRabin Vincent  * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7adceed62SMattias Wallin  * Author: Mattias Wallin <mattias.wallin@stericsson.com>
862579266SRabin Vincent  */
962579266SRabin Vincent 
1062579266SRabin Vincent #include <linux/kernel.h>
1162579266SRabin Vincent #include <linux/slab.h>
1262579266SRabin Vincent #include <linux/init.h>
1362579266SRabin Vincent #include <linux/irq.h>
1462579266SRabin Vincent #include <linux/delay.h>
1562579266SRabin Vincent #include <linux/interrupt.h>
1662579266SRabin Vincent #include <linux/module.h>
1762579266SRabin Vincent #include <linux/platform_device.h>
1862579266SRabin Vincent #include <linux/mfd/core.h>
1947c16975SMattias Wallin #include <linux/mfd/abx500.h>
2062579266SRabin Vincent #include <linux/mfd/ab8500.h>
21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h>
2262579266SRabin Vincent 
2362579266SRabin Vincent /*
2462579266SRabin Vincent  * Interrupt register offsets
2562579266SRabin Vincent  * Bank : 0x0E
2662579266SRabin Vincent  */
2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG		0x00
2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG		0x01
2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG		0x02
3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG		0x03
3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG		0x04
3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG		0x05
3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG		0x06
3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG		0x07
3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG		0x12
3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG		0x13
3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG		0x14
3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG		0x15
3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG		0x16
4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG		0x17
4162579266SRabin Vincent 
4262579266SRabin Vincent /*
4362579266SRabin Vincent  * latch registers
4462579266SRabin Vincent  */
4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG		0x20
4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG		0x21
4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG		0x22
4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG		0x23
4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG		0x24
5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG		0x25
5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG		0x26
5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG		0x27
5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG		0x28
5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG		0x29
5592d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG		0x2B
5647c16975SMattias Wallin #define AB8500_IT_LATCH19_REG		0x32
5747c16975SMattias Wallin #define AB8500_IT_LATCH20_REG		0x33
5847c16975SMattias Wallin #define AB8500_IT_LATCH21_REG		0x34
5947c16975SMattias Wallin #define AB8500_IT_LATCH22_REG		0x35
6047c16975SMattias Wallin #define AB8500_IT_LATCH23_REG		0x36
6147c16975SMattias Wallin #define AB8500_IT_LATCH24_REG		0x37
6262579266SRabin Vincent 
6362579266SRabin Vincent /*
6462579266SRabin Vincent  * mask registers
6562579266SRabin Vincent  */
6662579266SRabin Vincent 
6747c16975SMattias Wallin #define AB8500_IT_MASK1_REG		0x40
6847c16975SMattias Wallin #define AB8500_IT_MASK2_REG		0x41
6947c16975SMattias Wallin #define AB8500_IT_MASK3_REG		0x42
7047c16975SMattias Wallin #define AB8500_IT_MASK4_REG		0x43
7147c16975SMattias Wallin #define AB8500_IT_MASK5_REG		0x44
7247c16975SMattias Wallin #define AB8500_IT_MASK6_REG		0x45
7347c16975SMattias Wallin #define AB8500_IT_MASK7_REG		0x46
7447c16975SMattias Wallin #define AB8500_IT_MASK8_REG		0x47
7547c16975SMattias Wallin #define AB8500_IT_MASK9_REG		0x48
7647c16975SMattias Wallin #define AB8500_IT_MASK10_REG		0x49
7747c16975SMattias Wallin #define AB8500_IT_MASK11_REG		0x4A
7847c16975SMattias Wallin #define AB8500_IT_MASK12_REG		0x4B
7947c16975SMattias Wallin #define AB8500_IT_MASK13_REG		0x4C
8047c16975SMattias Wallin #define AB8500_IT_MASK14_REG		0x4D
8147c16975SMattias Wallin #define AB8500_IT_MASK15_REG		0x4E
8247c16975SMattias Wallin #define AB8500_IT_MASK16_REG		0x4F
8347c16975SMattias Wallin #define AB8500_IT_MASK17_REG		0x50
8447c16975SMattias Wallin #define AB8500_IT_MASK18_REG		0x51
8547c16975SMattias Wallin #define AB8500_IT_MASK19_REG		0x52
8647c16975SMattias Wallin #define AB8500_IT_MASK20_REG		0x53
8747c16975SMattias Wallin #define AB8500_IT_MASK21_REG		0x54
8847c16975SMattias Wallin #define AB8500_IT_MASK22_REG		0x55
8947c16975SMattias Wallin #define AB8500_IT_MASK23_REG		0x56
9047c16975SMattias Wallin #define AB8500_IT_MASK24_REG		0x57
9162579266SRabin Vincent 
9247c16975SMattias Wallin #define AB8500_REV_REG			0x80
93e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS	0x00
9462579266SRabin Vincent 
9562579266SRabin Vincent /*
9662579266SRabin Vincent  * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
9762579266SRabin Vincent  * numbers are indexed into this array with (num / 8).
9862579266SRabin Vincent  *
9962579266SRabin Vincent  * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
10062579266SRabin Vincent  * offset 0.
10162579266SRabin Vincent  */
10262579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
10392d50a41SMattias Wallin 	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
10462579266SRabin Vincent };
10562579266SRabin Vincent 
10647c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev)
10747c16975SMattias Wallin {
1086bce7bf1SMattias Wallin 	struct ab8500 *ab8500;
1096bce7bf1SMattias Wallin 
1106bce7bf1SMattias Wallin 	if (!dev)
1116bce7bf1SMattias Wallin 		return -EINVAL;
1126bce7bf1SMattias Wallin 	ab8500 = dev_get_drvdata(dev->parent);
1136bce7bf1SMattias Wallin 	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
11447c16975SMattias Wallin }
11547c16975SMattias Wallin 
11647c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
11747c16975SMattias Wallin 	u8 reg, u8 data)
11862579266SRabin Vincent {
11962579266SRabin Vincent 	int ret;
12047c16975SMattias Wallin 	/*
12147c16975SMattias Wallin 	 * Put the u8 bank and u8 register together into a an u16.
12247c16975SMattias Wallin 	 * The bank on higher 8 bits and register in lower 8 bits.
12347c16975SMattias Wallin 	 * */
12447c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
12562579266SRabin Vincent 
12662579266SRabin Vincent 	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
12762579266SRabin Vincent 
12847c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
12947c16975SMattias Wallin 	if (ret)
13047c16975SMattias Wallin 		return ret;
13147c16975SMattias Wallin 
13247c16975SMattias Wallin 	ret = ab8500->write(ab8500, addr, data);
13347c16975SMattias Wallin 	if (ret < 0)
13447c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
13547c16975SMattias Wallin 			addr, ret);
13647c16975SMattias Wallin 	mutex_unlock(&ab8500->lock);
13747c16975SMattias Wallin 
13847c16975SMattias Wallin 	return ret;
13947c16975SMattias Wallin }
14047c16975SMattias Wallin 
14147c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank,
14247c16975SMattias Wallin 	u8 reg, u8 value)
14347c16975SMattias Wallin {
14447c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
14547c16975SMattias Wallin 
14647c16975SMattias Wallin 	return set_register_interruptible(ab8500, bank, reg, value);
14747c16975SMattias Wallin }
14847c16975SMattias Wallin 
14947c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
15047c16975SMattias Wallin 	u8 reg, u8 *value)
15147c16975SMattias Wallin {
15247c16975SMattias Wallin 	int ret;
15347c16975SMattias Wallin 	/* put the u8 bank and u8 reg together into a an u16.
15447c16975SMattias Wallin 	 * bank on higher 8 bits and reg in lower */
15547c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
15647c16975SMattias Wallin 
15747c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
15847c16975SMattias Wallin 	if (ret)
15947c16975SMattias Wallin 		return ret;
16047c16975SMattias Wallin 
16147c16975SMattias Wallin 	ret = ab8500->read(ab8500, addr);
16247c16975SMattias Wallin 	if (ret < 0)
16347c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
16447c16975SMattias Wallin 			addr, ret);
16547c16975SMattias Wallin 	else
16647c16975SMattias Wallin 		*value = ret;
16747c16975SMattias Wallin 
16847c16975SMattias Wallin 	mutex_unlock(&ab8500->lock);
16947c16975SMattias Wallin 	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
17047c16975SMattias Wallin 
17147c16975SMattias Wallin 	return ret;
17247c16975SMattias Wallin }
17347c16975SMattias Wallin 
17447c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank,
17547c16975SMattias Wallin 	u8 reg, u8 *value)
17647c16975SMattias Wallin {
17747c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
17847c16975SMattias Wallin 
17947c16975SMattias Wallin 	return get_register_interruptible(ab8500, bank, reg, value);
18047c16975SMattias Wallin }
18147c16975SMattias Wallin 
18247c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
18347c16975SMattias Wallin 	u8 reg, u8 bitmask, u8 bitvalues)
18447c16975SMattias Wallin {
18547c16975SMattias Wallin 	int ret;
18647c16975SMattias Wallin 	u8 data;
18747c16975SMattias Wallin 	/* put the u8 bank and u8 reg together into a an u16.
18847c16975SMattias Wallin 	 * bank on higher 8 bits and reg in lower */
18947c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
19047c16975SMattias Wallin 
19147c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
19247c16975SMattias Wallin 	if (ret)
19347c16975SMattias Wallin 		return ret;
19447c16975SMattias Wallin 
19547c16975SMattias Wallin 	ret = ab8500->read(ab8500, addr);
19647c16975SMattias Wallin 	if (ret < 0) {
19747c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
19847c16975SMattias Wallin 			addr, ret);
19947c16975SMattias Wallin 		goto out;
20047c16975SMattias Wallin 	}
20147c16975SMattias Wallin 
20247c16975SMattias Wallin 	data = (u8)ret;
20347c16975SMattias Wallin 	data = (~bitmask & data) | (bitmask & bitvalues);
20447c16975SMattias Wallin 
20562579266SRabin Vincent 	ret = ab8500->write(ab8500, addr, data);
20662579266SRabin Vincent 	if (ret < 0)
20762579266SRabin Vincent 		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
20862579266SRabin Vincent 			addr, ret);
20962579266SRabin Vincent 
21047c16975SMattias Wallin 	dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
21162579266SRabin Vincent out:
21262579266SRabin Vincent 	mutex_unlock(&ab8500->lock);
21362579266SRabin Vincent 	return ret;
21462579266SRabin Vincent }
21547c16975SMattias Wallin 
21647c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev,
21747c16975SMattias Wallin 	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
21847c16975SMattias Wallin {
21947c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
22047c16975SMattias Wallin 
22147c16975SMattias Wallin 	return mask_and_set_register_interruptible(ab8500, bank, reg,
22247c16975SMattias Wallin 		bitmask, bitvalues);
22347c16975SMattias Wallin 
22447c16975SMattias Wallin }
22547c16975SMattias Wallin 
22647c16975SMattias Wallin static struct abx500_ops ab8500_ops = {
22747c16975SMattias Wallin 	.get_chip_id = ab8500_get_chip_id,
22847c16975SMattias Wallin 	.get_register = ab8500_get_register,
22947c16975SMattias Wallin 	.set_register = ab8500_set_register,
23047c16975SMattias Wallin 	.get_register_page = NULL,
23147c16975SMattias Wallin 	.set_register_page = NULL,
23247c16975SMattias Wallin 	.mask_and_set_register = ab8500_mask_and_set_register,
23347c16975SMattias Wallin 	.event_registers_startup_state_get = NULL,
23447c16975SMattias Wallin 	.startup_irq_enabled = NULL,
23547c16975SMattias Wallin };
23662579266SRabin Vincent 
2379505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data)
23862579266SRabin Vincent {
2399505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
24062579266SRabin Vincent 
24162579266SRabin Vincent 	mutex_lock(&ab8500->irq_lock);
24262579266SRabin Vincent }
24362579266SRabin Vincent 
2449505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data)
24562579266SRabin Vincent {
2469505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
24762579266SRabin Vincent 	int i;
24862579266SRabin Vincent 
24962579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
25062579266SRabin Vincent 		u8 old = ab8500->oldmask[i];
25162579266SRabin Vincent 		u8 new = ab8500->mask[i];
25262579266SRabin Vincent 		int reg;
25362579266SRabin Vincent 
25462579266SRabin Vincent 		if (new == old)
25562579266SRabin Vincent 			continue;
25662579266SRabin Vincent 
257863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
258863dde5bSLinus Walleij 		if (ab8500_irq_regoffset[i] == 11 &&
259863dde5bSLinus Walleij 			ab8500->chip_id < AB8500_CUT2P0)
26092d50a41SMattias Wallin 			continue;
26192d50a41SMattias Wallin 
26262579266SRabin Vincent 		ab8500->oldmask[i] = new;
26362579266SRabin Vincent 
26462579266SRabin Vincent 		reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
26547c16975SMattias Wallin 		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
26662579266SRabin Vincent 	}
26762579266SRabin Vincent 
26862579266SRabin Vincent 	mutex_unlock(&ab8500->irq_lock);
26962579266SRabin Vincent }
27062579266SRabin Vincent 
2719505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data)
27262579266SRabin Vincent {
2739505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
2749505a0a0SMark Brown 	int offset = data->irq - ab8500->irq_base;
27562579266SRabin Vincent 	int index = offset / 8;
27662579266SRabin Vincent 	int mask = 1 << (offset % 8);
27762579266SRabin Vincent 
27862579266SRabin Vincent 	ab8500->mask[index] |= mask;
27962579266SRabin Vincent }
28062579266SRabin Vincent 
2819505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data)
28262579266SRabin Vincent {
2839505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
2849505a0a0SMark Brown 	int offset = data->irq - ab8500->irq_base;
28562579266SRabin Vincent 	int index = offset / 8;
28662579266SRabin Vincent 	int mask = 1 << (offset % 8);
28762579266SRabin Vincent 
28862579266SRabin Vincent 	ab8500->mask[index] &= ~mask;
28962579266SRabin Vincent }
29062579266SRabin Vincent 
29162579266SRabin Vincent static struct irq_chip ab8500_irq_chip = {
29262579266SRabin Vincent 	.name			= "ab8500",
2939505a0a0SMark Brown 	.irq_bus_lock		= ab8500_irq_lock,
2949505a0a0SMark Brown 	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
2959505a0a0SMark Brown 	.irq_mask		= ab8500_irq_mask,
2969505a0a0SMark Brown 	.irq_unmask		= ab8500_irq_unmask,
29762579266SRabin Vincent };
29862579266SRabin Vincent 
29962579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev)
30062579266SRabin Vincent {
30162579266SRabin Vincent 	struct ab8500 *ab8500 = dev;
30262579266SRabin Vincent 	int i;
30362579266SRabin Vincent 
30462579266SRabin Vincent 	dev_vdbg(ab8500->dev, "interrupt\n");
30562579266SRabin Vincent 
30662579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
30762579266SRabin Vincent 		int regoffset = ab8500_irq_regoffset[i];
30862579266SRabin Vincent 		int status;
30947c16975SMattias Wallin 		u8 value;
31062579266SRabin Vincent 
311863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
312863dde5bSLinus Walleij 		if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0)
31392d50a41SMattias Wallin 			continue;
31492d50a41SMattias Wallin 
31547c16975SMattias Wallin 		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
31647c16975SMattias Wallin 			AB8500_IT_LATCH1_REG + regoffset, &value);
31747c16975SMattias Wallin 		if (status < 0 || value == 0)
31862579266SRabin Vincent 			continue;
31962579266SRabin Vincent 
32062579266SRabin Vincent 		do {
32188aec4f7SMattias Wallin 			int bit = __ffs(value);
32262579266SRabin Vincent 			int line = i * 8 + bit;
32362579266SRabin Vincent 
32462579266SRabin Vincent 			handle_nested_irq(ab8500->irq_base + line);
32547c16975SMattias Wallin 			value &= ~(1 << bit);
32647c16975SMattias Wallin 		} while (value);
32762579266SRabin Vincent 	}
32862579266SRabin Vincent 
32962579266SRabin Vincent 	return IRQ_HANDLED;
33062579266SRabin Vincent }
33162579266SRabin Vincent 
33262579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500)
33362579266SRabin Vincent {
33462579266SRabin Vincent 	int base = ab8500->irq_base;
33562579266SRabin Vincent 	int irq;
33662579266SRabin Vincent 
33762579266SRabin Vincent 	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
338d5bb1221SThomas Gleixner 		irq_set_chip_data(irq, ab8500);
339d5bb1221SThomas Gleixner 		irq_set_chip_and_handler(irq, &ab8500_irq_chip,
34062579266SRabin Vincent 					 handle_simple_irq);
341d5bb1221SThomas Gleixner 		irq_set_nested_thread(irq, 1);
34262579266SRabin Vincent #ifdef CONFIG_ARM
34362579266SRabin Vincent 		set_irq_flags(irq, IRQF_VALID);
34462579266SRabin Vincent #else
345d5bb1221SThomas Gleixner 		irq_set_noprobe(irq);
34662579266SRabin Vincent #endif
34762579266SRabin Vincent 	}
34862579266SRabin Vincent 
34962579266SRabin Vincent 	return 0;
35062579266SRabin Vincent }
35162579266SRabin Vincent 
35262579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500)
35362579266SRabin Vincent {
35462579266SRabin Vincent 	int base = ab8500->irq_base;
35562579266SRabin Vincent 	int irq;
35662579266SRabin Vincent 
35762579266SRabin Vincent 	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
35862579266SRabin Vincent #ifdef CONFIG_ARM
35962579266SRabin Vincent 		set_irq_flags(irq, 0);
36062579266SRabin Vincent #endif
361d5bb1221SThomas Gleixner 		irq_set_chip_and_handler(irq, NULL, NULL);
362d5bb1221SThomas Gleixner 		irq_set_chip_data(irq, NULL);
36362579266SRabin Vincent 	}
36462579266SRabin Vincent }
36562579266SRabin Vincent 
3665cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = {
3670cb3fcd7SBibek Basu 	{
3680cb3fcd7SBibek Basu 		.name	= "GPIO_INT6",
3690cb3fcd7SBibek Basu 		.start	= AB8500_INT_GPIO6R,
3700cb3fcd7SBibek Basu 		.end	= AB8500_INT_GPIO41F,
3710cb3fcd7SBibek Basu 		.flags	= IORESOURCE_IRQ,
3720cb3fcd7SBibek Basu 	}
3730cb3fcd7SBibek Basu };
3740cb3fcd7SBibek Basu 
3755cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = {
37662579266SRabin Vincent 	{
37762579266SRabin Vincent 		.name	= "HW_CONV_END",
37862579266SRabin Vincent 		.start	= AB8500_INT_GP_HW_ADC_CONV_END,
37962579266SRabin Vincent 		.end	= AB8500_INT_GP_HW_ADC_CONV_END,
38062579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
38162579266SRabin Vincent 	},
38262579266SRabin Vincent 	{
38362579266SRabin Vincent 		.name	= "SW_CONV_END",
38462579266SRabin Vincent 		.start	= AB8500_INT_GP_SW_ADC_CONV_END,
38562579266SRabin Vincent 		.end	= AB8500_INT_GP_SW_ADC_CONV_END,
38662579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
38762579266SRabin Vincent 	},
38862579266SRabin Vincent };
38962579266SRabin Vincent 
3905cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = {
39162579266SRabin Vincent 	{
39262579266SRabin Vincent 		.name	= "60S",
39362579266SRabin Vincent 		.start	= AB8500_INT_RTC_60S,
39462579266SRabin Vincent 		.end	= AB8500_INT_RTC_60S,
39562579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
39662579266SRabin Vincent 	},
39762579266SRabin Vincent 	{
39862579266SRabin Vincent 		.name	= "ALARM",
39962579266SRabin Vincent 		.start	= AB8500_INT_RTC_ALARM,
40062579266SRabin Vincent 		.end	= AB8500_INT_RTC_ALARM,
40162579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
40262579266SRabin Vincent 	},
40362579266SRabin Vincent };
40462579266SRabin Vincent 
4055cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
40677686517SSundar R Iyer 	{
40777686517SSundar R Iyer 		.name	= "ONKEY_DBF",
40877686517SSundar R Iyer 		.start	= AB8500_INT_PON_KEY1DB_F,
40977686517SSundar R Iyer 		.end	= AB8500_INT_PON_KEY1DB_F,
41077686517SSundar R Iyer 		.flags	= IORESOURCE_IRQ,
41177686517SSundar R Iyer 	},
41277686517SSundar R Iyer 	{
41377686517SSundar R Iyer 		.name	= "ONKEY_DBR",
41477686517SSundar R Iyer 		.start	= AB8500_INT_PON_KEY1DB_R,
41577686517SSundar R Iyer 		.end	= AB8500_INT_PON_KEY1DB_R,
41677686517SSundar R Iyer 		.flags	= IORESOURCE_IRQ,
41777686517SSundar R Iyer 	},
41877686517SSundar R Iyer };
41977686517SSundar R Iyer 
4206af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
421e098adedSMattias Wallin 	{
4226af75ecdSLinus Walleij 	       .name = "ACC_DETECT_1DB_F",
4236af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_1DB_F,
4246af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_1DB_F,
425e098adedSMattias Wallin 	       .flags = IORESOURCE_IRQ,
426e098adedSMattias Wallin 	},
427e098adedSMattias Wallin 	{
4286af75ecdSLinus Walleij 	       .name = "ACC_DETECT_1DB_R",
4296af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_1DB_R,
4306af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_1DB_R,
431e098adedSMattias Wallin 	       .flags = IORESOURCE_IRQ,
432e098adedSMattias Wallin 	},
433e098adedSMattias Wallin 	{
4346af75ecdSLinus Walleij 	       .name = "ACC_DETECT_21DB_F",
4356af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_21DB_F,
4366af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_21DB_F,
4376af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4386af75ecdSLinus Walleij 	},
4396af75ecdSLinus Walleij 	{
4406af75ecdSLinus Walleij 	       .name = "ACC_DETECT_21DB_R",
4416af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_21DB_R,
4426af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_21DB_R,
4436af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4446af75ecdSLinus Walleij 	},
4456af75ecdSLinus Walleij 	{
4466af75ecdSLinus Walleij 	       .name = "ACC_DETECT_22DB_F",
4476af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_22DB_F,
4486af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_22DB_F,
4496af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4506af75ecdSLinus Walleij 	},
4516af75ecdSLinus Walleij 	{
4526af75ecdSLinus Walleij 	       .name = "ACC_DETECT_22DB_R",
4536af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_22DB_R,
4546af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_22DB_R,
4556af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4566af75ecdSLinus Walleij 	},
4576af75ecdSLinus Walleij };
4586af75ecdSLinus Walleij 
4596af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = {
4606af75ecdSLinus Walleij 	{
461e098adedSMattias Wallin 		.name = "MAIN_CH_UNPLUG_DET",
462e098adedSMattias Wallin 		.start = AB8500_INT_MAIN_CH_UNPLUG_DET,
463e098adedSMattias Wallin 		.end = AB8500_INT_MAIN_CH_UNPLUG_DET,
464e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
465e098adedSMattias Wallin 	},
466e098adedSMattias Wallin 	{
467e098adedSMattias Wallin 		.name = "MAIN_CHARGE_PLUG_DET",
468e098adedSMattias Wallin 		.start = AB8500_INT_MAIN_CH_PLUG_DET,
469e098adedSMattias Wallin 		.end = AB8500_INT_MAIN_CH_PLUG_DET,
470e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
471e098adedSMattias Wallin 	},
472e098adedSMattias Wallin 	{
473e098adedSMattias Wallin 		.name = "VBUS_DET_R",
474e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_R,
475e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_R,
476e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
477e098adedSMattias Wallin 	},
478e098adedSMattias Wallin 	{
4796af75ecdSLinus Walleij 		.name = "VBUS_DET_F",
4806af75ecdSLinus Walleij 		.start = AB8500_INT_VBUS_DET_F,
4816af75ecdSLinus Walleij 		.end = AB8500_INT_VBUS_DET_F,
482e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
483e098adedSMattias Wallin 	},
484e098adedSMattias Wallin 	{
4856af75ecdSLinus Walleij 		.name = "USB_LINK_STATUS",
4866af75ecdSLinus Walleij 		.start = AB8500_INT_USB_LINK_STATUS,
4876af75ecdSLinus Walleij 		.end = AB8500_INT_USB_LINK_STATUS,
4886af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
4896af75ecdSLinus Walleij 	},
4906af75ecdSLinus Walleij 	{
4916af75ecdSLinus Walleij 		.name = "USB_CHARGE_DET_DONE",
4926af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHG_DET_DONE,
4936af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHG_DET_DONE,
494e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
495e098adedSMattias Wallin 	},
496e098adedSMattias Wallin 	{
497e098adedSMattias Wallin 		.name = "VBUS_OVV",
498e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_OVV,
499e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_OVV,
500e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
501e098adedSMattias Wallin 	},
502e098adedSMattias Wallin 	{
5036af75ecdSLinus Walleij 		.name = "USB_CH_TH_PROT_R",
5046af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CH_TH_PROT_R,
5056af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CH_TH_PROT_R,
506e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
507e098adedSMattias Wallin 	},
508e098adedSMattias Wallin 	{
5096af75ecdSLinus Walleij 		.name = "USB_CH_TH_PROT_F",
5106af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CH_TH_PROT_F,
5116af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CH_TH_PROT_F,
512e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
513e098adedSMattias Wallin 	},
514e098adedSMattias Wallin 	{
5156af75ecdSLinus Walleij 		.name = "MAIN_EXT_CH_NOT_OK",
5166af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
5176af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
5186af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5196af75ecdSLinus Walleij 	},
5206af75ecdSLinus Walleij 	{
5216af75ecdSLinus Walleij 		.name = "MAIN_CH_TH_PROT_R",
5226af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_CH_TH_PROT_R,
5236af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_CH_TH_PROT_R,
5246af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5256af75ecdSLinus Walleij 	},
5266af75ecdSLinus Walleij 	{
5276af75ecdSLinus Walleij 		.name = "MAIN_CH_TH_PROT_F",
5286af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_CH_TH_PROT_F,
5296af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_CH_TH_PROT_F,
5306af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5316af75ecdSLinus Walleij 	},
5326af75ecdSLinus Walleij 	{
5336af75ecdSLinus Walleij 		.name = "USB_CHARGER_NOT_OKR",
5346af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHARGER_NOT_OK,
5356af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHARGER_NOT_OK,
5366af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5376af75ecdSLinus Walleij 	},
5386af75ecdSLinus Walleij 	{
5396af75ecdSLinus Walleij 		.name = "USB_CHARGER_NOT_OKF",
5406af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHARGER_NOT_OKF,
5416af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHARGER_NOT_OKF,
5426af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5436af75ecdSLinus Walleij 	},
5446af75ecdSLinus Walleij 	{
5456af75ecdSLinus Walleij 		.name = "CH_WD_EXP",
5466af75ecdSLinus Walleij 		.start = AB8500_INT_CH_WD_EXP,
5476af75ecdSLinus Walleij 		.end = AB8500_INT_CH_WD_EXP,
5486af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5496af75ecdSLinus Walleij 	},
5506af75ecdSLinus Walleij };
5516af75ecdSLinus Walleij 
5526af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = {
5536af75ecdSLinus Walleij 	{
5546af75ecdSLinus Walleij 		.name = "BAT_CTRL_INDB",
5556af75ecdSLinus Walleij 		.start = AB8500_INT_BAT_CTRL_INDB,
5566af75ecdSLinus Walleij 		.end = AB8500_INT_BAT_CTRL_INDB,
557e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
558e098adedSMattias Wallin 	},
559e098adedSMattias Wallin 	{
560e098adedSMattias Wallin 		.name = "BTEMP_LOW",
561e098adedSMattias Wallin 		.start = AB8500_INT_BTEMP_LOW,
562e098adedSMattias Wallin 		.end = AB8500_INT_BTEMP_LOW,
563e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
564e098adedSMattias Wallin 	},
565e098adedSMattias Wallin 	{
566e098adedSMattias Wallin 		.name = "BTEMP_HIGH",
567e098adedSMattias Wallin 		.start = AB8500_INT_BTEMP_HIGH,
568e098adedSMattias Wallin 		.end = AB8500_INT_BTEMP_HIGH,
569e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
570e098adedSMattias Wallin 	},
571e098adedSMattias Wallin 	{
5726af75ecdSLinus Walleij 		.name = "BTEMP_LOW_MEDIUM",
5736af75ecdSLinus Walleij 		.start = AB8500_INT_BTEMP_LOW_MEDIUM,
5746af75ecdSLinus Walleij 		.end = AB8500_INT_BTEMP_LOW_MEDIUM,
575e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
576e098adedSMattias Wallin 	},
577e098adedSMattias Wallin 	{
5786af75ecdSLinus Walleij 		.name = "BTEMP_MEDIUM_HIGH",
5796af75ecdSLinus Walleij 		.start = AB8500_INT_BTEMP_MEDIUM_HIGH,
5806af75ecdSLinus Walleij 		.end = AB8500_INT_BTEMP_MEDIUM_HIGH,
581e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
582e098adedSMattias Wallin 	},
583e098adedSMattias Wallin };
584e098adedSMattias Wallin 
5856af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = {
5866af75ecdSLinus Walleij 	{
5876af75ecdSLinus Walleij 		.name = "NCONV_ACCU",
5886af75ecdSLinus Walleij 		.start = AB8500_INT_CCN_CONV_ACC,
5896af75ecdSLinus Walleij 		.end = AB8500_INT_CCN_CONV_ACC,
5906af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5916af75ecdSLinus Walleij 	},
5926af75ecdSLinus Walleij 	{
5936af75ecdSLinus Walleij 		.name = "BATT_OVV",
5946af75ecdSLinus Walleij 		.start = AB8500_INT_BATT_OVV,
5956af75ecdSLinus Walleij 		.end = AB8500_INT_BATT_OVV,
5966af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5976af75ecdSLinus Walleij 	},
5986af75ecdSLinus Walleij 	{
5996af75ecdSLinus Walleij 		.name = "LOW_BAT_F",
6006af75ecdSLinus Walleij 		.start = AB8500_INT_LOW_BAT_F,
6016af75ecdSLinus Walleij 		.end = AB8500_INT_LOW_BAT_F,
6026af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6036af75ecdSLinus Walleij 	},
6046af75ecdSLinus Walleij 	{
6056af75ecdSLinus Walleij 		.name = "LOW_BAT_R",
6066af75ecdSLinus Walleij 		.start = AB8500_INT_LOW_BAT_R,
6076af75ecdSLinus Walleij 		.end = AB8500_INT_LOW_BAT_R,
6086af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6096af75ecdSLinus Walleij 	},
6106af75ecdSLinus Walleij 	{
6116af75ecdSLinus Walleij 		.name = "CC_INT_CALIB",
6126af75ecdSLinus Walleij 		.start = AB8500_INT_CC_INT_CALIB,
6136af75ecdSLinus Walleij 		.end = AB8500_INT_CC_INT_CALIB,
6146af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6156af75ecdSLinus Walleij 	},
6166af75ecdSLinus Walleij };
6176af75ecdSLinus Walleij 
6186af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {};
6196af75ecdSLinus Walleij 
6205cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = {
621e098adedSMattias Wallin 	{
622e098adedSMattias Wallin 		.name	= "IRQ_FIRST",
623e098adedSMattias Wallin 		.start	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
624e098adedSMattias Wallin 		.end	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
625e098adedSMattias Wallin 		.flags	= IORESOURCE_IRQ,
626e098adedSMattias Wallin 	},
627e098adedSMattias Wallin 	{
628e098adedSMattias Wallin 		.name	= "IRQ_LAST",
629e098adedSMattias Wallin 		.start	= AB8500_INT_USB_CHARGER_NOT_OKF,
630e098adedSMattias Wallin 		.end	= AB8500_INT_USB_CHARGER_NOT_OKF,
631e098adedSMattias Wallin 		.flags	= IORESOURCE_IRQ,
632e098adedSMattias Wallin 	},
633e098adedSMattias Wallin };
634e098adedSMattias Wallin 
6355cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = {
636e098adedSMattias Wallin 	{
637e098adedSMattias Wallin 		.name = "ID_WAKEUP_R",
638e098adedSMattias Wallin 		.start = AB8500_INT_ID_WAKEUP_R,
639e098adedSMattias Wallin 		.end = AB8500_INT_ID_WAKEUP_R,
640e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
641e098adedSMattias Wallin 	},
642e098adedSMattias Wallin 	{
643e098adedSMattias Wallin 		.name = "ID_WAKEUP_F",
644e098adedSMattias Wallin 		.start = AB8500_INT_ID_WAKEUP_F,
645e098adedSMattias Wallin 		.end = AB8500_INT_ID_WAKEUP_F,
646e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
647e098adedSMattias Wallin 	},
648e098adedSMattias Wallin 	{
649e098adedSMattias Wallin 		.name = "VBUS_DET_F",
650e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_F,
651e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_F,
652e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
653e098adedSMattias Wallin 	},
654e098adedSMattias Wallin 	{
655e098adedSMattias Wallin 		.name = "VBUS_DET_R",
656e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_R,
657e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_R,
658e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
659e098adedSMattias Wallin 	},
66092d50a41SMattias Wallin 	{
66192d50a41SMattias Wallin 		.name = "USB_LINK_STATUS",
66292d50a41SMattias Wallin 		.start = AB8500_INT_USB_LINK_STATUS,
66392d50a41SMattias Wallin 		.end = AB8500_INT_USB_LINK_STATUS,
66492d50a41SMattias Wallin 		.flags = IORESOURCE_IRQ,
66592d50a41SMattias Wallin 	},
6666af75ecdSLinus Walleij 	{
6676af75ecdSLinus Walleij 		.name = "USB_ADP_PROBE_PLUG",
6686af75ecdSLinus Walleij 		.start = AB8500_INT_ADP_PROBE_PLUG,
6696af75ecdSLinus Walleij 		.end = AB8500_INT_ADP_PROBE_PLUG,
6706af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6716af75ecdSLinus Walleij 	},
6726af75ecdSLinus Walleij 	{
6736af75ecdSLinus Walleij 		.name = "USB_ADP_PROBE_UNPLUG",
6746af75ecdSLinus Walleij 		.start = AB8500_INT_ADP_PROBE_UNPLUG,
6756af75ecdSLinus Walleij 		.end = AB8500_INT_ADP_PROBE_UNPLUG,
6766af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6776af75ecdSLinus Walleij 	},
678e098adedSMattias Wallin };
679e098adedSMattias Wallin 
6805cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = {
681e098adedSMattias Wallin 	{
682e098adedSMattias Wallin 		.name  = "AB8500_TEMP_WARM",
683e098adedSMattias Wallin 		.start = AB8500_INT_TEMP_WARM,
684e098adedSMattias Wallin 		.end   = AB8500_INT_TEMP_WARM,
685e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
686e098adedSMattias Wallin 	},
687e098adedSMattias Wallin };
688e098adedSMattias Wallin 
6895cef8df5SRobert Rosengren static struct mfd_cell __devinitdata ab8500_devs[] = {
6905814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS
6915814fc35SMattias Wallin 	{
6925814fc35SMattias Wallin 		.name = "ab8500-debug",
693e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_debug_resources),
694e098adedSMattias Wallin 		.resources = ab8500_debug_resources,
6955814fc35SMattias Wallin 	},
6965814fc35SMattias Wallin #endif
69762579266SRabin Vincent 	{
698e098adedSMattias Wallin 		.name = "ab8500-sysctrl",
699e098adedSMattias Wallin 	},
700e098adedSMattias Wallin 	{
701e098adedSMattias Wallin 		.name = "ab8500-regulator",
702e098adedSMattias Wallin 	},
703e098adedSMattias Wallin 	{
7040cb3fcd7SBibek Basu 		.name = "ab8500-gpio",
7050cb3fcd7SBibek Basu 		.num_resources = ARRAY_SIZE(ab8500_gpio_resources),
7060cb3fcd7SBibek Basu 		.resources = ab8500_gpio_resources,
7070cb3fcd7SBibek Basu 	},
7080cb3fcd7SBibek Basu 	{
70962579266SRabin Vincent 		.name = "ab8500-gpadc",
71062579266SRabin Vincent 		.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
71162579266SRabin Vincent 		.resources = ab8500_gpadc_resources,
71262579266SRabin Vincent 	},
71362579266SRabin Vincent 	{
71462579266SRabin Vincent 		.name = "ab8500-rtc",
71562579266SRabin Vincent 		.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
71662579266SRabin Vincent 		.resources = ab8500_rtc_resources,
71762579266SRabin Vincent 	},
718f0f05b1cSArun Murthy 	{
7196af75ecdSLinus Walleij 		.name = "ab8500-charger",
7206af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_charger_resources),
7216af75ecdSLinus Walleij 		.resources = ab8500_charger_resources,
722e098adedSMattias Wallin 	},
7236af75ecdSLinus Walleij 	{
7246af75ecdSLinus Walleij 		.name = "ab8500-btemp",
7256af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_btemp_resources),
7266af75ecdSLinus Walleij 		.resources = ab8500_btemp_resources,
7276af75ecdSLinus Walleij 	},
7286af75ecdSLinus Walleij 	{
7296af75ecdSLinus Walleij 		.name = "ab8500-fg",
7306af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_fg_resources),
7316af75ecdSLinus Walleij 		.resources = ab8500_fg_resources,
7326af75ecdSLinus Walleij 	},
7336af75ecdSLinus Walleij 	{
7346af75ecdSLinus Walleij 		.name = "ab8500-chargalg",
7356af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
7366af75ecdSLinus Walleij 		.resources = ab8500_chargalg_resources,
7376af75ecdSLinus Walleij 	},
7386af75ecdSLinus Walleij 	{
7396af75ecdSLinus Walleij 		.name = "ab8500-acc-det",
7406af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
7416af75ecdSLinus Walleij 		.resources = ab8500_av_acc_detect_resources,
7426af75ecdSLinus Walleij 	},
7436af75ecdSLinus Walleij 	{
7446af75ecdSLinus Walleij 		.name = "ab8500-codec",
7456af75ecdSLinus Walleij 	},
746e098adedSMattias Wallin 	{
747e098adedSMattias Wallin 		.name = "ab8500-usb",
748e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_usb_resources),
749e098adedSMattias Wallin 		.resources = ab8500_usb_resources,
750e098adedSMattias Wallin 	},
751e098adedSMattias Wallin 	{
752e098adedSMattias Wallin 		.name = "ab8500-poweron-key",
753e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
754e098adedSMattias Wallin 		.resources = ab8500_poweronkey_db_resources,
755e098adedSMattias Wallin 	},
756e098adedSMattias Wallin 	{
757f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
758f0f05b1cSArun Murthy 		.id = 1,
759f0f05b1cSArun Murthy 	},
760f0f05b1cSArun Murthy 	{
761f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
762f0f05b1cSArun Murthy 		.id = 2,
763f0f05b1cSArun Murthy 	},
764f0f05b1cSArun Murthy 	{
765f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
766f0f05b1cSArun Murthy 		.id = 3,
767f0f05b1cSArun Murthy 	},
768e098adedSMattias Wallin 	{ .name = "ab8500-leds", },
76977686517SSundar R Iyer 	{
770e098adedSMattias Wallin 		.name = "ab8500-denc",
771e098adedSMattias Wallin 	},
772e098adedSMattias Wallin 	{
773e098adedSMattias Wallin 		.name = "ab8500-temp",
774e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_temp_resources),
775e098adedSMattias Wallin 		.resources = ab8500_temp_resources,
77677686517SSundar R Iyer 	},
77762579266SRabin Vincent };
77862579266SRabin Vincent 
779cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev,
780cca69b67SMattias Wallin 				struct device_attribute *attr, char *buf)
781cca69b67SMattias Wallin {
782cca69b67SMattias Wallin 	struct ab8500 *ab8500;
783cca69b67SMattias Wallin 
784cca69b67SMattias Wallin 	ab8500 = dev_get_drvdata(dev);
785cca69b67SMattias Wallin 	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
786cca69b67SMattias Wallin }
787cca69b67SMattias Wallin 
788e5c238c3SMattias Wallin /*
789e5c238c3SMattias Wallin  * ab8500 has switched off due to (SWITCH_OFF_STATUS):
790e5c238c3SMattias Wallin  * 0x01 Swoff bit programming
791e5c238c3SMattias Wallin  * 0x02 Thermal protection activation
792e5c238c3SMattias Wallin  * 0x04 Vbat lower then BattOk falling threshold
793e5c238c3SMattias Wallin  * 0x08 Watchdog expired
794e5c238c3SMattias Wallin  * 0x10 Non presence of 32kHz clock
795e5c238c3SMattias Wallin  * 0x20 Battery level lower than power on reset threshold
796e5c238c3SMattias Wallin  * 0x40 Power on key 1 pressed longer than 10 seconds
797e5c238c3SMattias Wallin  * 0x80 DB8500 thermal shutdown
798e5c238c3SMattias Wallin  */
799e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev,
800e5c238c3SMattias Wallin 				struct device_attribute *attr, char *buf)
801e5c238c3SMattias Wallin {
802e5c238c3SMattias Wallin 	int ret;
803e5c238c3SMattias Wallin 	u8 value;
804e5c238c3SMattias Wallin 	struct ab8500 *ab8500;
805e5c238c3SMattias Wallin 
806e5c238c3SMattias Wallin 	ab8500 = dev_get_drvdata(dev);
807e5c238c3SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_RTC,
808e5c238c3SMattias Wallin 		AB8500_SWITCH_OFF_STATUS, &value);
809e5c238c3SMattias Wallin 	if (ret < 0)
810e5c238c3SMattias Wallin 		return ret;
811e5c238c3SMattias Wallin 	return sprintf(buf, "%#x\n", value);
812e5c238c3SMattias Wallin }
813e5c238c3SMattias Wallin 
814cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
815e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
816cca69b67SMattias Wallin 
817cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = {
818cca69b67SMattias Wallin 	&dev_attr_chip_id.attr,
819e5c238c3SMattias Wallin 	&dev_attr_switch_off_status.attr,
820cca69b67SMattias Wallin 	NULL,
821cca69b67SMattias Wallin };
822cca69b67SMattias Wallin 
823cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = {
824cca69b67SMattias Wallin 	.attrs	= ab8500_sysfs_entries,
825cca69b67SMattias Wallin };
826cca69b67SMattias Wallin 
82762579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500)
82862579266SRabin Vincent {
82962579266SRabin Vincent 	struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
83062579266SRabin Vincent 	int ret;
83162579266SRabin Vincent 	int i;
83247c16975SMattias Wallin 	u8 value;
83362579266SRabin Vincent 
83462579266SRabin Vincent 	if (plat)
83562579266SRabin Vincent 		ab8500->irq_base = plat->irq_base;
83662579266SRabin Vincent 
83762579266SRabin Vincent 	mutex_init(&ab8500->lock);
83862579266SRabin Vincent 	mutex_init(&ab8500->irq_lock);
83962579266SRabin Vincent 
84047c16975SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_MISC,
84147c16975SMattias Wallin 		AB8500_REV_REG, &value);
84262579266SRabin Vincent 	if (ret < 0)
84362579266SRabin Vincent 		return ret;
84462579266SRabin Vincent 
845863dde5bSLinus Walleij 	switch (value) {
846863dde5bSLinus Walleij 	case AB8500_CUTEARLY:
847863dde5bSLinus Walleij 	case AB8500_CUT1P0:
848863dde5bSLinus Walleij 	case AB8500_CUT1P1:
849863dde5bSLinus Walleij 	case AB8500_CUT2P0:
850863dde5bSLinus Walleij 	case AB8500_CUT3P0:
85147c16975SMattias Wallin 		dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
852863dde5bSLinus Walleij 		break;
853863dde5bSLinus Walleij 	default:
85447c16975SMattias Wallin 		dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
85562579266SRabin Vincent 		return -EINVAL;
85662579266SRabin Vincent 	}
85747c16975SMattias Wallin 	ab8500->chip_id = value;
85862579266SRabin Vincent 
859e5c238c3SMattias Wallin 	/*
860e5c238c3SMattias Wallin 	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
861e5c238c3SMattias Wallin 	 * 0x01 Swoff bit programming
862e5c238c3SMattias Wallin 	 * 0x02 Thermal protection activation
863e5c238c3SMattias Wallin 	 * 0x04 Vbat lower then BattOk falling threshold
864e5c238c3SMattias Wallin 	 * 0x08 Watchdog expired
865e5c238c3SMattias Wallin 	 * 0x10 Non presence of 32kHz clock
866e5c238c3SMattias Wallin 	 * 0x20 Battery level lower than power on reset threshold
867e5c238c3SMattias Wallin 	 * 0x40 Power on key 1 pressed longer than 10 seconds
868e5c238c3SMattias Wallin 	 * 0x80 DB8500 thermal shutdown
869e5c238c3SMattias Wallin 	 */
870e5c238c3SMattias Wallin 
871e5c238c3SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_RTC,
872e5c238c3SMattias Wallin 		AB8500_SWITCH_OFF_STATUS, &value);
873e5c238c3SMattias Wallin 	if (ret < 0)
874e5c238c3SMattias Wallin 		return ret;
875e5c238c3SMattias Wallin 	dev_info(ab8500->dev, "switch off status: %#x", value);
876e5c238c3SMattias Wallin 
87762579266SRabin Vincent 	if (plat && plat->init)
87862579266SRabin Vincent 		plat->init(ab8500);
87962579266SRabin Vincent 
88062579266SRabin Vincent 	/* Clear and mask all interrupts */
88192d50a41SMattias Wallin 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
882863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
883863dde5bSLinus Walleij 		if (ab8500_irq_regoffset[i] == 11 &&
884863dde5bSLinus Walleij 			ab8500->chip_id < AB8500_CUT2P0)
88592d50a41SMattias Wallin 			continue;
88662579266SRabin Vincent 
88747c16975SMattias Wallin 		get_register_interruptible(ab8500, AB8500_INTERRUPT,
88892d50a41SMattias Wallin 			AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
88992d50a41SMattias Wallin 			&value);
89047c16975SMattias Wallin 		set_register_interruptible(ab8500, AB8500_INTERRUPT,
89192d50a41SMattias Wallin 			AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
89262579266SRabin Vincent 	}
89362579266SRabin Vincent 
89447c16975SMattias Wallin 	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
89547c16975SMattias Wallin 	if (ret)
89647c16975SMattias Wallin 		return ret;
89747c16975SMattias Wallin 
89862579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
89962579266SRabin Vincent 		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
90062579266SRabin Vincent 
90162579266SRabin Vincent 	if (ab8500->irq_base) {
90262579266SRabin Vincent 		ret = ab8500_irq_init(ab8500);
90362579266SRabin Vincent 		if (ret)
90462579266SRabin Vincent 			return ret;
90562579266SRabin Vincent 
90662579266SRabin Vincent 		ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
9074f079985SMattias Wallin 					   IRQF_ONESHOT | IRQF_NO_SUSPEND,
9084f079985SMattias Wallin 					   "ab8500", ab8500);
90962579266SRabin Vincent 		if (ret)
91062579266SRabin Vincent 			goto out_removeirq;
91162579266SRabin Vincent 	}
91262579266SRabin Vincent 
913549931f9SSundar R Iyer 	ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
91462579266SRabin Vincent 			      ARRAY_SIZE(ab8500_devs), NULL,
91562579266SRabin Vincent 			      ab8500->irq_base);
91662579266SRabin Vincent 	if (ret)
91762579266SRabin Vincent 		goto out_freeirq;
91862579266SRabin Vincent 
919cca69b67SMattias Wallin 	ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
920cca69b67SMattias Wallin 	if (ret)
921cca69b67SMattias Wallin 		dev_err(ab8500->dev, "error creating sysfs entries\n");
922cca69b67SMattias Wallin 
92362579266SRabin Vincent 	return ret;
92462579266SRabin Vincent 
92562579266SRabin Vincent out_freeirq:
92662579266SRabin Vincent 	if (ab8500->irq_base) {
92762579266SRabin Vincent 		free_irq(ab8500->irq, ab8500);
92862579266SRabin Vincent out_removeirq:
92962579266SRabin Vincent 		ab8500_irq_remove(ab8500);
93062579266SRabin Vincent 	}
93162579266SRabin Vincent 	return ret;
93262579266SRabin Vincent }
93362579266SRabin Vincent 
93462579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500)
93562579266SRabin Vincent {
936cca69b67SMattias Wallin 	sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
93762579266SRabin Vincent 	mfd_remove_devices(ab8500->dev);
93862579266SRabin Vincent 	if (ab8500->irq_base) {
93962579266SRabin Vincent 		free_irq(ab8500->irq, ab8500);
94062579266SRabin Vincent 		ab8500_irq_remove(ab8500);
94162579266SRabin Vincent 	}
94262579266SRabin Vincent 
94362579266SRabin Vincent 	return 0;
94462579266SRabin Vincent }
94562579266SRabin Vincent 
946adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
94762579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core");
94862579266SRabin Vincent MODULE_LICENSE("GPL v2");
949