162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 2062579266SRabin Vincent #include <linux/mfd/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4162579266SRabin Vincent 4262579266SRabin Vincent /* 4362579266SRabin Vincent * latch registers 4462579266SRabin Vincent */ 4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5592d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 5647c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5747c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 5847c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 5947c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6047c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6147c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6262579266SRabin Vincent 6362579266SRabin Vincent /* 6462579266SRabin Vincent * mask registers 6562579266SRabin Vincent */ 6662579266SRabin Vincent 6747c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 6847c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 6947c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7047c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7147c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7247c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7347c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7447c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7547c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7647c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7747c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 7847c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 7947c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8047c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8147c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8247c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8347c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8447c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8547c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8647c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8747c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 8847c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 8947c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9047c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9162579266SRabin Vincent 9247c16975SMattias Wallin #define AB8500_REV_REG 0x80 93e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 9462579266SRabin Vincent 9562579266SRabin Vincent /* 9662579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 9762579266SRabin Vincent * numbers are indexed into this array with (num / 8). 9862579266SRabin Vincent * 9962579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 10062579266SRabin Vincent * offset 0. 10162579266SRabin Vincent */ 10262579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 10392d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 10462579266SRabin Vincent }; 10562579266SRabin Vincent 10647c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 10747c16975SMattias Wallin { 1086bce7bf1SMattias Wallin struct ab8500 *ab8500; 1096bce7bf1SMattias Wallin 1106bce7bf1SMattias Wallin if (!dev) 1116bce7bf1SMattias Wallin return -EINVAL; 1126bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1136bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 11447c16975SMattias Wallin } 11547c16975SMattias Wallin 11647c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 11747c16975SMattias Wallin u8 reg, u8 data) 11862579266SRabin Vincent { 11962579266SRabin Vincent int ret; 12047c16975SMattias Wallin /* 12147c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 12247c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 12347c16975SMattias Wallin * */ 12447c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 12562579266SRabin Vincent 12662579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 12762579266SRabin Vincent 12847c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 12947c16975SMattias Wallin if (ret) 13047c16975SMattias Wallin return ret; 13147c16975SMattias Wallin 13247c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 13347c16975SMattias Wallin if (ret < 0) 13447c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 13547c16975SMattias Wallin addr, ret); 13647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 13747c16975SMattias Wallin 13847c16975SMattias Wallin return ret; 13947c16975SMattias Wallin } 14047c16975SMattias Wallin 14147c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 14247c16975SMattias Wallin u8 reg, u8 value) 14347c16975SMattias Wallin { 14447c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 14547c16975SMattias Wallin 14647c16975SMattias Wallin return set_register_interruptible(ab8500, bank, reg, value); 14747c16975SMattias Wallin } 14847c16975SMattias Wallin 14947c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 15047c16975SMattias Wallin u8 reg, u8 *value) 15147c16975SMattias Wallin { 15247c16975SMattias Wallin int ret; 15347c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 15447c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 15547c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15647c16975SMattias Wallin 15747c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 15847c16975SMattias Wallin if (ret) 15947c16975SMattias Wallin return ret; 16047c16975SMattias Wallin 16147c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 16247c16975SMattias Wallin if (ret < 0) 16347c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 16447c16975SMattias Wallin addr, ret); 16547c16975SMattias Wallin else 16647c16975SMattias Wallin *value = ret; 16747c16975SMattias Wallin 16847c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16947c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 17047c16975SMattias Wallin 17147c16975SMattias Wallin return ret; 17247c16975SMattias Wallin } 17347c16975SMattias Wallin 17447c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 17547c16975SMattias Wallin u8 reg, u8 *value) 17647c16975SMattias Wallin { 17747c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 17847c16975SMattias Wallin 17947c16975SMattias Wallin return get_register_interruptible(ab8500, bank, reg, value); 18047c16975SMattias Wallin } 18147c16975SMattias Wallin 18247c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 18347c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 18447c16975SMattias Wallin { 18547c16975SMattias Wallin int ret; 18647c16975SMattias Wallin u8 data; 18747c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 18847c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 18947c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 19047c16975SMattias Wallin 19147c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 19247c16975SMattias Wallin if (ret) 19347c16975SMattias Wallin return ret; 19447c16975SMattias Wallin 19547c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 19647c16975SMattias Wallin if (ret < 0) { 19747c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 19847c16975SMattias Wallin addr, ret); 19947c16975SMattias Wallin goto out; 20047c16975SMattias Wallin } 20147c16975SMattias Wallin 20247c16975SMattias Wallin data = (u8)ret; 20347c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 20447c16975SMattias Wallin 20562579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 20662579266SRabin Vincent if (ret < 0) 20762579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 20862579266SRabin Vincent addr, ret); 20962579266SRabin Vincent 21047c16975SMattias Wallin dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 21162579266SRabin Vincent out: 21262579266SRabin Vincent mutex_unlock(&ab8500->lock); 21362579266SRabin Vincent return ret; 21462579266SRabin Vincent } 21547c16975SMattias Wallin 21647c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 21747c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 21847c16975SMattias Wallin { 21947c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 22047c16975SMattias Wallin 22147c16975SMattias Wallin return mask_and_set_register_interruptible(ab8500, bank, reg, 22247c16975SMattias Wallin bitmask, bitvalues); 22347c16975SMattias Wallin 22447c16975SMattias Wallin } 22547c16975SMattias Wallin 22647c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 22747c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 22847c16975SMattias Wallin .get_register = ab8500_get_register, 22947c16975SMattias Wallin .set_register = ab8500_set_register, 23047c16975SMattias Wallin .get_register_page = NULL, 23147c16975SMattias Wallin .set_register_page = NULL, 23247c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 23347c16975SMattias Wallin .event_registers_startup_state_get = NULL, 23447c16975SMattias Wallin .startup_irq_enabled = NULL, 23547c16975SMattias Wallin }; 23662579266SRabin Vincent 2379505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 23862579266SRabin Vincent { 2399505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24062579266SRabin Vincent 24162579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 24262579266SRabin Vincent } 24362579266SRabin Vincent 2449505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 24562579266SRabin Vincent { 2469505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24762579266SRabin Vincent int i; 24862579266SRabin Vincent 24962579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 25062579266SRabin Vincent u8 old = ab8500->oldmask[i]; 25162579266SRabin Vincent u8 new = ab8500->mask[i]; 25262579266SRabin Vincent int reg; 25362579266SRabin Vincent 25462579266SRabin Vincent if (new == old) 25562579266SRabin Vincent continue; 25662579266SRabin Vincent 257863dde5bSLinus Walleij /* Interrupt register 12 doesn't exist prior to version 2.0 */ 258863dde5bSLinus Walleij if (ab8500_irq_regoffset[i] == 11 && 259863dde5bSLinus Walleij ab8500->chip_id < AB8500_CUT2P0) 26092d50a41SMattias Wallin continue; 26192d50a41SMattias Wallin 26262579266SRabin Vincent ab8500->oldmask[i] = new; 26362579266SRabin Vincent 26462579266SRabin Vincent reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 26547c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 26662579266SRabin Vincent } 26762579266SRabin Vincent 26862579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 26962579266SRabin Vincent } 27062579266SRabin Vincent 2719505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 27262579266SRabin Vincent { 2739505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2749505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 27562579266SRabin Vincent int index = offset / 8; 27662579266SRabin Vincent int mask = 1 << (offset % 8); 27762579266SRabin Vincent 27862579266SRabin Vincent ab8500->mask[index] |= mask; 27962579266SRabin Vincent } 28062579266SRabin Vincent 2819505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 28262579266SRabin Vincent { 2839505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2849505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 28562579266SRabin Vincent int index = offset / 8; 28662579266SRabin Vincent int mask = 1 << (offset % 8); 28762579266SRabin Vincent 28862579266SRabin Vincent ab8500->mask[index] &= ~mask; 28962579266SRabin Vincent } 29062579266SRabin Vincent 29162579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 29262579266SRabin Vincent .name = "ab8500", 2939505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 2949505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 2959505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 2969505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 29762579266SRabin Vincent }; 29862579266SRabin Vincent 29962579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 30062579266SRabin Vincent { 30162579266SRabin Vincent struct ab8500 *ab8500 = dev; 30262579266SRabin Vincent int i; 30362579266SRabin Vincent 30462579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 30562579266SRabin Vincent 30662579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 30762579266SRabin Vincent int regoffset = ab8500_irq_regoffset[i]; 30862579266SRabin Vincent int status; 30947c16975SMattias Wallin u8 value; 31062579266SRabin Vincent 311863dde5bSLinus Walleij /* Interrupt register 12 doesn't exist prior to version 2.0 */ 312863dde5bSLinus Walleij if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0) 31392d50a41SMattias Wallin continue; 31492d50a41SMattias Wallin 31547c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 31647c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 31747c16975SMattias Wallin if (status < 0 || value == 0) 31862579266SRabin Vincent continue; 31962579266SRabin Vincent 32062579266SRabin Vincent do { 32188aec4f7SMattias Wallin int bit = __ffs(value); 32262579266SRabin Vincent int line = i * 8 + bit; 32362579266SRabin Vincent 32462579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 32547c16975SMattias Wallin value &= ~(1 << bit); 32647c16975SMattias Wallin } while (value); 32762579266SRabin Vincent } 32862579266SRabin Vincent 32962579266SRabin Vincent return IRQ_HANDLED; 33062579266SRabin Vincent } 33162579266SRabin Vincent 33262579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 33362579266SRabin Vincent { 33462579266SRabin Vincent int base = ab8500->irq_base; 33562579266SRabin Vincent int irq; 33662579266SRabin Vincent 33762579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 338d5bb1221SThomas Gleixner irq_set_chip_data(irq, ab8500); 339d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, &ab8500_irq_chip, 34062579266SRabin Vincent handle_simple_irq); 341d5bb1221SThomas Gleixner irq_set_nested_thread(irq, 1); 34262579266SRabin Vincent #ifdef CONFIG_ARM 34362579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 34462579266SRabin Vincent #else 345d5bb1221SThomas Gleixner irq_set_noprobe(irq); 34662579266SRabin Vincent #endif 34762579266SRabin Vincent } 34862579266SRabin Vincent 34962579266SRabin Vincent return 0; 35062579266SRabin Vincent } 35162579266SRabin Vincent 35262579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 35362579266SRabin Vincent { 35462579266SRabin Vincent int base = ab8500->irq_base; 35562579266SRabin Vincent int irq; 35662579266SRabin Vincent 35762579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 35862579266SRabin Vincent #ifdef CONFIG_ARM 35962579266SRabin Vincent set_irq_flags(irq, 0); 36062579266SRabin Vincent #endif 361d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, NULL, NULL); 362d5bb1221SThomas Gleixner irq_set_chip_data(irq, NULL); 36362579266SRabin Vincent } 36462579266SRabin Vincent } 36562579266SRabin Vincent 3665cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = { 3670cb3fcd7SBibek Basu { 3680cb3fcd7SBibek Basu .name = "GPIO_INT6", 3690cb3fcd7SBibek Basu .start = AB8500_INT_GPIO6R, 3700cb3fcd7SBibek Basu .end = AB8500_INT_GPIO41F, 3710cb3fcd7SBibek Basu .flags = IORESOURCE_IRQ, 3720cb3fcd7SBibek Basu } 3730cb3fcd7SBibek Basu }; 3740cb3fcd7SBibek Basu 3755cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 37662579266SRabin Vincent { 37762579266SRabin Vincent .name = "HW_CONV_END", 37862579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 37962579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 38062579266SRabin Vincent .flags = IORESOURCE_IRQ, 38162579266SRabin Vincent }, 38262579266SRabin Vincent { 38362579266SRabin Vincent .name = "SW_CONV_END", 38462579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 38562579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 38662579266SRabin Vincent .flags = IORESOURCE_IRQ, 38762579266SRabin Vincent }, 38862579266SRabin Vincent }; 38962579266SRabin Vincent 3905cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 39162579266SRabin Vincent { 39262579266SRabin Vincent .name = "60S", 39362579266SRabin Vincent .start = AB8500_INT_RTC_60S, 39462579266SRabin Vincent .end = AB8500_INT_RTC_60S, 39562579266SRabin Vincent .flags = IORESOURCE_IRQ, 39662579266SRabin Vincent }, 39762579266SRabin Vincent { 39862579266SRabin Vincent .name = "ALARM", 39962579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 40062579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 40162579266SRabin Vincent .flags = IORESOURCE_IRQ, 40262579266SRabin Vincent }, 40362579266SRabin Vincent }; 40462579266SRabin Vincent 4055cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 40677686517SSundar R Iyer { 40777686517SSundar R Iyer .name = "ONKEY_DBF", 40877686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 40977686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 41077686517SSundar R Iyer .flags = IORESOURCE_IRQ, 41177686517SSundar R Iyer }, 41277686517SSundar R Iyer { 41377686517SSundar R Iyer .name = "ONKEY_DBR", 41477686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 41577686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 41677686517SSundar R Iyer .flags = IORESOURCE_IRQ, 41777686517SSundar R Iyer }, 41877686517SSundar R Iyer }; 41977686517SSundar R Iyer 4205cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_bm_resources[] = { 421e098adedSMattias Wallin { 422e098adedSMattias Wallin .name = "MAIN_EXT_CH_NOT_OK", 423e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 424e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 425e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 426e098adedSMattias Wallin }, 427e098adedSMattias Wallin { 428e098adedSMattias Wallin .name = "BATT_OVV", 429e098adedSMattias Wallin .start = AB8500_INT_BATT_OVV, 430e098adedSMattias Wallin .end = AB8500_INT_BATT_OVV, 431e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 432e098adedSMattias Wallin }, 433e098adedSMattias Wallin { 434e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 435e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 436e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 437e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 438e098adedSMattias Wallin }, 439e098adedSMattias Wallin { 440e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 441e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 442e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 443e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 444e098adedSMattias Wallin }, 445e098adedSMattias Wallin { 446e098adedSMattias Wallin .name = "VBUS_DET_F", 447e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 448e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 449e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 450e098adedSMattias Wallin }, 451e098adedSMattias Wallin { 452e098adedSMattias Wallin .name = "VBUS_DET_R", 453e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 454e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 455e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 456e098adedSMattias Wallin }, 457e098adedSMattias Wallin { 458e098adedSMattias Wallin .name = "BAT_CTRL_INDB", 459e098adedSMattias Wallin .start = AB8500_INT_BAT_CTRL_INDB, 460e098adedSMattias Wallin .end = AB8500_INT_BAT_CTRL_INDB, 461e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 462e098adedSMattias Wallin }, 463e098adedSMattias Wallin { 464e098adedSMattias Wallin .name = "CH_WD_EXP", 465e098adedSMattias Wallin .start = AB8500_INT_CH_WD_EXP, 466e098adedSMattias Wallin .end = AB8500_INT_CH_WD_EXP, 467e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 468e098adedSMattias Wallin }, 469e098adedSMattias Wallin { 470e098adedSMattias Wallin .name = "VBUS_OVV", 471e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 472e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 473e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 474e098adedSMattias Wallin }, 475e098adedSMattias Wallin { 476e098adedSMattias Wallin .name = "NCONV_ACCU", 477e098adedSMattias Wallin .start = AB8500_INT_CCN_CONV_ACC, 478e098adedSMattias Wallin .end = AB8500_INT_CCN_CONV_ACC, 479e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 480e098adedSMattias Wallin }, 481e098adedSMattias Wallin { 482e098adedSMattias Wallin .name = "LOW_BAT_F", 483e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_F, 484e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_F, 485e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 486e098adedSMattias Wallin }, 487e098adedSMattias Wallin { 488e098adedSMattias Wallin .name = "LOW_BAT_R", 489e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_R, 490e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_R, 491e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 492e098adedSMattias Wallin }, 493e098adedSMattias Wallin { 494e098adedSMattias Wallin .name = "BTEMP_LOW", 495e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 496e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 497e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 498e098adedSMattias Wallin }, 499e098adedSMattias Wallin { 500e098adedSMattias Wallin .name = "BTEMP_HIGH", 501e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 502e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 503e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 504e098adedSMattias Wallin }, 505e098adedSMattias Wallin { 506e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKR", 507e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OK, 508e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OK, 509e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 510e098adedSMattias Wallin }, 511e098adedSMattias Wallin { 512e098adedSMattias Wallin .name = "USB_CHARGE_DET_DONE", 513e098adedSMattias Wallin .start = AB8500_INT_USB_CHG_DET_DONE, 514e098adedSMattias Wallin .end = AB8500_INT_USB_CHG_DET_DONE, 515e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 516e098adedSMattias Wallin }, 517e098adedSMattias Wallin { 518e098adedSMattias Wallin .name = "USB_CH_TH_PROT_R", 519e098adedSMattias Wallin .start = AB8500_INT_USB_CH_TH_PROT_R, 520e098adedSMattias Wallin .end = AB8500_INT_USB_CH_TH_PROT_R, 521e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 522e098adedSMattias Wallin }, 523e098adedSMattias Wallin { 524e098adedSMattias Wallin .name = "MAIN_CH_TH_PROT_R", 525e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_TH_PROT_R, 526e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_TH_PROT_R, 527e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 528e098adedSMattias Wallin }, 529e098adedSMattias Wallin { 530e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKF", 531e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 532e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 533e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 534e098adedSMattias Wallin }, 535e098adedSMattias Wallin }; 536e098adedSMattias Wallin 5375cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 538e098adedSMattias Wallin { 539e098adedSMattias Wallin .name = "IRQ_FIRST", 540e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 541e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 542e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 543e098adedSMattias Wallin }, 544e098adedSMattias Wallin { 545e098adedSMattias Wallin .name = "IRQ_LAST", 546e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 547e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 548e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 549e098adedSMattias Wallin }, 550e098adedSMattias Wallin }; 551e098adedSMattias Wallin 5525cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 553e098adedSMattias Wallin { 554e098adedSMattias Wallin .name = "ID_WAKEUP_R", 555e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 556e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 557e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 558e098adedSMattias Wallin }, 559e098adedSMattias Wallin { 560e098adedSMattias Wallin .name = "ID_WAKEUP_F", 561e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 562e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 563e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 564e098adedSMattias Wallin }, 565e098adedSMattias Wallin { 566e098adedSMattias Wallin .name = "VBUS_DET_F", 567e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 568e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 569e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 570e098adedSMattias Wallin }, 571e098adedSMattias Wallin { 572e098adedSMattias Wallin .name = "VBUS_DET_R", 573e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 574e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 575e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 576e098adedSMattias Wallin }, 57792d50a41SMattias Wallin { 57892d50a41SMattias Wallin .name = "USB_LINK_STATUS", 57992d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 58092d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 58192d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 58292d50a41SMattias Wallin }, 583e098adedSMattias Wallin }; 584e098adedSMattias Wallin 5855cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 586e098adedSMattias Wallin { 587e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 588e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 589e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 590e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 591e098adedSMattias Wallin }, 592e098adedSMattias Wallin }; 593e098adedSMattias Wallin 5945cef8df5SRobert Rosengren static struct mfd_cell __devinitdata ab8500_devs[] = { 5955814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 5965814fc35SMattias Wallin { 5975814fc35SMattias Wallin .name = "ab8500-debug", 598e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 599e098adedSMattias Wallin .resources = ab8500_debug_resources, 6005814fc35SMattias Wallin }, 6015814fc35SMattias Wallin #endif 60262579266SRabin Vincent { 603e098adedSMattias Wallin .name = "ab8500-sysctrl", 604e098adedSMattias Wallin }, 605e098adedSMattias Wallin { 606e098adedSMattias Wallin .name = "ab8500-regulator", 607e098adedSMattias Wallin }, 608e098adedSMattias Wallin { 6090cb3fcd7SBibek Basu .name = "ab8500-gpio", 6100cb3fcd7SBibek Basu .num_resources = ARRAY_SIZE(ab8500_gpio_resources), 6110cb3fcd7SBibek Basu .resources = ab8500_gpio_resources, 6120cb3fcd7SBibek Basu }, 6130cb3fcd7SBibek Basu { 61462579266SRabin Vincent .name = "ab8500-gpadc", 61562579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 61662579266SRabin Vincent .resources = ab8500_gpadc_resources, 61762579266SRabin Vincent }, 61862579266SRabin Vincent { 61962579266SRabin Vincent .name = "ab8500-rtc", 62062579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 62162579266SRabin Vincent .resources = ab8500_rtc_resources, 62262579266SRabin Vincent }, 623f0f05b1cSArun Murthy { 624e098adedSMattias Wallin .name = "ab8500-bm", 625e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_bm_resources), 626e098adedSMattias Wallin .resources = ab8500_bm_resources, 627e098adedSMattias Wallin }, 628e098adedSMattias Wallin { .name = "ab8500-codec", }, 629e098adedSMattias Wallin { 630e098adedSMattias Wallin .name = "ab8500-usb", 631e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_usb_resources), 632e098adedSMattias Wallin .resources = ab8500_usb_resources, 633e098adedSMattias Wallin }, 634e098adedSMattias Wallin { 635e098adedSMattias Wallin .name = "ab8500-poweron-key", 636e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 637e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 638e098adedSMattias Wallin }, 639e098adedSMattias Wallin { 640f0f05b1cSArun Murthy .name = "ab8500-pwm", 641f0f05b1cSArun Murthy .id = 1, 642f0f05b1cSArun Murthy }, 643f0f05b1cSArun Murthy { 644f0f05b1cSArun Murthy .name = "ab8500-pwm", 645f0f05b1cSArun Murthy .id = 2, 646f0f05b1cSArun Murthy }, 647f0f05b1cSArun Murthy { 648f0f05b1cSArun Murthy .name = "ab8500-pwm", 649f0f05b1cSArun Murthy .id = 3, 650f0f05b1cSArun Murthy }, 651e098adedSMattias Wallin { .name = "ab8500-leds", }, 65277686517SSundar R Iyer { 653e098adedSMattias Wallin .name = "ab8500-denc", 654e098adedSMattias Wallin }, 655e098adedSMattias Wallin { 656e098adedSMattias Wallin .name = "ab8500-temp", 657e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 658e098adedSMattias Wallin .resources = ab8500_temp_resources, 65977686517SSundar R Iyer }, 66062579266SRabin Vincent }; 66162579266SRabin Vincent 662cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 663cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 664cca69b67SMattias Wallin { 665cca69b67SMattias Wallin struct ab8500 *ab8500; 666cca69b67SMattias Wallin 667cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 668cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 669cca69b67SMattias Wallin } 670cca69b67SMattias Wallin 671e5c238c3SMattias Wallin /* 672e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 673e5c238c3SMattias Wallin * 0x01 Swoff bit programming 674e5c238c3SMattias Wallin * 0x02 Thermal protection activation 675e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 676e5c238c3SMattias Wallin * 0x08 Watchdog expired 677e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 678e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 679e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 680e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 681e5c238c3SMattias Wallin */ 682e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 683e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 684e5c238c3SMattias Wallin { 685e5c238c3SMattias Wallin int ret; 686e5c238c3SMattias Wallin u8 value; 687e5c238c3SMattias Wallin struct ab8500 *ab8500; 688e5c238c3SMattias Wallin 689e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 690e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 691e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 692e5c238c3SMattias Wallin if (ret < 0) 693e5c238c3SMattias Wallin return ret; 694e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 695e5c238c3SMattias Wallin } 696e5c238c3SMattias Wallin 697cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 698e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 699cca69b67SMattias Wallin 700cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 701cca69b67SMattias Wallin &dev_attr_chip_id.attr, 702e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 703cca69b67SMattias Wallin NULL, 704cca69b67SMattias Wallin }; 705cca69b67SMattias Wallin 706cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 707cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 708cca69b67SMattias Wallin }; 709cca69b67SMattias Wallin 71062579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500) 71162579266SRabin Vincent { 71262579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 71362579266SRabin Vincent int ret; 71462579266SRabin Vincent int i; 71547c16975SMattias Wallin u8 value; 71662579266SRabin Vincent 71762579266SRabin Vincent if (plat) 71862579266SRabin Vincent ab8500->irq_base = plat->irq_base; 71962579266SRabin Vincent 72062579266SRabin Vincent mutex_init(&ab8500->lock); 72162579266SRabin Vincent mutex_init(&ab8500->irq_lock); 72262579266SRabin Vincent 72347c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 72447c16975SMattias Wallin AB8500_REV_REG, &value); 72562579266SRabin Vincent if (ret < 0) 72662579266SRabin Vincent return ret; 72762579266SRabin Vincent 728863dde5bSLinus Walleij switch (value) { 729863dde5bSLinus Walleij case AB8500_CUTEARLY: 730863dde5bSLinus Walleij case AB8500_CUT1P0: 731863dde5bSLinus Walleij case AB8500_CUT1P1: 732863dde5bSLinus Walleij case AB8500_CUT2P0: 733863dde5bSLinus Walleij case AB8500_CUT3P0: 73447c16975SMattias Wallin dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 735863dde5bSLinus Walleij break; 736863dde5bSLinus Walleij default: 73747c16975SMattias Wallin dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 73862579266SRabin Vincent return -EINVAL; 73962579266SRabin Vincent } 74047c16975SMattias Wallin ab8500->chip_id = value; 74162579266SRabin Vincent 742e5c238c3SMattias Wallin /* 743e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 744e5c238c3SMattias Wallin * 0x01 Swoff bit programming 745e5c238c3SMattias Wallin * 0x02 Thermal protection activation 746e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 747e5c238c3SMattias Wallin * 0x08 Watchdog expired 748e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 749e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 750e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 751e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 752e5c238c3SMattias Wallin */ 753e5c238c3SMattias Wallin 754e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 755e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 756e5c238c3SMattias Wallin if (ret < 0) 757e5c238c3SMattias Wallin return ret; 758e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 759e5c238c3SMattias Wallin 76062579266SRabin Vincent if (plat && plat->init) 76162579266SRabin Vincent plat->init(ab8500); 76262579266SRabin Vincent 76362579266SRabin Vincent /* Clear and mask all interrupts */ 76492d50a41SMattias Wallin for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 765863dde5bSLinus Walleij /* Interrupt register 12 doesn't exist prior to version 2.0 */ 766863dde5bSLinus Walleij if (ab8500_irq_regoffset[i] == 11 && 767863dde5bSLinus Walleij ab8500->chip_id < AB8500_CUT2P0) 76892d50a41SMattias Wallin continue; 76962579266SRabin Vincent 77047c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 77192d50a41SMattias Wallin AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i], 77292d50a41SMattias Wallin &value); 77347c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 77492d50a41SMattias Wallin AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff); 77562579266SRabin Vincent } 77662579266SRabin Vincent 77747c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 77847c16975SMattias Wallin if (ret) 77947c16975SMattias Wallin return ret; 78047c16975SMattias Wallin 78162579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 78262579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 78362579266SRabin Vincent 78462579266SRabin Vincent if (ab8500->irq_base) { 78562579266SRabin Vincent ret = ab8500_irq_init(ab8500); 78662579266SRabin Vincent if (ret) 78762579266SRabin Vincent return ret; 78862579266SRabin Vincent 78962579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 7904f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 7914f079985SMattias Wallin "ab8500", ab8500); 79262579266SRabin Vincent if (ret) 79362579266SRabin Vincent goto out_removeirq; 79462579266SRabin Vincent } 79562579266SRabin Vincent 796549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 79762579266SRabin Vincent ARRAY_SIZE(ab8500_devs), NULL, 79862579266SRabin Vincent ab8500->irq_base); 79962579266SRabin Vincent if (ret) 80062579266SRabin Vincent goto out_freeirq; 80162579266SRabin Vincent 802cca69b67SMattias Wallin ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); 803cca69b67SMattias Wallin if (ret) 804cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 805cca69b67SMattias Wallin 80662579266SRabin Vincent return ret; 80762579266SRabin Vincent 80862579266SRabin Vincent out_freeirq: 80962579266SRabin Vincent if (ab8500->irq_base) { 81062579266SRabin Vincent free_irq(ab8500->irq, ab8500); 81162579266SRabin Vincent out_removeirq: 81262579266SRabin Vincent ab8500_irq_remove(ab8500); 81362579266SRabin Vincent } 81462579266SRabin Vincent return ret; 81562579266SRabin Vincent } 81662579266SRabin Vincent 81762579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 81862579266SRabin Vincent { 819cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 82062579266SRabin Vincent mfd_remove_devices(ab8500->dev); 82162579266SRabin Vincent if (ab8500->irq_base) { 82262579266SRabin Vincent free_irq(ab8500->irq, ab8500); 82362579266SRabin Vincent ab8500_irq_remove(ab8500); 82462579266SRabin Vincent } 82562579266SRabin Vincent 82662579266SRabin Vincent return 0; 82762579266SRabin Vincent } 82862579266SRabin Vincent 829adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 83062579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 83162579266SRabin Vincent MODULE_LICENSE("GPL v2"); 832