xref: /openbmc/linux/drivers/mfd/88pm800.c (revision 089a49b6)
1 /*
2  * Base driver for Marvell 88PM800
3  *
4  * Copyright (C) 2012 Marvell International Ltd.
5  * Haojian Zhuang <haojian.zhuang@marvell.com>
6  * Joseph(Yossi) Hanin <yhanin@marvell.com>
7  * Qiao Zhou <zhouqiao@marvell.com>
8  *
9  * This file is subject to the terms and conditions of the GNU General
10  * Public License. See the file "COPYING" in the main directory of this
11  * archive for more details.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  */
22 
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/err.h>
26 #include <linux/i2c.h>
27 #include <linux/mfd/core.h>
28 #include <linux/mfd/88pm80x.h>
29 #include <linux/slab.h>
30 
31 /* Interrupt Registers */
32 #define PM800_INT_STATUS1		(0x05)
33 #define PM800_ONKEY_INT_STS1		(1 << 0)
34 #define PM800_EXTON_INT_STS1		(1 << 1)
35 #define PM800_CHG_INT_STS1			(1 << 2)
36 #define PM800_BAT_INT_STS1			(1 << 3)
37 #define PM800_RTC_INT_STS1			(1 << 4)
38 #define PM800_CLASSD_OC_INT_STS1	(1 << 5)
39 
40 #define PM800_INT_STATUS2		(0x06)
41 #define PM800_VBAT_INT_STS2		(1 << 0)
42 #define PM800_VSYS_INT_STS2		(1 << 1)
43 #define PM800_VCHG_INT_STS2		(1 << 2)
44 #define PM800_TINT_INT_STS2		(1 << 3)
45 #define PM800_GPADC0_INT_STS2	(1 << 4)
46 #define PM800_TBAT_INT_STS2		(1 << 5)
47 #define PM800_GPADC2_INT_STS2	(1 << 6)
48 #define PM800_GPADC3_INT_STS2	(1 << 7)
49 
50 #define PM800_INT_STATUS3		(0x07)
51 
52 #define PM800_INT_STATUS4		(0x08)
53 #define PM800_GPIO0_INT_STS4		(1 << 0)
54 #define PM800_GPIO1_INT_STS4		(1 << 1)
55 #define PM800_GPIO2_INT_STS4		(1 << 2)
56 #define PM800_GPIO3_INT_STS4		(1 << 3)
57 #define PM800_GPIO4_INT_STS4		(1 << 4)
58 
59 #define PM800_INT_ENA_1		(0x09)
60 #define PM800_ONKEY_INT_ENA1		(1 << 0)
61 #define PM800_EXTON_INT_ENA1		(1 << 1)
62 #define PM800_CHG_INT_ENA1			(1 << 2)
63 #define PM800_BAT_INT_ENA1			(1 << 3)
64 #define PM800_RTC_INT_ENA1			(1 << 4)
65 #define PM800_CLASSD_OC_INT_ENA1	(1 << 5)
66 
67 #define PM800_INT_ENA_2		(0x0A)
68 #define PM800_VBAT_INT_ENA2		(1 << 0)
69 #define PM800_VSYS_INT_ENA2		(1 << 1)
70 #define PM800_VCHG_INT_ENA2		(1 << 2)
71 #define PM800_TINT_INT_ENA2		(1 << 3)
72 
73 #define PM800_INT_ENA_3		(0x0B)
74 #define PM800_GPADC0_INT_ENA3		(1 << 0)
75 #define PM800_GPADC1_INT_ENA3		(1 << 1)
76 #define PM800_GPADC2_INT_ENA3		(1 << 2)
77 #define PM800_GPADC3_INT_ENA3		(1 << 3)
78 #define PM800_GPADC4_INT_ENA3		(1 << 4)
79 
80 #define PM800_INT_ENA_4		(0x0C)
81 #define PM800_GPIO0_INT_ENA4		(1 << 0)
82 #define PM800_GPIO1_INT_ENA4		(1 << 1)
83 #define PM800_GPIO2_INT_ENA4		(1 << 2)
84 #define PM800_GPIO3_INT_ENA4		(1 << 3)
85 #define PM800_GPIO4_INT_ENA4		(1 << 4)
86 
87 /* number of INT_ENA & INT_STATUS regs */
88 #define PM800_INT_REG_NUM			(4)
89 
90 /* Interrupt Number in 88PM800 */
91 enum {
92 	PM800_IRQ_ONKEY,	/*EN1b0 *//*0 */
93 	PM800_IRQ_EXTON,	/*EN1b1 */
94 	PM800_IRQ_CHG,		/*EN1b2 */
95 	PM800_IRQ_BAT,		/*EN1b3 */
96 	PM800_IRQ_RTC,		/*EN1b4 */
97 	PM800_IRQ_CLASSD,	/*EN1b5 *//*5 */
98 	PM800_IRQ_VBAT,		/*EN2b0 */
99 	PM800_IRQ_VSYS,		/*EN2b1 */
100 	PM800_IRQ_VCHG,		/*EN2b2 */
101 	PM800_IRQ_TINT,		/*EN2b3 */
102 	PM800_IRQ_GPADC0,	/*EN3b0 *//*10 */
103 	PM800_IRQ_GPADC1,	/*EN3b1 */
104 	PM800_IRQ_GPADC2,	/*EN3b2 */
105 	PM800_IRQ_GPADC3,	/*EN3b3 */
106 	PM800_IRQ_GPADC4,	/*EN3b4 */
107 	PM800_IRQ_GPIO0,	/*EN4b0 *//*15 */
108 	PM800_IRQ_GPIO1,	/*EN4b1 */
109 	PM800_IRQ_GPIO2,	/*EN4b2 */
110 	PM800_IRQ_GPIO3,	/*EN4b3 */
111 	PM800_IRQ_GPIO4,	/*EN4b4 *//*19 */
112 	PM800_MAX_IRQ,
113 };
114 
115 /* PM800: generation identification number */
116 #define PM800_CHIP_GEN_ID_NUM	0x3
117 
118 static const struct i2c_device_id pm80x_id_table[] = {
119 	{"88PM800", 0},
120 	{} /* NULL terminated */
121 };
122 MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
123 
124 static struct resource rtc_resources[] = {
125 	{
126 	 .name = "88pm80x-rtc",
127 	 .start = PM800_IRQ_RTC,
128 	 .end = PM800_IRQ_RTC,
129 	 .flags = IORESOURCE_IRQ,
130 	 },
131 };
132 
133 static struct mfd_cell rtc_devs[] = {
134 	{
135 	 .name = "88pm80x-rtc",
136 	 .num_resources = ARRAY_SIZE(rtc_resources),
137 	 .resources = &rtc_resources[0],
138 	 .id = -1,
139 	 },
140 };
141 
142 static struct resource onkey_resources[] = {
143 	{
144 	 .name = "88pm80x-onkey",
145 	 .start = PM800_IRQ_ONKEY,
146 	 .end = PM800_IRQ_ONKEY,
147 	 .flags = IORESOURCE_IRQ,
148 	 },
149 };
150 
151 static struct mfd_cell onkey_devs[] = {
152 	{
153 	 .name = "88pm80x-onkey",
154 	 .num_resources = 1,
155 	 .resources = &onkey_resources[0],
156 	 .id = -1,
157 	 },
158 };
159 
160 static struct mfd_cell regulator_devs[] = {
161 	{
162 	 .name = "88pm80x-regulator",
163 	 .id = -1,
164 	},
165 };
166 
167 static const struct regmap_irq pm800_irqs[] = {
168 	/* INT0 */
169 	[PM800_IRQ_ONKEY] = {
170 		.mask = PM800_ONKEY_INT_ENA1,
171 	},
172 	[PM800_IRQ_EXTON] = {
173 		.mask = PM800_EXTON_INT_ENA1,
174 	},
175 	[PM800_IRQ_CHG] = {
176 		.mask = PM800_CHG_INT_ENA1,
177 	},
178 	[PM800_IRQ_BAT] = {
179 		.mask = PM800_BAT_INT_ENA1,
180 	},
181 	[PM800_IRQ_RTC] = {
182 		.mask = PM800_RTC_INT_ENA1,
183 	},
184 	[PM800_IRQ_CLASSD] = {
185 		.mask = PM800_CLASSD_OC_INT_ENA1,
186 	},
187 	/* INT1 */
188 	[PM800_IRQ_VBAT] = {
189 		.reg_offset = 1,
190 		.mask = PM800_VBAT_INT_ENA2,
191 	},
192 	[PM800_IRQ_VSYS] = {
193 		.reg_offset = 1,
194 		.mask = PM800_VSYS_INT_ENA2,
195 	},
196 	[PM800_IRQ_VCHG] = {
197 		.reg_offset = 1,
198 		.mask = PM800_VCHG_INT_ENA2,
199 	},
200 	[PM800_IRQ_TINT] = {
201 		.reg_offset = 1,
202 		.mask = PM800_TINT_INT_ENA2,
203 	},
204 	/* INT2 */
205 	[PM800_IRQ_GPADC0] = {
206 		.reg_offset = 2,
207 		.mask = PM800_GPADC0_INT_ENA3,
208 	},
209 	[PM800_IRQ_GPADC1] = {
210 		.reg_offset = 2,
211 		.mask = PM800_GPADC1_INT_ENA3,
212 	},
213 	[PM800_IRQ_GPADC2] = {
214 		.reg_offset = 2,
215 		.mask = PM800_GPADC2_INT_ENA3,
216 	},
217 	[PM800_IRQ_GPADC3] = {
218 		.reg_offset = 2,
219 		.mask = PM800_GPADC3_INT_ENA3,
220 	},
221 	[PM800_IRQ_GPADC4] = {
222 		.reg_offset = 2,
223 		.mask = PM800_GPADC4_INT_ENA3,
224 	},
225 	/* INT3 */
226 	[PM800_IRQ_GPIO0] = {
227 		.reg_offset = 3,
228 		.mask = PM800_GPIO0_INT_ENA4,
229 	},
230 	[PM800_IRQ_GPIO1] = {
231 		.reg_offset = 3,
232 		.mask = PM800_GPIO1_INT_ENA4,
233 	},
234 	[PM800_IRQ_GPIO2] = {
235 		.reg_offset = 3,
236 		.mask = PM800_GPIO2_INT_ENA4,
237 	},
238 	[PM800_IRQ_GPIO3] = {
239 		.reg_offset = 3,
240 		.mask = PM800_GPIO3_INT_ENA4,
241 	},
242 	[PM800_IRQ_GPIO4] = {
243 		.reg_offset = 3,
244 		.mask = PM800_GPIO4_INT_ENA4,
245 	},
246 };
247 
248 static int device_gpadc_init(struct pm80x_chip *chip,
249 				       struct pm80x_platform_data *pdata)
250 {
251 	struct pm80x_subchip *subchip = chip->subchip;
252 	struct regmap *map = subchip->regmap_gpadc;
253 	int data = 0, mask = 0, ret = 0;
254 
255 	if (!map) {
256 		dev_warn(chip->dev,
257 			 "Warning: gpadc regmap is not available!\n");
258 		return -EINVAL;
259 	}
260 	/*
261 	 * initialize GPADC without activating it turn on GPADC
262 	 * measurments
263 	 */
264 	ret = regmap_update_bits(map,
265 				 PM800_GPADC_MISC_CONFIG2,
266 				 PM800_GPADC_MISC_GPFSM_EN,
267 				 PM800_GPADC_MISC_GPFSM_EN);
268 	if (ret < 0)
269 		goto out;
270 	/*
271 	 * This function configures the ADC as requires for
272 	 * CP implementation.CP does not "own" the ADC configuration
273 	 * registers and relies on AP.
274 	 * Reason: enable automatic ADC measurements needed
275 	 * for CP to get VBAT and RF temperature readings.
276 	 */
277 	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
278 				 PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
279 	if (ret < 0)
280 		goto out;
281 	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
282 				 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
283 				 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
284 	if (ret < 0)
285 		goto out;
286 
287 	/*
288 	 * the defult of PM800 is GPADC operates at 100Ks/s rate
289 	 * and Number of GPADC slots with active current bias prior
290 	 * to GPADC sampling = 1 slot for all GPADCs set for
291 	 * Temprature mesurmants
292 	 */
293 	mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
294 		PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
295 
296 	if (pdata && (pdata->batt_det == 0))
297 		data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
298 			PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
299 	else
300 		data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
301 			PM800_GPADC_GP_BIAS_EN3);
302 
303 	ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
304 	if (ret < 0)
305 		goto out;
306 
307 	dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
308 	return 0;
309 
310 out:
311 	dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
312 	return ret;
313 }
314 
315 static int device_onkey_init(struct pm80x_chip *chip,
316 				struct pm80x_platform_data *pdata)
317 {
318 	int ret;
319 
320 	ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
321 			      ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
322 			      NULL);
323 	if (ret) {
324 		dev_err(chip->dev, "Failed to add onkey subdev\n");
325 		return ret;
326 	}
327 
328 	return 0;
329 }
330 
331 static int device_rtc_init(struct pm80x_chip *chip,
332 				struct pm80x_platform_data *pdata)
333 {
334 	int ret;
335 
336 	if (pdata) {
337 		rtc_devs[0].platform_data = pdata->rtc;
338 		rtc_devs[0].pdata_size =
339 				pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
340 	}
341 	ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
342 			      ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
343 	if (ret) {
344 		dev_err(chip->dev, "Failed to add rtc subdev\n");
345 		return ret;
346 	}
347 
348 	return 0;
349 }
350 
351 static int device_regulator_init(struct pm80x_chip *chip,
352 					   struct pm80x_platform_data *pdata)
353 {
354 	int ret;
355 
356 	ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
357 			      ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
358 	if (ret) {
359 		dev_err(chip->dev, "Failed to add regulator subdev\n");
360 		return ret;
361 	}
362 
363 	return 0;
364 }
365 
366 static int device_irq_init_800(struct pm80x_chip *chip)
367 {
368 	struct regmap *map = chip->regmap;
369 	unsigned long flags = IRQF_ONESHOT;
370 	int data, mask, ret = -EINVAL;
371 
372 	if (!map || !chip->irq) {
373 		dev_err(chip->dev, "incorrect parameters\n");
374 		return -EINVAL;
375 	}
376 
377 	/*
378 	 * irq_mode defines the way of clearing interrupt. it's read-clear by
379 	 * default.
380 	 */
381 	mask =
382 	    PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
383 	    PM800_WAKEUP2_INT_MASK;
384 
385 	data = PM800_WAKEUP2_INT_CLEAR;
386 	ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
387 
388 	if (ret < 0)
389 		goto out;
390 
391 	ret =
392 	    regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
393 				chip->regmap_irq_chip, &chip->irq_data);
394 
395 out:
396 	return ret;
397 }
398 
399 static void device_irq_exit_800(struct pm80x_chip *chip)
400 {
401 	regmap_del_irq_chip(chip->irq, chip->irq_data);
402 }
403 
404 static struct regmap_irq_chip pm800_irq_chip = {
405 	.name = "88pm800",
406 	.irqs = pm800_irqs,
407 	.num_irqs = ARRAY_SIZE(pm800_irqs),
408 
409 	.num_regs = 4,
410 	.status_base = PM800_INT_STATUS1,
411 	.mask_base = PM800_INT_ENA_1,
412 	.ack_base = PM800_INT_STATUS1,
413 	.mask_invert = 1,
414 };
415 
416 static int pm800_pages_init(struct pm80x_chip *chip)
417 {
418 	struct pm80x_subchip *subchip;
419 	struct i2c_client *client = chip->client;
420 
421 	int ret = 0;
422 
423 	subchip = chip->subchip;
424 	if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
425 		return -ENODEV;
426 
427 	/* PM800 block power page */
428 	subchip->power_page = i2c_new_dummy(client->adapter,
429 					    subchip->power_page_addr);
430 	if (subchip->power_page == NULL) {
431 		ret = -ENODEV;
432 		goto out;
433 	}
434 
435 	subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
436 						     &pm80x_regmap_config);
437 	if (IS_ERR(subchip->regmap_power)) {
438 		ret = PTR_ERR(subchip->regmap_power);
439 		dev_err(chip->dev,
440 			"Failed to allocate regmap_power: %d\n", ret);
441 		goto out;
442 	}
443 
444 	i2c_set_clientdata(subchip->power_page, chip);
445 
446 	/* PM800 block GPADC */
447 	subchip->gpadc_page = i2c_new_dummy(client->adapter,
448 					    subchip->gpadc_page_addr);
449 	if (subchip->gpadc_page == NULL) {
450 		ret = -ENODEV;
451 		goto out;
452 	}
453 
454 	subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
455 						     &pm80x_regmap_config);
456 	if (IS_ERR(subchip->regmap_gpadc)) {
457 		ret = PTR_ERR(subchip->regmap_gpadc);
458 		dev_err(chip->dev,
459 			"Failed to allocate regmap_gpadc: %d\n", ret);
460 		goto out;
461 	}
462 	i2c_set_clientdata(subchip->gpadc_page, chip);
463 
464 out:
465 	return ret;
466 }
467 
468 static void pm800_pages_exit(struct pm80x_chip *chip)
469 {
470 	struct pm80x_subchip *subchip;
471 
472 	subchip = chip->subchip;
473 
474 	if (subchip && subchip->power_page)
475 		i2c_unregister_device(subchip->power_page);
476 
477 	if (subchip && subchip->gpadc_page)
478 		i2c_unregister_device(subchip->gpadc_page);
479 }
480 
481 static int device_800_init(struct pm80x_chip *chip,
482 				     struct pm80x_platform_data *pdata)
483 {
484 	int ret;
485 	unsigned int val;
486 
487 	/*
488 	 * alarm wake up bit will be clear in device_irq_init(),
489 	 * read before that
490 	 */
491 	ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
492 	if (ret < 0) {
493 		dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
494 		goto out;
495 	}
496 	if (val & PM800_ALARM_WAKEUP) {
497 		if (pdata && pdata->rtc)
498 			pdata->rtc->rtc_wakeup = 1;
499 	}
500 
501 	ret = device_gpadc_init(chip, pdata);
502 	if (ret < 0) {
503 		dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
504 		goto out;
505 	}
506 
507 	chip->regmap_irq_chip = &pm800_irq_chip;
508 
509 	ret = device_irq_init_800(chip);
510 	if (ret < 0) {
511 		dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
512 		goto out;
513 	}
514 
515 	ret = device_onkey_init(chip, pdata);
516 	if (ret) {
517 		dev_err(chip->dev, "Failed to add onkey subdev\n");
518 		goto out_dev;
519 	}
520 
521 	ret = device_rtc_init(chip, pdata);
522 	if (ret) {
523 		dev_err(chip->dev, "Failed to add rtc subdev\n");
524 		goto out;
525 	}
526 
527 	ret = device_regulator_init(chip, pdata);
528 	if (ret) {
529 		dev_err(chip->dev, "Failed to add regulators subdev\n");
530 		goto out;
531 	}
532 
533 	return 0;
534 out_dev:
535 	mfd_remove_devices(chip->dev);
536 	device_irq_exit_800(chip);
537 out:
538 	return ret;
539 }
540 
541 static int pm800_probe(struct i2c_client *client,
542 				 const struct i2c_device_id *id)
543 {
544 	int ret = 0;
545 	struct pm80x_chip *chip;
546 	struct pm80x_platform_data *pdata = dev_get_platdata(&client->dev);
547 	struct pm80x_subchip *subchip;
548 
549 	ret = pm80x_init(client);
550 	if (ret) {
551 		dev_err(&client->dev, "pm800_init fail\n");
552 		goto out_init;
553 	}
554 
555 	chip = i2c_get_clientdata(client);
556 
557 	/* init subchip for PM800 */
558 	subchip =
559 	    devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
560 			 GFP_KERNEL);
561 	if (!subchip) {
562 		ret = -ENOMEM;
563 		goto err_subchip_alloc;
564 	}
565 
566 	/* pm800 has 2 addtional pages to support power and gpadc. */
567 	subchip->power_page_addr = client->addr + 1;
568 	subchip->gpadc_page_addr = client->addr + 2;
569 	chip->subchip = subchip;
570 
571 	ret = pm800_pages_init(chip);
572 	if (ret) {
573 		dev_err(&client->dev, "pm800_pages_init failed!\n");
574 		goto err_page_init;
575 	}
576 
577 	ret = device_800_init(chip, pdata);
578 	if (ret) {
579 		dev_err(chip->dev, "Failed to initialize 88pm800 devices\n");
580 		goto err_device_init;
581 	}
582 
583 	if (pdata && pdata->plat_config)
584 		pdata->plat_config(chip, pdata);
585 
586 	return 0;
587 
588 err_device_init:
589 	pm800_pages_exit(chip);
590 err_page_init:
591 err_subchip_alloc:
592 	pm80x_deinit();
593 out_init:
594 	return ret;
595 }
596 
597 static int pm800_remove(struct i2c_client *client)
598 {
599 	struct pm80x_chip *chip = i2c_get_clientdata(client);
600 
601 	mfd_remove_devices(chip->dev);
602 	device_irq_exit_800(chip);
603 
604 	pm800_pages_exit(chip);
605 	pm80x_deinit();
606 
607 	return 0;
608 }
609 
610 static struct i2c_driver pm800_driver = {
611 	.driver = {
612 		.name = "88PM800",
613 		.owner = THIS_MODULE,
614 		.pm = &pm80x_pm_ops,
615 		},
616 	.probe = pm800_probe,
617 	.remove = pm800_remove,
618 	.id_table = pm80x_id_table,
619 };
620 
621 static int __init pm800_i2c_init(void)
622 {
623 	return i2c_add_driver(&pm800_driver);
624 }
625 subsys_initcall(pm800_i2c_init);
626 
627 static void __exit pm800_i2c_exit(void)
628 {
629 	i2c_del_driver(&pm800_driver);
630 }
631 module_exit(pm800_i2c_exit);
632 
633 MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
634 MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
635 MODULE_LICENSE("GPL");
636