1 /* Realtek PCI-Express Memstick Card Interface driver 2 * 3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2, or (at your option) any 8 * later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, see <http://www.gnu.org/licenses/>. 17 * 18 * Author: 19 * Wei WANG <wei_wang@realsil.com.cn> 20 */ 21 22 #include <linux/module.h> 23 #include <linux/highmem.h> 24 #include <linux/delay.h> 25 #include <linux/platform_device.h> 26 #include <linux/memstick.h> 27 #include <linux/mfd/rtsx_pci.h> 28 #include <asm/unaligned.h> 29 30 struct realtek_pci_ms { 31 struct platform_device *pdev; 32 struct rtsx_pcr *pcr; 33 struct memstick_host *msh; 34 struct memstick_request *req; 35 36 struct mutex host_mutex; 37 struct work_struct handle_req; 38 39 u8 ssc_depth; 40 unsigned int clock; 41 unsigned char ifmode; 42 bool eject; 43 }; 44 45 static inline struct device *ms_dev(struct realtek_pci_ms *host) 46 { 47 return &(host->pdev->dev); 48 } 49 50 static inline void ms_clear_error(struct realtek_pci_ms *host) 51 { 52 rtsx_pci_write_register(host->pcr, CARD_STOP, 53 MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR); 54 } 55 56 #ifdef DEBUG 57 58 static void ms_print_debug_regs(struct realtek_pci_ms *host) 59 { 60 struct rtsx_pcr *pcr = host->pcr; 61 u16 i; 62 u8 *ptr; 63 64 /* Print MS host internal registers */ 65 rtsx_pci_init_cmd(pcr); 66 for (i = 0xFD40; i <= 0xFD44; i++) 67 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); 68 for (i = 0xFD52; i <= 0xFD69; i++) 69 rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0); 70 rtsx_pci_send_cmd(pcr, 100); 71 72 ptr = rtsx_pci_get_cmd_data(pcr); 73 for (i = 0xFD40; i <= 0xFD44; i++) 74 dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++)); 75 for (i = 0xFD52; i <= 0xFD69; i++) 76 dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++)); 77 } 78 79 #else 80 81 #define ms_print_debug_regs(host) 82 83 #endif 84 85 static int ms_power_on(struct realtek_pci_ms *host) 86 { 87 struct rtsx_pcr *pcr = host->pcr; 88 int err; 89 90 rtsx_pci_init_cmd(pcr); 91 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, MS_MOD_SEL); 92 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE, 93 CARD_SHARE_MASK, CARD_SHARE_48_MS); 94 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 95 MS_CLK_EN, MS_CLK_EN); 96 err = rtsx_pci_send_cmd(pcr, 100); 97 if (err < 0) 98 return err; 99 100 err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_MS_CARD); 101 if (err < 0) 102 return err; 103 104 err = rtsx_pci_card_power_on(pcr, RTSX_MS_CARD); 105 if (err < 0) 106 return err; 107 108 /* Wait ms power stable */ 109 msleep(150); 110 111 err = rtsx_pci_write_register(pcr, CARD_OE, 112 MS_OUTPUT_EN, MS_OUTPUT_EN); 113 if (err < 0) 114 return err; 115 116 return 0; 117 } 118 119 static int ms_power_off(struct realtek_pci_ms *host) 120 { 121 struct rtsx_pcr *pcr = host->pcr; 122 int err; 123 124 rtsx_pci_init_cmd(pcr); 125 126 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, MS_CLK_EN, 0); 127 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, MS_OUTPUT_EN, 0); 128 129 err = rtsx_pci_send_cmd(pcr, 100); 130 if (err < 0) 131 return err; 132 133 err = rtsx_pci_card_power_off(pcr, RTSX_MS_CARD); 134 if (err < 0) 135 return err; 136 137 return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD); 138 } 139 140 static int ms_transfer_data(struct realtek_pci_ms *host, unsigned char data_dir, 141 u8 tpc, u8 cfg, struct scatterlist *sg) 142 { 143 struct rtsx_pcr *pcr = host->pcr; 144 int err; 145 unsigned int length = sg->length; 146 u16 sec_cnt = (u16)(length / 512); 147 u8 val, trans_mode, dma_dir; 148 149 dev_dbg(ms_dev(host), "%s: tpc = 0x%02x, data_dir = %s, length = %d\n", 150 __func__, tpc, (data_dir == READ) ? "READ" : "WRITE", 151 length); 152 153 if (data_dir == READ) { 154 dma_dir = DMA_DIR_FROM_CARD; 155 trans_mode = MS_TM_AUTO_READ; 156 } else { 157 dma_dir = DMA_DIR_TO_CARD; 158 trans_mode = MS_TM_AUTO_WRITE; 159 } 160 161 rtsx_pci_init_cmd(pcr); 162 163 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); 164 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_H, 165 0xFF, (u8)(sec_cnt >> 8)); 166 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_L, 167 0xFF, (u8)sec_cnt); 168 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); 169 170 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, 171 DMA_DONE_INT, DMA_DONE_INT); 172 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(length >> 24)); 173 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(length >> 16)); 174 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(length >> 8)); 175 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)length); 176 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, 177 0x03 | DMA_PACK_SIZE_MASK, dma_dir | DMA_EN | DMA_512); 178 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, 179 0x01, RING_BUFFER); 180 181 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER, 182 0xFF, MS_TRANSFER_START | trans_mode); 183 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER, 184 MS_TRANSFER_END, MS_TRANSFER_END); 185 186 rtsx_pci_send_cmd_no_wait(pcr); 187 188 err = rtsx_pci_transfer_data(pcr, sg, 1, data_dir == READ, 10000); 189 if (err < 0) { 190 ms_clear_error(host); 191 return err; 192 } 193 194 rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val); 195 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) 196 return -EIO; 197 198 return 0; 199 } 200 201 static int ms_write_bytes(struct realtek_pci_ms *host, u8 tpc, 202 u8 cfg, u8 cnt, u8 *data, u8 *int_reg) 203 { 204 struct rtsx_pcr *pcr = host->pcr; 205 int err, i; 206 207 dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc); 208 209 if (!data) 210 return -EINVAL; 211 212 rtsx_pci_init_cmd(pcr); 213 214 for (i = 0; i < cnt; i++) 215 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 216 PPBUF_BASE2 + i, 0xFF, data[i]); 217 if (cnt % 2) 218 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 219 PPBUF_BASE2 + i, 0xFF, 0xFF); 220 221 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); 222 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); 223 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); 224 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, 225 0x01, PINGPONG_BUFFER); 226 227 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER, 228 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES); 229 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER, 230 MS_TRANSFER_END, MS_TRANSFER_END); 231 if (int_reg) 232 rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0); 233 234 err = rtsx_pci_send_cmd(pcr, 5000); 235 if (err < 0) { 236 u8 val; 237 238 rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val); 239 dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val); 240 241 if (int_reg) 242 *int_reg = val & 0x0F; 243 244 ms_print_debug_regs(host); 245 246 ms_clear_error(host); 247 248 if (!(tpc & 0x08)) { 249 if (val & MS_CRC16_ERR) 250 return -EIO; 251 } else { 252 if (!(val & 0x80)) { 253 if (val & (MS_INT_ERR | MS_INT_CMDNK)) 254 return -EIO; 255 } 256 } 257 258 return -ETIMEDOUT; 259 } 260 261 if (int_reg) { 262 u8 *ptr = rtsx_pci_get_cmd_data(pcr) + 1; 263 *int_reg = *ptr & 0x0F; 264 } 265 266 return 0; 267 } 268 269 static int ms_read_bytes(struct realtek_pci_ms *host, u8 tpc, 270 u8 cfg, u8 cnt, u8 *data, u8 *int_reg) 271 { 272 struct rtsx_pcr *pcr = host->pcr; 273 int err, i; 274 u8 *ptr; 275 276 dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc); 277 278 if (!data) 279 return -EINVAL; 280 281 rtsx_pci_init_cmd(pcr); 282 283 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc); 284 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt); 285 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg); 286 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, 287 0x01, PINGPONG_BUFFER); 288 289 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER, 290 0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES); 291 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER, 292 MS_TRANSFER_END, MS_TRANSFER_END); 293 for (i = 0; i < cnt - 1; i++) 294 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0); 295 if (cnt % 2) 296 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + cnt, 0, 0); 297 else 298 rtsx_pci_add_cmd(pcr, READ_REG_CMD, 299 PPBUF_BASE2 + cnt - 1, 0, 0); 300 if (int_reg) 301 rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0); 302 303 err = rtsx_pci_send_cmd(pcr, 5000); 304 if (err < 0) { 305 u8 val; 306 307 rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val); 308 dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val); 309 310 if (int_reg) 311 *int_reg = val & 0x0F; 312 313 ms_print_debug_regs(host); 314 315 ms_clear_error(host); 316 317 if (!(tpc & 0x08)) { 318 if (val & MS_CRC16_ERR) 319 return -EIO; 320 } else { 321 if (!(val & 0x80)) { 322 if (val & (MS_INT_ERR | MS_INT_CMDNK)) 323 return -EIO; 324 } 325 } 326 327 return -ETIMEDOUT; 328 } 329 330 ptr = rtsx_pci_get_cmd_data(pcr) + 1; 331 for (i = 0; i < cnt; i++) 332 data[i] = *ptr++; 333 334 if (int_reg) 335 *int_reg = *ptr & 0x0F; 336 337 return 0; 338 } 339 340 static int rtsx_pci_ms_issue_cmd(struct realtek_pci_ms *host) 341 { 342 struct memstick_request *req = host->req; 343 int err = 0; 344 u8 cfg = 0, int_reg; 345 346 dev_dbg(ms_dev(host), "%s\n", __func__); 347 348 if (req->need_card_int) { 349 if (host->ifmode != MEMSTICK_SERIAL) 350 cfg = WAIT_INT; 351 } 352 353 if (req->long_data) { 354 err = ms_transfer_data(host, req->data_dir, 355 req->tpc, cfg, &(req->sg)); 356 } else { 357 if (req->data_dir == READ) { 358 err = ms_read_bytes(host, req->tpc, cfg, 359 req->data_len, req->data, &int_reg); 360 } else { 361 err = ms_write_bytes(host, req->tpc, cfg, 362 req->data_len, req->data, &int_reg); 363 } 364 } 365 if (err < 0) 366 return err; 367 368 if (req->need_card_int && (host->ifmode == MEMSTICK_SERIAL)) { 369 err = ms_read_bytes(host, MS_TPC_GET_INT, 370 NO_WAIT_INT, 1, &int_reg, NULL); 371 if (err < 0) 372 return err; 373 } 374 375 if (req->need_card_int) { 376 dev_dbg(ms_dev(host), "int_reg: 0x%02x\n", int_reg); 377 378 if (int_reg & MS_INT_CMDNK) 379 req->int_reg |= MEMSTICK_INT_CMDNAK; 380 if (int_reg & MS_INT_BREQ) 381 req->int_reg |= MEMSTICK_INT_BREQ; 382 if (int_reg & MS_INT_ERR) 383 req->int_reg |= MEMSTICK_INT_ERR; 384 if (int_reg & MS_INT_CED) 385 req->int_reg |= MEMSTICK_INT_CED; 386 } 387 388 return 0; 389 } 390 391 static void rtsx_pci_ms_handle_req(struct work_struct *work) 392 { 393 struct realtek_pci_ms *host = container_of(work, 394 struct realtek_pci_ms, handle_req); 395 struct rtsx_pcr *pcr = host->pcr; 396 struct memstick_host *msh = host->msh; 397 int rc; 398 399 mutex_lock(&pcr->pcr_mutex); 400 401 rtsx_pci_start_run(pcr); 402 403 rtsx_pci_switch_clock(host->pcr, host->clock, host->ssc_depth, 404 false, true, false); 405 rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, MS_MOD_SEL); 406 rtsx_pci_write_register(pcr, CARD_SHARE_MODE, 407 CARD_SHARE_MASK, CARD_SHARE_48_MS); 408 409 if (!host->req) { 410 do { 411 rc = memstick_next_req(msh, &host->req); 412 dev_dbg(ms_dev(host), "next req %d\n", rc); 413 414 if (!rc) 415 host->req->error = rtsx_pci_ms_issue_cmd(host); 416 } while (!rc); 417 } 418 419 mutex_unlock(&pcr->pcr_mutex); 420 } 421 422 static void rtsx_pci_ms_request(struct memstick_host *msh) 423 { 424 struct realtek_pci_ms *host = memstick_priv(msh); 425 426 dev_dbg(ms_dev(host), "--> %s\n", __func__); 427 428 if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD)) 429 return; 430 431 schedule_work(&host->handle_req); 432 } 433 434 static int rtsx_pci_ms_set_param(struct memstick_host *msh, 435 enum memstick_param param, int value) 436 { 437 struct realtek_pci_ms *host = memstick_priv(msh); 438 struct rtsx_pcr *pcr = host->pcr; 439 unsigned int clock = 0; 440 u8 ssc_depth = 0; 441 int err; 442 443 dev_dbg(ms_dev(host), "%s: param = %d, value = %d\n", 444 __func__, param, value); 445 446 err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD); 447 if (err) 448 return err; 449 450 switch (param) { 451 case MEMSTICK_POWER: 452 if (value == MEMSTICK_POWER_ON) 453 err = ms_power_on(host); 454 else if (value == MEMSTICK_POWER_OFF) 455 err = ms_power_off(host); 456 else 457 return -EINVAL; 458 break; 459 460 case MEMSTICK_INTERFACE: 461 if (value == MEMSTICK_SERIAL) { 462 clock = 19000000; 463 ssc_depth = RTSX_SSC_DEPTH_500K; 464 465 err = rtsx_pci_write_register(pcr, MS_CFG, 466 0x18, MS_BUS_WIDTH_1); 467 if (err < 0) 468 return err; 469 } else if (value == MEMSTICK_PAR4) { 470 clock = 39000000; 471 ssc_depth = RTSX_SSC_DEPTH_1M; 472 473 err = rtsx_pci_write_register(pcr, MS_CFG, 474 0x58, MS_BUS_WIDTH_4 | PUSH_TIME_ODD); 475 if (err < 0) 476 return err; 477 } else { 478 return -EINVAL; 479 } 480 481 err = rtsx_pci_switch_clock(pcr, clock, 482 ssc_depth, false, true, false); 483 if (err < 0) 484 return err; 485 486 host->ssc_depth = ssc_depth; 487 host->clock = clock; 488 host->ifmode = value; 489 break; 490 } 491 492 return 0; 493 } 494 495 #ifdef CONFIG_PM 496 497 static int rtsx_pci_ms_suspend(struct platform_device *pdev, pm_message_t state) 498 { 499 struct realtek_pci_ms *host = platform_get_drvdata(pdev); 500 struct memstick_host *msh = host->msh; 501 502 dev_dbg(ms_dev(host), "--> %s\n", __func__); 503 504 memstick_suspend_host(msh); 505 return 0; 506 } 507 508 static int rtsx_pci_ms_resume(struct platform_device *pdev) 509 { 510 struct realtek_pci_ms *host = platform_get_drvdata(pdev); 511 struct memstick_host *msh = host->msh; 512 513 dev_dbg(ms_dev(host), "--> %s\n", __func__); 514 515 memstick_resume_host(msh); 516 return 0; 517 } 518 519 #else /* CONFIG_PM */ 520 521 #define rtsx_pci_ms_suspend NULL 522 #define rtsx_pci_ms_resume NULL 523 524 #endif /* CONFIG_PM */ 525 526 static void rtsx_pci_ms_card_event(struct platform_device *pdev) 527 { 528 struct realtek_pci_ms *host = platform_get_drvdata(pdev); 529 530 memstick_detect_change(host->msh); 531 } 532 533 static int rtsx_pci_ms_drv_probe(struct platform_device *pdev) 534 { 535 struct memstick_host *msh; 536 struct realtek_pci_ms *host; 537 struct rtsx_pcr *pcr; 538 struct pcr_handle *handle = pdev->dev.platform_data; 539 int rc; 540 541 if (!handle) 542 return -ENXIO; 543 544 pcr = handle->pcr; 545 if (!pcr) 546 return -ENXIO; 547 548 dev_dbg(&(pdev->dev), 549 ": Realtek PCI-E Memstick controller found\n"); 550 551 msh = memstick_alloc_host(sizeof(*host), &pdev->dev); 552 if (!msh) 553 return -ENOMEM; 554 555 host = memstick_priv(msh); 556 host->pcr = pcr; 557 host->msh = msh; 558 host->pdev = pdev; 559 platform_set_drvdata(pdev, host); 560 pcr->slots[RTSX_MS_CARD].p_dev = pdev; 561 pcr->slots[RTSX_MS_CARD].card_event = rtsx_pci_ms_card_event; 562 563 mutex_init(&host->host_mutex); 564 565 INIT_WORK(&host->handle_req, rtsx_pci_ms_handle_req); 566 msh->request = rtsx_pci_ms_request; 567 msh->set_param = rtsx_pci_ms_set_param; 568 msh->caps = MEMSTICK_CAP_PAR4; 569 570 rc = memstick_add_host(msh); 571 if (rc) { 572 memstick_free_host(msh); 573 return rc; 574 } 575 576 return 0; 577 } 578 579 static int rtsx_pci_ms_drv_remove(struct platform_device *pdev) 580 { 581 struct realtek_pci_ms *host = platform_get_drvdata(pdev); 582 struct rtsx_pcr *pcr; 583 struct memstick_host *msh; 584 int rc; 585 586 if (!host) 587 return 0; 588 589 pcr = host->pcr; 590 pcr->slots[RTSX_MS_CARD].p_dev = NULL; 591 pcr->slots[RTSX_MS_CARD].card_event = NULL; 592 msh = host->msh; 593 host->eject = true; 594 595 mutex_lock(&host->host_mutex); 596 if (host->req) { 597 dev_dbg(&(pdev->dev), 598 "%s: Controller removed during transfer\n", 599 dev_name(&msh->dev)); 600 601 rtsx_pci_complete_unfinished_transfer(pcr); 602 603 host->req->error = -ENOMEDIUM; 604 do { 605 rc = memstick_next_req(msh, &host->req); 606 if (!rc) 607 host->req->error = -ENOMEDIUM; 608 } while (!rc); 609 } 610 mutex_unlock(&host->host_mutex); 611 612 memstick_remove_host(msh); 613 memstick_free_host(msh); 614 615 dev_dbg(&(pdev->dev), 616 ": Realtek PCI-E Memstick controller has been removed\n"); 617 618 return 0; 619 } 620 621 static struct platform_device_id rtsx_pci_ms_ids[] = { 622 { 623 .name = DRV_NAME_RTSX_PCI_MS, 624 }, { 625 /* sentinel */ 626 } 627 }; 628 MODULE_DEVICE_TABLE(platform, rtsx_pci_ms_ids); 629 630 static struct platform_driver rtsx_pci_ms_driver = { 631 .probe = rtsx_pci_ms_drv_probe, 632 .remove = rtsx_pci_ms_drv_remove, 633 .id_table = rtsx_pci_ms_ids, 634 .suspend = rtsx_pci_ms_suspend, 635 .resume = rtsx_pci_ms_resume, 636 .driver = { 637 .owner = THIS_MODULE, 638 .name = DRV_NAME_RTSX_PCI_MS, 639 }, 640 }; 641 module_platform_driver(rtsx_pci_ms_driver); 642 643 MODULE_LICENSE("GPL"); 644 MODULE_AUTHOR("Wei WANG <wei_wang@realsil.com.cn>"); 645 MODULE_DESCRIPTION("Realtek PCI-E Memstick Card Host Driver"); 646