1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2010 - Maxim Levitsky 4 * driver for Ricoh memstick readers 5 */ 6 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/freezer.h> 10 #include <linux/jiffies.h> 11 #include <linux/interrupt.h> 12 #include <linux/pci.h> 13 #include <linux/pci_ids.h> 14 #include <linux/delay.h> 15 #include <linux/slab.h> 16 #include <linux/kthread.h> 17 #include <linux/sched.h> 18 #include <linux/highmem.h> 19 #include <asm/byteorder.h> 20 #include <linux/swab.h> 21 #include "r592.h" 22 23 static bool r592_enable_dma = 1; 24 static int debug; 25 26 static const char *tpc_names[] = { 27 "MS_TPC_READ_MG_STATUS", 28 "MS_TPC_READ_LONG_DATA", 29 "MS_TPC_READ_SHORT_DATA", 30 "MS_TPC_READ_REG", 31 "MS_TPC_READ_QUAD_DATA", 32 "INVALID", 33 "MS_TPC_GET_INT", 34 "MS_TPC_SET_RW_REG_ADRS", 35 "MS_TPC_EX_SET_CMD", 36 "MS_TPC_WRITE_QUAD_DATA", 37 "MS_TPC_WRITE_REG", 38 "MS_TPC_WRITE_SHORT_DATA", 39 "MS_TPC_WRITE_LONG_DATA", 40 "MS_TPC_SET_CMD", 41 }; 42 43 /** 44 * memstick_debug_get_tpc_name - debug helper that returns string for 45 * a TPC number 46 */ 47 const char *memstick_debug_get_tpc_name(int tpc) 48 { 49 return tpc_names[tpc-1]; 50 } 51 EXPORT_SYMBOL(memstick_debug_get_tpc_name); 52 53 54 /* Read a register*/ 55 static inline u32 r592_read_reg(struct r592_device *dev, int address) 56 { 57 u32 value = readl(dev->mmio + address); 58 dbg_reg("reg #%02d == 0x%08x", address, value); 59 return value; 60 } 61 62 /* Write a register */ 63 static inline void r592_write_reg(struct r592_device *dev, 64 int address, u32 value) 65 { 66 dbg_reg("reg #%02d <- 0x%08x", address, value); 67 writel(value, dev->mmio + address); 68 } 69 70 /* Reads a big endian DWORD register */ 71 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address) 72 { 73 u32 value = __raw_readl(dev->mmio + address); 74 dbg_reg("reg #%02d == 0x%08x", address, value); 75 return be32_to_cpu(value); 76 } 77 78 /* Writes a big endian DWORD register */ 79 static inline void r592_write_reg_raw_be(struct r592_device *dev, 80 int address, u32 value) 81 { 82 dbg_reg("reg #%02d <- 0x%08x", address, value); 83 __raw_writel(cpu_to_be32(value), dev->mmio + address); 84 } 85 86 /* Set specific bits in a register (little endian) */ 87 static inline void r592_set_reg_mask(struct r592_device *dev, 88 int address, u32 mask) 89 { 90 u32 reg = readl(dev->mmio + address); 91 dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg); 92 writel(reg | mask , dev->mmio + address); 93 } 94 95 /* Clear specific bits in a register (little endian) */ 96 static inline void r592_clear_reg_mask(struct r592_device *dev, 97 int address, u32 mask) 98 { 99 u32 reg = readl(dev->mmio + address); 100 dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)", 101 address, ~mask, reg, mask); 102 writel(reg & ~mask, dev->mmio + address); 103 } 104 105 106 /* Wait for status bits while checking for errors */ 107 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask) 108 { 109 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 110 u32 reg = r592_read_reg(dev, R592_STATUS); 111 112 if ((reg & mask) == wanted_mask) 113 return 0; 114 115 while (time_before(jiffies, timeout)) { 116 117 reg = r592_read_reg(dev, R592_STATUS); 118 119 if ((reg & mask) == wanted_mask) 120 return 0; 121 122 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)) 123 return -EIO; 124 125 cpu_relax(); 126 } 127 return -ETIME; 128 } 129 130 131 /* Enable/disable device */ 132 static int r592_enable_device(struct r592_device *dev, bool enable) 133 { 134 dbg("%sabling the device", enable ? "en" : "dis"); 135 136 if (enable) { 137 138 /* Power up the card */ 139 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1); 140 141 /* Perform a reset */ 142 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); 143 144 msleep(100); 145 } else 146 /* Power down the card */ 147 r592_write_reg(dev, R592_POWER, 0); 148 149 return 0; 150 } 151 152 /* Set serial/parallel mode */ 153 static int r592_set_mode(struct r592_device *dev, bool parallel_mode) 154 { 155 if (!parallel_mode) { 156 dbg("switching to serial mode"); 157 158 /* Set serial mode */ 159 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL); 160 161 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20); 162 163 } else { 164 dbg("switching to parallel mode"); 165 166 /* This setting should be set _before_ switch TPC */ 167 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20); 168 169 r592_clear_reg_mask(dev, R592_IO, 170 R592_IO_SERIAL1 | R592_IO_SERIAL2); 171 172 /* Set the parallel mode now */ 173 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL); 174 } 175 176 dev->parallel_mode = parallel_mode; 177 return 0; 178 } 179 180 /* Perform a controller reset without powering down the card */ 181 static void r592_host_reset(struct r592_device *dev) 182 { 183 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); 184 msleep(100); 185 r592_set_mode(dev, dev->parallel_mode); 186 } 187 188 #ifdef CONFIG_PM_SLEEP 189 /* Disable all hardware interrupts */ 190 static void r592_clear_interrupts(struct r592_device *dev) 191 { 192 /* Disable & ACK all interrupts */ 193 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK); 194 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK); 195 } 196 #endif 197 198 /* Tests if there is an CRC error */ 199 static int r592_test_io_error(struct r592_device *dev) 200 { 201 if (!(r592_read_reg(dev, R592_STATUS) & 202 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))) 203 return 0; 204 205 return -EIO; 206 } 207 208 /* Ensure that FIFO is ready for use */ 209 static int r592_test_fifo_empty(struct r592_device *dev) 210 { 211 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) 212 return 0; 213 214 dbg("FIFO not ready, trying to reset the device"); 215 r592_host_reset(dev); 216 217 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) 218 return 0; 219 220 message("FIFO still not ready, giving up"); 221 return -EIO; 222 } 223 224 /* Activates the DMA transfer from to FIFO */ 225 static void r592_start_dma(struct r592_device *dev, bool is_write) 226 { 227 unsigned long flags; 228 u32 reg; 229 spin_lock_irqsave(&dev->irq_lock, flags); 230 231 /* Ack interrupts (just in case) + enable them */ 232 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); 233 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); 234 235 /* Set DMA address */ 236 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg)); 237 238 /* Enable the DMA */ 239 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS); 240 reg |= R592_FIFO_DMA_SETTINGS_EN; 241 242 if (!is_write) 243 reg |= R592_FIFO_DMA_SETTINGS_DIR; 244 else 245 reg &= ~R592_FIFO_DMA_SETTINGS_DIR; 246 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg); 247 248 spin_unlock_irqrestore(&dev->irq_lock, flags); 249 } 250 251 /* Cleanups DMA related settings */ 252 static void r592_stop_dma(struct r592_device *dev, int error) 253 { 254 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS, 255 R592_FIFO_DMA_SETTINGS_EN); 256 257 /* This is only a precation */ 258 r592_write_reg(dev, R592_FIFO_DMA, 259 dev->dummy_dma_page_physical_address); 260 261 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); 262 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); 263 dev->dma_error = error; 264 } 265 266 /* Test if hardware supports DMA */ 267 static void r592_check_dma(struct r592_device *dev) 268 { 269 dev->dma_capable = r592_enable_dma && 270 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) & 271 R592_FIFO_DMA_SETTINGS_CAP); 272 } 273 274 /* Transfers fifo contents in/out using DMA */ 275 static int r592_transfer_fifo_dma(struct r592_device *dev) 276 { 277 int len, sg_count; 278 bool is_write; 279 280 if (!dev->dma_capable || !dev->req->long_data) 281 return -EINVAL; 282 283 len = dev->req->sg.length; 284 is_write = dev->req->data_dir == WRITE; 285 286 if (len != R592_LFIFO_SIZE) 287 return -EINVAL; 288 289 dbg_verbose("doing dma transfer"); 290 291 dev->dma_error = 0; 292 reinit_completion(&dev->dma_done); 293 294 /* TODO: hidden assumption about nenth beeing always 1 */ 295 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? 296 DMA_TO_DEVICE : DMA_FROM_DEVICE); 297 298 if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) { 299 message("problem in dma_map_sg"); 300 return -EIO; 301 } 302 303 r592_start_dma(dev, is_write); 304 305 /* Wait for DMA completion */ 306 if (!wait_for_completion_timeout( 307 &dev->dma_done, msecs_to_jiffies(1000))) { 308 message("DMA timeout"); 309 r592_stop_dma(dev, -ETIMEDOUT); 310 } 311 312 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? 313 DMA_TO_DEVICE : DMA_FROM_DEVICE); 314 315 return dev->dma_error; 316 } 317 318 /* 319 * Writes the FIFO in 4 byte chunks. 320 * If length isn't 4 byte aligned, rest of the data if put to a fifo 321 * to be written later 322 * Use r592_flush_fifo_write to flush that fifo when writing for the 323 * last time 324 */ 325 static void r592_write_fifo_pio(struct r592_device *dev, 326 unsigned char *buffer, int len) 327 { 328 /* flush spill from former write */ 329 if (!kfifo_is_empty(&dev->pio_fifo)) { 330 331 u8 tmp[4] = {0}; 332 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len); 333 334 if (!kfifo_is_full(&dev->pio_fifo)) 335 return; 336 len -= copy_len; 337 buffer += copy_len; 338 339 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4); 340 WARN_ON(copy_len != 4); 341 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp); 342 } 343 344 WARN_ON(!kfifo_is_empty(&dev->pio_fifo)); 345 346 /* write full dwords */ 347 while (len >= 4) { 348 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer); 349 buffer += 4; 350 len -= 4; 351 } 352 353 /* put remaining bytes to the spill */ 354 if (len) 355 kfifo_in(&dev->pio_fifo, buffer, len); 356 } 357 358 /* Flushes the temporary FIFO used to make aligned DWORD writes */ 359 static void r592_flush_fifo_write(struct r592_device *dev) 360 { 361 int ret; 362 u8 buffer[4] = { 0 }; 363 364 if (kfifo_is_empty(&dev->pio_fifo)) 365 return; 366 367 ret = kfifo_out(&dev->pio_fifo, buffer, 4); 368 /* intentionally ignore __must_check return code */ 369 (void)ret; 370 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer); 371 } 372 373 /* 374 * Read a fifo in 4 bytes chunks. 375 * If input doesn't fit the buffer, it places bytes of last dword in spill 376 * buffer, so that they don't get lost on last read, just throw these away. 377 */ 378 static void r592_read_fifo_pio(struct r592_device *dev, 379 unsigned char *buffer, int len) 380 { 381 u8 tmp[4]; 382 383 /* Read from last spill */ 384 if (!kfifo_is_empty(&dev->pio_fifo)) { 385 int bytes_copied = 386 kfifo_out(&dev->pio_fifo, buffer, min(4, len)); 387 buffer += bytes_copied; 388 len -= bytes_copied; 389 390 if (!kfifo_is_empty(&dev->pio_fifo)) 391 return; 392 } 393 394 /* Reads dwords from FIFO */ 395 while (len >= 4) { 396 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO); 397 buffer += 4; 398 len -= 4; 399 } 400 401 if (len) { 402 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO); 403 kfifo_in(&dev->pio_fifo, tmp, 4); 404 len -= kfifo_out(&dev->pio_fifo, buffer, len); 405 } 406 407 WARN_ON(len); 408 return; 409 } 410 411 /* Transfers actual data using PIO. */ 412 static int r592_transfer_fifo_pio(struct r592_device *dev) 413 { 414 unsigned long flags; 415 416 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; 417 struct sg_mapping_iter miter; 418 419 kfifo_reset(&dev->pio_fifo); 420 421 if (!dev->req->long_data) { 422 if (is_write) { 423 r592_write_fifo_pio(dev, dev->req->data, 424 dev->req->data_len); 425 r592_flush_fifo_write(dev); 426 } else 427 r592_read_fifo_pio(dev, dev->req->data, 428 dev->req->data_len); 429 return 0; 430 } 431 432 local_irq_save(flags); 433 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC | 434 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG)); 435 436 /* Do the transfer fifo<->memory*/ 437 while (sg_miter_next(&miter)) 438 if (is_write) 439 r592_write_fifo_pio(dev, miter.addr, miter.length); 440 else 441 r592_read_fifo_pio(dev, miter.addr, miter.length); 442 443 444 /* Write last few non aligned bytes*/ 445 if (is_write) 446 r592_flush_fifo_write(dev); 447 448 sg_miter_stop(&miter); 449 local_irq_restore(flags); 450 return 0; 451 } 452 453 /* Executes one TPC (data is read/written from small or large fifo) */ 454 static void r592_execute_tpc(struct r592_device *dev) 455 { 456 bool is_write; 457 int len, error; 458 u32 status, reg; 459 460 if (!dev->req) { 461 message("BUG: tpc execution without request!"); 462 return; 463 } 464 465 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; 466 len = dev->req->long_data ? 467 dev->req->sg.length : dev->req->data_len; 468 469 /* Ensure that FIFO can hold the input data */ 470 if (len > R592_LFIFO_SIZE) { 471 message("IO: hardware doesn't support TPCs longer that 512"); 472 error = -ENOSYS; 473 goto out; 474 } 475 476 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) { 477 dbg("IO: refusing to send TPC because card is absent"); 478 error = -ENODEV; 479 goto out; 480 } 481 482 dbg("IO: executing %s LEN=%d", 483 memstick_debug_get_tpc_name(dev->req->tpc), len); 484 485 /* Set IO direction */ 486 if (is_write) 487 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION); 488 else 489 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION); 490 491 492 error = r592_test_fifo_empty(dev); 493 if (error) 494 goto out; 495 496 /* Transfer write data */ 497 if (is_write) { 498 error = r592_transfer_fifo_dma(dev); 499 if (error == -EINVAL) 500 error = r592_transfer_fifo_pio(dev); 501 } 502 503 if (error) 504 goto out; 505 506 /* Trigger the TPC */ 507 reg = (len << R592_TPC_EXEC_LEN_SHIFT) | 508 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) | 509 R592_TPC_EXEC_BIG_FIFO; 510 511 r592_write_reg(dev, R592_TPC_EXEC, reg); 512 513 /* Wait for TPC completion */ 514 status = R592_STATUS_RDY; 515 if (dev->req->need_card_int) 516 status |= R592_STATUS_CED; 517 518 error = r592_wait_status(dev, status, status); 519 if (error) { 520 message("card didn't respond"); 521 goto out; 522 } 523 524 /* Test IO errors */ 525 error = r592_test_io_error(dev); 526 if (error) { 527 dbg("IO error"); 528 goto out; 529 } 530 531 /* Read data from FIFO */ 532 if (!is_write) { 533 error = r592_transfer_fifo_dma(dev); 534 if (error == -EINVAL) 535 error = r592_transfer_fifo_pio(dev); 536 } 537 538 /* read INT reg. This can be shortened with shifts, but that way 539 its more readable */ 540 if (dev->parallel_mode && dev->req->need_card_int) { 541 542 dev->req->int_reg = 0; 543 status = r592_read_reg(dev, R592_STATUS); 544 545 if (status & R592_STATUS_P_CMDNACK) 546 dev->req->int_reg |= MEMSTICK_INT_CMDNAK; 547 if (status & R592_STATUS_P_BREQ) 548 dev->req->int_reg |= MEMSTICK_INT_BREQ; 549 if (status & R592_STATUS_P_INTERR) 550 dev->req->int_reg |= MEMSTICK_INT_ERR; 551 if (status & R592_STATUS_P_CED) 552 dev->req->int_reg |= MEMSTICK_INT_CED; 553 } 554 555 if (error) 556 dbg("FIFO read error"); 557 out: 558 dev->req->error = error; 559 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED); 560 return; 561 } 562 563 /* Main request processing thread */ 564 static int r592_process_thread(void *data) 565 { 566 int error; 567 struct r592_device *dev = (struct r592_device *)data; 568 unsigned long flags; 569 570 while (!kthread_should_stop()) { 571 spin_lock_irqsave(&dev->io_thread_lock, flags); 572 set_current_state(TASK_INTERRUPTIBLE); 573 error = memstick_next_req(dev->host, &dev->req); 574 spin_unlock_irqrestore(&dev->io_thread_lock, flags); 575 576 if (error) { 577 if (error == -ENXIO || error == -EAGAIN) { 578 dbg_verbose("IO: done IO, sleeping"); 579 } else { 580 dbg("IO: unknown error from " 581 "memstick_next_req %d", error); 582 } 583 584 if (kthread_should_stop()) 585 set_current_state(TASK_RUNNING); 586 587 schedule(); 588 } else { 589 set_current_state(TASK_RUNNING); 590 r592_execute_tpc(dev); 591 } 592 } 593 return 0; 594 } 595 596 /* Reprogram chip to detect change in card state */ 597 /* eg, if card is detected, arm it to detect removal, and vice versa */ 598 static void r592_update_card_detect(struct r592_device *dev) 599 { 600 u32 reg = r592_read_reg(dev, R592_REG_MSC); 601 bool card_detected = reg & R592_REG_MSC_PRSNT; 602 603 dbg("update card detect. card state: %s", card_detected ? 604 "present" : "absent"); 605 606 reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16); 607 608 if (card_detected) 609 reg |= (R592_REG_MSC_IRQ_REMOVE << 16); 610 else 611 reg |= (R592_REG_MSC_IRQ_INSERT << 16); 612 613 r592_write_reg(dev, R592_REG_MSC, reg); 614 } 615 616 /* Timer routine that fires 1 second after last card detection event, */ 617 static void r592_detect_timer(struct timer_list *t) 618 { 619 struct r592_device *dev = from_timer(dev, t, detect_timer); 620 r592_update_card_detect(dev); 621 memstick_detect_change(dev->host); 622 } 623 624 /* Interrupt handler */ 625 static irqreturn_t r592_irq(int irq, void *data) 626 { 627 struct r592_device *dev = (struct r592_device *)data; 628 irqreturn_t ret = IRQ_NONE; 629 u32 reg; 630 u16 irq_enable, irq_status; 631 unsigned long flags; 632 int error; 633 634 spin_lock_irqsave(&dev->irq_lock, flags); 635 636 reg = r592_read_reg(dev, R592_REG_MSC); 637 irq_enable = reg >> 16; 638 irq_status = reg & 0xFFFF; 639 640 /* Ack the interrupts */ 641 reg &= ~irq_status; 642 r592_write_reg(dev, R592_REG_MSC, reg); 643 644 /* Get the IRQ status minus bits that aren't enabled */ 645 irq_status &= (irq_enable); 646 647 /* Due to limitation of memstick core, we don't look at bits that 648 indicate that card was removed/inserted and/or present */ 649 if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) { 650 651 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT; 652 ret = IRQ_HANDLED; 653 654 message("IRQ: card %s", card_was_added ? "added" : "removed"); 655 656 mod_timer(&dev->detect_timer, 657 jiffies + msecs_to_jiffies(card_was_added ? 500 : 50)); 658 } 659 660 if (irq_status & 661 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) { 662 ret = IRQ_HANDLED; 663 664 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) { 665 message("IRQ: DMA error"); 666 error = -EIO; 667 } else { 668 dbg_verbose("IRQ: dma done"); 669 error = 0; 670 } 671 672 r592_stop_dma(dev, error); 673 complete(&dev->dma_done); 674 } 675 676 spin_unlock_irqrestore(&dev->irq_lock, flags); 677 return ret; 678 } 679 680 /* External inteface: set settings */ 681 static int r592_set_param(struct memstick_host *host, 682 enum memstick_param param, int value) 683 { 684 struct r592_device *dev = memstick_priv(host); 685 686 switch (param) { 687 case MEMSTICK_POWER: 688 switch (value) { 689 case MEMSTICK_POWER_ON: 690 return r592_enable_device(dev, true); 691 case MEMSTICK_POWER_OFF: 692 return r592_enable_device(dev, false); 693 default: 694 return -EINVAL; 695 } 696 case MEMSTICK_INTERFACE: 697 switch (value) { 698 case MEMSTICK_SERIAL: 699 return r592_set_mode(dev, 0); 700 case MEMSTICK_PAR4: 701 return r592_set_mode(dev, 1); 702 default: 703 return -EINVAL; 704 } 705 default: 706 return -EINVAL; 707 } 708 } 709 710 /* External interface: submit requests */ 711 static void r592_submit_req(struct memstick_host *host) 712 { 713 struct r592_device *dev = memstick_priv(host); 714 unsigned long flags; 715 716 if (dev->req) 717 return; 718 719 spin_lock_irqsave(&dev->io_thread_lock, flags); 720 if (wake_up_process(dev->io_thread)) 721 dbg_verbose("IO thread woken to process requests"); 722 spin_unlock_irqrestore(&dev->io_thread_lock, flags); 723 } 724 725 static const struct pci_device_id r592_pci_id_tbl[] = { 726 727 { PCI_VDEVICE(RICOH, 0x0592), }, 728 { }, 729 }; 730 731 /* Main entry */ 732 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id) 733 { 734 int error = -ENOMEM; 735 struct memstick_host *host; 736 struct r592_device *dev; 737 738 /* Allocate memory */ 739 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev); 740 if (!host) 741 goto error1; 742 743 dev = memstick_priv(host); 744 dev->host = host; 745 dev->pci_dev = pdev; 746 pci_set_drvdata(pdev, dev); 747 748 /* pci initialization */ 749 error = pci_enable_device(pdev); 750 if (error) 751 goto error2; 752 753 pci_set_master(pdev); 754 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 755 if (error) 756 goto error3; 757 758 error = pci_request_regions(pdev, DRV_NAME); 759 if (error) 760 goto error3; 761 762 dev->mmio = pci_ioremap_bar(pdev, 0); 763 if (!dev->mmio) { 764 error = -ENOMEM; 765 goto error4; 766 } 767 768 dev->irq = pdev->irq; 769 spin_lock_init(&dev->irq_lock); 770 spin_lock_init(&dev->io_thread_lock); 771 init_completion(&dev->dma_done); 772 INIT_KFIFO(dev->pio_fifo); 773 timer_setup(&dev->detect_timer, r592_detect_timer, 0); 774 775 /* Host initialization */ 776 host->caps = MEMSTICK_CAP_PAR4; 777 host->request = r592_submit_req; 778 host->set_param = r592_set_param; 779 r592_check_dma(dev); 780 781 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io"); 782 if (IS_ERR(dev->io_thread)) { 783 error = PTR_ERR(dev->io_thread); 784 goto error5; 785 } 786 787 /* This is just a precation, so don't fail */ 788 dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, 789 &dev->dummy_dma_page_physical_address, GFP_KERNEL); 790 r592_stop_dma(dev , 0); 791 792 error = request_irq(dev->irq, &r592_irq, IRQF_SHARED, 793 DRV_NAME, dev); 794 if (error) 795 goto error6; 796 797 r592_update_card_detect(dev); 798 error = memstick_add_host(host); 799 if (error) 800 goto error7; 801 802 message("driver successfully loaded"); 803 return 0; 804 error7: 805 free_irq(dev->irq, dev); 806 error6: 807 if (dev->dummy_dma_page) 808 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page, 809 dev->dummy_dma_page_physical_address); 810 811 kthread_stop(dev->io_thread); 812 error5: 813 iounmap(dev->mmio); 814 error4: 815 pci_release_regions(pdev); 816 error3: 817 pci_disable_device(pdev); 818 error2: 819 memstick_free_host(host); 820 error1: 821 return error; 822 } 823 824 static void r592_remove(struct pci_dev *pdev) 825 { 826 int error = 0; 827 struct r592_device *dev = pci_get_drvdata(pdev); 828 829 /* Stop the processing thread. 830 That ensures that we won't take any more requests */ 831 kthread_stop(dev->io_thread); 832 833 r592_enable_device(dev, false); 834 835 while (!error && dev->req) { 836 dev->req->error = -ETIME; 837 error = memstick_next_req(dev->host, &dev->req); 838 } 839 memstick_remove_host(dev->host); 840 841 free_irq(dev->irq, dev); 842 iounmap(dev->mmio); 843 pci_release_regions(pdev); 844 pci_disable_device(pdev); 845 memstick_free_host(dev->host); 846 847 if (dev->dummy_dma_page) 848 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page, 849 dev->dummy_dma_page_physical_address); 850 } 851 852 #ifdef CONFIG_PM_SLEEP 853 static int r592_suspend(struct device *core_dev) 854 { 855 struct r592_device *dev = dev_get_drvdata(core_dev); 856 857 r592_clear_interrupts(dev); 858 memstick_suspend_host(dev->host); 859 del_timer_sync(&dev->detect_timer); 860 return 0; 861 } 862 863 static int r592_resume(struct device *core_dev) 864 { 865 struct r592_device *dev = dev_get_drvdata(core_dev); 866 867 r592_clear_interrupts(dev); 868 r592_enable_device(dev, false); 869 memstick_resume_host(dev->host); 870 r592_update_card_detect(dev); 871 return 0; 872 } 873 #endif 874 875 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume); 876 877 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl); 878 879 static struct pci_driver r592_pci_driver = { 880 .name = DRV_NAME, 881 .id_table = r592_pci_id_tbl, 882 .probe = r592_probe, 883 .remove = r592_remove, 884 .driver.pm = &r592_pm_ops, 885 }; 886 887 module_pci_driver(r592_pci_driver); 888 889 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO); 890 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)"); 891 module_param(debug, int, S_IRUGO | S_IWUSR); 892 MODULE_PARM_DESC(debug, "Debug level (0-3)"); 893 894 MODULE_LICENSE("GPL"); 895 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>"); 896 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver"); 897