1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2010 - Maxim Levitsky 4 * driver for Ricoh memstick readers 5 */ 6 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/freezer.h> 10 #include <linux/jiffies.h> 11 #include <linux/interrupt.h> 12 #include <linux/pci.h> 13 #include <linux/pci_ids.h> 14 #include <linux/delay.h> 15 #include <linux/slab.h> 16 #include <linux/kthread.h> 17 #include <linux/sched.h> 18 #include <linux/highmem.h> 19 #include <asm/byteorder.h> 20 #include <linux/swab.h> 21 #include "r592.h" 22 23 static bool r592_enable_dma = 1; 24 static int debug; 25 26 static const char *tpc_names[] = { 27 "MS_TPC_READ_MG_STATUS", 28 "MS_TPC_READ_LONG_DATA", 29 "MS_TPC_READ_SHORT_DATA", 30 "MS_TPC_READ_REG", 31 "MS_TPC_READ_QUAD_DATA", 32 "INVALID", 33 "MS_TPC_GET_INT", 34 "MS_TPC_SET_RW_REG_ADRS", 35 "MS_TPC_EX_SET_CMD", 36 "MS_TPC_WRITE_QUAD_DATA", 37 "MS_TPC_WRITE_REG", 38 "MS_TPC_WRITE_SHORT_DATA", 39 "MS_TPC_WRITE_LONG_DATA", 40 "MS_TPC_SET_CMD", 41 }; 42 43 /** 44 * memstick_debug_get_tpc_name - debug helper that returns string for 45 * a TPC number 46 */ 47 const char *memstick_debug_get_tpc_name(int tpc) 48 { 49 return tpc_names[tpc-1]; 50 } 51 EXPORT_SYMBOL(memstick_debug_get_tpc_name); 52 53 54 /* Read a register*/ 55 static inline u32 r592_read_reg(struct r592_device *dev, int address) 56 { 57 u32 value = readl(dev->mmio + address); 58 dbg_reg("reg #%02d == 0x%08x", address, value); 59 return value; 60 } 61 62 /* Write a register */ 63 static inline void r592_write_reg(struct r592_device *dev, 64 int address, u32 value) 65 { 66 dbg_reg("reg #%02d <- 0x%08x", address, value); 67 writel(value, dev->mmio + address); 68 } 69 70 /* Reads a big endian DWORD register */ 71 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address) 72 { 73 u32 value = __raw_readl(dev->mmio + address); 74 dbg_reg("reg #%02d == 0x%08x", address, value); 75 return be32_to_cpu(value); 76 } 77 78 /* Writes a big endian DWORD register */ 79 static inline void r592_write_reg_raw_be(struct r592_device *dev, 80 int address, u32 value) 81 { 82 dbg_reg("reg #%02d <- 0x%08x", address, value); 83 __raw_writel(cpu_to_be32(value), dev->mmio + address); 84 } 85 86 /* Set specific bits in a register (little endian) */ 87 static inline void r592_set_reg_mask(struct r592_device *dev, 88 int address, u32 mask) 89 { 90 u32 reg = readl(dev->mmio + address); 91 dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg); 92 writel(reg | mask , dev->mmio + address); 93 } 94 95 /* Clear specific bits in a register (little endian) */ 96 static inline void r592_clear_reg_mask(struct r592_device *dev, 97 int address, u32 mask) 98 { 99 u32 reg = readl(dev->mmio + address); 100 dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)", 101 address, ~mask, reg, mask); 102 writel(reg & ~mask, dev->mmio + address); 103 } 104 105 106 /* Wait for status bits while checking for errors */ 107 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask) 108 { 109 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 110 u32 reg = r592_read_reg(dev, R592_STATUS); 111 112 if ((reg & mask) == wanted_mask) 113 return 0; 114 115 while (time_before(jiffies, timeout)) { 116 117 reg = r592_read_reg(dev, R592_STATUS); 118 119 if ((reg & mask) == wanted_mask) 120 return 0; 121 122 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)) 123 return -EIO; 124 125 cpu_relax(); 126 } 127 return -ETIME; 128 } 129 130 131 /* Enable/disable device */ 132 static int r592_enable_device(struct r592_device *dev, bool enable) 133 { 134 dbg("%sabling the device", enable ? "en" : "dis"); 135 136 if (enable) { 137 138 /* Power up the card */ 139 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1); 140 141 /* Perform a reset */ 142 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); 143 144 msleep(100); 145 } else 146 /* Power down the card */ 147 r592_write_reg(dev, R592_POWER, 0); 148 149 return 0; 150 } 151 152 /* Set serial/parallel mode */ 153 static int r592_set_mode(struct r592_device *dev, bool parallel_mode) 154 { 155 if (!parallel_mode) { 156 dbg("switching to serial mode"); 157 158 /* Set serial mode */ 159 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL); 160 161 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20); 162 163 } else { 164 dbg("switching to parallel mode"); 165 166 /* This setting should be set _before_ switch TPC */ 167 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20); 168 169 r592_clear_reg_mask(dev, R592_IO, 170 R592_IO_SERIAL1 | R592_IO_SERIAL2); 171 172 /* Set the parallel mode now */ 173 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL); 174 } 175 176 dev->parallel_mode = parallel_mode; 177 return 0; 178 } 179 180 /* Perform a controller reset without powering down the card */ 181 static void r592_host_reset(struct r592_device *dev) 182 { 183 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); 184 msleep(100); 185 r592_set_mode(dev, dev->parallel_mode); 186 } 187 188 #ifdef CONFIG_PM_SLEEP 189 /* Disable all hardware interrupts */ 190 static void r592_clear_interrupts(struct r592_device *dev) 191 { 192 /* Disable & ACK all interrupts */ 193 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK); 194 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK); 195 } 196 #endif 197 198 /* Tests if there is an CRC error */ 199 static int r592_test_io_error(struct r592_device *dev) 200 { 201 if (!(r592_read_reg(dev, R592_STATUS) & 202 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))) 203 return 0; 204 205 return -EIO; 206 } 207 208 /* Ensure that FIFO is ready for use */ 209 static int r592_test_fifo_empty(struct r592_device *dev) 210 { 211 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) 212 return 0; 213 214 dbg("FIFO not ready, trying to reset the device"); 215 r592_host_reset(dev); 216 217 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) 218 return 0; 219 220 message("FIFO still not ready, giving up"); 221 return -EIO; 222 } 223 224 /* Activates the DMA transfer from to FIFO */ 225 static void r592_start_dma(struct r592_device *dev, bool is_write) 226 { 227 unsigned long flags; 228 u32 reg; 229 spin_lock_irqsave(&dev->irq_lock, flags); 230 231 /* Ack interrupts (just in case) + enable them */ 232 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); 233 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); 234 235 /* Set DMA address */ 236 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg)); 237 238 /* Enable the DMA */ 239 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS); 240 reg |= R592_FIFO_DMA_SETTINGS_EN; 241 242 if (!is_write) 243 reg |= R592_FIFO_DMA_SETTINGS_DIR; 244 else 245 reg &= ~R592_FIFO_DMA_SETTINGS_DIR; 246 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg); 247 248 spin_unlock_irqrestore(&dev->irq_lock, flags); 249 } 250 251 /* Cleanups DMA related settings */ 252 static void r592_stop_dma(struct r592_device *dev, int error) 253 { 254 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS, 255 R592_FIFO_DMA_SETTINGS_EN); 256 257 /* This is only a precation */ 258 r592_write_reg(dev, R592_FIFO_DMA, 259 dev->dummy_dma_page_physical_address); 260 261 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); 262 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); 263 dev->dma_error = error; 264 } 265 266 /* Test if hardware supports DMA */ 267 static void r592_check_dma(struct r592_device *dev) 268 { 269 dev->dma_capable = r592_enable_dma && 270 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) & 271 R592_FIFO_DMA_SETTINGS_CAP); 272 } 273 274 /* Transfers fifo contents in/out using DMA */ 275 static int r592_transfer_fifo_dma(struct r592_device *dev) 276 { 277 int len, sg_count; 278 bool is_write; 279 280 if (!dev->dma_capable || !dev->req->long_data) 281 return -EINVAL; 282 283 len = dev->req->sg.length; 284 is_write = dev->req->data_dir == WRITE; 285 286 if (len != R592_LFIFO_SIZE) 287 return -EINVAL; 288 289 dbg_verbose("doing dma transfer"); 290 291 dev->dma_error = 0; 292 reinit_completion(&dev->dma_done); 293 294 /* TODO: hidden assumption about nenth beeing always 1 */ 295 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? 296 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 297 298 if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) { 299 message("problem in dma_map_sg"); 300 return -EIO; 301 } 302 303 r592_start_dma(dev, is_write); 304 305 /* Wait for DMA completion */ 306 if (!wait_for_completion_timeout( 307 &dev->dma_done, msecs_to_jiffies(1000))) { 308 message("DMA timeout"); 309 r592_stop_dma(dev, -ETIMEDOUT); 310 } 311 312 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? 313 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 314 315 316 return dev->dma_error; 317 } 318 319 /* 320 * Writes the FIFO in 4 byte chunks. 321 * If length isn't 4 byte aligned, rest of the data if put to a fifo 322 * to be written later 323 * Use r592_flush_fifo_write to flush that fifo when writing for the 324 * last time 325 */ 326 static void r592_write_fifo_pio(struct r592_device *dev, 327 unsigned char *buffer, int len) 328 { 329 /* flush spill from former write */ 330 if (!kfifo_is_empty(&dev->pio_fifo)) { 331 332 u8 tmp[4] = {0}; 333 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len); 334 335 if (!kfifo_is_full(&dev->pio_fifo)) 336 return; 337 len -= copy_len; 338 buffer += copy_len; 339 340 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4); 341 WARN_ON(copy_len != 4); 342 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp); 343 } 344 345 WARN_ON(!kfifo_is_empty(&dev->pio_fifo)); 346 347 /* write full dwords */ 348 while (len >= 4) { 349 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer); 350 buffer += 4; 351 len -= 4; 352 } 353 354 /* put remaining bytes to the spill */ 355 if (len) 356 kfifo_in(&dev->pio_fifo, buffer, len); 357 } 358 359 /* Flushes the temporary FIFO used to make aligned DWORD writes */ 360 static void r592_flush_fifo_write(struct r592_device *dev) 361 { 362 u8 buffer[4] = { 0 }; 363 int len; 364 365 if (kfifo_is_empty(&dev->pio_fifo)) 366 return; 367 368 len = kfifo_out(&dev->pio_fifo, buffer, 4); 369 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer); 370 } 371 372 /* 373 * Read a fifo in 4 bytes chunks. 374 * If input doesn't fit the buffer, it places bytes of last dword in spill 375 * buffer, so that they don't get lost on last read, just throw these away. 376 */ 377 static void r592_read_fifo_pio(struct r592_device *dev, 378 unsigned char *buffer, int len) 379 { 380 u8 tmp[4]; 381 382 /* Read from last spill */ 383 if (!kfifo_is_empty(&dev->pio_fifo)) { 384 int bytes_copied = 385 kfifo_out(&dev->pio_fifo, buffer, min(4, len)); 386 buffer += bytes_copied; 387 len -= bytes_copied; 388 389 if (!kfifo_is_empty(&dev->pio_fifo)) 390 return; 391 } 392 393 /* Reads dwords from FIFO */ 394 while (len >= 4) { 395 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO); 396 buffer += 4; 397 len -= 4; 398 } 399 400 if (len) { 401 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO); 402 kfifo_in(&dev->pio_fifo, tmp, 4); 403 len -= kfifo_out(&dev->pio_fifo, buffer, len); 404 } 405 406 WARN_ON(len); 407 return; 408 } 409 410 /* Transfers actual data using PIO. */ 411 static int r592_transfer_fifo_pio(struct r592_device *dev) 412 { 413 unsigned long flags; 414 415 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; 416 struct sg_mapping_iter miter; 417 418 kfifo_reset(&dev->pio_fifo); 419 420 if (!dev->req->long_data) { 421 if (is_write) { 422 r592_write_fifo_pio(dev, dev->req->data, 423 dev->req->data_len); 424 r592_flush_fifo_write(dev); 425 } else 426 r592_read_fifo_pio(dev, dev->req->data, 427 dev->req->data_len); 428 return 0; 429 } 430 431 local_irq_save(flags); 432 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC | 433 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG)); 434 435 /* Do the transfer fifo<->memory*/ 436 while (sg_miter_next(&miter)) 437 if (is_write) 438 r592_write_fifo_pio(dev, miter.addr, miter.length); 439 else 440 r592_read_fifo_pio(dev, miter.addr, miter.length); 441 442 443 /* Write last few non aligned bytes*/ 444 if (is_write) 445 r592_flush_fifo_write(dev); 446 447 sg_miter_stop(&miter); 448 local_irq_restore(flags); 449 return 0; 450 } 451 452 /* Executes one TPC (data is read/written from small or large fifo) */ 453 static void r592_execute_tpc(struct r592_device *dev) 454 { 455 bool is_write; 456 int len, error; 457 u32 status, reg; 458 459 if (!dev->req) { 460 message("BUG: tpc execution without request!"); 461 return; 462 } 463 464 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; 465 len = dev->req->long_data ? 466 dev->req->sg.length : dev->req->data_len; 467 468 /* Ensure that FIFO can hold the input data */ 469 if (len > R592_LFIFO_SIZE) { 470 message("IO: hardware doesn't support TPCs longer that 512"); 471 error = -ENOSYS; 472 goto out; 473 } 474 475 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) { 476 dbg("IO: refusing to send TPC because card is absent"); 477 error = -ENODEV; 478 goto out; 479 } 480 481 dbg("IO: executing %s LEN=%d", 482 memstick_debug_get_tpc_name(dev->req->tpc), len); 483 484 /* Set IO direction */ 485 if (is_write) 486 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION); 487 else 488 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION); 489 490 491 error = r592_test_fifo_empty(dev); 492 if (error) 493 goto out; 494 495 /* Transfer write data */ 496 if (is_write) { 497 error = r592_transfer_fifo_dma(dev); 498 if (error == -EINVAL) 499 error = r592_transfer_fifo_pio(dev); 500 } 501 502 if (error) 503 goto out; 504 505 /* Trigger the TPC */ 506 reg = (len << R592_TPC_EXEC_LEN_SHIFT) | 507 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) | 508 R592_TPC_EXEC_BIG_FIFO; 509 510 r592_write_reg(dev, R592_TPC_EXEC, reg); 511 512 /* Wait for TPC completion */ 513 status = R592_STATUS_RDY; 514 if (dev->req->need_card_int) 515 status |= R592_STATUS_CED; 516 517 error = r592_wait_status(dev, status, status); 518 if (error) { 519 message("card didn't respond"); 520 goto out; 521 } 522 523 /* Test IO errors */ 524 error = r592_test_io_error(dev); 525 if (error) { 526 dbg("IO error"); 527 goto out; 528 } 529 530 /* Read data from FIFO */ 531 if (!is_write) { 532 error = r592_transfer_fifo_dma(dev); 533 if (error == -EINVAL) 534 error = r592_transfer_fifo_pio(dev); 535 } 536 537 /* read INT reg. This can be shortened with shifts, but that way 538 its more readable */ 539 if (dev->parallel_mode && dev->req->need_card_int) { 540 541 dev->req->int_reg = 0; 542 status = r592_read_reg(dev, R592_STATUS); 543 544 if (status & R592_STATUS_P_CMDNACK) 545 dev->req->int_reg |= MEMSTICK_INT_CMDNAK; 546 if (status & R592_STATUS_P_BREQ) 547 dev->req->int_reg |= MEMSTICK_INT_BREQ; 548 if (status & R592_STATUS_P_INTERR) 549 dev->req->int_reg |= MEMSTICK_INT_ERR; 550 if (status & R592_STATUS_P_CED) 551 dev->req->int_reg |= MEMSTICK_INT_CED; 552 } 553 554 if (error) 555 dbg("FIFO read error"); 556 out: 557 dev->req->error = error; 558 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED); 559 return; 560 } 561 562 /* Main request processing thread */ 563 static int r592_process_thread(void *data) 564 { 565 int error; 566 struct r592_device *dev = (struct r592_device *)data; 567 unsigned long flags; 568 569 while (!kthread_should_stop()) { 570 spin_lock_irqsave(&dev->io_thread_lock, flags); 571 set_current_state(TASK_INTERRUPTIBLE); 572 error = memstick_next_req(dev->host, &dev->req); 573 spin_unlock_irqrestore(&dev->io_thread_lock, flags); 574 575 if (error) { 576 if (error == -ENXIO || error == -EAGAIN) { 577 dbg_verbose("IO: done IO, sleeping"); 578 } else { 579 dbg("IO: unknown error from " 580 "memstick_next_req %d", error); 581 } 582 583 if (kthread_should_stop()) 584 set_current_state(TASK_RUNNING); 585 586 schedule(); 587 } else { 588 set_current_state(TASK_RUNNING); 589 r592_execute_tpc(dev); 590 } 591 } 592 return 0; 593 } 594 595 /* Reprogram chip to detect change in card state */ 596 /* eg, if card is detected, arm it to detect removal, and vice versa */ 597 static void r592_update_card_detect(struct r592_device *dev) 598 { 599 u32 reg = r592_read_reg(dev, R592_REG_MSC); 600 bool card_detected = reg & R592_REG_MSC_PRSNT; 601 602 dbg("update card detect. card state: %s", card_detected ? 603 "present" : "absent"); 604 605 reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16); 606 607 if (card_detected) 608 reg |= (R592_REG_MSC_IRQ_REMOVE << 16); 609 else 610 reg |= (R592_REG_MSC_IRQ_INSERT << 16); 611 612 r592_write_reg(dev, R592_REG_MSC, reg); 613 } 614 615 /* Timer routine that fires 1 second after last card detection event, */ 616 static void r592_detect_timer(struct timer_list *t) 617 { 618 struct r592_device *dev = from_timer(dev, t, detect_timer); 619 r592_update_card_detect(dev); 620 memstick_detect_change(dev->host); 621 } 622 623 /* Interrupt handler */ 624 static irqreturn_t r592_irq(int irq, void *data) 625 { 626 struct r592_device *dev = (struct r592_device *)data; 627 irqreturn_t ret = IRQ_NONE; 628 u32 reg; 629 u16 irq_enable, irq_status; 630 unsigned long flags; 631 int error; 632 633 spin_lock_irqsave(&dev->irq_lock, flags); 634 635 reg = r592_read_reg(dev, R592_REG_MSC); 636 irq_enable = reg >> 16; 637 irq_status = reg & 0xFFFF; 638 639 /* Ack the interrupts */ 640 reg &= ~irq_status; 641 r592_write_reg(dev, R592_REG_MSC, reg); 642 643 /* Get the IRQ status minus bits that aren't enabled */ 644 irq_status &= (irq_enable); 645 646 /* Due to limitation of memstick core, we don't look at bits that 647 indicate that card was removed/inserted and/or present */ 648 if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) { 649 650 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT; 651 ret = IRQ_HANDLED; 652 653 message("IRQ: card %s", card_was_added ? "added" : "removed"); 654 655 mod_timer(&dev->detect_timer, 656 jiffies + msecs_to_jiffies(card_was_added ? 500 : 50)); 657 } 658 659 if (irq_status & 660 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) { 661 ret = IRQ_HANDLED; 662 663 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) { 664 message("IRQ: DMA error"); 665 error = -EIO; 666 } else { 667 dbg_verbose("IRQ: dma done"); 668 error = 0; 669 } 670 671 r592_stop_dma(dev, error); 672 complete(&dev->dma_done); 673 } 674 675 spin_unlock_irqrestore(&dev->irq_lock, flags); 676 return ret; 677 } 678 679 /* External inteface: set settings */ 680 static int r592_set_param(struct memstick_host *host, 681 enum memstick_param param, int value) 682 { 683 struct r592_device *dev = memstick_priv(host); 684 685 switch (param) { 686 case MEMSTICK_POWER: 687 switch (value) { 688 case MEMSTICK_POWER_ON: 689 return r592_enable_device(dev, true); 690 case MEMSTICK_POWER_OFF: 691 return r592_enable_device(dev, false); 692 default: 693 return -EINVAL; 694 } 695 case MEMSTICK_INTERFACE: 696 switch (value) { 697 case MEMSTICK_SERIAL: 698 return r592_set_mode(dev, 0); 699 case MEMSTICK_PAR4: 700 return r592_set_mode(dev, 1); 701 default: 702 return -EINVAL; 703 } 704 default: 705 return -EINVAL; 706 } 707 } 708 709 /* External interface: submit requests */ 710 static void r592_submit_req(struct memstick_host *host) 711 { 712 struct r592_device *dev = memstick_priv(host); 713 unsigned long flags; 714 715 if (dev->req) 716 return; 717 718 spin_lock_irqsave(&dev->io_thread_lock, flags); 719 if (wake_up_process(dev->io_thread)) 720 dbg_verbose("IO thread woken to process requests"); 721 spin_unlock_irqrestore(&dev->io_thread_lock, flags); 722 } 723 724 static const struct pci_device_id r592_pci_id_tbl[] = { 725 726 { PCI_VDEVICE(RICOH, 0x0592), }, 727 { }, 728 }; 729 730 /* Main entry */ 731 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id) 732 { 733 int error = -ENOMEM; 734 struct memstick_host *host; 735 struct r592_device *dev; 736 737 /* Allocate memory */ 738 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev); 739 if (!host) 740 goto error1; 741 742 dev = memstick_priv(host); 743 dev->host = host; 744 dev->pci_dev = pdev; 745 pci_set_drvdata(pdev, dev); 746 747 /* pci initialization */ 748 error = pci_enable_device(pdev); 749 if (error) 750 goto error2; 751 752 pci_set_master(pdev); 753 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 754 if (error) 755 goto error3; 756 757 error = pci_request_regions(pdev, DRV_NAME); 758 if (error) 759 goto error3; 760 761 dev->mmio = pci_ioremap_bar(pdev, 0); 762 if (!dev->mmio) { 763 error = -ENOMEM; 764 goto error4; 765 } 766 767 dev->irq = pdev->irq; 768 spin_lock_init(&dev->irq_lock); 769 spin_lock_init(&dev->io_thread_lock); 770 init_completion(&dev->dma_done); 771 INIT_KFIFO(dev->pio_fifo); 772 timer_setup(&dev->detect_timer, r592_detect_timer, 0); 773 774 /* Host initialization */ 775 host->caps = MEMSTICK_CAP_PAR4; 776 host->request = r592_submit_req; 777 host->set_param = r592_set_param; 778 r592_check_dma(dev); 779 780 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io"); 781 if (IS_ERR(dev->io_thread)) { 782 error = PTR_ERR(dev->io_thread); 783 goto error5; 784 } 785 786 /* This is just a precation, so don't fail */ 787 dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, 788 &dev->dummy_dma_page_physical_address, GFP_KERNEL); 789 r592_stop_dma(dev , 0); 790 791 error = request_irq(dev->irq, &r592_irq, IRQF_SHARED, 792 DRV_NAME, dev); 793 if (error) 794 goto error6; 795 796 r592_update_card_detect(dev); 797 error = memstick_add_host(host); 798 if (error) 799 goto error7; 800 801 message("driver successfully loaded"); 802 return 0; 803 error7: 804 free_irq(dev->irq, dev); 805 error6: 806 if (dev->dummy_dma_page) 807 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page, 808 dev->dummy_dma_page_physical_address); 809 810 kthread_stop(dev->io_thread); 811 error5: 812 iounmap(dev->mmio); 813 error4: 814 pci_release_regions(pdev); 815 error3: 816 pci_disable_device(pdev); 817 error2: 818 memstick_free_host(host); 819 error1: 820 return error; 821 } 822 823 static void r592_remove(struct pci_dev *pdev) 824 { 825 int error = 0; 826 struct r592_device *dev = pci_get_drvdata(pdev); 827 828 /* Stop the processing thread. 829 That ensures that we won't take any more requests */ 830 kthread_stop(dev->io_thread); 831 832 r592_enable_device(dev, false); 833 834 while (!error && dev->req) { 835 dev->req->error = -ETIME; 836 error = memstick_next_req(dev->host, &dev->req); 837 } 838 memstick_remove_host(dev->host); 839 840 free_irq(dev->irq, dev); 841 iounmap(dev->mmio); 842 pci_release_regions(pdev); 843 pci_disable_device(pdev); 844 memstick_free_host(dev->host); 845 846 if (dev->dummy_dma_page) 847 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page, 848 dev->dummy_dma_page_physical_address); 849 } 850 851 #ifdef CONFIG_PM_SLEEP 852 static int r592_suspend(struct device *core_dev) 853 { 854 struct r592_device *dev = dev_get_drvdata(core_dev); 855 856 r592_clear_interrupts(dev); 857 memstick_suspend_host(dev->host); 858 del_timer_sync(&dev->detect_timer); 859 return 0; 860 } 861 862 static int r592_resume(struct device *core_dev) 863 { 864 struct r592_device *dev = dev_get_drvdata(core_dev); 865 866 r592_clear_interrupts(dev); 867 r592_enable_device(dev, false); 868 memstick_resume_host(dev->host); 869 r592_update_card_detect(dev); 870 return 0; 871 } 872 #endif 873 874 static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume); 875 876 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl); 877 878 static struct pci_driver r852_pci_driver = { 879 .name = DRV_NAME, 880 .id_table = r592_pci_id_tbl, 881 .probe = r592_probe, 882 .remove = r592_remove, 883 .driver.pm = &r592_pm_ops, 884 }; 885 886 module_pci_driver(r852_pci_driver); 887 888 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO); 889 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)"); 890 module_param(debug, int, S_IRUGO | S_IWUSR); 891 MODULE_PARM_DESC(debug, "Debug level (0-3)"); 892 893 MODULE_LICENSE("GPL"); 894 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>"); 895 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver"); 896