1 /* 2 * Copyright (C) 2014 NVIDIA CORPORATION. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #ifndef MEMORY_TEGRA_MC_H 10 #define MEMORY_TEGRA_MC_H 11 12 #include <linux/io.h> 13 #include <linux/types.h> 14 15 #include <soc/tegra/mc.h> 16 17 #define MC_INT_DECERR_MTS (1 << 16) 18 #define MC_INT_SECERR_SEC (1 << 13) 19 #define MC_INT_DECERR_VPR (1 << 12) 20 #define MC_INT_INVALID_APB_ASID_UPDATE (1 << 11) 21 #define MC_INT_INVALID_SMMU_PAGE (1 << 10) 22 #define MC_INT_ARBITRATION_EMEM (1 << 9) 23 #define MC_INT_SECURITY_VIOLATION (1 << 8) 24 #define MC_INT_INVALID_GART_PAGE (1 << 7) 25 #define MC_INT_DECERR_EMEM (1 << 6) 26 27 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) 28 { 29 if (mc->regs2 && offset >= 0x24) 30 return readl(mc->regs2 + offset - 0x3c); 31 32 return readl(mc->regs + offset); 33 } 34 35 static inline void mc_writel(struct tegra_mc *mc, u32 value, 36 unsigned long offset) 37 { 38 if (mc->regs2 && offset >= 0x24) 39 return writel(value, mc->regs2 + offset - 0x3c); 40 41 writel(value, mc->regs + offset); 42 } 43 44 extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common; 45 46 #ifdef CONFIG_ARCH_TEGRA_2x_SOC 47 extern const struct tegra_mc_soc tegra20_mc_soc; 48 #endif 49 50 #ifdef CONFIG_ARCH_TEGRA_3x_SOC 51 extern const struct tegra_mc_soc tegra30_mc_soc; 52 #endif 53 54 #ifdef CONFIG_ARCH_TEGRA_114_SOC 55 extern const struct tegra_mc_soc tegra114_mc_soc; 56 #endif 57 58 #ifdef CONFIG_ARCH_TEGRA_124_SOC 59 extern const struct tegra_mc_soc tegra124_mc_soc; 60 #endif 61 62 #ifdef CONFIG_ARCH_TEGRA_132_SOC 63 extern const struct tegra_mc_soc tegra132_mc_soc; 64 #endif 65 66 #ifdef CONFIG_ARCH_TEGRA_210_SOC 67 extern const struct tegra_mc_soc tegra210_mc_soc; 68 #endif 69 70 #endif /* MEMORY_TEGRA_MC_H */ 71