166b8173aSChristophe Kerello // SPDX-License-Identifier: GPL-2.0
266b8173aSChristophe Kerello /*
366b8173aSChristophe Kerello * Copyright (C) STMicroelectronics 2020
466b8173aSChristophe Kerello */
566b8173aSChristophe Kerello
666b8173aSChristophe Kerello #include <linux/bitfield.h>
766b8173aSChristophe Kerello #include <linux/clk.h>
866b8173aSChristophe Kerello #include <linux/mfd/syscon.h>
966b8173aSChristophe Kerello #include <linux/module.h>
10*0b483871SRob Herring #include <linux/of.h>
1166b8173aSChristophe Kerello #include <linux/of_platform.h>
1266b8173aSChristophe Kerello #include <linux/pinctrl/consumer.h>
13*0b483871SRob Herring #include <linux/platform_device.h>
1466b8173aSChristophe Kerello #include <linux/regmap.h>
1566b8173aSChristophe Kerello #include <linux/reset.h>
1666b8173aSChristophe Kerello
1766b8173aSChristophe Kerello /* FMC2 Controller Registers */
1866b8173aSChristophe Kerello #define FMC2_BCR1 0x0
1966b8173aSChristophe Kerello #define FMC2_BTR1 0x4
2066b8173aSChristophe Kerello #define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1)
2166b8173aSChristophe Kerello #define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1)
2266b8173aSChristophe Kerello #define FMC2_PCSCNTR 0x20
2366b8173aSChristophe Kerello #define FMC2_BWTR1 0x104
2466b8173aSChristophe Kerello #define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
2566b8173aSChristophe Kerello
2666b8173aSChristophe Kerello /* Register: FMC2_BCR1 */
2766b8173aSChristophe Kerello #define FMC2_BCR1_CCLKEN BIT(20)
2866b8173aSChristophe Kerello #define FMC2_BCR1_FMC2EN BIT(31)
2966b8173aSChristophe Kerello
3066b8173aSChristophe Kerello /* Register: FMC2_BCRx */
3166b8173aSChristophe Kerello #define FMC2_BCR_MBKEN BIT(0)
3266b8173aSChristophe Kerello #define FMC2_BCR_MUXEN BIT(1)
3366b8173aSChristophe Kerello #define FMC2_BCR_MTYP GENMASK(3, 2)
3466b8173aSChristophe Kerello #define FMC2_BCR_MWID GENMASK(5, 4)
3566b8173aSChristophe Kerello #define FMC2_BCR_FACCEN BIT(6)
3666b8173aSChristophe Kerello #define FMC2_BCR_BURSTEN BIT(8)
3766b8173aSChristophe Kerello #define FMC2_BCR_WAITPOL BIT(9)
3866b8173aSChristophe Kerello #define FMC2_BCR_WAITCFG BIT(11)
3966b8173aSChristophe Kerello #define FMC2_BCR_WREN BIT(12)
4066b8173aSChristophe Kerello #define FMC2_BCR_WAITEN BIT(13)
4166b8173aSChristophe Kerello #define FMC2_BCR_EXTMOD BIT(14)
4266b8173aSChristophe Kerello #define FMC2_BCR_ASYNCWAIT BIT(15)
4366b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE GENMASK(18, 16)
4466b8173aSChristophe Kerello #define FMC2_BCR_CBURSTRW BIT(19)
4566b8173aSChristophe Kerello #define FMC2_BCR_NBLSET GENMASK(23, 22)
4666b8173aSChristophe Kerello
4766b8173aSChristophe Kerello /* Register: FMC2_BTRx/FMC2_BWTRx */
4866b8173aSChristophe Kerello #define FMC2_BXTR_ADDSET GENMASK(3, 0)
4966b8173aSChristophe Kerello #define FMC2_BXTR_ADDHLD GENMASK(7, 4)
5066b8173aSChristophe Kerello #define FMC2_BXTR_DATAST GENMASK(15, 8)
5166b8173aSChristophe Kerello #define FMC2_BXTR_BUSTURN GENMASK(19, 16)
5266b8173aSChristophe Kerello #define FMC2_BTR_CLKDIV GENMASK(23, 20)
5366b8173aSChristophe Kerello #define FMC2_BTR_DATLAT GENMASK(27, 24)
5466b8173aSChristophe Kerello #define FMC2_BXTR_ACCMOD GENMASK(29, 28)
5566b8173aSChristophe Kerello #define FMC2_BXTR_DATAHLD GENMASK(31, 30)
5666b8173aSChristophe Kerello
5766b8173aSChristophe Kerello /* Register: FMC2_PCSCNTR */
5866b8173aSChristophe Kerello #define FMC2_PCSCNTR_CSCOUNT GENMASK(15, 0)
5966b8173aSChristophe Kerello #define FMC2_PCSCNTR_CNTBEN(x) BIT((x) + 16)
6066b8173aSChristophe Kerello
6166b8173aSChristophe Kerello #define FMC2_MAX_EBI_CE 4
6266b8173aSChristophe Kerello #define FMC2_MAX_BANKS 5
6366b8173aSChristophe Kerello
6466b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE_0 0x0
6566b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE_128 0x1
6666b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE_256 0x2
6766b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE_512 0x3
6866b8173aSChristophe Kerello #define FMC2_BCR_CPSIZE_1024 0x4
6966b8173aSChristophe Kerello
7066b8173aSChristophe Kerello #define FMC2_BCR_MWID_8 0x0
7166b8173aSChristophe Kerello #define FMC2_BCR_MWID_16 0x1
7266b8173aSChristophe Kerello
7366b8173aSChristophe Kerello #define FMC2_BCR_MTYP_SRAM 0x0
7466b8173aSChristophe Kerello #define FMC2_BCR_MTYP_PSRAM 0x1
7566b8173aSChristophe Kerello #define FMC2_BCR_MTYP_NOR 0x2
7666b8173aSChristophe Kerello
7766b8173aSChristophe Kerello #define FMC2_BXTR_EXTMOD_A 0x0
7866b8173aSChristophe Kerello #define FMC2_BXTR_EXTMOD_B 0x1
7966b8173aSChristophe Kerello #define FMC2_BXTR_EXTMOD_C 0x2
8066b8173aSChristophe Kerello #define FMC2_BXTR_EXTMOD_D 0x3
8166b8173aSChristophe Kerello
8266b8173aSChristophe Kerello #define FMC2_BCR_NBLSET_MAX 0x3
8366b8173aSChristophe Kerello #define FMC2_BXTR_ADDSET_MAX 0xf
8466b8173aSChristophe Kerello #define FMC2_BXTR_ADDHLD_MAX 0xf
8566b8173aSChristophe Kerello #define FMC2_BXTR_DATAST_MAX 0xff
8666b8173aSChristophe Kerello #define FMC2_BXTR_BUSTURN_MAX 0xf
8766b8173aSChristophe Kerello #define FMC2_BXTR_DATAHLD_MAX 0x3
8866b8173aSChristophe Kerello #define FMC2_BTR_CLKDIV_MAX 0xf
8966b8173aSChristophe Kerello #define FMC2_BTR_DATLAT_MAX 0xf
9066b8173aSChristophe Kerello #define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
9166b8173aSChristophe Kerello
9266b8173aSChristophe Kerello enum stm32_fmc2_ebi_bank {
9366b8173aSChristophe Kerello FMC2_EBI1 = 0,
9466b8173aSChristophe Kerello FMC2_EBI2,
9566b8173aSChristophe Kerello FMC2_EBI3,
9666b8173aSChristophe Kerello FMC2_EBI4,
9766b8173aSChristophe Kerello FMC2_NAND
9866b8173aSChristophe Kerello };
9966b8173aSChristophe Kerello
10066b8173aSChristophe Kerello enum stm32_fmc2_ebi_register_type {
10166b8173aSChristophe Kerello FMC2_REG_BCR = 1,
10266b8173aSChristophe Kerello FMC2_REG_BTR,
10366b8173aSChristophe Kerello FMC2_REG_BWTR,
10466b8173aSChristophe Kerello FMC2_REG_PCSCNTR
10566b8173aSChristophe Kerello };
10666b8173aSChristophe Kerello
10766b8173aSChristophe Kerello enum stm32_fmc2_ebi_transaction_type {
10866b8173aSChristophe Kerello FMC2_ASYNC_MODE_1_SRAM = 0,
10966b8173aSChristophe Kerello FMC2_ASYNC_MODE_1_PSRAM,
11066b8173aSChristophe Kerello FMC2_ASYNC_MODE_A_SRAM,
11166b8173aSChristophe Kerello FMC2_ASYNC_MODE_A_PSRAM,
11266b8173aSChristophe Kerello FMC2_ASYNC_MODE_2_NOR,
11366b8173aSChristophe Kerello FMC2_ASYNC_MODE_B_NOR,
11466b8173aSChristophe Kerello FMC2_ASYNC_MODE_C_NOR,
11566b8173aSChristophe Kerello FMC2_ASYNC_MODE_D_NOR,
11666b8173aSChristophe Kerello FMC2_SYNC_READ_SYNC_WRITE_PSRAM,
11766b8173aSChristophe Kerello FMC2_SYNC_READ_ASYNC_WRITE_PSRAM,
11866b8173aSChristophe Kerello FMC2_SYNC_READ_SYNC_WRITE_NOR,
11966b8173aSChristophe Kerello FMC2_SYNC_READ_ASYNC_WRITE_NOR
12066b8173aSChristophe Kerello };
12166b8173aSChristophe Kerello
12266b8173aSChristophe Kerello enum stm32_fmc2_ebi_buswidth {
12366b8173aSChristophe Kerello FMC2_BUSWIDTH_8 = 8,
12466b8173aSChristophe Kerello FMC2_BUSWIDTH_16 = 16
12566b8173aSChristophe Kerello };
12666b8173aSChristophe Kerello
12766b8173aSChristophe Kerello enum stm32_fmc2_ebi_cpsize {
12866b8173aSChristophe Kerello FMC2_CPSIZE_0 = 0,
12966b8173aSChristophe Kerello FMC2_CPSIZE_128 = 128,
13066b8173aSChristophe Kerello FMC2_CPSIZE_256 = 256,
13166b8173aSChristophe Kerello FMC2_CPSIZE_512 = 512,
13266b8173aSChristophe Kerello FMC2_CPSIZE_1024 = 1024
13366b8173aSChristophe Kerello };
13466b8173aSChristophe Kerello
13566b8173aSChristophe Kerello struct stm32_fmc2_ebi {
13666b8173aSChristophe Kerello struct device *dev;
13766b8173aSChristophe Kerello struct clk *clk;
13866b8173aSChristophe Kerello struct regmap *regmap;
13966b8173aSChristophe Kerello u8 bank_assigned;
14066b8173aSChristophe Kerello
14166b8173aSChristophe Kerello u32 bcr[FMC2_MAX_EBI_CE];
14266b8173aSChristophe Kerello u32 btr[FMC2_MAX_EBI_CE];
14366b8173aSChristophe Kerello u32 bwtr[FMC2_MAX_EBI_CE];
14466b8173aSChristophe Kerello u32 pcscntr;
14566b8173aSChristophe Kerello };
14666b8173aSChristophe Kerello
14766b8173aSChristophe Kerello /*
14866b8173aSChristophe Kerello * struct stm32_fmc2_prop - STM32 FMC2 EBI property
14966b8173aSChristophe Kerello * @name: the device tree binding name of the property
15066b8173aSChristophe Kerello * @bprop: indicate that it is a boolean property
15166b8173aSChristophe Kerello * @mprop: indicate that it is a mandatory property
15266b8173aSChristophe Kerello * @reg_type: the register that have to be modified
15366b8173aSChristophe Kerello * @reg_mask: the bit that have to be modified in the selected register
15466b8173aSChristophe Kerello * in case of it is a boolean property
15566b8173aSChristophe Kerello * @reset_val: the default value that have to be set in case the property
15666b8173aSChristophe Kerello * has not been defined in the device tree
15766b8173aSChristophe Kerello * @check: this callback ckecks that the property is compliant with the
15866b8173aSChristophe Kerello * transaction type selected
15966b8173aSChristophe Kerello * @calculate: this callback is called to calculate for exemple a timing
16066b8173aSChristophe Kerello * set in nanoseconds in the device tree in clock cycles or in
16166b8173aSChristophe Kerello * clock period
16266b8173aSChristophe Kerello * @set: this callback applies the values in the registers
16366b8173aSChristophe Kerello */
16466b8173aSChristophe Kerello struct stm32_fmc2_prop {
16566b8173aSChristophe Kerello const char *name;
16666b8173aSChristophe Kerello bool bprop;
16766b8173aSChristophe Kerello bool mprop;
16866b8173aSChristophe Kerello int reg_type;
16966b8173aSChristophe Kerello u32 reg_mask;
17066b8173aSChristophe Kerello u32 reset_val;
17166b8173aSChristophe Kerello int (*check)(struct stm32_fmc2_ebi *ebi,
17266b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop, int cs);
17366b8173aSChristophe Kerello u32 (*calculate)(struct stm32_fmc2_ebi *ebi, int cs, u32 setup);
17466b8173aSChristophe Kerello int (*set)(struct stm32_fmc2_ebi *ebi,
17566b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
17666b8173aSChristophe Kerello int cs, u32 setup);
17766b8173aSChristophe Kerello };
17866b8173aSChristophe Kerello
stm32_fmc2_ebi_check_mux(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)17966b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_mux(struct stm32_fmc2_ebi *ebi,
18066b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
18166b8173aSChristophe Kerello int cs)
18266b8173aSChristophe Kerello {
18366b8173aSChristophe Kerello u32 bcr;
18466b8173aSChristophe Kerello
18566b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
18666b8173aSChristophe Kerello
18766b8173aSChristophe Kerello if (bcr & FMC2_BCR_MTYP)
18866b8173aSChristophe Kerello return 0;
18966b8173aSChristophe Kerello
19066b8173aSChristophe Kerello return -EINVAL;
19166b8173aSChristophe Kerello }
19266b8173aSChristophe Kerello
stm32_fmc2_ebi_check_waitcfg(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)19366b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_waitcfg(struct stm32_fmc2_ebi *ebi,
19466b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
19566b8173aSChristophe Kerello int cs)
19666b8173aSChristophe Kerello {
19766b8173aSChristophe Kerello u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
19866b8173aSChristophe Kerello
19966b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
20066b8173aSChristophe Kerello
20166b8173aSChristophe Kerello if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
20266b8173aSChristophe Kerello return 0;
20366b8173aSChristophe Kerello
20466b8173aSChristophe Kerello return -EINVAL;
20566b8173aSChristophe Kerello }
20666b8173aSChristophe Kerello
stm32_fmc2_ebi_check_sync_trans(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)20766b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_sync_trans(struct stm32_fmc2_ebi *ebi,
20866b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
20966b8173aSChristophe Kerello int cs)
21066b8173aSChristophe Kerello {
21166b8173aSChristophe Kerello u32 bcr;
21266b8173aSChristophe Kerello
21366b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
21466b8173aSChristophe Kerello
21566b8173aSChristophe Kerello if (bcr & FMC2_BCR_BURSTEN)
21666b8173aSChristophe Kerello return 0;
21766b8173aSChristophe Kerello
21866b8173aSChristophe Kerello return -EINVAL;
21966b8173aSChristophe Kerello }
22066b8173aSChristophe Kerello
stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)22166b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi *ebi,
22266b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
22366b8173aSChristophe Kerello int cs)
22466b8173aSChristophe Kerello {
22566b8173aSChristophe Kerello u32 bcr;
22666b8173aSChristophe Kerello
22766b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
22866b8173aSChristophe Kerello
22966b8173aSChristophe Kerello if (!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW))
23066b8173aSChristophe Kerello return 0;
23166b8173aSChristophe Kerello
23266b8173aSChristophe Kerello return -EINVAL;
23366b8173aSChristophe Kerello }
23466b8173aSChristophe Kerello
stm32_fmc2_ebi_check_cpsize(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)23566b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_cpsize(struct stm32_fmc2_ebi *ebi,
23666b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
23766b8173aSChristophe Kerello int cs)
23866b8173aSChristophe Kerello {
23966b8173aSChristophe Kerello u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
24066b8173aSChristophe Kerello
24166b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
24266b8173aSChristophe Kerello
24366b8173aSChristophe Kerello if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN)
24466b8173aSChristophe Kerello return 0;
24566b8173aSChristophe Kerello
24666b8173aSChristophe Kerello return -EINVAL;
24766b8173aSChristophe Kerello }
24866b8173aSChristophe Kerello
stm32_fmc2_ebi_check_address_hold(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)24966b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_address_hold(struct stm32_fmc2_ebi *ebi,
25066b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
25166b8173aSChristophe Kerello int cs)
25266b8173aSChristophe Kerello {
25366b8173aSChristophe Kerello u32 bcr, bxtr, val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
25466b8173aSChristophe Kerello
25566b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
25666b8173aSChristophe Kerello if (prop->reg_type == FMC2_REG_BWTR)
25766b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
25866b8173aSChristophe Kerello else
25966b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
26066b8173aSChristophe Kerello
26166b8173aSChristophe Kerello if ((!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW)) &&
26266b8173aSChristophe Kerello ((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN))
26366b8173aSChristophe Kerello return 0;
26466b8173aSChristophe Kerello
26566b8173aSChristophe Kerello return -EINVAL;
26666b8173aSChristophe Kerello }
26766b8173aSChristophe Kerello
stm32_fmc2_ebi_check_clk_period(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)26866b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_clk_period(struct stm32_fmc2_ebi *ebi,
26966b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
27066b8173aSChristophe Kerello int cs)
27166b8173aSChristophe Kerello {
27266b8173aSChristophe Kerello u32 bcr, bcr1;
27366b8173aSChristophe Kerello
27466b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
27566b8173aSChristophe Kerello if (cs)
27666b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR1, &bcr1);
27766b8173aSChristophe Kerello else
27866b8173aSChristophe Kerello bcr1 = bcr;
27966b8173aSChristophe Kerello
28066b8173aSChristophe Kerello if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN)))
28166b8173aSChristophe Kerello return 0;
28266b8173aSChristophe Kerello
28366b8173aSChristophe Kerello return -EINVAL;
28466b8173aSChristophe Kerello }
28566b8173aSChristophe Kerello
stm32_fmc2_ebi_check_cclk(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs)28666b8173aSChristophe Kerello static int stm32_fmc2_ebi_check_cclk(struct stm32_fmc2_ebi *ebi,
28766b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
28866b8173aSChristophe Kerello int cs)
28966b8173aSChristophe Kerello {
29066b8173aSChristophe Kerello if (cs)
29166b8173aSChristophe Kerello return -EINVAL;
29266b8173aSChristophe Kerello
29366b8173aSChristophe Kerello return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs);
29466b8173aSChristophe Kerello }
29566b8173aSChristophe Kerello
stm32_fmc2_ebi_ns_to_clock_cycles(struct stm32_fmc2_ebi * ebi,int cs,u32 setup)29666b8173aSChristophe Kerello static u32 stm32_fmc2_ebi_ns_to_clock_cycles(struct stm32_fmc2_ebi *ebi,
29766b8173aSChristophe Kerello int cs, u32 setup)
29866b8173aSChristophe Kerello {
29966b8173aSChristophe Kerello unsigned long hclk = clk_get_rate(ebi->clk);
30066b8173aSChristophe Kerello unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
30166b8173aSChristophe Kerello
30266b8173aSChristophe Kerello return DIV_ROUND_UP(setup * 1000, hclkp);
30366b8173aSChristophe Kerello }
30466b8173aSChristophe Kerello
stm32_fmc2_ebi_ns_to_clk_period(struct stm32_fmc2_ebi * ebi,int cs,u32 setup)30566b8173aSChristophe Kerello static u32 stm32_fmc2_ebi_ns_to_clk_period(struct stm32_fmc2_ebi *ebi,
30666b8173aSChristophe Kerello int cs, u32 setup)
30766b8173aSChristophe Kerello {
30866b8173aSChristophe Kerello u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup);
30966b8173aSChristophe Kerello u32 bcr, btr, clk_period;
31066b8173aSChristophe Kerello
31166b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR1, &bcr);
31266b8173aSChristophe Kerello if (bcr & FMC2_BCR1_CCLKEN || !cs)
31366b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BTR1, &btr);
31466b8173aSChristophe Kerello else
31566b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BTR(cs), &btr);
31666b8173aSChristophe Kerello
31766b8173aSChristophe Kerello clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1;
31866b8173aSChristophe Kerello
31966b8173aSChristophe Kerello return DIV_ROUND_UP(nb_clk_cycles, clk_period);
32066b8173aSChristophe Kerello }
32166b8173aSChristophe Kerello
stm32_fmc2_ebi_get_reg(int reg_type,int cs,u32 * reg)32266b8173aSChristophe Kerello static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg)
32366b8173aSChristophe Kerello {
32466b8173aSChristophe Kerello switch (reg_type) {
32566b8173aSChristophe Kerello case FMC2_REG_BCR:
32666b8173aSChristophe Kerello *reg = FMC2_BCR(cs);
32766b8173aSChristophe Kerello break;
32866b8173aSChristophe Kerello case FMC2_REG_BTR:
32966b8173aSChristophe Kerello *reg = FMC2_BTR(cs);
33066b8173aSChristophe Kerello break;
33166b8173aSChristophe Kerello case FMC2_REG_BWTR:
33266b8173aSChristophe Kerello *reg = FMC2_BWTR(cs);
33366b8173aSChristophe Kerello break;
33466b8173aSChristophe Kerello case FMC2_REG_PCSCNTR:
33566b8173aSChristophe Kerello *reg = FMC2_PCSCNTR;
33666b8173aSChristophe Kerello break;
33766b8173aSChristophe Kerello default:
33866b8173aSChristophe Kerello return -EINVAL;
33966b8173aSChristophe Kerello }
34066b8173aSChristophe Kerello
34166b8173aSChristophe Kerello return 0;
34266b8173aSChristophe Kerello }
34366b8173aSChristophe Kerello
stm32_fmc2_ebi_set_bit_field(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)34466b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_bit_field(struct stm32_fmc2_ebi *ebi,
34566b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
34666b8173aSChristophe Kerello int cs, u32 setup)
34766b8173aSChristophe Kerello {
34866b8173aSChristophe Kerello u32 reg;
34966b8173aSChristophe Kerello int ret;
35066b8173aSChristophe Kerello
35166b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
35266b8173aSChristophe Kerello if (ret)
35366b8173aSChristophe Kerello return ret;
35466b8173aSChristophe Kerello
35566b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, prop->reg_mask,
35666b8173aSChristophe Kerello setup ? prop->reg_mask : 0);
35766b8173aSChristophe Kerello
35866b8173aSChristophe Kerello return 0;
35966b8173aSChristophe Kerello }
36066b8173aSChristophe Kerello
stm32_fmc2_ebi_set_trans_type(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)36166b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_trans_type(struct stm32_fmc2_ebi *ebi,
36266b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
36366b8173aSChristophe Kerello int cs, u32 setup)
36466b8173aSChristophe Kerello {
36566b8173aSChristophe Kerello u32 bcr_mask, bcr = FMC2_BCR_WREN;
36666b8173aSChristophe Kerello u32 btr_mask, btr = 0;
36766b8173aSChristophe Kerello u32 bwtr_mask, bwtr = 0;
36866b8173aSChristophe Kerello
36966b8173aSChristophe Kerello bwtr_mask = FMC2_BXTR_ACCMOD;
37066b8173aSChristophe Kerello btr_mask = FMC2_BXTR_ACCMOD;
37166b8173aSChristophe Kerello bcr_mask = FMC2_BCR_MUXEN | FMC2_BCR_MTYP | FMC2_BCR_FACCEN |
37266b8173aSChristophe Kerello FMC2_BCR_WREN | FMC2_BCR_WAITEN | FMC2_BCR_BURSTEN |
37366b8173aSChristophe Kerello FMC2_BCR_EXTMOD | FMC2_BCR_CBURSTRW;
37466b8173aSChristophe Kerello
37566b8173aSChristophe Kerello switch (setup) {
37666b8173aSChristophe Kerello case FMC2_ASYNC_MODE_1_SRAM:
37766b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);
37866b8173aSChristophe Kerello /*
37966b8173aSChristophe Kerello * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0,
38066b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0
38166b8173aSChristophe Kerello */
38266b8173aSChristophe Kerello break;
38366b8173aSChristophe Kerello case FMC2_ASYNC_MODE_1_PSRAM:
38466b8173aSChristophe Kerello /*
38566b8173aSChristophe Kerello * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0,
38666b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0
38766b8173aSChristophe Kerello */
38866b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
38966b8173aSChristophe Kerello break;
39066b8173aSChristophe Kerello case FMC2_ASYNC_MODE_A_SRAM:
39166b8173aSChristophe Kerello /*
39266b8173aSChristophe Kerello * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0,
39366b8173aSChristophe Kerello * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0
39466b8173aSChristophe Kerello */
39566b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);
39666b8173aSChristophe Kerello bcr |= FMC2_BCR_EXTMOD;
39766b8173aSChristophe Kerello btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);
39866b8173aSChristophe Kerello bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);
39966b8173aSChristophe Kerello break;
40066b8173aSChristophe Kerello case FMC2_ASYNC_MODE_A_PSRAM:
40166b8173aSChristophe Kerello /*
40266b8173aSChristophe Kerello * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0,
40366b8173aSChristophe Kerello * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0
40466b8173aSChristophe Kerello */
40566b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
40666b8173aSChristophe Kerello bcr |= FMC2_BCR_EXTMOD;
40766b8173aSChristophe Kerello btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);
40866b8173aSChristophe Kerello bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);
40966b8173aSChristophe Kerello break;
41066b8173aSChristophe Kerello case FMC2_ASYNC_MODE_2_NOR:
41166b8173aSChristophe Kerello /*
41266b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0,
41366b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0
41466b8173aSChristophe Kerello */
41566b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
41666b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN;
41766b8173aSChristophe Kerello break;
41866b8173aSChristophe Kerello case FMC2_ASYNC_MODE_B_NOR:
41966b8173aSChristophe Kerello /*
42066b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0,
42166b8173aSChristophe Kerello * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 1
42266b8173aSChristophe Kerello */
42366b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
42466b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN | FMC2_BCR_EXTMOD;
42566b8173aSChristophe Kerello btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_B);
42666b8173aSChristophe Kerello bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_B);
42766b8173aSChristophe Kerello break;
42866b8173aSChristophe Kerello case FMC2_ASYNC_MODE_C_NOR:
42966b8173aSChristophe Kerello /*
43066b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0,
43166b8173aSChristophe Kerello * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 2
43266b8173aSChristophe Kerello */
43366b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
43466b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN | FMC2_BCR_EXTMOD;
43566b8173aSChristophe Kerello btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_C);
43666b8173aSChristophe Kerello bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_C);
43766b8173aSChristophe Kerello break;
43866b8173aSChristophe Kerello case FMC2_ASYNC_MODE_D_NOR:
43966b8173aSChristophe Kerello /*
44066b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0,
44166b8173aSChristophe Kerello * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 3
44266b8173aSChristophe Kerello */
44366b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
44466b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN | FMC2_BCR_EXTMOD;
44566b8173aSChristophe Kerello btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
44666b8173aSChristophe Kerello bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
44766b8173aSChristophe Kerello break;
44866b8173aSChristophe Kerello case FMC2_SYNC_READ_SYNC_WRITE_PSRAM:
44966b8173aSChristophe Kerello /*
45066b8173aSChristophe Kerello * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0,
45166b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0
45266b8173aSChristophe Kerello */
45366b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
45466b8173aSChristophe Kerello bcr |= FMC2_BCR_BURSTEN | FMC2_BCR_CBURSTRW;
45566b8173aSChristophe Kerello break;
45666b8173aSChristophe Kerello case FMC2_SYNC_READ_ASYNC_WRITE_PSRAM:
45766b8173aSChristophe Kerello /*
45866b8173aSChristophe Kerello * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0,
45966b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0
46066b8173aSChristophe Kerello */
46166b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);
46266b8173aSChristophe Kerello bcr |= FMC2_BCR_BURSTEN;
46366b8173aSChristophe Kerello break;
46466b8173aSChristophe Kerello case FMC2_SYNC_READ_SYNC_WRITE_NOR:
46566b8173aSChristophe Kerello /*
46666b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0,
46766b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0
46866b8173aSChristophe Kerello */
46966b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
47066b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN | FMC2_BCR_BURSTEN | FMC2_BCR_CBURSTRW;
47166b8173aSChristophe Kerello break;
47266b8173aSChristophe Kerello case FMC2_SYNC_READ_ASYNC_WRITE_NOR:
47366b8173aSChristophe Kerello /*
47466b8173aSChristophe Kerello * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0,
47566b8173aSChristophe Kerello * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0
47666b8173aSChristophe Kerello */
47766b8173aSChristophe Kerello bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);
47866b8173aSChristophe Kerello bcr |= FMC2_BCR_FACCEN | FMC2_BCR_BURSTEN;
47966b8173aSChristophe Kerello break;
48066b8173aSChristophe Kerello default:
48166b8173aSChristophe Kerello /* Type of transaction not supported */
48266b8173aSChristophe Kerello return -EINVAL;
48366b8173aSChristophe Kerello }
48466b8173aSChristophe Kerello
48566b8173aSChristophe Kerello if (bcr & FMC2_BCR_EXTMOD)
48666b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BWTR(cs),
48766b8173aSChristophe Kerello bwtr_mask, bwtr);
48866b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BTR(cs), btr_mask, btr);
48966b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs), bcr_mask, bcr);
49066b8173aSChristophe Kerello
49166b8173aSChristophe Kerello return 0;
49266b8173aSChristophe Kerello }
49366b8173aSChristophe Kerello
stm32_fmc2_ebi_set_buswidth(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)49466b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_buswidth(struct stm32_fmc2_ebi *ebi,
49566b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
49666b8173aSChristophe Kerello int cs, u32 setup)
49766b8173aSChristophe Kerello {
49866b8173aSChristophe Kerello u32 val;
49966b8173aSChristophe Kerello
50066b8173aSChristophe Kerello switch (setup) {
50166b8173aSChristophe Kerello case FMC2_BUSWIDTH_8:
50266b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_MWID, FMC2_BCR_MWID_8);
50366b8173aSChristophe Kerello break;
50466b8173aSChristophe Kerello case FMC2_BUSWIDTH_16:
50566b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_MWID, FMC2_BCR_MWID_16);
50666b8173aSChristophe Kerello break;
50766b8173aSChristophe Kerello default:
50866b8173aSChristophe Kerello /* Buswidth not supported */
50966b8173aSChristophe Kerello return -EINVAL;
51066b8173aSChristophe Kerello }
51166b8173aSChristophe Kerello
51266b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MWID, val);
51366b8173aSChristophe Kerello
51466b8173aSChristophe Kerello return 0;
51566b8173aSChristophe Kerello }
51666b8173aSChristophe Kerello
stm32_fmc2_ebi_set_cpsize(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)51766b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_cpsize(struct stm32_fmc2_ebi *ebi,
51866b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
51966b8173aSChristophe Kerello int cs, u32 setup)
52066b8173aSChristophe Kerello {
52166b8173aSChristophe Kerello u32 val;
52266b8173aSChristophe Kerello
52366b8173aSChristophe Kerello switch (setup) {
52466b8173aSChristophe Kerello case FMC2_CPSIZE_0:
52566b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_0);
52666b8173aSChristophe Kerello break;
52766b8173aSChristophe Kerello case FMC2_CPSIZE_128:
52866b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_128);
52966b8173aSChristophe Kerello break;
53066b8173aSChristophe Kerello case FMC2_CPSIZE_256:
53166b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_256);
53266b8173aSChristophe Kerello break;
53366b8173aSChristophe Kerello case FMC2_CPSIZE_512:
53466b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_512);
53566b8173aSChristophe Kerello break;
53666b8173aSChristophe Kerello case FMC2_CPSIZE_1024:
53766b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_1024);
53866b8173aSChristophe Kerello break;
53966b8173aSChristophe Kerello default:
54066b8173aSChristophe Kerello /* Cpsize not supported */
54166b8173aSChristophe Kerello return -EINVAL;
54266b8173aSChristophe Kerello }
54366b8173aSChristophe Kerello
54466b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_CPSIZE, val);
54566b8173aSChristophe Kerello
54666b8173aSChristophe Kerello return 0;
54766b8173aSChristophe Kerello }
54866b8173aSChristophe Kerello
stm32_fmc2_ebi_set_bl_setup(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)54966b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_bl_setup(struct stm32_fmc2_ebi *ebi,
55066b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
55166b8173aSChristophe Kerello int cs, u32 setup)
55266b8173aSChristophe Kerello {
55366b8173aSChristophe Kerello u32 val;
55466b8173aSChristophe Kerello
55566b8173aSChristophe Kerello val = min_t(u32, setup, FMC2_BCR_NBLSET_MAX);
55666b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BCR_NBLSET, val);
55766b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_NBLSET, val);
55866b8173aSChristophe Kerello
55966b8173aSChristophe Kerello return 0;
56066b8173aSChristophe Kerello }
56166b8173aSChristophe Kerello
stm32_fmc2_ebi_set_address_setup(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)56266b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_address_setup(struct stm32_fmc2_ebi *ebi,
56366b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
56466b8173aSChristophe Kerello int cs, u32 setup)
56566b8173aSChristophe Kerello {
56666b8173aSChristophe Kerello u32 bcr, bxtr, reg;
56766b8173aSChristophe Kerello u32 val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);
56866b8173aSChristophe Kerello int ret;
56966b8173aSChristophe Kerello
57066b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
57166b8173aSChristophe Kerello if (ret)
57266b8173aSChristophe Kerello return ret;
57366b8173aSChristophe Kerello
57466b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
57566b8173aSChristophe Kerello if (prop->reg_type == FMC2_REG_BWTR)
57666b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr);
57766b8173aSChristophe Kerello else
57866b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr);
57966b8173aSChristophe Kerello
58066b8173aSChristophe Kerello if ((bxtr & FMC2_BXTR_ACCMOD) == val || bcr & FMC2_BCR_MUXEN)
58166b8173aSChristophe Kerello val = clamp_val(setup, 1, FMC2_BXTR_ADDSET_MAX);
58266b8173aSChristophe Kerello else
58366b8173aSChristophe Kerello val = min_t(u32, setup, FMC2_BXTR_ADDSET_MAX);
58466b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BXTR_ADDSET, val);
58566b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDSET, val);
58666b8173aSChristophe Kerello
58766b8173aSChristophe Kerello return 0;
58866b8173aSChristophe Kerello }
58966b8173aSChristophe Kerello
stm32_fmc2_ebi_set_address_hold(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)59066b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_address_hold(struct stm32_fmc2_ebi *ebi,
59166b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
59266b8173aSChristophe Kerello int cs, u32 setup)
59366b8173aSChristophe Kerello {
59466b8173aSChristophe Kerello u32 val, reg;
59566b8173aSChristophe Kerello int ret;
59666b8173aSChristophe Kerello
59766b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
59866b8173aSChristophe Kerello if (ret)
59966b8173aSChristophe Kerello return ret;
60066b8173aSChristophe Kerello
60166b8173aSChristophe Kerello val = clamp_val(setup, 1, FMC2_BXTR_ADDHLD_MAX);
60266b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BXTR_ADDHLD, val);
60366b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDHLD, val);
60466b8173aSChristophe Kerello
60566b8173aSChristophe Kerello return 0;
60666b8173aSChristophe Kerello }
60766b8173aSChristophe Kerello
stm32_fmc2_ebi_set_data_setup(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)60866b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_data_setup(struct stm32_fmc2_ebi *ebi,
60966b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
61066b8173aSChristophe Kerello int cs, u32 setup)
61166b8173aSChristophe Kerello {
61266b8173aSChristophe Kerello u32 val, reg;
61366b8173aSChristophe Kerello int ret;
61466b8173aSChristophe Kerello
61566b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
61666b8173aSChristophe Kerello if (ret)
61766b8173aSChristophe Kerello return ret;
61866b8173aSChristophe Kerello
61966b8173aSChristophe Kerello val = clamp_val(setup, 1, FMC2_BXTR_DATAST_MAX);
62066b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BXTR_DATAST, val);
62166b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAST, val);
62266b8173aSChristophe Kerello
62366b8173aSChristophe Kerello return 0;
62466b8173aSChristophe Kerello }
62566b8173aSChristophe Kerello
stm32_fmc2_ebi_set_bus_turnaround(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)62666b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_bus_turnaround(struct stm32_fmc2_ebi *ebi,
62766b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
62866b8173aSChristophe Kerello int cs, u32 setup)
62966b8173aSChristophe Kerello {
63066b8173aSChristophe Kerello u32 val, reg;
63166b8173aSChristophe Kerello int ret;
63266b8173aSChristophe Kerello
63366b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
63466b8173aSChristophe Kerello if (ret)
63566b8173aSChristophe Kerello return ret;
63666b8173aSChristophe Kerello
63766b8173aSChristophe Kerello val = setup ? min_t(u32, setup - 1, FMC2_BXTR_BUSTURN_MAX) : 0;
63866b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BXTR_BUSTURN, val);
63966b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_BUSTURN, val);
64066b8173aSChristophe Kerello
64166b8173aSChristophe Kerello return 0;
64266b8173aSChristophe Kerello }
64366b8173aSChristophe Kerello
stm32_fmc2_ebi_set_data_hold(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)64466b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_data_hold(struct stm32_fmc2_ebi *ebi,
64566b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
64666b8173aSChristophe Kerello int cs, u32 setup)
64766b8173aSChristophe Kerello {
64866b8173aSChristophe Kerello u32 val, reg;
64966b8173aSChristophe Kerello int ret;
65066b8173aSChristophe Kerello
65166b8173aSChristophe Kerello ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®);
65266b8173aSChristophe Kerello if (ret)
65366b8173aSChristophe Kerello return ret;
65466b8173aSChristophe Kerello
65566b8173aSChristophe Kerello if (prop->reg_type == FMC2_REG_BWTR)
65666b8173aSChristophe Kerello val = setup ? min_t(u32, setup - 1, FMC2_BXTR_DATAHLD_MAX) : 0;
65766b8173aSChristophe Kerello else
65866b8173aSChristophe Kerello val = min_t(u32, setup, FMC2_BXTR_DATAHLD_MAX);
65966b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BXTR_DATAHLD, val);
66066b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAHLD, val);
66166b8173aSChristophe Kerello
66266b8173aSChristophe Kerello return 0;
66366b8173aSChristophe Kerello }
66466b8173aSChristophe Kerello
stm32_fmc2_ebi_set_clk_period(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)66566b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_clk_period(struct stm32_fmc2_ebi *ebi,
66666b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
66766b8173aSChristophe Kerello int cs, u32 setup)
66866b8173aSChristophe Kerello {
66966b8173aSChristophe Kerello u32 val;
67066b8173aSChristophe Kerello
67166b8173aSChristophe Kerello val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1;
67266b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BTR_CLKDIV, val);
67366b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val);
67466b8173aSChristophe Kerello
67566b8173aSChristophe Kerello return 0;
67666b8173aSChristophe Kerello }
67766b8173aSChristophe Kerello
stm32_fmc2_ebi_set_data_latency(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)67866b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_data_latency(struct stm32_fmc2_ebi *ebi,
67966b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
68066b8173aSChristophe Kerello int cs, u32 setup)
68166b8173aSChristophe Kerello {
68266b8173aSChristophe Kerello u32 val;
68366b8173aSChristophe Kerello
68466b8173aSChristophe Kerello val = setup > 1 ? min_t(u32, setup - 2, FMC2_BTR_DATLAT_MAX) : 0;
68566b8173aSChristophe Kerello val = FIELD_PREP(FMC2_BTR_DATLAT, val);
68666b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_DATLAT, val);
68766b8173aSChristophe Kerello
68866b8173aSChristophe Kerello return 0;
68966b8173aSChristophe Kerello }
69066b8173aSChristophe Kerello
stm32_fmc2_ebi_set_max_low_pulse(struct stm32_fmc2_ebi * ebi,const struct stm32_fmc2_prop * prop,int cs,u32 setup)69166b8173aSChristophe Kerello static int stm32_fmc2_ebi_set_max_low_pulse(struct stm32_fmc2_ebi *ebi,
69266b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
69366b8173aSChristophe Kerello int cs, u32 setup)
69466b8173aSChristophe Kerello {
69566b8173aSChristophe Kerello u32 old_val, new_val, pcscntr;
69666b8173aSChristophe Kerello
69766b8173aSChristophe Kerello if (setup < 1)
69866b8173aSChristophe Kerello return 0;
69966b8173aSChristophe Kerello
70066b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr);
70166b8173aSChristophe Kerello
70266b8173aSChristophe Kerello /* Enable counter for the bank */
70366b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_PCSCNTR,
70466b8173aSChristophe Kerello FMC2_PCSCNTR_CNTBEN(cs),
70566b8173aSChristophe Kerello FMC2_PCSCNTR_CNTBEN(cs));
70666b8173aSChristophe Kerello
70766b8173aSChristophe Kerello new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX);
70866b8173aSChristophe Kerello old_val = FIELD_GET(FMC2_PCSCNTR_CSCOUNT, pcscntr);
70966b8173aSChristophe Kerello if (old_val && new_val > old_val)
71066b8173aSChristophe Kerello /* Keep current counter value */
71166b8173aSChristophe Kerello return 0;
71266b8173aSChristophe Kerello
71366b8173aSChristophe Kerello new_val = FIELD_PREP(FMC2_PCSCNTR_CSCOUNT, new_val);
71466b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_PCSCNTR,
71566b8173aSChristophe Kerello FMC2_PCSCNTR_CSCOUNT, new_val);
71666b8173aSChristophe Kerello
71766b8173aSChristophe Kerello return 0;
71866b8173aSChristophe Kerello }
71966b8173aSChristophe Kerello
72066b8173aSChristophe Kerello static const struct stm32_fmc2_prop stm32_fmc2_child_props[] = {
72166b8173aSChristophe Kerello /* st,fmc2-ebi-cs-trans-type must be the first property */
72266b8173aSChristophe Kerello {
72366b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-transaction-type",
72466b8173aSChristophe Kerello .mprop = true,
72566b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_trans_type,
72666b8173aSChristophe Kerello },
72766b8173aSChristophe Kerello {
72866b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-cclk-enable",
72966b8173aSChristophe Kerello .bprop = true,
73066b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
73166b8173aSChristophe Kerello .reg_mask = FMC2_BCR1_CCLKEN,
73266b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_cclk,
73366b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
73466b8173aSChristophe Kerello },
73566b8173aSChristophe Kerello {
73666b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-mux-enable",
73766b8173aSChristophe Kerello .bprop = true,
73866b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
73966b8173aSChristophe Kerello .reg_mask = FMC2_BCR_MUXEN,
74066b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_mux,
74166b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
74266b8173aSChristophe Kerello },
74366b8173aSChristophe Kerello {
74466b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-buswidth",
74566b8173aSChristophe Kerello .reset_val = FMC2_BUSWIDTH_16,
74666b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_buswidth,
74766b8173aSChristophe Kerello },
74866b8173aSChristophe Kerello {
74966b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-waitpol-high",
75066b8173aSChristophe Kerello .bprop = true,
75166b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
75266b8173aSChristophe Kerello .reg_mask = FMC2_BCR_WAITPOL,
75366b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
75466b8173aSChristophe Kerello },
75566b8173aSChristophe Kerello {
75666b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-waitcfg-enable",
75766b8173aSChristophe Kerello .bprop = true,
75866b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
75966b8173aSChristophe Kerello .reg_mask = FMC2_BCR_WAITCFG,
76066b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_waitcfg,
76166b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
76266b8173aSChristophe Kerello },
76366b8173aSChristophe Kerello {
76466b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-wait-enable",
76566b8173aSChristophe Kerello .bprop = true,
76666b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
76766b8173aSChristophe Kerello .reg_mask = FMC2_BCR_WAITEN,
76866b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_sync_trans,
76966b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
77066b8173aSChristophe Kerello },
77166b8173aSChristophe Kerello {
77266b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-asyncwait-enable",
77366b8173aSChristophe Kerello .bprop = true,
77466b8173aSChristophe Kerello .reg_type = FMC2_REG_BCR,
77566b8173aSChristophe Kerello .reg_mask = FMC2_BCR_ASYNCWAIT,
77666b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
77766b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bit_field,
77866b8173aSChristophe Kerello },
77966b8173aSChristophe Kerello {
78066b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-cpsize",
78166b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_cpsize,
78266b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_cpsize,
78366b8173aSChristophe Kerello },
78466b8173aSChristophe Kerello {
78566b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
78666b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
78766b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bl_setup,
78866b8173aSChristophe Kerello },
78966b8173aSChristophe Kerello {
79066b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-address-setup-ns",
79166b8173aSChristophe Kerello .reg_type = FMC2_REG_BTR,
79266b8173aSChristophe Kerello .reset_val = FMC2_BXTR_ADDSET_MAX,
79366b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
79466b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
79566b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_address_setup,
79666b8173aSChristophe Kerello },
79766b8173aSChristophe Kerello {
79866b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-address-hold-ns",
79966b8173aSChristophe Kerello .reg_type = FMC2_REG_BTR,
80066b8173aSChristophe Kerello .reset_val = FMC2_BXTR_ADDHLD_MAX,
80166b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_address_hold,
80266b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
80366b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_address_hold,
80466b8173aSChristophe Kerello },
80566b8173aSChristophe Kerello {
80666b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-data-setup-ns",
80766b8173aSChristophe Kerello .reg_type = FMC2_REG_BTR,
80866b8173aSChristophe Kerello .reset_val = FMC2_BXTR_DATAST_MAX,
80966b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
81066b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
81166b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_data_setup,
81266b8173aSChristophe Kerello },
81366b8173aSChristophe Kerello {
81466b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
81566b8173aSChristophe Kerello .reg_type = FMC2_REG_BTR,
81666b8173aSChristophe Kerello .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
81766b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
81866b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bus_turnaround,
81966b8173aSChristophe Kerello },
82066b8173aSChristophe Kerello {
82166b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-data-hold-ns",
82266b8173aSChristophe Kerello .reg_type = FMC2_REG_BTR,
82366b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
82466b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
82566b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_data_hold,
82666b8173aSChristophe Kerello },
82766b8173aSChristophe Kerello {
82866b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-clk-period-ns",
82966b8173aSChristophe Kerello .reset_val = FMC2_BTR_CLKDIV_MAX + 1,
83066b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_clk_period,
83166b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
83266b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_clk_period,
83366b8173aSChristophe Kerello },
83466b8173aSChristophe Kerello {
83566b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-data-latency-ns",
83666b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_sync_trans,
83766b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clk_period,
83866b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_data_latency,
83966b8173aSChristophe Kerello },
84066b8173aSChristophe Kerello {
84166b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-write-address-setup-ns",
84266b8173aSChristophe Kerello .reg_type = FMC2_REG_BWTR,
84366b8173aSChristophe Kerello .reset_val = FMC2_BXTR_ADDSET_MAX,
84466b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
84566b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
84666b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_address_setup,
84766b8173aSChristophe Kerello },
84866b8173aSChristophe Kerello {
84966b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-write-address-hold-ns",
85066b8173aSChristophe Kerello .reg_type = FMC2_REG_BWTR,
85166b8173aSChristophe Kerello .reset_val = FMC2_BXTR_ADDHLD_MAX,
85266b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_address_hold,
85366b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
85466b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_address_hold,
85566b8173aSChristophe Kerello },
85666b8173aSChristophe Kerello {
85766b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-write-data-setup-ns",
85866b8173aSChristophe Kerello .reg_type = FMC2_REG_BWTR,
85966b8173aSChristophe Kerello .reset_val = FMC2_BXTR_DATAST_MAX,
86066b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
86166b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
86266b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_data_setup,
86366b8173aSChristophe Kerello },
86466b8173aSChristophe Kerello {
86566b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
86666b8173aSChristophe Kerello .reg_type = FMC2_REG_BWTR,
86766b8173aSChristophe Kerello .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
86866b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
86966b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_bus_turnaround,
87066b8173aSChristophe Kerello },
87166b8173aSChristophe Kerello {
87266b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-write-data-hold-ns",
87366b8173aSChristophe Kerello .reg_type = FMC2_REG_BWTR,
87466b8173aSChristophe Kerello .check = stm32_fmc2_ebi_check_async_trans,
87566b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
87666b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_data_hold,
87766b8173aSChristophe Kerello },
87866b8173aSChristophe Kerello {
87966b8173aSChristophe Kerello .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
88066b8173aSChristophe Kerello .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
88166b8173aSChristophe Kerello .set = stm32_fmc2_ebi_set_max_low_pulse,
88266b8173aSChristophe Kerello },
88366b8173aSChristophe Kerello };
88466b8173aSChristophe Kerello
stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi * ebi,struct device_node * dev_node,const struct stm32_fmc2_prop * prop,int cs)88566b8173aSChristophe Kerello static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi *ebi,
88666b8173aSChristophe Kerello struct device_node *dev_node,
88766b8173aSChristophe Kerello const struct stm32_fmc2_prop *prop,
88866b8173aSChristophe Kerello int cs)
88966b8173aSChristophe Kerello {
89066b8173aSChristophe Kerello struct device *dev = ebi->dev;
89166b8173aSChristophe Kerello u32 setup = 0;
89266b8173aSChristophe Kerello
89366b8173aSChristophe Kerello if (!prop->set) {
89466b8173aSChristophe Kerello dev_err(dev, "property %s is not well defined\n", prop->name);
89566b8173aSChristophe Kerello return -EINVAL;
89666b8173aSChristophe Kerello }
89766b8173aSChristophe Kerello
89866b8173aSChristophe Kerello if (prop->check && prop->check(ebi, prop, cs))
89966b8173aSChristophe Kerello /* Skeep this property */
90066b8173aSChristophe Kerello return 0;
90166b8173aSChristophe Kerello
90266b8173aSChristophe Kerello if (prop->bprop) {
90366b8173aSChristophe Kerello bool bprop;
90466b8173aSChristophe Kerello
90566b8173aSChristophe Kerello bprop = of_property_read_bool(dev_node, prop->name);
90666b8173aSChristophe Kerello if (prop->mprop && !bprop) {
90766b8173aSChristophe Kerello dev_err(dev, "mandatory property %s not defined in the device tree\n",
90866b8173aSChristophe Kerello prop->name);
90966b8173aSChristophe Kerello return -EINVAL;
91066b8173aSChristophe Kerello }
91166b8173aSChristophe Kerello
91266b8173aSChristophe Kerello if (bprop)
91366b8173aSChristophe Kerello setup = 1;
91466b8173aSChristophe Kerello } else {
91566b8173aSChristophe Kerello u32 val;
91666b8173aSChristophe Kerello int ret;
91766b8173aSChristophe Kerello
91866b8173aSChristophe Kerello ret = of_property_read_u32(dev_node, prop->name, &val);
91966b8173aSChristophe Kerello if (prop->mprop && ret) {
92066b8173aSChristophe Kerello dev_err(dev, "mandatory property %s not defined in the device tree\n",
92166b8173aSChristophe Kerello prop->name);
92266b8173aSChristophe Kerello return ret;
92366b8173aSChristophe Kerello }
92466b8173aSChristophe Kerello
92566b8173aSChristophe Kerello if (ret)
92666b8173aSChristophe Kerello setup = prop->reset_val;
92766b8173aSChristophe Kerello else if (prop->calculate)
92866b8173aSChristophe Kerello setup = prop->calculate(ebi, cs, val);
92966b8173aSChristophe Kerello else
93066b8173aSChristophe Kerello setup = val;
93166b8173aSChristophe Kerello }
93266b8173aSChristophe Kerello
93366b8173aSChristophe Kerello return prop->set(ebi, prop, cs, setup);
93466b8173aSChristophe Kerello }
93566b8173aSChristophe Kerello
stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi * ebi,int cs)93666b8173aSChristophe Kerello static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs)
93766b8173aSChristophe Kerello {
93866b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs),
93966b8173aSChristophe Kerello FMC2_BCR_MBKEN, FMC2_BCR_MBKEN);
94066b8173aSChristophe Kerello }
94166b8173aSChristophe Kerello
stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi * ebi,int cs)94266b8173aSChristophe Kerello static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs)
94366b8173aSChristophe Kerello {
94466b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0);
94566b8173aSChristophe Kerello }
94666b8173aSChristophe Kerello
stm32_fmc2_ebi_save_setup(struct stm32_fmc2_ebi * ebi)94766b8173aSChristophe Kerello static void stm32_fmc2_ebi_save_setup(struct stm32_fmc2_ebi *ebi)
94866b8173aSChristophe Kerello {
94966b8173aSChristophe Kerello unsigned int cs;
95066b8173aSChristophe Kerello
95166b8173aSChristophe Kerello for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
95266b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]);
95366b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]);
95466b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]);
95566b8173aSChristophe Kerello }
95666b8173aSChristophe Kerello
95766b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr);
95866b8173aSChristophe Kerello }
95966b8173aSChristophe Kerello
stm32_fmc2_ebi_set_setup(struct stm32_fmc2_ebi * ebi)96066b8173aSChristophe Kerello static void stm32_fmc2_ebi_set_setup(struct stm32_fmc2_ebi *ebi)
96166b8173aSChristophe Kerello {
96266b8173aSChristophe Kerello unsigned int cs;
96366b8173aSChristophe Kerello
96466b8173aSChristophe Kerello for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
96566b8173aSChristophe Kerello regmap_write(ebi->regmap, FMC2_BCR(cs), ebi->bcr[cs]);
96666b8173aSChristophe Kerello regmap_write(ebi->regmap, FMC2_BTR(cs), ebi->btr[cs]);
96766b8173aSChristophe Kerello regmap_write(ebi->regmap, FMC2_BWTR(cs), ebi->bwtr[cs]);
96866b8173aSChristophe Kerello }
96966b8173aSChristophe Kerello
97066b8173aSChristophe Kerello regmap_write(ebi->regmap, FMC2_PCSCNTR, ebi->pcscntr);
97166b8173aSChristophe Kerello }
97266b8173aSChristophe Kerello
stm32_fmc2_ebi_disable_banks(struct stm32_fmc2_ebi * ebi)97366b8173aSChristophe Kerello static void stm32_fmc2_ebi_disable_banks(struct stm32_fmc2_ebi *ebi)
97466b8173aSChristophe Kerello {
97566b8173aSChristophe Kerello unsigned int cs;
97666b8173aSChristophe Kerello
97766b8173aSChristophe Kerello for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
97866b8173aSChristophe Kerello if (!(ebi->bank_assigned & BIT(cs)))
97966b8173aSChristophe Kerello continue;
98066b8173aSChristophe Kerello
98166b8173aSChristophe Kerello stm32_fmc2_ebi_disable_bank(ebi, cs);
98266b8173aSChristophe Kerello }
98366b8173aSChristophe Kerello }
98466b8173aSChristophe Kerello
98566b8173aSChristophe Kerello /* NWAIT signal can not be connected to EBI controller and NAND controller */
stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi * ebi)98666b8173aSChristophe Kerello static bool stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi)
98766b8173aSChristophe Kerello {
98866b8173aSChristophe Kerello unsigned int cs;
98966b8173aSChristophe Kerello u32 bcr;
99066b8173aSChristophe Kerello
99166b8173aSChristophe Kerello for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) {
99266b8173aSChristophe Kerello if (!(ebi->bank_assigned & BIT(cs)))
99366b8173aSChristophe Kerello continue;
99466b8173aSChristophe Kerello
99566b8173aSChristophe Kerello regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr);
99666b8173aSChristophe Kerello if ((bcr & FMC2_BCR_WAITEN || bcr & FMC2_BCR_ASYNCWAIT) &&
99766b8173aSChristophe Kerello ebi->bank_assigned & BIT(FMC2_NAND))
99866b8173aSChristophe Kerello return true;
99966b8173aSChristophe Kerello }
100066b8173aSChristophe Kerello
100166b8173aSChristophe Kerello return false;
100266b8173aSChristophe Kerello }
100366b8173aSChristophe Kerello
stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi * ebi)100466b8173aSChristophe Kerello static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi)
100566b8173aSChristophe Kerello {
100666b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR1,
100766b8173aSChristophe Kerello FMC2_BCR1_FMC2EN, FMC2_BCR1_FMC2EN);
100866b8173aSChristophe Kerello }
100966b8173aSChristophe Kerello
stm32_fmc2_ebi_disable(struct stm32_fmc2_ebi * ebi)101066b8173aSChristophe Kerello static void stm32_fmc2_ebi_disable(struct stm32_fmc2_ebi *ebi)
101166b8173aSChristophe Kerello {
101266b8173aSChristophe Kerello regmap_update_bits(ebi->regmap, FMC2_BCR1, FMC2_BCR1_FMC2EN, 0);
101366b8173aSChristophe Kerello }
101466b8173aSChristophe Kerello
stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi * ebi,struct device_node * dev_node,u32 cs)101566b8173aSChristophe Kerello static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi *ebi,
101666b8173aSChristophe Kerello struct device_node *dev_node,
101766b8173aSChristophe Kerello u32 cs)
101866b8173aSChristophe Kerello {
101966b8173aSChristophe Kerello unsigned int i;
102066b8173aSChristophe Kerello int ret;
102166b8173aSChristophe Kerello
102266b8173aSChristophe Kerello stm32_fmc2_ebi_disable_bank(ebi, cs);
102366b8173aSChristophe Kerello
102466b8173aSChristophe Kerello for (i = 0; i < ARRAY_SIZE(stm32_fmc2_child_props); i++) {
102566b8173aSChristophe Kerello const struct stm32_fmc2_prop *p = &stm32_fmc2_child_props[i];
102666b8173aSChristophe Kerello
102766b8173aSChristophe Kerello ret = stm32_fmc2_ebi_parse_prop(ebi, dev_node, p, cs);
102866b8173aSChristophe Kerello if (ret) {
102966b8173aSChristophe Kerello dev_err(ebi->dev, "property %s could not be set: %d\n",
103066b8173aSChristophe Kerello p->name, ret);
103166b8173aSChristophe Kerello return ret;
103266b8173aSChristophe Kerello }
103366b8173aSChristophe Kerello }
103466b8173aSChristophe Kerello
103566b8173aSChristophe Kerello stm32_fmc2_ebi_enable_bank(ebi, cs);
103666b8173aSChristophe Kerello
103766b8173aSChristophe Kerello return 0;
103866b8173aSChristophe Kerello }
103966b8173aSChristophe Kerello
stm32_fmc2_ebi_parse_dt(struct stm32_fmc2_ebi * ebi)104066b8173aSChristophe Kerello static int stm32_fmc2_ebi_parse_dt(struct stm32_fmc2_ebi *ebi)
104166b8173aSChristophe Kerello {
104266b8173aSChristophe Kerello struct device *dev = ebi->dev;
104366b8173aSChristophe Kerello struct device_node *child;
104466b8173aSChristophe Kerello bool child_found = false;
104566b8173aSChristophe Kerello u32 bank;
104666b8173aSChristophe Kerello int ret;
104766b8173aSChristophe Kerello
104866b8173aSChristophe Kerello for_each_available_child_of_node(dev->of_node, child) {
104966b8173aSChristophe Kerello ret = of_property_read_u32(child, "reg", &bank);
105066b8173aSChristophe Kerello if (ret) {
105166b8173aSChristophe Kerello dev_err(dev, "could not retrieve reg property: %d\n",
105266b8173aSChristophe Kerello ret);
10532f9dc6a3SKrzysztof Kozlowski of_node_put(child);
105466b8173aSChristophe Kerello return ret;
105566b8173aSChristophe Kerello }
105666b8173aSChristophe Kerello
105766b8173aSChristophe Kerello if (bank >= FMC2_MAX_BANKS) {
105866b8173aSChristophe Kerello dev_err(dev, "invalid reg value: %d\n", bank);
10592f9dc6a3SKrzysztof Kozlowski of_node_put(child);
106066b8173aSChristophe Kerello return -EINVAL;
106166b8173aSChristophe Kerello }
106266b8173aSChristophe Kerello
106366b8173aSChristophe Kerello if (ebi->bank_assigned & BIT(bank)) {
106466b8173aSChristophe Kerello dev_err(dev, "bank already assigned: %d\n", bank);
10652f9dc6a3SKrzysztof Kozlowski of_node_put(child);
106666b8173aSChristophe Kerello return -EINVAL;
106766b8173aSChristophe Kerello }
106866b8173aSChristophe Kerello
106966b8173aSChristophe Kerello if (bank < FMC2_MAX_EBI_CE) {
107066b8173aSChristophe Kerello ret = stm32_fmc2_ebi_setup_cs(ebi, child, bank);
107166b8173aSChristophe Kerello if (ret) {
107266b8173aSChristophe Kerello dev_err(dev, "setup chip select %d failed: %d\n",
107366b8173aSChristophe Kerello bank, ret);
10742f9dc6a3SKrzysztof Kozlowski of_node_put(child);
107566b8173aSChristophe Kerello return ret;
107666b8173aSChristophe Kerello }
107766b8173aSChristophe Kerello }
107866b8173aSChristophe Kerello
107966b8173aSChristophe Kerello ebi->bank_assigned |= BIT(bank);
108066b8173aSChristophe Kerello child_found = true;
108166b8173aSChristophe Kerello }
108266b8173aSChristophe Kerello
108366b8173aSChristophe Kerello if (!child_found) {
108466b8173aSChristophe Kerello dev_warn(dev, "no subnodes found, disable the driver.\n");
108566b8173aSChristophe Kerello return -ENODEV;
108666b8173aSChristophe Kerello }
108766b8173aSChristophe Kerello
108866b8173aSChristophe Kerello if (stm32_fmc2_ebi_nwait_used_by_ctrls(ebi)) {
108966b8173aSChristophe Kerello dev_err(dev, "NWAIT signal connected to EBI and NAND controllers\n");
109066b8173aSChristophe Kerello return -EINVAL;
109166b8173aSChristophe Kerello }
109266b8173aSChristophe Kerello
109366b8173aSChristophe Kerello stm32_fmc2_ebi_enable(ebi);
109466b8173aSChristophe Kerello
109566b8173aSChristophe Kerello return of_platform_populate(dev->of_node, NULL, NULL, dev);
109666b8173aSChristophe Kerello }
109766b8173aSChristophe Kerello
stm32_fmc2_ebi_probe(struct platform_device * pdev)109866b8173aSChristophe Kerello static int stm32_fmc2_ebi_probe(struct platform_device *pdev)
109966b8173aSChristophe Kerello {
110066b8173aSChristophe Kerello struct device *dev = &pdev->dev;
110166b8173aSChristophe Kerello struct stm32_fmc2_ebi *ebi;
110266b8173aSChristophe Kerello struct reset_control *rstc;
110366b8173aSChristophe Kerello int ret;
110466b8173aSChristophe Kerello
110566b8173aSChristophe Kerello ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL);
110666b8173aSChristophe Kerello if (!ebi)
110766b8173aSChristophe Kerello return -ENOMEM;
110866b8173aSChristophe Kerello
110966b8173aSChristophe Kerello ebi->dev = dev;
111066b8173aSChristophe Kerello
111166b8173aSChristophe Kerello ebi->regmap = device_node_to_regmap(dev->of_node);
111266b8173aSChristophe Kerello if (IS_ERR(ebi->regmap))
111366b8173aSChristophe Kerello return PTR_ERR(ebi->regmap);
111466b8173aSChristophe Kerello
111566b8173aSChristophe Kerello ebi->clk = devm_clk_get(dev, NULL);
111666b8173aSChristophe Kerello if (IS_ERR(ebi->clk))
111766b8173aSChristophe Kerello return PTR_ERR(ebi->clk);
111866b8173aSChristophe Kerello
111966b8173aSChristophe Kerello rstc = devm_reset_control_get(dev, NULL);
112066b8173aSChristophe Kerello if (PTR_ERR(rstc) == -EPROBE_DEFER)
112166b8173aSChristophe Kerello return -EPROBE_DEFER;
112266b8173aSChristophe Kerello
112366b8173aSChristophe Kerello ret = clk_prepare_enable(ebi->clk);
112466b8173aSChristophe Kerello if (ret)
112566b8173aSChristophe Kerello return ret;
112666b8173aSChristophe Kerello
112766b8173aSChristophe Kerello if (!IS_ERR(rstc)) {
112866b8173aSChristophe Kerello reset_control_assert(rstc);
112966b8173aSChristophe Kerello reset_control_deassert(rstc);
113066b8173aSChristophe Kerello }
113166b8173aSChristophe Kerello
113266b8173aSChristophe Kerello ret = stm32_fmc2_ebi_parse_dt(ebi);
113366b8173aSChristophe Kerello if (ret)
113466b8173aSChristophe Kerello goto err_release;
113566b8173aSChristophe Kerello
113666b8173aSChristophe Kerello stm32_fmc2_ebi_save_setup(ebi);
113766b8173aSChristophe Kerello platform_set_drvdata(pdev, ebi);
113866b8173aSChristophe Kerello
113966b8173aSChristophe Kerello return 0;
114066b8173aSChristophe Kerello
114166b8173aSChristophe Kerello err_release:
114266b8173aSChristophe Kerello stm32_fmc2_ebi_disable_banks(ebi);
114366b8173aSChristophe Kerello stm32_fmc2_ebi_disable(ebi);
114466b8173aSChristophe Kerello clk_disable_unprepare(ebi->clk);
114566b8173aSChristophe Kerello
114666b8173aSChristophe Kerello return ret;
114766b8173aSChristophe Kerello }
114866b8173aSChristophe Kerello
stm32_fmc2_ebi_remove(struct platform_device * pdev)114966b8173aSChristophe Kerello static int stm32_fmc2_ebi_remove(struct platform_device *pdev)
115066b8173aSChristophe Kerello {
115166b8173aSChristophe Kerello struct stm32_fmc2_ebi *ebi = platform_get_drvdata(pdev);
115266b8173aSChristophe Kerello
115366b8173aSChristophe Kerello of_platform_depopulate(&pdev->dev);
115466b8173aSChristophe Kerello stm32_fmc2_ebi_disable_banks(ebi);
115566b8173aSChristophe Kerello stm32_fmc2_ebi_disable(ebi);
115666b8173aSChristophe Kerello clk_disable_unprepare(ebi->clk);
115766b8173aSChristophe Kerello
115866b8173aSChristophe Kerello return 0;
115966b8173aSChristophe Kerello }
116066b8173aSChristophe Kerello
stm32_fmc2_ebi_suspend(struct device * dev)116166b8173aSChristophe Kerello static int __maybe_unused stm32_fmc2_ebi_suspend(struct device *dev)
116266b8173aSChristophe Kerello {
116366b8173aSChristophe Kerello struct stm32_fmc2_ebi *ebi = dev_get_drvdata(dev);
116466b8173aSChristophe Kerello
116566b8173aSChristophe Kerello stm32_fmc2_ebi_disable(ebi);
116666b8173aSChristophe Kerello clk_disable_unprepare(ebi->clk);
116766b8173aSChristophe Kerello pinctrl_pm_select_sleep_state(dev);
116866b8173aSChristophe Kerello
116966b8173aSChristophe Kerello return 0;
117066b8173aSChristophe Kerello }
117166b8173aSChristophe Kerello
stm32_fmc2_ebi_resume(struct device * dev)117266b8173aSChristophe Kerello static int __maybe_unused stm32_fmc2_ebi_resume(struct device *dev)
117366b8173aSChristophe Kerello {
117466b8173aSChristophe Kerello struct stm32_fmc2_ebi *ebi = dev_get_drvdata(dev);
117566b8173aSChristophe Kerello int ret;
117666b8173aSChristophe Kerello
117766b8173aSChristophe Kerello pinctrl_pm_select_default_state(dev);
117866b8173aSChristophe Kerello
117966b8173aSChristophe Kerello ret = clk_prepare_enable(ebi->clk);
118066b8173aSChristophe Kerello if (ret)
118166b8173aSChristophe Kerello return ret;
118266b8173aSChristophe Kerello
118366b8173aSChristophe Kerello stm32_fmc2_ebi_set_setup(ebi);
118466b8173aSChristophe Kerello stm32_fmc2_ebi_enable(ebi);
118566b8173aSChristophe Kerello
118666b8173aSChristophe Kerello return 0;
118766b8173aSChristophe Kerello }
118866b8173aSChristophe Kerello
118966b8173aSChristophe Kerello static SIMPLE_DEV_PM_OPS(stm32_fmc2_ebi_pm_ops, stm32_fmc2_ebi_suspend,
119066b8173aSChristophe Kerello stm32_fmc2_ebi_resume);
119166b8173aSChristophe Kerello
119266b8173aSChristophe Kerello static const struct of_device_id stm32_fmc2_ebi_match[] = {
119366b8173aSChristophe Kerello {.compatible = "st,stm32mp1-fmc2-ebi"},
119466b8173aSChristophe Kerello {}
119566b8173aSChristophe Kerello };
119666b8173aSChristophe Kerello MODULE_DEVICE_TABLE(of, stm32_fmc2_ebi_match);
119766b8173aSChristophe Kerello
119866b8173aSChristophe Kerello static struct platform_driver stm32_fmc2_ebi_driver = {
119966b8173aSChristophe Kerello .probe = stm32_fmc2_ebi_probe,
120066b8173aSChristophe Kerello .remove = stm32_fmc2_ebi_remove,
120166b8173aSChristophe Kerello .driver = {
120266b8173aSChristophe Kerello .name = "stm32_fmc2_ebi",
120366b8173aSChristophe Kerello .of_match_table = stm32_fmc2_ebi_match,
120466b8173aSChristophe Kerello .pm = &stm32_fmc2_ebi_pm_ops,
120566b8173aSChristophe Kerello },
120666b8173aSChristophe Kerello };
120766b8173aSChristophe Kerello module_platform_driver(stm32_fmc2_ebi_driver);
120866b8173aSChristophe Kerello
120966b8173aSChristophe Kerello MODULE_ALIAS("platform:stm32_fmc2_ebi");
121066b8173aSChristophe Kerello MODULE_AUTHOR("Christophe Kerello <christophe.kerello@st.com>");
121166b8173aSChristophe Kerello MODULE_DESCRIPTION("STMicroelectronics STM32 FMC2 ebi driver");
121266b8173aSChristophe Kerello MODULE_LICENSE("GPL v2");
1213