1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * OpenFirmware helpers for memory drivers 4 * 5 * Copyright (C) 2012 Texas Instruments, Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/platform_device.h> 10 #include <linux/list.h> 11 #include <linux/of.h> 12 #include <linux/gfp.h> 13 #include <linux/export.h> 14 15 #include "jedec_ddr.h" 16 #include "of_memory.h" 17 18 /** 19 * of_get_min_tck() - extract min timing values for ddr 20 * @np: pointer to ddr device tree node 21 * @device: device requesting for min timing values 22 * 23 * Populates the lpddr2_min_tck structure by extracting data 24 * from device tree node. Returns a pointer to the populated 25 * structure. If any error in populating the structure, returns 26 * default min timings provided by JEDEC. 27 */ 28 const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np, 29 struct device *dev) 30 { 31 int ret = 0; 32 struct lpddr2_min_tck *min; 33 34 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL); 35 if (!min) 36 goto default_min_tck; 37 38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); 39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); 40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); 41 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin); 42 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD); 43 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR); 44 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP); 45 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP); 46 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE); 47 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR); 48 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW); 49 50 if (ret) { 51 devm_kfree(dev, min); 52 goto default_min_tck; 53 } 54 55 return min; 56 57 default_min_tck: 58 dev_warn(dev, "%s: using default min-tck values\n", __func__); 59 return &lpddr2_jedec_min_tck; 60 } 61 EXPORT_SYMBOL(of_get_min_tck); 62 63 static int of_do_get_timings(struct device_node *np, 64 struct lpddr2_timings *tim) 65 { 66 int ret; 67 68 ret = of_property_read_u32(np, "max-freq", &tim->max_freq); 69 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq); 70 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab); 71 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD); 72 ret |= of_property_read_u32(np, "tWR", &tim->tWR); 73 ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min); 74 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD); 75 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR); 76 ret |= of_property_read_u32(np, "tXP", &tim->tXP); 77 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP); 78 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR); 79 ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max); 80 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW); 81 ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS); 82 ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL); 83 ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit); 84 ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns); 85 ret |= of_property_read_u32(np, "tDQSCK-max-derated", 86 &tim->tDQSCK_max_derated); 87 88 return ret; 89 } 90 91 /** 92 * of_get_ddr_timings() - extracts the ddr timings and updates no of 93 * frequencies available. 94 * @np_ddr: Pointer to ddr device tree node 95 * @dev: Device requesting for ddr timings 96 * @device_type: Type of ddr(LPDDR2 S2/S4) 97 * @nr_frequencies: No of frequencies available for ddr 98 * (updated by this function) 99 * 100 * Populates lpddr2_timings structure by extracting data from device 101 * tree node. Returns pointer to populated structure. If any error 102 * while populating, returns default timings provided by JEDEC. 103 */ 104 const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr, 105 struct device *dev, u32 device_type, u32 *nr_frequencies) 106 { 107 struct lpddr2_timings *timings = NULL; 108 u32 arr_sz = 0, i = 0; 109 struct device_node *np_tim; 110 char *tim_compat = NULL; 111 112 switch (device_type) { 113 case DDR_TYPE_LPDDR2_S2: 114 case DDR_TYPE_LPDDR2_S4: 115 tim_compat = "jedec,lpddr2-timings"; 116 break; 117 default: 118 dev_warn(dev, "%s: un-supported memory type\n", __func__); 119 } 120 121 for_each_child_of_node(np_ddr, np_tim) 122 if (of_device_is_compatible(np_tim, tim_compat)) 123 arr_sz++; 124 125 if (arr_sz) 126 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings), 127 GFP_KERNEL); 128 129 if (!timings) 130 goto default_timings; 131 132 for_each_child_of_node(np_ddr, np_tim) { 133 if (of_device_is_compatible(np_tim, tim_compat)) { 134 if (of_do_get_timings(np_tim, &timings[i])) { 135 devm_kfree(dev, timings); 136 goto default_timings; 137 } 138 i++; 139 } 140 } 141 142 *nr_frequencies = arr_sz; 143 144 return timings; 145 146 default_timings: 147 dev_warn(dev, "%s: using default timings\n", __func__); 148 *nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings); 149 return lpddr2_jedec_timings; 150 } 151 EXPORT_SYMBOL(of_get_ddr_timings); 152