12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
254afbec0SScott Wood /*
354afbec0SScott Wood * CoreNet Coherency Fabric error reporting
454afbec0SScott Wood *
554afbec0SScott Wood * Copyright 2014 Freescale Semiconductor Inc.
654afbec0SScott Wood */
754afbec0SScott Wood
854afbec0SScott Wood #include <linux/interrupt.h>
954afbec0SScott Wood #include <linux/io.h>
1054afbec0SScott Wood #include <linux/irq.h>
1154afbec0SScott Wood #include <linux/module.h>
1254afbec0SScott Wood #include <linux/of.h>
1354afbec0SScott Wood #include <linux/of_address.h>
1454afbec0SScott Wood #include <linux/of_device.h>
1554afbec0SScott Wood #include <linux/of_irq.h>
1654afbec0SScott Wood #include <linux/platform_device.h>
1754afbec0SScott Wood
1854afbec0SScott Wood enum ccf_version {
1954afbec0SScott Wood CCF1,
2054afbec0SScott Wood CCF2,
2154afbec0SScott Wood };
2254afbec0SScott Wood
2354afbec0SScott Wood struct ccf_info {
2454afbec0SScott Wood enum ccf_version version;
2554afbec0SScott Wood int err_reg_offs;
26c3e09b3aSScott Wood bool has_brr;
2754afbec0SScott Wood };
2854afbec0SScott Wood
2954afbec0SScott Wood static const struct ccf_info ccf1_info = {
3054afbec0SScott Wood .version = CCF1,
3154afbec0SScott Wood .err_reg_offs = 0xa00,
32c3e09b3aSScott Wood .has_brr = false,
3354afbec0SScott Wood };
3454afbec0SScott Wood
3554afbec0SScott Wood static const struct ccf_info ccf2_info = {
3654afbec0SScott Wood .version = CCF2,
3754afbec0SScott Wood .err_reg_offs = 0xe40,
38c3e09b3aSScott Wood .has_brr = true,
3954afbec0SScott Wood };
4054afbec0SScott Wood
41c3e09b3aSScott Wood /*
42c3e09b3aSScott Wood * This register is present but not documented, with different values for
43c3e09b3aSScott Wood * IP_ID, on other chips with fsl,corenet2-cf such as t4240 and b4860.
44c3e09b3aSScott Wood */
45c3e09b3aSScott Wood #define CCF_BRR 0xbf8
46c3e09b3aSScott Wood #define CCF_BRR_IPID 0xffff0000
47c3e09b3aSScott Wood #define CCF_BRR_IPID_T1040 0x09310000
48c3e09b3aSScott Wood
4954afbec0SScott Wood static const struct of_device_id ccf_matches[] = {
5054afbec0SScott Wood {
5154afbec0SScott Wood .compatible = "fsl,corenet1-cf",
5254afbec0SScott Wood .data = &ccf1_info,
5354afbec0SScott Wood },
5454afbec0SScott Wood {
5554afbec0SScott Wood .compatible = "fsl,corenet2-cf",
5654afbec0SScott Wood .data = &ccf2_info,
5754afbec0SScott Wood },
5854afbec0SScott Wood {}
5954afbec0SScott Wood };
60613a91e2SLuis de Bethencourt MODULE_DEVICE_TABLE(of, ccf_matches);
6154afbec0SScott Wood
6254afbec0SScott Wood struct ccf_err_regs {
6354afbec0SScott Wood u32 errdet; /* 0x00 Error Detect Register */
6454afbec0SScott Wood /* 0x04 Error Enable (ccf1)/Disable (ccf2) Register */
6554afbec0SScott Wood u32 errdis;
6654afbec0SScott Wood /* 0x08 Error Interrupt Enable Register (ccf2 only) */
6754afbec0SScott Wood u32 errinten;
6854afbec0SScott Wood u32 cecar; /* 0x0c Error Capture Attribute Register */
6954afbec0SScott Wood u32 cecaddrh; /* 0x10 Error Capture Address High */
7054afbec0SScott Wood u32 cecaddrl; /* 0x14 Error Capture Address Low */
7154afbec0SScott Wood u32 cecar2; /* 0x18 Error Capture Attribute Register 2 */
7254afbec0SScott Wood };
7354afbec0SScott Wood
7454afbec0SScott Wood /* LAE/CV also valid for errdis and errinten */
7554afbec0SScott Wood #define ERRDET_LAE (1 << 0) /* Local Access Error */
7654afbec0SScott Wood #define ERRDET_CV (1 << 1) /* Coherency Violation */
77c3e09b3aSScott Wood #define ERRDET_UTID (1 << 2) /* Unavailable Target ID (t1040) */
78c3e09b3aSScott Wood #define ERRDET_MCST (1 << 3) /* Multicast Stash (t1040) */
7954afbec0SScott Wood #define ERRDET_CTYPE_SHIFT 26 /* Capture Type (ccf2 only) */
8054afbec0SScott Wood #define ERRDET_CTYPE_MASK (0x1f << ERRDET_CTYPE_SHIFT)
8154afbec0SScott Wood #define ERRDET_CAP (1 << 31) /* Capture Valid (ccf2 only) */
8254afbec0SScott Wood
8354afbec0SScott Wood #define CECAR_VAL (1 << 0) /* Valid (ccf1 only) */
8454afbec0SScott Wood #define CECAR_UVT (1 << 15) /* Unavailable target ID (ccf1) */
8554afbec0SScott Wood #define CECAR_SRCID_SHIFT_CCF1 24
8654afbec0SScott Wood #define CECAR_SRCID_MASK_CCF1 (0xff << CECAR_SRCID_SHIFT_CCF1)
8754afbec0SScott Wood #define CECAR_SRCID_SHIFT_CCF2 18
8854afbec0SScott Wood #define CECAR_SRCID_MASK_CCF2 (0xff << CECAR_SRCID_SHIFT_CCF2)
8954afbec0SScott Wood
9054afbec0SScott Wood #define CECADDRH_ADDRH 0xff
9154afbec0SScott Wood
9254afbec0SScott Wood struct ccf_private {
9354afbec0SScott Wood const struct ccf_info *info;
9454afbec0SScott Wood struct device *dev;
9554afbec0SScott Wood void __iomem *regs;
9654afbec0SScott Wood struct ccf_err_regs __iomem *err_regs;
97c3e09b3aSScott Wood bool t1040;
9854afbec0SScott Wood };
9954afbec0SScott Wood
ccf_irq(int irq,void * dev_id)10054afbec0SScott Wood static irqreturn_t ccf_irq(int irq, void *dev_id)
10154afbec0SScott Wood {
10254afbec0SScott Wood struct ccf_private *ccf = dev_id;
10354afbec0SScott Wood static DEFINE_RATELIMIT_STATE(ratelimit, DEFAULT_RATELIMIT_INTERVAL,
10454afbec0SScott Wood DEFAULT_RATELIMIT_BURST);
10554afbec0SScott Wood u32 errdet, cecar, cecar2;
10654afbec0SScott Wood u64 addr;
10754afbec0SScott Wood u32 src_id;
10854afbec0SScott Wood bool uvt = false;
10954afbec0SScott Wood bool cap_valid = false;
11054afbec0SScott Wood
11154afbec0SScott Wood errdet = ioread32be(&ccf->err_regs->errdet);
11254afbec0SScott Wood cecar = ioread32be(&ccf->err_regs->cecar);
11354afbec0SScott Wood cecar2 = ioread32be(&ccf->err_regs->cecar2);
11454afbec0SScott Wood addr = ioread32be(&ccf->err_regs->cecaddrl);
11554afbec0SScott Wood addr |= ((u64)(ioread32be(&ccf->err_regs->cecaddrh) &
11654afbec0SScott Wood CECADDRH_ADDRH)) << 32;
11754afbec0SScott Wood
11854afbec0SScott Wood if (!__ratelimit(&ratelimit))
11954afbec0SScott Wood goto out;
12054afbec0SScott Wood
12154afbec0SScott Wood switch (ccf->info->version) {
12254afbec0SScott Wood case CCF1:
12354afbec0SScott Wood if (cecar & CECAR_VAL) {
12454afbec0SScott Wood if (cecar & CECAR_UVT)
12554afbec0SScott Wood uvt = true;
12654afbec0SScott Wood
12754afbec0SScott Wood src_id = (cecar & CECAR_SRCID_MASK_CCF1) >>
12854afbec0SScott Wood CECAR_SRCID_SHIFT_CCF1;
12954afbec0SScott Wood cap_valid = true;
13054afbec0SScott Wood }
13154afbec0SScott Wood
13254afbec0SScott Wood break;
13354afbec0SScott Wood case CCF2:
13454afbec0SScott Wood if (errdet & ERRDET_CAP) {
13554afbec0SScott Wood src_id = (cecar & CECAR_SRCID_MASK_CCF2) >>
13654afbec0SScott Wood CECAR_SRCID_SHIFT_CCF2;
13754afbec0SScott Wood cap_valid = true;
13854afbec0SScott Wood }
13954afbec0SScott Wood
14054afbec0SScott Wood break;
14154afbec0SScott Wood }
14254afbec0SScott Wood
14354afbec0SScott Wood dev_crit(ccf->dev, "errdet 0x%08x cecar 0x%08x cecar2 0x%08x\n",
14454afbec0SScott Wood errdet, cecar, cecar2);
14554afbec0SScott Wood
14654afbec0SScott Wood if (errdet & ERRDET_LAE) {
14754afbec0SScott Wood if (uvt)
14854afbec0SScott Wood dev_crit(ccf->dev, "LAW Unavailable Target ID\n");
14954afbec0SScott Wood else
15054afbec0SScott Wood dev_crit(ccf->dev, "Local Access Window Error\n");
15154afbec0SScott Wood }
15254afbec0SScott Wood
15354afbec0SScott Wood if (errdet & ERRDET_CV)
15454afbec0SScott Wood dev_crit(ccf->dev, "Coherency Violation\n");
15554afbec0SScott Wood
156c3e09b3aSScott Wood if (errdet & ERRDET_UTID)
157c3e09b3aSScott Wood dev_crit(ccf->dev, "Unavailable Target ID\n");
158c3e09b3aSScott Wood
159c3e09b3aSScott Wood if (errdet & ERRDET_MCST)
160c3e09b3aSScott Wood dev_crit(ccf->dev, "Multicast Stash\n");
161c3e09b3aSScott Wood
16254afbec0SScott Wood if (cap_valid) {
16354afbec0SScott Wood dev_crit(ccf->dev, "address 0x%09llx, src id 0x%x\n",
16454afbec0SScott Wood addr, src_id);
16554afbec0SScott Wood }
16654afbec0SScott Wood
16754afbec0SScott Wood out:
16854afbec0SScott Wood iowrite32be(errdet, &ccf->err_regs->errdet);
16954afbec0SScott Wood return errdet ? IRQ_HANDLED : IRQ_NONE;
17054afbec0SScott Wood }
17154afbec0SScott Wood
ccf_probe(struct platform_device * pdev)17254afbec0SScott Wood static int ccf_probe(struct platform_device *pdev)
17354afbec0SScott Wood {
17454afbec0SScott Wood struct ccf_private *ccf;
17554afbec0SScott Wood const struct of_device_id *match;
176c3e09b3aSScott Wood u32 errinten;
17754afbec0SScott Wood int ret, irq;
17854afbec0SScott Wood
17954afbec0SScott Wood match = of_match_device(ccf_matches, &pdev->dev);
18054afbec0SScott Wood if (WARN_ON(!match))
18154afbec0SScott Wood return -ENODEV;
18254afbec0SScott Wood
18354afbec0SScott Wood ccf = devm_kzalloc(&pdev->dev, sizeof(*ccf), GFP_KERNEL);
18454afbec0SScott Wood if (!ccf)
18554afbec0SScott Wood return -ENOMEM;
18654afbec0SScott Wood
187*d37b0789SLv Ruyi ccf->regs = devm_platform_ioremap_resource(pdev, 0);
188b11a188aSQiheng Lin if (IS_ERR(ccf->regs))
18954afbec0SScott Wood return PTR_ERR(ccf->regs);
19054afbec0SScott Wood
19154afbec0SScott Wood ccf->dev = &pdev->dev;
19254afbec0SScott Wood ccf->info = match->data;
19354afbec0SScott Wood ccf->err_regs = ccf->regs + ccf->info->err_reg_offs;
19454afbec0SScott Wood
195c3e09b3aSScott Wood if (ccf->info->has_brr) {
196c3e09b3aSScott Wood u32 brr = ioread32be(ccf->regs + CCF_BRR);
197c3e09b3aSScott Wood
198c3e09b3aSScott Wood if ((brr & CCF_BRR_IPID) == CCF_BRR_IPID_T1040)
199c3e09b3aSScott Wood ccf->t1040 = true;
200c3e09b3aSScott Wood }
201c3e09b3aSScott Wood
20254afbec0SScott Wood dev_set_drvdata(&pdev->dev, ccf);
20354afbec0SScott Wood
20454afbec0SScott Wood irq = platform_get_irq(pdev, 0);
205dd85345aSKrzysztof Kozlowski if (irq < 0)
206dd85345aSKrzysztof Kozlowski return irq;
20754afbec0SScott Wood
20854afbec0SScott Wood ret = devm_request_irq(&pdev->dev, irq, ccf_irq, 0, pdev->name, ccf);
20954afbec0SScott Wood if (ret) {
21054afbec0SScott Wood dev_err(&pdev->dev, "%s: can't request irq\n", __func__);
21154afbec0SScott Wood return ret;
21254afbec0SScott Wood }
21354afbec0SScott Wood
214c3e09b3aSScott Wood errinten = ERRDET_LAE | ERRDET_CV;
215c3e09b3aSScott Wood if (ccf->t1040)
216c3e09b3aSScott Wood errinten |= ERRDET_UTID | ERRDET_MCST;
217c3e09b3aSScott Wood
21854afbec0SScott Wood switch (ccf->info->version) {
21954afbec0SScott Wood case CCF1:
22054afbec0SScott Wood /* On CCF1 this register enables rather than disables. */
221c3e09b3aSScott Wood iowrite32be(errinten, &ccf->err_regs->errdis);
22254afbec0SScott Wood break;
22354afbec0SScott Wood
22454afbec0SScott Wood case CCF2:
22554afbec0SScott Wood iowrite32be(0, &ccf->err_regs->errdis);
226c3e09b3aSScott Wood iowrite32be(errinten, &ccf->err_regs->errinten);
22754afbec0SScott Wood break;
22854afbec0SScott Wood }
22954afbec0SScott Wood
23054afbec0SScott Wood return 0;
23154afbec0SScott Wood }
23254afbec0SScott Wood
ccf_remove(struct platform_device * pdev)23354afbec0SScott Wood static int ccf_remove(struct platform_device *pdev)
23454afbec0SScott Wood {
23554afbec0SScott Wood struct ccf_private *ccf = dev_get_drvdata(&pdev->dev);
23654afbec0SScott Wood
23754afbec0SScott Wood switch (ccf->info->version) {
23854afbec0SScott Wood case CCF1:
23954afbec0SScott Wood iowrite32be(0, &ccf->err_regs->errdis);
24054afbec0SScott Wood break;
24154afbec0SScott Wood
24254afbec0SScott Wood case CCF2:
24354afbec0SScott Wood /*
24454afbec0SScott Wood * We clear errdis on ccf1 because that's the only way to
24554afbec0SScott Wood * disable interrupts, but on ccf2 there's no need to disable
24654afbec0SScott Wood * detection.
24754afbec0SScott Wood */
24854afbec0SScott Wood iowrite32be(0, &ccf->err_regs->errinten);
24954afbec0SScott Wood break;
25054afbec0SScott Wood }
25154afbec0SScott Wood
25254afbec0SScott Wood return 0;
25354afbec0SScott Wood }
25454afbec0SScott Wood
25554afbec0SScott Wood static struct platform_driver ccf_driver = {
25654afbec0SScott Wood .driver = {
25754afbec0SScott Wood .name = KBUILD_MODNAME,
25854afbec0SScott Wood .of_match_table = ccf_matches,
25954afbec0SScott Wood },
26054afbec0SScott Wood .probe = ccf_probe,
26154afbec0SScott Wood .remove = ccf_remove,
26254afbec0SScott Wood };
26354afbec0SScott Wood
26454afbec0SScott Wood module_platform_driver(ccf_driver);
26554afbec0SScott Wood
26654afbec0SScott Wood MODULE_LICENSE("GPL");
26754afbec0SScott Wood MODULE_AUTHOR("Freescale Semiconductor");
26854afbec0SScott Wood MODULE_DESCRIPTION("Freescale CoreNet Coherency Fabric error reporting");
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