xref: /openbmc/linux/drivers/memory/Kconfig (revision ba61bb17)
1#
2# Memory devices
3#
4
5menuconfig MEMORY
6	bool "Memory Controller drivers"
7
8if MEMORY
9
10config ARM_PL172_MPMC
11	tristate "ARM PL172 MPMC driver"
12	depends on ARM_AMBA && OF
13	help
14	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
15	  If you have an embedded system with an AMBA bus and a PL172
16	  controller, say Y or M here.
17
18config ATMEL_SDRAMC
19	bool "Atmel (Multi-port DDR-)SDRAM Controller"
20	default y
21	depends on ARCH_AT91 && OF
22	help
23	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
24	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
25	  Starting with the at91sam9g45, this controller supports SDR, DDR and
26	  LP-DDR memories.
27
28config ATMEL_EBI
29	bool "Atmel EBI driver"
30	default y
31	depends on ARCH_AT91 && OF
32	select MFD_SYSCON
33	select MFD_ATMEL_SMC
34	help
35	  Driver for Atmel EBI controller.
36	  Used to configure the EBI (external bus interface) when the device-
37	  tree is used. This bus supports NANDs, external ethernet controller,
38	  SRAMs, ATA devices, etc.
39
40config TI_AEMIF
41	tristate "Texas Instruments AEMIF driver"
42	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
43	help
44	  This driver is for the AEMIF module available in Texas Instruments
45	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
46	  is intended to provide a glue-less interface to a variety of
47	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
48	  of 256M bytes of any of these memories can be accessed at a given
49	  time via four chip selects with 64M byte access per chip select.
50
51config TI_EMIF
52	tristate "Texas Instruments EMIF driver"
53	depends on ARCH_OMAP2PLUS
54	select DDR
55	help
56	  This driver is for the EMIF module available in Texas Instruments
57	  SoCs. EMIF is an SDRAM controller that, based on its revision,
58	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
59	  This driver takes care of only LPDDR2 memories presently. The
60	  functions of the driver includes re-configuring AC timing
61	  parameters and other settings during frequency, voltage and
62	  temperature changes
63
64config OMAP_GPMC
65	bool
66	select GPIOLIB
67	help
68	  This driver is for the General Purpose Memory Controller (GPMC)
69	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
70	  interfacing to a variety of asynchronous as well as synchronous
71	  memory drives like NOR, NAND, OneNAND, SRAM.
72
73config OMAP_GPMC_DEBUG
74	bool "Enable GPMC debug output and skip reset of GPMC during init"
75	depends on OMAP_GPMC
76	help
77	  Enables verbose debugging mostly to decode the bootloader provided
78	  timings. To preserve the bootloader provided timings, the reset
79	  of GPMC is skipped during init. Enable this during development to
80	  configure devices connected to the GPMC bus.
81
82	  NOTE: In addition to matching the register setup with the bootloader
83	  you also need to match the GPMC FCLK frequency used by the
84	  bootloader or else the GPMC timings won't be identical with the
85	  bootloader timings.
86
87config TI_EMIF_SRAM
88	tristate "Texas Instruments EMIF SRAM driver"
89	depends on (SOC_AM33XX || SOC_AM43XX) && SRAM
90	help
91	  This driver is for the EMIF module available on Texas Instruments
92	  AM33XX and AM43XX SoCs and is required for PM. Certain parts of
93	  the EMIF PM code must run from on-chip SRAM late in the suspend
94	  sequence so this driver provides several relocatable PM functions
95	  for the SoC PM code to use.
96
97config MVEBU_DEVBUS
98	bool "Marvell EBU Device Bus Controller"
99	default y
100	depends on PLAT_ORION && OF
101	help
102	  This driver is for the Device Bus controller available in some
103	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
104	  Armada 370 and Armada XP. This controller allows to handle flash
105	  devices such as NOR, NAND, SRAM, and FPGA.
106
107config FSL_CORENET_CF
108	tristate "Freescale CoreNet Error Reporting"
109	depends on FSL_SOC_BOOKE
110	help
111	  Say Y for reporting of errors from the Freescale CoreNet
112	  Coherency Fabric.  Errors reported include accesses to
113	  physical addresses that mapped by no local access window
114	  (LAW) or an invalid LAW, as well as bad cache state that
115	  represents a coherency violation.
116
117config FSL_IFC
118	bool
119	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
120
121config JZ4780_NEMC
122	bool "Ingenic JZ4780 SoC NEMC driver"
123	default y
124	depends on MACH_JZ4780
125	help
126	  This driver is for the NAND/External Memory Controller (NEMC) in
127	  the Ingenic JZ4780. This controller is used to handle external
128	  memory devices such as NAND and SRAM.
129
130config MTK_SMI
131	bool
132	depends on ARCH_MEDIATEK || COMPILE_TEST
133	help
134	  This driver is for the Memory Controller module in MediaTek SoCs,
135	  mainly help enable/disable iommu and control the power domain and
136	  clocks for each local arbiter.
137
138config DA8XX_DDRCTL
139	bool "Texas Instruments da8xx DDR2/mDDR driver"
140	depends on ARCH_DAVINCI_DA8XX
141	help
142	  This driver is for the DDR2/mDDR Memory Controller present on
143	  Texas Instruments da8xx SoCs. It's used to tweak various memory
144	  controller configuration options.
145
146source "drivers/memory/samsung/Kconfig"
147source "drivers/memory/tegra/Kconfig"
148
149endif
150