1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Memory devices 4# 5 6menuconfig MEMORY 7 bool "Memory Controller drivers" 8 help 9 This option allows to enable specific memory controller drivers, 10 useful mostly on embedded systems. These could be controllers 11 for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features 12 vary from memory tuning and frequency scaling to enabling 13 access to attached peripherals through memory bus. 14 15if MEMORY 16 17config DDR 18 bool 19 help 20 Data from JEDEC specs for DDR SDRAM memories, 21 particularly the AC timing parameters and addressing 22 information. This data is useful for drivers handling 23 DDR SDRAM controllers. 24 25config ARM_PL172_MPMC 26 tristate "ARM PL172 MPMC driver" 27 depends on ARM_AMBA && OF 28 help 29 This selects the ARM PrimeCell PL172 MultiPort Memory Controller. 30 If you have an embedded system with an AMBA bus and a PL172 31 controller, say Y or M here. 32 33config ATMEL_SDRAMC 34 bool "Atmel (Multi-port DDR-)SDRAM Controller" 35 default y 36 depends on ARCH_AT91 && OF 37 help 38 This driver is for Atmel SDRAM Controller or Atmel Multi-port 39 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs. 40 Starting with the at91sam9g45, this controller supports SDR, DDR and 41 LP-DDR memories. 42 43config ATMEL_EBI 44 bool "Atmel EBI driver" 45 default y 46 depends on ARCH_AT91 && OF 47 select MFD_SYSCON 48 select MFD_ATMEL_SMC 49 help 50 Driver for Atmel EBI controller. 51 Used to configure the EBI (external bus interface) when the device- 52 tree is used. This bus supports NANDs, external ethernet controller, 53 SRAMs, ATA devices, etc. 54 55config BT1_L2_CTL 56 bool "Baikal-T1 CM2 L2-RAM Cache Control Block" 57 depends on MIPS_BAIKAL_T1 || COMPILE_TEST 58 select MFD_SYSCON 59 help 60 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU 61 resides Coherency Manager v2 with embedded 1MB L2-cache. It's 62 possible to tune the L2 cache performance up by setting the data, 63 tags and way-select latencies of RAM access. This driver provides a 64 dt properties-based and sysfs interface for it. 65 66config TI_AEMIF 67 tristate "Texas Instruments AEMIF driver" 68 depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF 69 help 70 This driver is for the AEMIF module available in Texas Instruments 71 SoCs. AEMIF stands for Asynchronous External Memory Interface and 72 is intended to provide a glue-less interface to a variety of 73 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total 74 of 256M bytes of any of these memories can be accessed at a given 75 time via four chip selects with 64M byte access per chip select. 76 77config TI_EMIF 78 tristate "Texas Instruments EMIF driver" 79 depends on ARCH_OMAP2PLUS 80 select DDR 81 help 82 This driver is for the EMIF module available in Texas Instruments 83 SoCs. EMIF is an SDRAM controller that, based on its revision, 84 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 85 This driver takes care of only LPDDR2 memories presently. The 86 functions of the driver includes re-configuring AC timing 87 parameters and other settings during frequency, voltage and 88 temperature changes 89 90config OMAP_GPMC 91 bool 92 select GPIOLIB 93 help 94 This driver is for the General Purpose Memory Controller (GPMC) 95 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows 96 interfacing to a variety of asynchronous as well as synchronous 97 memory drives like NOR, NAND, OneNAND, SRAM. 98 99config OMAP_GPMC_DEBUG 100 bool "Enable GPMC debug output and skip reset of GPMC during init" 101 depends on OMAP_GPMC 102 help 103 Enables verbose debugging mostly to decode the bootloader provided 104 timings. To preserve the bootloader provided timings, the reset 105 of GPMC is skipped during init. Enable this during development to 106 configure devices connected to the GPMC bus. 107 108 NOTE: In addition to matching the register setup with the bootloader 109 you also need to match the GPMC FCLK frequency used by the 110 bootloader or else the GPMC timings won't be identical with the 111 bootloader timings. 112 113config TI_EMIF_SRAM 114 tristate "Texas Instruments EMIF SRAM driver" 115 depends on (SOC_AM33XX || SOC_AM43XX) && SRAM 116 help 117 This driver is for the EMIF module available on Texas Instruments 118 AM33XX and AM43XX SoCs and is required for PM. Certain parts of 119 the EMIF PM code must run from on-chip SRAM late in the suspend 120 sequence so this driver provides several relocatable PM functions 121 for the SoC PM code to use. 122 123config MVEBU_DEVBUS 124 bool "Marvell EBU Device Bus Controller" 125 default y 126 depends on PLAT_ORION && OF 127 help 128 This driver is for the Device Bus controller available in some 129 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and 130 Armada 370 and Armada XP. This controller allows to handle flash 131 devices such as NOR, NAND, SRAM, and FPGA. 132 133config FSL_CORENET_CF 134 tristate "Freescale CoreNet Error Reporting" 135 depends on FSL_SOC_BOOKE 136 help 137 Say Y for reporting of errors from the Freescale CoreNet 138 Coherency Fabric. Errors reported include accesses to 139 physical addresses that mapped by no local access window 140 (LAW) or an invalid LAW, as well as bad cache state that 141 represents a coherency violation. 142 143config FSL_IFC 144 bool 145 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 146 depends on HAS_IOMEM 147 148config JZ4780_NEMC 149 bool "Ingenic JZ4780 SoC NEMC driver" 150 depends on MIPS || COMPILE_TEST 151 depends on HAS_IOMEM && OF 152 help 153 This driver is for the NAND/External Memory Controller (NEMC) in 154 the Ingenic JZ4780. This controller is used to handle external 155 memory devices such as NAND and SRAM. 156 157config MTK_SMI 158 bool 159 depends on ARCH_MEDIATEK || COMPILE_TEST 160 help 161 This driver is for the Memory Controller module in MediaTek SoCs, 162 mainly help enable/disable iommu and control the power domain and 163 clocks for each local arbiter. 164 165config DA8XX_DDRCTL 166 bool "Texas Instruments da8xx DDR2/mDDR driver" 167 depends on ARCH_DAVINCI_DA8XX 168 help 169 This driver is for the DDR2/mDDR Memory Controller present on 170 Texas Instruments da8xx SoCs. It's used to tweak various memory 171 controller configuration options. 172 173config PL353_SMC 174 tristate "ARM PL35X Static Memory Controller(SMC) driver" 175 default y 176 depends on ARM 177 depends on ARM_AMBA 178 help 179 This driver is for the ARM PL351/PL353 Static Memory 180 Controller(SMC) module. 181 182config RENESAS_RPCIF 183 tristate "Renesas RPC-IF driver" 184 depends on ARCH_RENESAS 185 select REGMAP_MMIO 186 help 187 This supports Renesas R-Car Gen3 RPC-IF which provides either SPI 188 host or HyperFlash. You'll have to select individual components 189 under the corresponding menu. 190 191config STM32_FMC2_EBI 192 tristate "Support for FMC2 External Bus Interface on STM32MP SoCs" 193 depends on MACH_STM32MP157 || COMPILE_TEST 194 select MFD_SYSCON 195 help 196 Select this option to enable the STM32 FMC2 External Bus Interface 197 controller. This driver configures the transactions with external 198 devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on 199 SOCs containing the FMC2 External Bus Interface. 200 201source "drivers/memory/samsung/Kconfig" 202source "drivers/memory/tegra/Kconfig" 203 204endif 205